May 2010 - U-Boot

[U-Boot] [PATCH 2/3 v2] drivers/serial/serial.c: code maintainability improvments.
by Michael Zaidman 29 Jun '10

29 Jun '10

Signed-off-by: Michael Zaidman <michael.zaidman(a)gmail.com> --- drivers/serial/serial.c | 27 +++++++++++++++++---------- 1 files changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index dd5f332..ba88cb0 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -45,24 +45,27 @@ DECLARE_GLOBAL_DATA_PTR; #else #error "No console index specified." #endif /* CONFIG_SERIAL_MULTI */ -#elif (CONFIG_CONS_INDEX < 1) || (CONFIG_CONS_INDEX > 4) +#elif CONFIG_CONS_INDEX < 1 #error "Invalid console index value." #endif -#if CONFIG_CONS_INDEX == 1 && !defined(CONFIG_SYS_NS16550_COM1) -#error "Console port 1 defined but not configured." -#elif CONFIG_CONS_INDEX == 2 && !defined(CONFIG_SYS_NS16550_COM2) -#error "Console port 2 defined but not configured." -#elif CONFIG_CONS_INDEX == 3 && !defined(CONFIG_SYS_NS16550_COM3) -#error "Console port 3 defined but not configured." -#elif CONFIG_CONS_INDEX == 4 && !defined(CONFIG_SYS_NS16550_COM4) -#error "Console port 4 defined but not configured." +#define CONSOLE_PORT_SANITY_CHECK(port) \ + CONFIG_CONS_INDEX == port && !defined(CONFIG_SYS_NS16550_COM##port) + +#if CONSOLE_PORT_SANITY_CHECK(1) +#error Console port 1 defined but not configured. +#elif CONSOLE_PORT_SANITY_CHECK(2) +#error Console port 2 defined but not configured. +#elif CONSOLE_PORT_SANITY_CHECK(3) +#error Console port 3 defined but not configured. +#elif CONSOLE_PORT_SANITY_CHECK(4) +#error Console port 4 defined but not configured. #endif /* Note: The port number specified in the functions is 1 based. * the array is 0 based. */ -static NS16550_t serial_ports[4] = { +static NS16550_t serial_ports[] = { #ifdef CONFIG_SYS_NS16550_COM1 (NS16550_t)CONFIG_SYS_NS16550_COM1, #else @@ -85,6 +88,8 @@ static NS16550_t serial_ports[4] = { #endif }; +#define MAX_SER_PORTS (sizeof(serial_ports) / sizeof(NS16550_t)) + #define PORT serial_ports[port-1] #if defined(CONFIG_CONS_INDEX) #define CONSOLE (serial_ports[CONFIG_CONS_INDEX-1]) @@ -160,6 +165,8 @@ int serial_init (void) { int clock_divisor; + BUILD_BUG_ON(CONFIG_CONS_INDEX > MAX_SER_PORTS); + #ifdef CONFIG_NS87308 initialise_ns87308(); #endif -- 1.6.3.3

3 5

[U-Boot] [PATCH] KGDB set / remove breakpoints
by Tonny Tzeng 28 Jun '10

28 Jun '10

This patch extends the current KGDB logic to handle 'Z' and 'z' GDB packets for setting or removing breakpoints. Two weak functions have been added to the kgdb_stub.c: arch_kgdb_set_sw_break() and arch_kgdb_remove_sw_break() could be overrode by the arch implementations. Please note, after applying this patch, those architectures, which already enabled KGDB support, have to create a new asm/kgdb.h and define the length of the break instruction (BREAK_INSTR_SIZE) in that file. Signed-off-by: Tonny Tzeng <tonny.tzeng(a)gmail.com> --- common/kgdb.c | 85 +++++++++++++++++++++++++++++++++++++++++++++++++++ common/kgdb_stubs.c | 12 +++++++ include/kgdb.h | 31 ++++++++++++++++++ 3 files changed, 128 insertions(+), 0 deletions(-) diff --git a/common/kgdb.c b/common/kgdb.c index 0531452..66378e5 100644 --- a/common/kgdb.c +++ b/common/kgdb.c @@ -220,6 +220,85 @@ hexToInt(char **ptr, int *intValue) return (numChars); } +/* + * Holds information about breakpoints in a kernel. These breakpoints are + * added and removed by gdb. + */ +static struct kgdb_bkpt kgdb_break[KGDB_MAX_BREAKPOINTS]; + +static int kgdb_set_sw_break(int addr) +{ + int i, breakno = -1; + struct kgdb_bkpt *bkpt; + + for (i = 0; i < KGDB_MAX_BREAKPOINTS; i++) { + if ((kgdb_break[i].state == BP_SET) && + (kgdb_break[i].bpt_addr == addr)) + return -KGDBERR_BPEXIST; + if ((kgdb_break[i].state == BP_REMOVED) && + (kgdb_break[i].bpt_addr == addr)) { + breakno = i; + break; + } + } + if (breakno == -1) + for (i = 0; i < KGDB_MAX_BREAKPOINTS; i++) { + if (kgdb_break[i].state == BP_UNDEFINED) { + breakno = i; + break; + } + } + if (breakno == -1) + return -KGDBERR_BPNOENT; + + bkpt = kgdb_break + breakno; + bkpt->state = BP_SET; + bkpt->type = BP_BREAKPOINT; + bkpt->bpt_addr = addr; + arch_kgdb_set_sw_break(bkpt); + + return 0; +} + +static int kgdb_remove_sw_break(int addr) +{ + int i; + struct kgdb_bkpt *bkpt; + + for (i = 0; i < KGDB_MAX_BREAKPOINTS; i++) { + bkpt = kgdb_break + i; + if ((bkpt->state == BP_SET) && (bkpt->bpt_addr == addr)) { + bkpt->state = BP_REMOVED; + arch_kgdb_remove_sw_break(bkpt); + return 0; + } + } + return -KGDBERR_BPNOENT; +} + +/* Handle the 'z' or 'Z' breakpoint remove or set packets */ +static void gdb_cmd_break(kgdb_data *kdp) +{ + /* + * Since GDB-5.3, it's been drafted that '0' is a software + * breakpoint, '1' is a hardware breakpoint, so let's do that. + */ + char *bpt_type = &remcomInBuffer[1]; + char *ptr = &remcomInBuffer[2]; + int addr, length; + + if (*bpt_type != '0') + return; /* Unsupported. */ + if (*ptr++ != ',' || !hexToInt(&ptr, &addr) || + *ptr++ != ',' || !hexToInt(&ptr, &length)) { + kgdb_error(KGDBERR_BADPARAMS); + } + + if ((remcomInBuffer[0] == 'Z' && kgdb_set_sw_break(addr) == 0) || + (remcomInBuffer[0] == 'z' && kgdb_remove_sw_break(addr) == 0)) + strcpy(remcomOutBuffer, "OK"); +} + /* scan for the sequence $<data>#<checksum> */ static void getpacket(char *buffer) @@ -341,7 +420,9 @@ handle_exception (struct pt_regs *regs) kgdb_interruptible(0); +#ifdef KGDB_DEBUG printf("kgdb: handle_exception; trap [0x%x]\n", kgdb_trap(regs)); +#endif if (kgdb_setjmp(error_jmp_buf) != 0) panic("kgdb: error or fault in entry init!\n"); @@ -516,6 +597,10 @@ handle_exception (struct pt_regs *regs) kgdb_error(KGDBERR_BADPARAMS); } break; + case 'Z': /* [Z|z]N,AA..AA,LLLL Set/Remove breakpoint type N */ + case 'z': /* LLLL bytes at address AA.AA return OK */ + gdb_cmd_break(&kd); + break; } /* switch */ if (errnum != 0) diff --git a/common/kgdb_stubs.c b/common/kgdb_stubs.c index 19b0c18..2b3f424 100644 --- a/common/kgdb_stubs.c +++ b/common/kgdb_stubs.c @@ -45,6 +45,18 @@ void kgdb_interruptible(int yes) } __attribute__((weak)) +void arch_kgdb_set_sw_break(struct kgdb_bkpt *bkpt) +{ + return; +} + +__attribute__((weak)) +void arch_kgdb_remove_sw_break(struct kgdb_bkpt *bkpt) +{ + return; +} + +__attribute__((weak)) void kgdb_flush_cache_range(void *from, void *to) { flush_cache((unsigned long)from, (unsigned long)(to - from)); diff --git a/include/kgdb.h b/include/kgdb.h index f543cd6..82ae8ab 100644 --- a/include/kgdb.h +++ b/include/kgdb.h @@ -2,12 +2,41 @@ #define __KGDB_H__ #include <asm/ptrace.h> +#include <asm/kgdb.h> #define KGDBERR_BADPARAMS 1 #define KGDBERR_NOTHEXDIG 2 #define KGDBERR_MEMFAULT 3 #define KGDBERR_NOSPACE 4 #define KGDBERR_ALIGNFAULT 5 +#define KGDBERR_BPEXIST 6 +#define KGDBERR_BPNOENT 7 + +#ifndef KGDB_MAX_BREAKPOINTS +#define KGDB_MAX_BREAKPOINTS 1000 +#endif + +enum kgdb_bptype { + BP_BREAKPOINT = 0, + BP_HARDWARE_BREAKPOINT, + BP_WRITE_WATCHPOINT, + BP_READ_WATCHPOINT, + BP_ACCESS_WATCHPOINT +}; + +enum kgdb_bpstate { + BP_UNDEFINED = 0, + BP_REMOVED, + BP_SET, + BP_ACTIVE +}; + +struct kgdb_bkpt { + unsigned long bpt_addr; + unsigned char saved_instr[BREAK_INSTR_SIZE]; + enum kgdb_bptype type; + enum kgdb_bpstate state; +}; #define KGDBDATA_MAXREGS 8 #define KGDBDATA_MAXPRIV 8 @@ -56,6 +85,8 @@ extern void kgdb_putreg(struct pt_regs *, int, char *, int); extern void kgdb_putregs(struct pt_regs *, char *, int); extern int kgdb_trap(struct pt_regs *); extern void kgdb_breakpoint(int argc, char *argv[]); +extern void arch_kgdb_set_sw_break(struct kgdb_bkpt *); +extern void arch_kgdb_remove_sw_break(struct kgdb_bkpt *); /* these functions are provided by the platform serial driver */ extern void kgdb_serial_init(void); -- 1.6.0.6

3 10

[U-Boot] [PATCH] sa1100 change get_timer(base) to return time since base
by Jochen Friedrich 28 Jun '10

28 Jun '10

similar to 274737e5eb25b2bcd3af3a96da923effd543284f This patch changes get_timer() for sa1100 to return the time since 'base' instead of the time since the counter was at zero. Symptom seen is flash timeout errors when erasing or programming a sector using the common cfi flash code. Signed-off-by: Jochen Friedrich <jochen(a)scram.de> --- arch/arm/cpu/sa1100/timer.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/sa1100/timer.c b/arch/arm/cpu/sa1100/timer.c index 0207501..aea90ab 100644 --- a/arch/arm/cpu/sa1100/timer.c +++ b/arch/arm/cpu/sa1100/timer.c @@ -41,7 +41,7 @@ void reset_timer (void) ulong get_timer (ulong base) { - return get_timer_masked (); + return get_timer_masked () - base; } void set_timer (ulong t) -- 1.7.1

4 8

[U-Boot] [PATCH v3 00/19] SPEAr : Network support for spear platforms and SPEAr1300
by Vipin KUMAR 25 Jun '10

25 Jun '10

Hello Tom, The following patch-set contains all the accepted feedbacks on patch-set v2. Please consider this for submission into mainline Below changes are introduced other than the recieved review comments 1. Introduced a CONFIG_DW_SEARCH_PHY definition, which if defined searches the ethernet phy address. Searching was always enabled in earlier patch 2. Introduced a new function dw_write_hwaddr in ethernet driver and registered it as a callback via dev->write_hwaddr. This is a new feature recently implemented by Ben. Thanks in advance Regards Vipin Vipin Kumar (19): u-boot.img file not created when srctree and objtree are different change_bit routine defined SPEAr : SMI erase and write timeouts increased SPEAr : Placing ethaddr write and read within CONFIG_CMD_NET SPEAr : Reducing the max RAM size to 128MB SPEAr : Basic arch related support added for SPEAr SoCs SPEAr : Network driver support added SPEAr : Network support configured for spear SoCs SPEAr : macb driver support added for spear310 and spear320 SPEAr : FSMC driver support added SPEAr : Configuring FSMC driver for NAND interface SPEAr : i2c driver moved completely into drivers/i2c SPEAr : smi driver moved completely into drivers/mtd SPEAr : USB Device Controller driver support added SPEAr : Supporting various configurations for spear3xx and spear6xx boards SPEAr : Basic spear1300 architecture support added SPEAr : spear1300 SoC support added SPEAr : Removing extraneous code SPEAr : USB device controller bugfixes MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 30 +- arch/arm/cpu/arm926ejs/spear/Makefile | 3 +- arch/arm/cpu/arm926ejs/spear/cpu.c | 78 +++ arch/arm/cpu/arm_cortexa8/spear13xx/Makefile | 52 ++ arch/arm/cpu/arm_cortexa8/spear13xx/cache.S | 114 +++++ arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c | 96 ++++ .../arm_cortexa8/spear13xx/reset.c} | 52 +-- arch/arm/cpu/arm_cortexa8/spear13xx/timer.c | 138 +++++ .../arm/include/asm/arch-spear/clk.h | 26 +- arch/arm/include/asm/arch-spear/hardware.h | 16 +- arch/arm/include/asm/arch-spear/spr_misc.h | 5 + .../arm/include/asm/arch-spear13xx/hardware.h | 33 +- arch/arm/include/asm/arch-spear13xx/spr_gpt.h | 85 ++++ arch/arm/include/asm/arch-spear13xx/spr_misc.h | 317 ++++++++++++ .../arm/include/asm/arch-spear13xx/sys_proto.h | 29 +- arch/arm/include/asm/bitops.h | 11 +- board/spear/common/Makefile | 10 +- board/spear/common/spr_misc.c | 28 +- board/spear/spear1300/Makefile | 51 ++ board/spear/spear1300/config.mk | 28 + board/spear/spear1300/spear1300.c | 88 ++++ .../spear/spear1300/spr_lowlevel_init.S | 35 +- board/spear/spear300/config.mk | 11 - board/spear/spear300/spear300.c | 15 +- board/spear/spear310/config.mk | 11 - board/spear/spear310/spear310.c | 36 ++- board/spear/spear320/config.mk | 11 - board/spear/spear320/spear320.c | 23 +- board/spear/spear600/config.mk | 11 - board/spear/spear600/spear600.c | 15 +- doc/README.designware_eth | 25 + doc/README.spear | 46 ++- drivers/i2c/Makefile | 2 +- drivers/i2c/{spr_i2c.c => designware_i2c.c} | 4 +- .../spr_i2c.h => drivers/i2c/designware_i2c.h | 6 +- drivers/mtd/Makefile | 2 +- drivers/mtd/nand/Makefile | 2 +- drivers/mtd/nand/fsmc_nand.c | 366 ++++++++++++++ drivers/mtd/nand/spr_nand.c | 124 ----- drivers/mtd/{spr_smi.c => st_smi.c} | 59 ++- .../arch-spear/spr_smi.h => drivers/mtd/st_smi.h | 8 +- drivers/net/Makefile | 1 + drivers/net/designware.c | 531 ++++++++++++++++++++ drivers/net/designware.h | 264 ++++++++++ drivers/serial/usbtty.h | 4 +- drivers/usb/gadget/Makefile | 2 +- drivers/usb/gadget/{spr_udc.c => designware_udc.c} | 116 +++-- include/configs/spear-common.h | 33 +- include/configs/spear13xx_evb.h | 202 ++++++++ include/configs/{spear3xx.h => spear3xx_evb.h} | 30 ++ include/configs/{spear6xx.h => spear6xx_evb.h} | 13 + include/linux/mtd/fsmc_nand.h | 104 ++++ include/netdev.h | 1 + include/usb/{spr_udc.h => designware_udc.h} | 6 +- 56 files changed, 2993 insertions(+), 418 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/spear/cpu.c create mode 100644 arch/arm/cpu/arm_cortexa8/spear13xx/Makefile create mode 100644 arch/arm/cpu/arm_cortexa8/spear13xx/cache.S create mode 100644 arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c rename arch/arm/{include/asm/arch-spear/spr_nand.h => cpu/arm_cortexa8/spear13xx/reset.c} (50%) mode change 100644 => 100755 create mode 100644 arch/arm/cpu/arm_cortexa8/spear13xx/timer.c copy include/configs/spear6xx.h => arch/arm/include/asm/arch-spear/clk.h (64%) copy include/configs/spear6xx.h => arch/arm/include/asm/arch-spear13xx/hardware.h (58%) create mode 100644 arch/arm/include/asm/arch-spear13xx/spr_gpt.h create mode 100644 arch/arm/include/asm/arch-spear13xx/spr_misc.h copy include/configs/spear6xx.h => arch/arm/include/asm/arch-spear13xx/sys_proto.h (64%) create mode 100644 board/spear/spear1300/Makefile create mode 100644 board/spear/spear1300/config.mk create mode 100644 board/spear/spear1300/spear1300.c copy include/configs/spear6xx.h => board/spear/spear1300/spr_lowlevel_init.S (56%) create mode 100644 doc/README.designware_eth rename drivers/i2c/{spr_i2c.c => designware_i2c.c} (98%) rename arch/arm/include/asm/arch-spear/spr_i2c.h => drivers/i2c/designware_i2c.h (98%) create mode 100644 drivers/mtd/nand/fsmc_nand.c delete mode 100644 drivers/mtd/nand/spr_nand.c rename drivers/mtd/{spr_smi.c => st_smi.c} (94%) rename arch/arm/include/asm/arch-spear/spr_smi.h => drivers/mtd/st_smi.h (96%) create mode 100644 drivers/net/designware.c create mode 100644 drivers/net/designware.h rename drivers/usb/gadget/{spr_udc.c => designware_udc.c} (91%) create mode 100644 include/configs/spear13xx_evb.h rename include/configs/{spear3xx.h => spear3xx_evb.h} (85%) rename include/configs/{spear6xx.h => spear6xx_evb.h} (82%) create mode 100644 include/linux/mtd/fsmc_nand.h rename include/usb/{spr_udc.h => designware_udc.h} (98%)

7 37

[U-Boot] [PATCH] [PATCH V4]Save environment data to mmc.
by Terry Lv 24 Jun '10

24 Jun '10

This patch is to save environment data to mmc card. It uses interfaces defined in generic mmc. Signed-off-by: Terry Lv <r65388(a)freescale.com> --- arch/arm/lib/board.c | 14 +++-- arch/powerpc/lib/board.c | 16 +++-- common/Makefile | 1 + common/cmd_nvedit.c | 3 +- common/env_mmc.c | 154 ++++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 176 insertions(+), 12 deletions(-) create mode 100644 common/env_mmc.c diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index f5660a9..b7174ea 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -347,6 +347,15 @@ void start_armboot (void) dataflash_print_info(); #endif +#ifdef CONFIG_GENERIC_MMC +/* MMC initialization is called before relocating env. + Thus It is required that operations like pin multiplexer + be put in board_init. +*/ + puts ("MMC: "); + mmc_initialize (gd->bd); +#endif + /* initialize environment */ env_relocate (); @@ -419,11 +428,6 @@ extern void davinci_eth_set_mac_addr (const u_int8_t *addr); board_late_init (); #endif -#ifdef CONFIG_GENERIC_MMC - puts ("MMC: "); - mmc_initialize (gd->bd); -#endif - #ifdef CONFIG_BITBANGMII bb_miiphy_init(); #endif diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 7b09fb5..6e51442 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -783,6 +783,16 @@ void board_init_r (gd_t *id, ulong dest_addr) nand_init(); /* go init the NAND */ #endif +#ifdef CONFIG_GENERIC_MMC +/* MMC initialization is called before relocating env. + Thus It is required that operations like pin multiplexer + be put in board_init. +*/ + WATCHDOG_RESET (); + puts ("MMC: "); + mmc_initialize (bd); +#endif + /* relocate environment function pointers etc. */ env_relocate (); @@ -939,12 +949,6 @@ void board_init_r (gd_t *id, ulong dest_addr) scsi_init (); #endif -#ifdef CONFIG_GENERIC_MMC - WATCHDOG_RESET (); - puts ("MMC: "); - mmc_initialize (bd); -#endif - #if defined(CONFIG_CMD_DOC) WATCHDOG_RESET (); puts ("DOC: "); diff --git a/common/Makefile b/common/Makefile index dbf7a05..2c37073 100644 --- a/common/Makefile +++ b/common/Makefile @@ -58,6 +58,7 @@ COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_embedded.o COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_embedded.o COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o COBJS-$(CONFIG_ENV_IS_IN_MG_DISK) += env_mgdisk.o +COBJS-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o COBJS-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o COBJS-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index eb89e9e..57dc288 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -59,13 +59,14 @@ DECLARE_GLOBAL_DATA_PTR; !defined(CONFIG_ENV_IS_IN_FLASH) && \ !defined(CONFIG_ENV_IS_IN_DATAFLASH) && \ !defined(CONFIG_ENV_IS_IN_MG_DISK) && \ + !defined(CONFIG_ENV_IS_IN_MMC) && \ !defined(CONFIG_ENV_IS_IN_NAND) && \ !defined(CONFIG_ENV_IS_IN_NVRAM) && \ !defined(CONFIG_ENV_IS_IN_ONENAND) && \ !defined(CONFIG_ENV_IS_IN_SPI_FLASH) && \ !defined(CONFIG_ENV_IS_NOWHERE) # error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|ONENAND|\ -SPI_FLASH|MG_DISK|NVRAM|NOWHERE} +SPI_FLASH|MG_DISK|NVRAM|MMC|NOWHERE} #endif #define XMK_STR(x) #x diff --git a/common/env_mmc.c b/common/env_mmc.c new file mode 100644 index 0000000..c9a9415 --- /dev/null +++ b/common/env_mmc.c @@ -0,0 +1,154 @@ +/* + * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* #define DEBUG */ + +#include <common.h> + +#include <command.h> +#include <environment.h> +#include <linux/stddef.h> +#include <malloc.h> +#include <mmc.h> + +/* references to names in env_common.c */ +extern uchar default_environment[]; + +char *env_name_spec = "MMC"; + +#ifdef ENV_IS_EMBEDDED +extern uchar environment[]; +env_t *env_ptr = (env_t *)(&environment[0]); +#else /* ! ENV_IS_EMBEDDED */ +env_t *env_ptr = NULL; +#endif /* ENV_IS_EMBEDDED */ + +/* local functions */ +#if !defined(ENV_IS_EMBEDDED) +static void use_default(void); +#endif + +DECLARE_GLOBAL_DATA_PTR; + +uchar env_get_char_spec(int index) +{ + return *((uchar *)(gd->env_addr + index)); +} + +int env_init(void) +{ + /* use default */ + gd->env_addr = (ulong)&default_environment[0]; + gd->env_valid = 1; + + return 0; +} + +int init_mmc_for_env(struct mmc *mmc) +{ + if (!mmc) { + puts("No MMC card found\n"); + return -1; + } + + if (mmc_init(mmc)) { + puts("MMC init failed\n"); + return -1; + } + + return 0; +} + +#ifdef CONFIG_CMD_SAVEENV + +inline int write_env(struct mmc *mmc, unsigned long size, + unsigned long offset, const void *buffer) +{ + uint blk_start, blk_cnt, n; + + blk_start = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len; + blk_cnt = ALIGN(size, mmc->write_bl_len) / mmc->write_bl_len; + + n = mmc->block_dev.block_write(CONFIG_SYS_MMC_ENV_DEV, blk_start, + blk_cnt, (u_char *)buffer); + + return (n == blk_cnt) ? 0 : -1; +} + +int saveenv(void) +{ + struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV); + + if (init_mmc_for_env(mmc)) + return 1; + + printf("Writing to MMC(%d)... ", CONFIG_SYS_MMC_ENV_DEV); + if (write_env(mmc, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, env_ptr)) { + puts("failed\n"); + return 1; + } + + puts("done\n"); + return 0; +} +#endif /* CONFIG_CMD_SAVEENV */ + +inline int read_env(struct mmc *mmc, unsigned long size, + unsigned long offset, const void *buffer) +{ + uint blk_start, blk_cnt, n; + + blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len; + blk_cnt = ALIGN(size, mmc->read_bl_len) / mmc->read_bl_len; + + n = mmc->block_dev.block_read(CONFIG_SYS_MMC_ENV_DEV, blk_start, + blk_cnt, (uchar *)buffer); + + return (n == blk_cnt) ? 0 : -1; +} + +void env_relocate_spec(void) +{ +#if !defined(ENV_IS_EMBEDDED) + struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV); + + if (init_mmc_for_env(mmc)) + return; + + if (read_env(mmc, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, env_ptr)) + return use_default(); + + if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc) + return use_default(); + + gd->env_valid = 1; +#endif +} + +#if !defined(ENV_IS_EMBEDDED) +static void use_default() +{ + puts ("*** Warning - bad CRC or MMC, using default environment\n\n"); + set_default_env(); +} +#endif + -- 1.6.0.4

4 4

[U-Boot] [PATCH v2] remove myself as a maintainer of several ARM boards
by Guennadi Liakhovetski 22 Jun '10

22 Jun '10

Since I haven't been actively maintaining these boards for a long while, keeping myself as their maintainer makes no sense. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski(a)gmx.de> --- v1 -> v2 added to the orphaned list diff --git a/MAINTAINERS b/MAINTAINERS index bb03f17..6274599 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -645,12 +645,6 @@ Sergey Lapin <slapin(a)ossfans.org> afeb9260 ARM926EJS (AT91SAM9260 SoC) -Guennadi Liakhovetski <g.liakhovetski(a)gmx.de> - - imx31_phycore_eet i.MX31 - mx31ads i.MX31 - SMDK6400 S3C6400 - Nishanth Menon <nm(a)ti.com> omap3_sdp3430 ARM CORTEX-A8 (OMAP3xx SoC) @@ -786,6 +780,10 @@ Unknown / orphaned boards: ixdp425 xscale Kyle Harris <kharris(a)nexus-tech.net> / dead address lubbock xscale Kyle Harris <kharris(a)nexus-tech.net> / dead address + imx31_phycore_eet i.MX31 Guennadi Liakhovetski <g.liakhovetski(a)gmx.de> / resigned + mx31ads i.MX31 Guennadi Liakhovetski <g.liakhovetski(a)gmx.de> / resigned + SMDK6400 S3C6400 Guennadi Liakhovetski <g.liakhovetski(a)gmx.de> / resigned + ######################################################################### # x86 Systems: # # #

2 1

[U-Boot] [PATCH] A little bug in macro __arch_ioremap.
by Terry Lv 22 Jun '10

22 Jun '10

Signed-off-by: Terry Lv <r65388(a)freescale.com> --- arch/arm/include/asm/io.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 0a4b5be..5122210 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -253,7 +253,7 @@ extern void __iounmap(void *addr); unsigned long _off = (off), _size = (sz); \ void *_ret = (void *)0; \ if (iomem_valid_addr(_off, _size)) \ - _ret = __ioremap(iomem_to_phys(_off),_size,0); \ + _ret = __ioremap(iomem_to_phys(_off),_size,nocache); \ _ret; \ }) -- 1.6.0.4

2 1

[U-Boot] [PATCH] Add support for LPC2468 from NXP
by Remco Poelstra 21 Jun '10

21 Jun '10

Add support for LPC2468 from NXP Basic startup code Internal flash is supported (for environment storage) Signed-off-by: Remco Poelstra <remco.poelstra(a)duran-audio.com> --- MAKEALL | 1 + Makefile | 3 + arch/arm/cpu/arm720t/cpu.c | 4 +- arch/arm/cpu/arm720t/interrupts.c | 39 ++- arch/arm/cpu/arm720t/lpc24xx/Makefile | 50 +++ arch/arm/cpu/arm720t/lpc24xx/flash.c | 236 ++++++++++++ arch/arm/cpu/arm720t/lpc24xx/iap_entry.S | 7 + arch/arm/cpu/arm720t/start.S | 12 +- arch/arm/include/asm/arch-lpc24xx/hardware.h | 32 ++ arch/arm/include/asm/arch-lpc24xx/immap.h | 528 ++++++++++++++++++++++++++ arch/arm/include/asm/config.h | 4 + arch/arm/lib/eabi_compat.c | 5 + drivers/serial/Makefile | 1 + drivers/serial/serial_lpc2468.c | 119 ++++++ include/flash.h | 1 + 15 files changed, 1033 insertions(+), 9 deletions(-) create mode 100644 arch/arm/cpu/arm720t/lpc24xx/Makefile create mode 100644 arch/arm/cpu/arm720t/lpc24xx/flash.c create mode 100644 arch/arm/cpu/arm720t/lpc24xx/iap_entry.S create mode 100644 arch/arm/include/asm/arch-lpc24xx/hardware.h create mode 100644 arch/arm/include/asm/arch-lpc24xx/immap.h create mode 100644 drivers/serial/serial_lpc2468.c diff --git a/MAKEALL b/MAKEALL index bb09627..2f747c6 100755 --- a/MAKEALL +++ b/MAKEALL @@ -540,6 +540,7 @@ LIST_ARM7=" \ impa7 \ integratorap \ lpc2292sodimm \ + LPC2468 \ modnet50 \ SMN42 \ " diff --git a/Makefile b/Makefile index 82cbbf4..a4212c8 100644 --- a/Makefile +++ b/Makefile @@ -3148,6 +3148,9 @@ evb4510_config : unconfig lpc2292sodimm_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm720t lpc2292sodimm NULL lpc2292 +LPC2468_config: unconfig + @$(MKCONFIG) $(@:_config=) arm arm720t LPC2468 NULL lpc24xx + SMN42_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm720t SMN42 siemens lpc2292 diff --git a/arch/arm/cpu/arm720t/cpu.c b/arch/arm/cpu/arm720t/cpu.c index 88c71bf..578358c 100644 --- a/arch/arm/cpu/arm720t/cpu.c +++ b/arch/arm/cpu/arm720t/cpu.c @@ -63,7 +63,9 @@ int cleanup_before_linux (void) /* go to high speed */ IO_SYSCON3 = (IO_SYSCON3 & ~CLKCTL) | CLKCTL_73; #endif -#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292) +#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) ||\ + defined(CONFIG_LPC2000) + disable_interrupts (); /* Nothing more needed */ #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c index eb8d425..06c4550 100644 --- a/arch/arm/cpu/arm720t/interrupts.c +++ b/arch/arm/cpu/arm720t/interrupts.c @@ -29,17 +29,26 @@ #include <common.h> #include <clps7111.h> #include <asm/proc-armv/ptrace.h> +#if defined(CONFIG_LPC2468) +#include <asm/arch/immap.h> +#include <asm/io.h> +#else #include <asm/hardware.h> +#endif #ifndef CONFIG_NETARM + +#if defined(CONFIG_LPC2292) +#define TIMER_LOAD_VAL 0xffff +#define READ_TIMER (0xFFFFFFFF - GET32(T0TC)) +#elif defined(CONFIG_LPC2468) +#define TIMER_LOAD_VAL 0 +#define READ_TIMER (0xFFFFFFFF - 0xE0004008) +#else /* we always count down the max. */ #define TIMER_LOAD_VAL 0xffff /* macro to read the 16 bit timer */ #define READ_TIMER (IO_TC1D & 0xffff) - -#ifdef CONFIG_LPC2292 -#undef READ_TIMER -#define READ_TIMER (0xFFFFFFFF - GET32(T0TC)) #endif #else @@ -80,6 +89,14 @@ void do_irq (struct pt_regs *pt_regs) pfnct = (void (*)(void))VICVectAddr; (*pfnct)(); +#elif defined(CONFIG_LPC2468) + void (*pfnct) (void); + vic_2468_t *vic = &(((immap_t *)CONFIG_SYS_IMMAP)->ahb.vic); + + pfnct = (void (*)(void))(&(vic->vicaddr)); + + (*pfnct) (); + #else #error do_irq() not defined for this CPU type #endif @@ -138,6 +155,10 @@ int arch_interrupt_init (void) int timer_init (void) { +#if defined(CONFIG_LPC2468) + timer_2468_t *timer0=&(((immap_t *)CONFIG_SYS_IMMAP)->apb.timer0); +#endif + #if defined(CONFIG_NETARM) /* disable all interrupts */ IRQEN = 0; @@ -191,6 +212,13 @@ int timer_init (void) PUT32(T0MCR, 0); PUT32(T0TC, 0); PUT32(T0TCR, 1); /* enable timer0 */ +#elif defined(CONFIG_LPC2468) + writel (0, &(timer0->ir)); /*disable all timer0 interupts */ + writel (0, &(timer0->tcr)); /*disable timer0 */ + writel (CFG_SYS_CLK_FREQ / CONFIG_SYS_HZ - 1, &(timer0->pr)); + writel (0, &(timer0->mcr)); + writel (0, &(timer0->tc)); + writel (1, &(timer0->tcr)); #else #error No timer_init() defined for this CPU type @@ -207,7 +235,8 @@ int timer_init (void) */ -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2292) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) ||\ + defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2000) void reset_timer (void) { diff --git a/arch/arm/cpu/arm720t/lpc24xx/Makefile b/arch/arm/cpu/arm720t/lpc24xx/Makefile new file mode 100644 index 0000000..f091502 --- /dev/null +++ b/arch/arm/cpu/arm720t/lpc24xx/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2000-2007 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS = flash.o +SOBJS = $(obj)iap_entry.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +# this MUST be compiled as thumb code! +$(SOBJS): + $(CC) $(AFLAGS) -march=armv4t -c -o $(SOBJS) iap_entry.S + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/arm720t/lpc24xx/flash.c b/arch/arm/cpu/arm720t/lpc24xx/flash.c new file mode 100644 index 0000000..963bf6e --- /dev/null +++ b/arch/arm/cpu/arm720t/lpc24xx/flash.c @@ -0,0 +1,236 @@ +/* + * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/immap.h> + +/* IAP commands use 32 bytes at the top of CPU internal sram, we + * use 512 bytes below that + */ + +#define COPY_BUFFER_LOCATION 0x4000fde0 + +#define IAP_LOCATION 0x7ffffff1 +#define IAP_CMD_PREPARE 50 +#define IAP_CMD_COPY 51 +#define IAP_CMD_ERASE 52 +#define IAP_CMD_CHECK 53 +#define IAP_CMD_ID 54 +#define IAP_CMD_VERSION 55 +#define IAP_CMD_COMPARE 56 + +#define IAP_RET_CMD_SUCCESS 0 + +static unsigned long command[5]; +static unsigned long result[2]; + +extern void iap_entry (unsigned long *command, unsigned long *result); + +/*----------------------------------------------------------------------- + * + */ +int get_flash_sector (flash_info_t * info, ulong flash_addr) +{ + int i; + + for (i = 1; i < (info->sector_count); i++) { + if (flash_addr < (info->start[i])) + break; + } + + return (i - 1); +} + +/*----------------------------------------------------------------------- + * This function assumes that flash_addr is aligned on 512 bytes boundary + * in flash. This function also assumes that prepare have been called + * for the sector in question. + */ +int lpc24xx_copy_buffer_to_flash (flash_info_t * info, ulong flash_addr) +{ + int first_sector; + int last_sector; + + first_sector = get_flash_sector (info, flash_addr); + last_sector = get_flash_sector (info, flash_addr + 512 - 1); + + /* prepare sectors for write */ + command[0] = IAP_CMD_PREPARE; + command[1] = first_sector; + command[2] = last_sector; + iap_entry (command, result); + if (result[0] != IAP_RET_CMD_SUCCESS) { + printf ("IAP prepare failed\n"); + return ERR_PROG_ERROR; + } + + command[0] = IAP_CMD_COPY; + command[1] = flash_addr; + command[2] = COPY_BUFFER_LOCATION; + command[3] = 512; + command[4] = CFG_SYS_CLK_FREQ >> 10; + iap_entry (command, result); + if (result[0] != IAP_RET_CMD_SUCCESS) { + printf ("IAP copy failed\n"); + return 1; + } + + return 0; +} + +int lpc24xx_flash_erase (flash_info_t * info, int s_first, int s_last) +{ + int flag; + int prot; + int sect; + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + if (prot) + return ERR_PROTECTED; + + flag = disable_interrupts (); + + printf ("Erasing %d sectors starting at sector %2d.\n" + "This make take some time ... ", s_last - s_first + 1, s_first); + + command[0] = IAP_CMD_PREPARE; + command[1] = s_first; + command[2] = s_last; + iap_entry (command, result); + if (result[0] != IAP_RET_CMD_SUCCESS) { + printf ("IAP prepare failed\n"); + return ERR_PROTECTED; + } + + command[0] = IAP_CMD_ERASE; + command[1] = s_first; + command[2] = s_last; + command[3] = CFG_SYS_CLK_FREQ >> 10; + iap_entry (command, result); + if (result[0] != IAP_RET_CMD_SUCCESS) { + printf ("IAP erase failed\n"); + return ERR_PROTECTED; + } + + if (flag) + enable_interrupts (); + + return ERR_OK; +} + +int lpc24xx_write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) +{ + int first_copy_size; + int last_copy_size; + int first_block; + int last_block; + int nbr_mid_blocks; + sys_con_2468_t *sys_con=&(((immap_t *)CONFIG_SYS_IMMAP)->apb.sys_con); + uchar memmap_value; + ulong i; + uchar *src_org; + uchar *dst_org; + int ret = ERR_OK; + + src_org = src; + dst_org = (uchar *) addr; + + first_block = addr / 512; + last_block = (addr + cnt) / 512; + nbr_mid_blocks = last_block - first_block - 1; + + first_copy_size = 512 - (addr % 512); + last_copy_size = (addr + cnt) % 512; + + debug ("\ncopy first block: (1) %lX -> %lX 0x200 bytes, " + "(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX 0x200 bytes\n", + (ulong) (first_block * 512), + (ulong) COPY_BUFFER_LOCATION, + (ulong) src, + (ulong) (COPY_BUFFER_LOCATION + 512 - first_copy_size), + first_copy_size, + (ulong) COPY_BUFFER_LOCATION, (ulong) (first_block * 512)); + + /* copy first block */ + memcpy ((void *)COPY_BUFFER_LOCATION, (void *)(first_block * 512), 512); + memcpy ((void *)(COPY_BUFFER_LOCATION + 512 - first_copy_size), + src, first_copy_size); + lpc24xx_copy_buffer_to_flash (info, first_block * 512); + src += first_copy_size; + addr += first_copy_size; + + /* copy middle blocks */ + for (i = 0; i < nbr_mid_blocks; i++) { + debug ("copy middle block: %lX -> %lX 512 bytes, " + "%lX -> %lX 512 bytes\n", + (ulong) src, + (ulong) COPY_BUFFER_LOCATION, + (ulong) COPY_BUFFER_LOCATION, (ulong) addr); + memcpy ((void *)COPY_BUFFER_LOCATION, src, 512); + lpc24xx_copy_buffer_to_flash (info, addr); + src += 512; + addr += 512; + } + + if (last_copy_size > 0) { + debug ("copy last block: (1) %lX -> %lX 0x200 bytes, " + "(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX x200 bytes\n", + (ulong) (last_block * 512), + (ulong) COPY_BUFFER_LOCATION, + (ulong) src, + (ulong) (COPY_BUFFER_LOCATION), + last_copy_size, + (ulong) COPY_BUFFER_LOCATION, (ulong) addr); + /* copy last block */ + memcpy ((void *)COPY_BUFFER_LOCATION, + (void *)(last_block * 512), 512); + memcpy ((void *)COPY_BUFFER_LOCATION, src, last_copy_size); + lpc24xx_copy_buffer_to_flash (info, addr); + } + + /* verify write */ + memmap_value = readl(&(sys_con->memmap)); + + disable_interrupts (); + + writel(01, &(sys_con->memmap)); /* we must make sure that initial 64 + bytes are taken from flash when we + do the compare */ + + for (i = 0; i < cnt; i++) { + if (*dst_org != *src_org) { + printf ("Write failed. Byte %lX differs\n", i); + ret = ERR_PROG_ERROR; + break; + } + dst_org++; + src_org++; + } + + writel(memmap_value, &(sys_con->memmap)); + enable_interrupts (); + + return ret; +} diff --git a/arch/arm/cpu/arm720t/lpc24xx/iap_entry.S b/arch/arm/cpu/arm720t/lpc24xx/iap_entry.S new file mode 100644 index 0000000..c31d519 --- /dev/null +++ b/arch/arm/cpu/arm720t/lpc24xx/iap_entry.S @@ -0,0 +1,7 @@ +IAP_ADDRESS: .word 0x7FFFFFF1 + +.globl iap_entry +iap_entry: + ldr r2, IAP_ADDRESS + bx r2 + mov pc, lr diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 022b873..1b2e4bf 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -127,7 +127,7 @@ reset: bl cpu_init_crit #endif -#ifdef CONFIG_LPC2292 +#if defined(CONFIG_LPC2000) bl lowlevel_init #endif @@ -368,6 +368,12 @@ lock_loop: ldr r0, VPBDIV_ADR mov r1, #0x01 /* VPB clock is same as process clock */ str r1, [r0] +#elif defined(CONFIG_LPC2468) + ldr r0, =0x40008000 /* 0x40000000 is internal SRAM, + * 0x4000FFFF is end of SRAM + */ + mov sp,r0 + sub sl,sp,#0x2000 #else #error No cpu_init_crit() defined for current CPU type #endif @@ -383,7 +389,7 @@ lock_loop: str r1, [r0] #endif -#ifndef CONFIG_LPC2292 +#if !defined(CONFIG_LPC2000) mov ip, lr /* * before relocating, we have to setup RAM timing @@ -601,7 +607,7 @@ reset_cpu: * on external peripherals such as watchdog timers, etc. */ #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) /* No specific reset actions for IntegratorAP/CM720T as yet */ -#elif defined(CONFIG_LPC2292) +#elif defined(CONFIG_LPC2000) .align 5 .globl reset_cpu reset_cpu: diff --git a/arch/arm/include/asm/arch-lpc24xx/hardware.h b/arch/arm/include/asm/arch-lpc24xx/hardware.h new file mode 100644 index 0000000..b42746e --- /dev/null +++ b/arch/arm/include/asm/arch-lpc24xx/hardware.h @@ -0,0 +1,32 @@ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +/* + * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) + * Curt Brune <curt(a)cucy.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#if defined(CONFIG_LPC2468) +#else +#error No hardware file defined for this configuration +#endif + +#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-lpc24xx/immap.h b/arch/arm/include/asm/arch-lpc24xx/immap.h new file mode 100644 index 0000000..0841230 --- /dev/null +++ b/arch/arm/include/asm/arch-lpc24xx/immap.h @@ -0,0 +1,528 @@ +/* + * (C) Copyright 2009 Duran Audio B.V. + * + * LPC2468 Internal Memory Map + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __LPC24XX_IMMAP_H +#define __LPC24XX_IMMAP_H + +#include <asm/types.h> +#include <config.h> + +typedef struct watchdog_2468 { + u8 fixme[0x4000]; +} watchdog2468_t; + +typedef struct timer_2468 { + u32 ir; /* Interrupt register */ + u32 tcr; /* Timer control register */ + u32 tc; /* Timer counter */ + u32 pr; /* Prescale register */ + u32 pc; /* Prescale counter */ + u32 mcr; /* Match control register */ + u32 mr0; /* Match register 0 */ + u32 mr1; /* Match register 1 */ + u32 mr2; /* Match register 2 */ + u32 mr3; /* Match register 3 */ + u32 ccr; /* Capture control register */ + u32 cr0; /* Capture register 0 */ + u32 cr1; /* Capture register 1 */ + u32 cr2; /* Capture register 2 */ + u32 cr3; /* Capture register 3 */ + u32 emr; /* External match register */ + u32 ctcr; /* Count control register */ + u8 notused[0x3fbc]; +} timer_2468_t; + +/*These two UART structs can probably be combined*/ +typedef struct uart_2468 { + u32 rbr_thr_dll; /*Receive buffer/transmit holding/divisor latch lsb register */ + u32 ier_dlm; /*Interrupt enable/divisor latch msb register */ + u32 iir_fcr; /*Interrupt ID/FIFO control register */ + u32 lcr; /* Line control register */ + u32 notused1; + u32 lsr; /*Line status register */ + u32 notused2; + u32 scr; /*Scratch pad register */ + u32 acr; /*Auto-baud control register */ + u32 icr; /*IrDA control register */ + u32 fdr; /*Fractional division register */ + u32 notused3; + u32 ter; /* Transmit enable register */ + u8 notused[0x3fcc]; +} uart_2468_t; + +typedef struct uart1_2468 { + u8 fixme[0x4000]; +} uart1_2468_t; + +typedef struct pwm0_2468 { + u8 fixme[0x4000]; +} pwm0_2468_t; + +typedef struct pwm1_2468 { + u8 fixme[0x4000]; +} pwm1_2468_t; + +typedef struct i2c0_2468 { + u8 fixme[0x4000]; +} i2c0_2468_t; + +typedef struct spi_2468 { + u8 fixme[0x4000]; +} spi_2468_t; + +typedef struct rtc_2468 { + u8 fixme[0x4000]; +} rtc_2468_t; + +typedef struct gpio_2468 { + u32 iopin0; + u32 ioset0; + u32 iodir0; + u32 ioclr0; + u32 iopin1; + u32 ioset1; + u32 iodir1; + u32 ioclr1; + u8 notused[0x3fe0]; +} gpio_2468_t; + +typedef struct pin_connect_2468 { + u32 pinsel0; /*Pin function select register*/ + u32 pinsel1; + u32 pinsel2; + u32 pinsel3; + u32 pinsel4; + u32 pinsel5; + u32 pinsel6; + u32 pinsel7; + u32 pinsel8; + u32 pinsel9; + u32 pinsel10; + u32 pinsel11; + u32 pinmode0; /*Pin mode select register*/ + u32 pinmode1; + u32 pinmode2; + u32 pinmode3; + u32 pinmode4; + u32 pinmode5; + u32 pinmode6; + u32 pinmode7; + u32 pinmode8; + u32 pinmode9; + u8 notused[0x3fa8]; +} pin_connect_2468_t; + +typedef struct ssp1_2468 { + u8 fixme[0x4000]; +} ssp1_2468_t; + +typedef struct adc_2468 { + u8 fixme[0x4000]; +} adc_2468_t; + +typedef struct can_accept_ram_2468 { + u8 fixme[0x4000]; +} can_accept_ram_2468_t; + +typedef struct can_accept_filter_2468 { + u8 fixme[0x4000]; +} can_accept_filter_2468_t; + +typedef struct can_common_2468 { + u8 fixme[0x4000]; +} can_common_2468_t; + +typedef struct can1_2468 { + u8 fixme[0x4000]; +} can1_2468_t; + +typedef struct can2_2468 { + u8 fixme[0x4000]; +} can2_2468_t; + +typedef struct i2c1_2468 { + u8 fixme[0x4000]; +} i2c1_2468_t; + +typedef struct ssp0_2468 { + u8 fixme[0x4000]; +} ssp0_2468_t; + +typedef struct dac_2468 { + u8 fixme[0x4000]; +} dac_2468_t; + +typedef struct i2c2_2468 { + u8 fixme[0x4000]; +} i2c2_2468_t; + +typedef struct batt_ram_2468 { + u8 fixme[0x4000]; +} batt_ram_2468_t; + +typedef struct i2s_2468 { + u8 fixme[0x4000]; +} i2s_2468_t; + +typedef struct mmc_2468 { + u8 fixme[0x4000]; +} mmc_2468_t; + +typedef struct sys_con_2468 { // c000 + u32 mamcr; /*Memory Accelerator configuration register*/ + u32 mamtim; /*Memory Accelerator timing register*/ + u8 notused1[0x38]; + u32 memmap; /*Memory mapping control register c040*/ + u8 notused2[0x3c]; + u32 pllcon; /*PLL control register c080*/ + u32 pllcfg; /*PLL configuration register c084*/ + u32 pllstat; /*PLL status register c088*/ + u32 pllfeed; /*PLL feed register c08c*/ + u8 notused3[0x30]; + u32 pcon; /*Power control register c0c0*/ + u32 pconp; /*Power control for peripherals register c0c4*/ + u8 notused4[0x3c]; + u32 cclkcfg; /*CPU clock configuration register c104*/ + u32 usbclkcfg; /*USB clock configuration register c108*/ + u32 clksrcsel; /*Clock source select register c10c*/ + u8 notused5[0x30]; + u32 extint; /*External interrupt flag register c140*/ + u32 intwake; /*Interrupt wakeup register c144*/ + u32 extmode; /*External interrupt mode resgister c148*/ + u32 extpolar; /*External interrupt polarity register c14c*/ + u8 notused6[0x30]; + u32 rsid; /*Reset source identification register c180*/ + u32 cspr; /*Code security protection register c184*/ + u8 notused7[0x18]; + u32 scs; /*System control and status register c1a0*/ + u32 irctrim; /*IRC trim register c1a4*/ + u32 pclksel0; /*Peripheral clock selection register 0 c1a8*/ + u32 pclksel1; /*Peripheral clock selection register 1 c1ac*/ + u8 notused8[0x3e50]; +} sys_con_2468_t; + + +typedef struct mac_2468 { + u32 mac1; /* MAC configuration register 1 */ + u32 mac2; /* MAC configuration register 2 */ + u32 ipgt; /* Back-to-back Inter-Packet-Gap register */ + u32 ipgr; /* Non Back-to-back Inter-Packet-Gap register */ + u32 clrt; /* Collision window/Retry register */ + u32 maxf; /* Maximum frame register */ + u32 supp; /* PHY support register */ + u32 test; /* Test register */ + u32 mcfg; /* MII mgmt Configuration register */ + u32 mcmd; /* MII mgmt Command register */ + u32 madr; /* MII mgmt Address register */ + u32 mwtd; /* MII mgmt Write data register */ + u32 mrdd; /* MII mgmt Read data register */ + u32 mind; /* MII mgmt Indicators register */ + u8 reserved1[0x8]; + u32 sa0; /* Station Address 0 register */ + u32 sa1; /* Station Address 1 register */ + u32 sa2; /* Station Address 2 register */ + u8 reserved2[0xb4]; + u32 command; /* Command register */ + u32 status; /* Status register */ + u32 rxdescriptor; /* Receive descriptor base address register */ + u32 rxstatus; /* Receive status base address register */ + u32 rxdescriptornumber; /* Receive number of descriptors register */ + u32 rxproduceindex; /* Receive produce index register */ + u32 rxconsumeindex; /* Receive consume index register */ + u32 txdescriptor; /* Transmit descriptor base address register */ + u32 txstatus; /* Transmit status base address register */ + u32 txdescriptornumber; /* Transmit number of descriptors register */ + u32 txproduceindex; /* Transmit produce index register */ + u32 txconsumeindex; /* Transmite consume index register */ + u8 reserved3[0x28]; + u32 tsv0; /* Transmit status vector 0 register */ + u32 tsv1; /* Transmit status vector 1 register */ + u32 rsv; /* Receive status vector register */ + u8 reserved4[0xc]; + u32 flowcontrolcounter; /*Flow control counter register */ + u32 flowcontrolstatus; /* Flow control status register */ + u8 reserved5[0x88]; + u32 rxfilterctrl; /* Receive filter control register */ + u32 rxfilterwolstatus; /* Receive filter WoL status register */ + u32 rxfilterwolclear; /* Receive filter WoL clear register */ + u8 reserved6[0x4]; + u32 hashfilterL; /* Hash filter LSBs register */ + u32 hashfilterH; /* Hash filter MSBs register */ + u8 reserved7[0xdc8]; + u32 intstatus; /* Interrupt status register */ + u32 intenable; /* Interrupt enable register */ + u32 intclear; /* Interrupt clear register */ + u32 intset; /* Interrupt set register */ + u8 reserved8[0x4]; + u32 powerdown; /* Powerdown register */ + u8 notused[0x3008]; +} mac_2468_t; + +typedef struct gpdma__2468 { + u8 fixme[0x4000]; +} gpdma_2468_t; + +typedef struct ext_mem_2468 { + u32 control; /*Controls operation of the memory controller*/ + u32 status; /*Provides EMC status*/ + u32 config; /*Configures operation of the memorycontroller*/ + u8 notused1[0x14]; + u32 dyncontrol; /*Controls dynamic memory operation*/ + u32 dynrefresh; /*Configures dynamic refresh operation*/ + u32 dynreadconfig; /*Configures the dynamic memory read strategy*/ + u32 notused2; + u32 dynrp; /*Selects the precharge command period*/ + u32 dynras; /*Selects the active to precharge command period*/ + u32 dynsrex; /*Selects the self-refresh time*/ + u32 dynapr; /*Selects the last-data-out to active command time*/ + u32 dyndal; /*Selects the data-in to active command time*/ + u32 dynwr; /*Selects the write recovery time*/ + u32 dynrc; /*Selects the active to active command period*/ + u32 dynrfc; /*Selects the auto-refresh period*/ + u32 dynxsr; /*Selects the exit self-refresh to active command time*/ + u32 dynrrd; /*Selects the active ank A to active bank B latency*/ + u32 dynmrd; /*Selects the load mode register to active command time*/ + u8 notused3[0xa4]; + u32 dynconfig0; /*Configuration information for dyn memory CS 0*/ + u32 dynrascas0; /*Selects the RAs and CAS latency fos CS 0*/ + u8 notused4[0x18]; + u32 dynconfig1; /*Configuration information for dyn memory CS 1*/ + u32 dynrascas1; /*Selects the RAs and CAS latency fos CS 1*/ + u8 notused5[0x18]; + u32 dynconfig2; /*Configuration information for dyn memory CS 2*/ + u32 dynrascas2; /*Selects the RAs and CAS latency fos CS 2*/ + u8 notused6[0x18]; + u32 dynconfig3; /*Configuration information for dyn memory CS 3*/ + u32 dynrascas3; /*Selects the RAs and CAS latency fos CS 3*/ + u8 notused7[0x98]; + u32 statconfig0; /*Memory configuration for static CS 0*/ + u32 statwaitwen0; /*Selects the delay from CS 0 to WE*/ + u32 statwaitoen0; /*Selects the delay from CS 0 OE*/ + u32 statwaitrd0; /*Selects the delay from CS 0 to a read access*/ + u32 statwaitpage0; /*Selects the delay for async page mode for CS 0*/ + u32 statwaitwr0; /*Selects the delay from CS 0 to a write access*/ + u32 statwaitturn0; /*Selects the # of bus turnaround cycles for CS 0*/ + u8 notused8[0x4]; + u32 statconfig1; /*Memory configuration for static CS 1*/ + u32 statwaitwen1; /*Selects the delay from CS 1 to WE*/ + u32 statwaitoen1; /*Selects the delay from CS 1 OE*/ + u32 statwaitrd1; /*Selects the delay from CS 1 to a read access*/ + u32 statwaitpage1; /*Selects the delay for async page mode for CS 1*/ + u32 statwaitwr1; /*Selects the delay from CS 1 to a write access*/ + u32 statwaitturn1; /*Selects the # of bus turnaround cycles for CS 1*/ + u8 notused9[0x4]; + u32 statconfig2; /*Memory configuration for static CS 2*/ + u32 statwaitwen2; /*Selects the delay from CS 2 to WE*/ + u32 statwaitoen2; /*Selects the delay from CS 2 OE*/ + u32 statwaitrd2; /*Selects the delay from CS 2 to a read access*/ + u32 statwaitpage2; /*Selects the delay for async page mode for CS 2*/ + u32 statwaitwr2; /*Selects the delay from CS 2 to a write access*/ + u32 statwaitturn2; /*Selects the # of bus turnaround cycles for CS 2*/ + u8 notused10[0x4]; + u32 statconfig3; /*Memory configuration for static CS 3*/ + u32 satwaitwen3; /*Selects the delay from CS 3 to WE*/ + u32 statwaitoen3; /*Selects the delay from CS 3 OE*/ + u32 statwaitrd3; /*Selects the delay from CS 3 to a read access*/ + u32 statwaitpage3; /*Selects the delay for async page mode for CS 3*/ + u32 statwaitwr3; /*Selects the delay from CS 3 to a write access*/ + u32 statwaitturn3; /*Selects the # of bus turnaround cycles for CS 3*/ + u8 notused11[0x604]; + u32 extwait; + u8 notused12[0x377c]; +} ext_mem_2468_t; + +typedef struct usb_2468 { + u8 fixme[0x4000]; +} usb_2468_t; + +typedef struct lcd_2468 { + u8 fixme[0x4000]; +} lcd_2468_t; + +typedef struct vic_2468 { + u32 vicirqstat; /*IRQ status register */ + u32 vicfiqstat; /*FIQ status register */ + u32 vicrawintr; /*Raw interrupt status register */ + u32 vicintselect; /*Interrupt select register */ + u32 vicintenable; /*Interrupt enable register */ + u32 vicinenclr; /*Interrupt enable clear register */ + u32 vicsoftint; /*Software interrupt register */ + u32 vicsoftintclr; /*Software interrupt clear register */ + u32 vicprotect; /*Protection enable register */ + u32 vicswpriomask; /*Software Priority Mask Register */ + u8 notused1[0xd8]; + u32 vicvectaddr0; /*Vector address register */ + u32 vicvectaddr1; + u32 vicvectaddr2; + u32 vicvectaddr3; + u32 vicvectaddr4; + u32 vicvectaddr5; + u32 vicvectaddr6; + u32 vicvectaddr7; + u32 vicvectaddr8; + u32 vicvectaddr9; + u32 vicvectaddr10; + u32 vicvectaddr11; + u32 vicvectaddr12; + u32 vicvectaddr13; + u32 vicvectaddr14; + u32 vicvectaddr15; + u32 vicvectaddr16; + u32 vicvectaddr17; + u32 vicvectaddr18; + u32 vicvectaddr19; + u32 vicvectaddr20; + u32 vicvectaddr21; + u32 vicvectaddr22; + u32 vicvectaddr23; + u32 vicvectaddr24; + u32 vicvectaddr25; + u32 vicvectaddr26; + u32 vicvectaddr27; + u32 vicvectaddr28; + u32 vicvectaddr29; + u32 vicvectaddr30; + u32 vicvectaddr31; + u8 notused2[0x7f]; + u32 vicvectprio0; /*Vector priority register */ + u32 vicvectprio1; + u32 vicvectprio2; + u32 vicvectprio3; + u32 vicvectprio4; + u32 vicvectprio5; + u32 vicvectprio6; + u32 vicvectprio7; + u32 vicvectprio8; + u32 vicvectprio9; + u32 vicvectprio10; + u32 vicvectprio11; + u32 vicvectprio12; + u32 vicvectprio13; + u32 vicvectprio14; + u32 vicvectprio15; + u32 vicvectprio16; + u32 vicvectprio17; + u32 vicvectprio18; + u32 vicvectprio19; + u32 vicvectprio20; + u32 vicvectprio21; + u32 vicvectprio22; + u32 vicvectprio23; + u32 vicvectprio24; + u32 vicvectprio25; + u32 vicvectprio26; + u32 vicvectprio27; + u32 vicvectprio28; + u32 vicvectprio29; + u32 vicvectprio30; + u32 vicvectprio31; + u8 notused3[0xc7f]; + u32 vicaddr; /*Vector address register for active interrupt*/ +} vic_2468_t; + +typedef struct fastio_2468 { + u32 fio0dir; /*Fast IO 0 port direction register*/ + u8 notused1[0xc]; + u32 fio0mask; /*Fast IO 0 mask register*/ + u32 fio0pin; /*Fast IO 0 pin value register*/ + u32 fio0set; /*Fast IO 0 output set register*/ + u32 fio0clr; /*Fast IO 0 output clear register*/ + u32 fio1dir; /*Fast IO 1 port direction register*/ + u8 notused2[0xc]; + u32 fio1mask; /*Fast IO 1 mask register*/ + u32 fio1pin; /*Fast IO 1 pin value register*/ + u32 fio1set; /*Fast IO 1 output set register*/ + u32 fio1clr; /*Fast IO 1 output clear register*/ + u32 fio2dir; /*Fast IO 2 port direction register*/ + u8 notused3[0xc]; + u32 fio2mask; /*Fast IO 2 mask register*/ + u32 fio2pin; /*Fast IO 2 pin value register*/ + u32 fio2set; /*Fast IO 2 output set register*/ + u32 fio2clr; /*Fast IO 2 output clear register*/ + u32 fio3dir; /*Fast IO 3 port direction register*/ + u8 notused4[0xc]; + u32 fio3mask; /*Fast IO 3 mask register*/ + u32 fio3pin; /*Fast IO 3 pin value register*/ + u32 fio3set; /*Fast IO 3 output set register*/ + u32 fio3clr; /*Fast IO 3 output clear register*/ + u32 fio4dir; /*Fast IO 4 port direction register*/ + u8 notused5[0xc]; + u32 fio4mask; /*Fast IO 4 mask register*/ + u32 fio4pin; /*Fast IO 4 pin value register*/ + u32 fio4set; /*Fast IO 4 output set register*/ + u32 fio4clr; /*Fast IO 4 output clear register*/ +} fastio_2468_t; + +typedef struct apb_2468 { /*Peripheral bus memory layout*/ + watchdog2468_t watchdog; + timer_2468_t timer0; + timer_2468_t timer1; + uart_2468_t uart0; + uart1_2468_t uart1; + pwm0_2468_t pwm0; + pwm1_2468_t pwm1; + i2c0_2468_t i2c0; + spi_2468_t spi; + rtc_2468_t rtc; + gpio_2468_t gpio; + pin_connect_2468_t pin_connect; + ssp1_2468_t ssp1; + adc_2468_t adc; + can_accept_ram_2468_t can_accept_ram; + can_accept_filter_2468_t can_accept_filter; + can_common_2468_t can_comon; + can1_2468_t can1; + can2_2468_t can2; + u8 not_used1[0x10000]; + i2c1_2468_t i2c1; + u8 notused2[0x8000]; + ssp0_2468_t ssp0; + dac_2468_t dac; + timer_2468_t timer2; + timer_2468_t timer3; + uart_2468_t uart2; + uart_2468_t uart3; + i2c2_2468_t i2c2; + batt_ram_2468_t batt_ram; + i2s_2468_t i2s; + mmc_2468_t mmc; + u8 not_used3[0x16c000]; + sys_con_2468_t sys_con; +} apb_2468_t; + +typedef struct ahb_2468 { /*High-speed bus memory layout*/ + mac_2468_t mac; + gpdma_2468_t gpdma; + ext_mem_2468_t ext_mem; + usb_2468_t usb; + lcd_2468_t lcd; + u8 notused1[0x1eb000]; + vic_2468_t vic; +} ahb_2468_t; + +typedef struct immap { /*LPC24xx memory layout*/ + apb_2468_t apb; /*Peripheral bus*/ + u8 res1[0x1fc00000]; + ahb_2468_t ahb; /*High-speed bus*/ +} immap_t; + +#endif diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index b76fd8e..d462d20 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -24,4 +24,8 @@ /* Relocation to SDRAM works on all ARM boards */ #define CONFIG_RELOC_FIXUP_WORKS +#if defined(CONFIG_LPC2292) || defined(CONFIG_LPC2468) +#define CONFIG_LPC2000 +#endif + #endif diff --git a/arch/arm/lib/eabi_compat.c b/arch/arm/lib/eabi_compat.c index 86eacf1..eb3e26d 100644 --- a/arch/arm/lib/eabi_compat.c +++ b/arch/arm/lib/eabi_compat.c @@ -16,3 +16,8 @@ int raise (int signum) printf("raise: Signal # %d caught\n", signum); return 0; } + +/* Dummy function to avoid linker complaints */ +void __aeabi_unwind_cpp_pr0(void) +{ +}; diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index c731bfb..05fd6c9 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -43,6 +43,7 @@ COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o COBJS-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o COBJS-$(CONFIG_LPC2292_SERIAL) += serial_lpc2292.o +COBJS-$(CONFIG_LPC2468_SERIAL) += serial_lpc2468.o COBJS-$(CONFIG_LH7A40X_SERIAL) += serial_lh7a40x.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o COBJS-$(CONFIG_MXC_UART) += serial_mxc.o diff --git a/drivers/serial/serial_lpc2468.c b/drivers/serial/serial_lpc2468.c new file mode 100644 index 0000000..4b8f241 --- /dev/null +++ b/drivers/serial/serial_lpc2468.c @@ -0,0 +1,119 @@ +/* + * (C) Copyright 2002-2004 + * Wolfgang Denk, DENX Software Engineering, <wd(a)denx.de> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Alex Zuepke <azu(a)sysgo.de> + * + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw(a)its.tudelft.nl) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include <common.h> +#include <asm/arch/immap.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +void serial_setbrg (void) +{ + unsigned short divisor; + uart_2468_t *uart0=&(((immap_t *)CONFIG_SYS_IMMAP)->apb.uart0); + + switch (gd->baudrate) { + case 1200: + case 9600: + case 19200: + case 38400: + case 57600: + case 115200: + divisor = CFG_SYS_CLK_FREQ / (gd->baudrate * 16); + break; + default: + hang (); + break; + } + + /* init serial UART0 */ + writeb (0, &(uart0->iir_fcr)); /* Disable RX and TX FIFOs */ + writeb (0, &(uart0->lcr)); + writeb (0, &(uart0->ier_dlm)); + writeb (0x80, &(uart0->lcr)); /* DLAB=1 */ + writeb ((unsigned char)(divisor & 0x00FF), &(uart0->rbr_thr_dll)); + writeb ((unsigned char)(divisor >> 8),&(uart0->ier_dlm)); + writeb (0x03, &(uart0->lcr)); /* 8N1, DLAB=0 */ + writeb (0x7, &(uart0->iir_fcr)); /* Enable RX and TX FIFOs */ +} + +int serial_init (void) +{ + unsigned long pinsel0; + pin_connect_2468_t *pin_connect= + &(((immap_t *)CONFIG_SYS_IMMAP)->apb.pin_connect); + + /*enable uart #0 pins in GPIO (P0.2 = TxD0, P0.3 = RxD0) */ + pinsel0 = readl (&(pin_connect->pinsel0)); + pinsel0 &= ~(0x000000f0); + pinsel0 |= 0x00000050; + writel (pinsel0, &(pin_connect->pinsel0)); + + serial_setbrg (); + + return (0); +} + +void serial_putc (const char c) +{ + uart_2468_t *uart0=&(((immap_t *)CONFIG_SYS_IMMAP)->apb.uart0); + + if (c == '\n') { + /* Wait for empty U0THR */ + while ((readb (&(uart0->lsr)) & (1 << 5)) == 0) ; + writeb ('\r', &(uart0->rbr_thr_dll)); + } + /* Wait for empty U0THR */ + while ((readb (&(uart0->lsr)) & (1 << 5)) == 0) ; + writeb (c, &(uart0->rbr_thr_dll)); +} + +int serial_getc (void) +{ + uart_2468_t *uart0=&(((immap_t *)CONFIG_SYS_IMMAP)->apb.uart0); + + while ((readb (&(uart0->lsr)) & 1) == 0) ; + return readb (&(uart0->rbr_thr_dll)); +} + +void serial_puts (const char *s) +{ + while (*s) { + serial_putc (*s++); + } +} + +/* Test if there is a byte to read */ +int serial_tstc (void) +{ + uart_2468_t *uart0=&(((immap_t *)CONFIG_SYS_IMMAP)->apb.uart0); + + return (readb (&(uart0->lsr)) & 1); +} diff --git a/include/flash.h b/include/flash.h index 8feca1b..dde60e9 100644 --- a/include/flash.h +++ b/include/flash.h @@ -345,6 +345,7 @@ extern flash_info_t *flash_get_info(ulong base); #define TOSH_ID_FVT160 0xC2 /* TC58FVT160 ID (16 M, top ) */ #define TOSH_ID_FVB160 0x43 /* TC58FVT160 ID (16 M, bottom ) */ #define PHILIPS_LPC2292 0x0401FF13 /* LPC2292 internal FLASH */ +#define PHILIPS_LPC2468 0x0603FF35 /* LPC2468 internal flash */ /*----------------------------------------------------------------------- * Internal FLASH identification codes -- 1.7.0.4

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[U-Boot] [PATCH] AX88180: use standard I/O accessors
by Mike Frysinger 21 Jun '10

21 Jun '10

The current dm9000x driver accesses its memory mapped registers directly instead of using the standard I/O accessors. This can cause problems on Blackfin systems as the accesses can get out of order. So convert the direct volatile dereferences to use the normal in/out macros. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> Tested-by: Hoan Hoang <hnhoan(a)i-syst.com> --- drivers/net/ax88180.h | 15 ++++++++------- 1 files changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/net/ax88180.h b/drivers/net/ax88180.h index 9a324bd..7d75eb8 100644 --- a/drivers/net/ax88180.h +++ b/drivers/net/ax88180.h @@ -19,6 +19,7 @@ #ifndef _AX88180_H_ #define _AX88180_H_ +#include <asm/io.h> #include <asm/types.h> #include <config.h> @@ -354,7 +355,7 @@ struct ax88180_private { static inline unsigned short INW (struct eth_device *dev, unsigned long addr) { - return le16_to_cpu (*(volatile unsigned short *) (addr + dev->iobase)); + return le16_to_cpu(inw(addr + dev->iobase)); } /* @@ -363,32 +364,32 @@ static inline unsigned short INW (struct eth_device *dev, unsigned long addr) #if defined (CONFIG_DRIVER_AX88180_16BIT) static inline void OUTW (struct eth_device *dev, unsigned short command, unsigned long addr) { - *(volatile unsigned short *) ((addr + dev->iobase)) = cpu_to_le16 (command); + outw(cpu_to_le16(command), addr + dev->iobase); } static inline unsigned short READ_RXBUF (struct eth_device *dev) { - return le16_to_cpu (*(volatile unsigned short *) (RXBUFFER_START + dev->iobase)); + return le16_to_cpu(inw(RXBUFFER_START + dev->iobase)); } static inline void WRITE_TXBUF (struct eth_device *dev, unsigned short data) { - *(volatile unsigned short *) ((TXBUFFER_START + dev->iobase)) = cpu_to_le16 (data); + outw(cpu_to_le16(data), dev->iobase + TXBUFFER_START); } #else static inline void OUTW (struct eth_device *dev, unsigned short command, unsigned long addr) { - *(volatile unsigned long *) ((addr + dev->iobase)) = cpu_to_le32 (command); + outl(cpu_to_le32(command), addr + dev->iobase); } static inline unsigned long READ_RXBUF (struct eth_device *dev) { - return le32_to_cpu (*(volatile unsigned long *) (RXBUFFER_START + dev->iobase)); + return le32_to_cpu(inl(RXBUFFER_START + dev->iobase)); } static inline void WRITE_TXBUF (struct eth_device *dev, unsigned long data) { - *(volatile unsigned long *) ((TXBUFFER_START + dev->iobase)) = cpu_to_le32 (data); + outl(cpu_to_le32(data), dev->iobase + TXBUFFER_START); } #endif -- 1.7.1

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[U-Boot] [PATCH] AX88180: switch to common mii.h header
by Mike Frysinger 21 Jun '10

21 Jun '10

No compiled code change here, just drop the local PHY defines in favor of the common standard ones. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- drivers/net/ax88180.c | 31 ++++++++++++++++--------------- drivers/net/ax88180.h | 48 ++---------------------------------------------- 2 files changed, 18 insertions(+), 61 deletions(-) diff --git a/drivers/net/ax88180.c b/drivers/net/ax88180.c index 6e788a0..fa2e212 100644 --- a/drivers/net/ax88180.c +++ b/drivers/net/ax88180.c @@ -41,6 +41,7 @@ #include <command.h> #include <net.h> #include <malloc.h> +#include <linux/mii.h> #include "ax88180.h" /* @@ -112,10 +113,10 @@ static int ax88180_phy_reset (struct eth_device *dev) { unsigned short delay_cnt = 500; - ax88180_mdio_write (dev, BMCR, (PHY_RESET | AUTONEG_EN)); + ax88180_mdio_write (dev, MII_BMCR, (BMCR_RESET | BMCR_ANENABLE)); /* Wait for the reset to complete, or time out (500 ms) */ - while (ax88180_mdio_read (dev, BMCR) & PHY_RESET) { + while (ax88180_mdio_read (dev, MII_BMCR) & BMCR_RESET) { udelay (1000); if (--delay_cnt == 0) { printf ("Failed to reset PHY!\n"); @@ -265,10 +266,10 @@ static int ax88180_phy_initial (struct eth_device *dev) #endif { priv->PhyAddr = phyaddr; - priv->PhyID0 = ax88180_mdio_read(dev, PHYIDR0); + priv->PhyID0 = ax88180_mdio_read(dev, MII_PHYSID1); switch (priv->PhyID0) { - case MARVELL_88E1111_PHYIDR0: + case MARVELL_88E1111_PHYSID0: debug("ax88180: Found Marvell 88E1111 PHY." " (PHY Addr=0x%x)\n", priv->PhyAddr); @@ -282,7 +283,7 @@ static int ax88180_phy_initial (struct eth_device *dev) return 1; - case CICADA_CIS8201_PHYIDR0: + case CICADA_CIS8201_PHYSID0: debug("ax88180: Found CICADA CIS8201 PHY" " chipset. (PHY Addr=0x%x)\n", priv->PhyAddr); @@ -321,20 +322,20 @@ static void ax88180_media_config (struct eth_device *dev) /* Waiting 2 seconds for PHY link stable */ for (i = 0; i < 20000; i++) { - bmsr_val = ax88180_mdio_read (dev, BMSR); - if (bmsr_val & LINKOK) { + bmsr_val = ax88180_mdio_read (dev, MII_BMSR); + if (bmsr_val & BMSR_LSTATUS) { break; } udelay (100); } - bmsr_val = ax88180_mdio_read (dev, BMSR); + bmsr_val = ax88180_mdio_read (dev, MII_BMSR); debug ("ax88180: BMSR=0x%04x\n", (unsigned int)bmsr_val); - if (bmsr_val & LINKOK) { - bmcr_val = ax88180_mdio_read (dev, BMCR); + if (bmsr_val & BMSR_LSTATUS) { + bmcr_val = ax88180_mdio_read (dev, MII_BMCR); - if (bmcr_val & AUTONEG_EN) { + if (bmcr_val & BMCR_ANENABLE) { /* * Waiting for Auto-negotiation completion, this may @@ -343,8 +344,8 @@ static void ax88180_media_config (struct eth_device *dev) debug ("ax88180: Auto-negotiation is " "enabled. Waiting for NWay completion..\n"); for (i = 0; i < 50000; i++) { - bmsr_val = ax88180_mdio_read (dev, BMSR); - if (bmsr_val & AUTONEG_COMPLETE) { + bmsr_val = ax88180_mdio_read (dev, MII_BMSR); + if (bmsr_val & BMSR_ANEGCOMPLETE) { break; } udelay (100); @@ -357,10 +358,10 @@ static void ax88180_media_config (struct eth_device *dev) /* Get real media mode here */ switch (priv->PhyID0) { - case MARVELL_88E1111_PHYIDR0: + case MARVELL_88E1111_PHYSID0: RealMediaMode = get_MarvellPHY_media_mode(dev); break; - case CICADA_CIS8201_PHYIDR0: + case CICADA_CIS8201_PHYSID0: RealMediaMode = get_CicadaPHY_media_mode(dev); break; default: diff --git a/drivers/net/ax88180.h b/drivers/net/ax88180.h index 77bab5f..c793e92 100644 --- a/drivers/net/ax88180.h +++ b/drivers/net/ax88180.h @@ -63,9 +63,9 @@ struct ax88180_private { /* Max Rx Jumbo size is 15K Bytes */ #define MAX_RX_SIZE 0x3C00 -#define MARVELL_88E1111_PHYIDR0 0x0141 +#define MARVELL_88E1111_PHYSID0 0x0141 -#define CICADA_CIS8201_PHYIDR0 0x000F +#define CICADA_CIS8201_PHYSID0 0x000F #define MEDIA_AUTO 0 #define MEDIA_1000FULL 1 @@ -276,50 +276,6 @@ struct ax88180_private { #define SOFTRST_NORMAL 0x00000003 #define SOFTRST_RESET_MAC 0x00000002 -/* External PHY Register Definition */ -#define BMCR 0x0000 - #define LINE_SPEED_MSB 0x0040 - #define DUPLEX_MODE 0x0100 - #define RESTART_AUTONEG 0x0200 - #define POWER_DOWN 0x0800 - #define AUTONEG_EN 0x1000 - #define LINE_SPEED_LSB 0x2000 - #define PHY_RESET 0x8000 - - #define MEDIAMODE_MASK (LINE_SPEED_MSB | LINE_SPEED_LSB |\ - DUPLEX_MODE) - #define BMCR_SPEED_1000 LINE_SPEED_MSB - #define BMCR_SPEED_100 LINE_SPEED_LSB - #define BMCR_SPEED_10 0x0000 - - #define BMCR_1000FULL (BMCR_SPEED_1000 | DUPLEX_MODE) - #define BMCR_100FULL (BMCR_SPEED_100 | DUPLEX_MODE) - #define BMCR_100HALF BMCR_SPEED_100 - #define BMCR_10FULL DUPLEX_MODE - #define BMCR_10HALF 0x0000 -#define BMSR 0x0001 - #define LINKOK 0x0004 - #define AUTONEG_ENABLE_STS 0x0008 - #define AUTONEG_COMPLETE 0x0020 -#define PHYIDR0 0x0002 -#define PHYIDR1 0x0003 -#define ANAR 0x0004 - #define ANAR_PAUSE 0x0400 - #define ANAR_100FULL 0x0100 - #define ANAR_100HALF 0x0080 - #define ANAR_10FULL 0x0040 - #define ANAR_10HALF 0x0020 - #define ANAR_8023BIT 0x0001 -#define ANLPAR 0x0005 -#define ANER 0x0006 -#define AUX_1000_CTRL 0x0009 - #define ENABLE_1000HALF 0x0100 - #define ENABLE_1000FULL 0x0200 - #define DEFAULT_AUX_1000_CTRL (ENABLE_1000HALF | ENABLE_1000FULL) -#define AUX_1000_STATUS 0x000A - #define LP_1000HALF 0x0400 - #define LP_1000FULL 0x0800 - /* Marvell 88E1111 Gigabit PHY Register Definition */ #define M88_SSR 0x0011 #define SSR_SPEED_MASK 0xC000 -- 1.7.1

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