May 2010 - U-Boot

[U-Boot] [PATCH] ehci-pci: print hccr, hcor and hc_lenght
by Florian Fainelli 12 Sep '10

12 Sep '10

It is useful to know the EHCI-PCI hccr, hcor and hc_lenght to make sure it was successfully registered, and at the correct location. Signed-off-by: Florian Fainelli <f.fainelli(a)gmail.com> --- diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c index 047902a..4402abb 100644 --- a/drivers/usb/host/ehci-pci.c +++ b/drivers/usb/host/ehci-pci.c @@ -53,6 +53,10 @@ int ehci_hcd_init(void) hcor = (struct ehci_hcor *)((uint32_t) hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + printf("EHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n", + (uint32_t)hccr, (uint32_t)hcor, + (uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + return 0; }

2 2

[U-Boot] [PATCH v2] [ARM] at91: Add support for taskit AT91SAM9G20 boards
by Achim Ehrlich 20 Aug '10

20 Aug '10

This adds support for the AT91SAM9G20 boards by taskit GmbH. Both boards, Stamp9G20 and PortuxG20, are integrated in one file. PortuxG20 is basically a SBC built around Stamp9G20. Signed-off-by: Achim Ehrlich <aehrlich(a)taskit.de> --- MAINTAINERS | 5 + MAKEALL | 1 + Makefile | 4 + board/taskit/stamp9G20/Makefile | 50 +++++++++ board/taskit/stamp9G20/config.mk | 1 + board/taskit/stamp9G20/stamp9G20.c | 203 ++++++++++++++++++++++++++++++++++++ include/configs/stamp9G20.h | 180 ++++++++++++++++++++++++++++++++ 7 files changed, 444 insertions(+), 0 deletions(-) create mode 100644 board/taskit/stamp9G20/Makefile create mode 100644 board/taskit/stamp9G20/config.mk create mode 100644 board/taskit/stamp9G20/stamp9G20.c create mode 100644 include/configs/stamp9G20.h diff --git a/MAINTAINERS b/MAINTAINERS index 7f40ebd..c4259a0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -138,6 +138,11 @@ Jon Diekema <jon.diekema(a)smiths-aerospace.com> sbc8260 MPC8260 +Achim Ehrlich <aehrlich(a)taskit.de> + + Stamp9G20 AT91SAM9G20 + PortuxG20 AT91SAM9G20 + Dirk Eibach <eibach(a)gdsys.de> devconcenter PPC460EX diff --git a/MAKEALL b/MAKEALL index 1949985..51aaaa6 100755 --- a/MAKEALL +++ b/MAKEALL @@ -675,6 +675,7 @@ LIST_at91=" \ pm9261 \ pm9263 \ SBC35_A9G20 \ + stamp9G20 \ TNY_A9260 \ TNY_A9G20 \ " diff --git a/Makefile b/Makefile index ce77e10..ed9ae00 100644 --- a/Makefile +++ b/Makefile @@ -2903,6 +2903,10 @@ TNY_A9260_config : unconfig @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h @$(MKCONFIG) -a tny_a9260 arm arm926ejs tny_a9260 calao at91 +portuxG20_config \ +stamp9G20_config : unconfig + @$(MKCONFIG) -t $(@:_config=) stamp9G20 arm arm926ejs stamp9G20 taskit at91 + ######################################################################## ## ARM Integrator boards - see doc/README-integrator for more info. integratorap_config \ diff --git a/board/taskit/stamp9G20/Makefile b/board/taskit/stamp9G20/Makefile new file mode 100644 index 0000000..191fb8e --- /dev/null +++ b/board/taskit/stamp9G20/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2010 +# Achim Ehrlich, taskit GmbH, aehrlich(a)taskit.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += stamp9G20.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/taskit/stamp9G20/config.mk b/board/taskit/stamp9G20/config.mk new file mode 100644 index 0000000..ff2cfd1 --- /dev/null +++ b/board/taskit/stamp9G20/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/taskit/stamp9G20/stamp9G20.c b/board/taskit/stamp9G20/stamp9G20.c new file mode 100644 index 0000000..b543b0a --- /dev/null +++ b/board/taskit/stamp9G20/stamp9G20.c @@ -0,0 +1,203 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2010 + * Achim Ehrlich <aehrlich(a)taskit.de> + * taskit GmbH <www.taskit.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9260.h> +#include <asm/arch/at91_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/at91_pio.h> +#include <asm/arch/io.h> +#include <asm/arch/hardware.h> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) +#include <net.h> +#endif +#include <netdev.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +#ifdef CONFIG_CMD_NAND +static void stamp9G20_nand_hw_init(void) +{ + unsigned long csa; + at91_smc_t *smc = (at91_smc_t *) AT91_SMC_BASE; + at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + + /* Enable CS3 */ + csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A; + writel(csa, &matrix->csa); + + /* Configure SMC CS3 for NAND/SmartMedia */ + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[3].setup); + + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), + &smc->cs[3].pulse); + + writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), + &smc->cs[3].cycle); + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | +#ifdef CONFIG_SYS_NAND_DBW_16 + AT91_SMC_MODE_DBW_16 | +#else /* CONFIG_SYS_NAND_DBW_8 */ + AT91_SMC_MODE_DBW_8 | +#endif + AT91_SMC_MODE_TDF_CYCLE(2), + &smc->cs[3].mode); + + writel(1 << AT91SAM9260_ID_PIOC, &pmc->pcer); + + /* Configure RDY/BSY */ + at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1); + + /* Enable NandFlash */ + at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); +} +#endif + +#ifdef CONFIG_MACB +static void stamp9G20_macb_hw_init(void) +{ + unsigned long erstl; + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; + at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE; + + /* Enable MACB Chip, this is the enable PIN on Stamp Adaptor*/ + at91_set_pio_output(AT91_PIO_PORTA, 26, 0); + + /* Enable clock */ + writel(1 << AT91SAM9260_ID_EMAC, &pmc->pcer); + + /* + * Disable pull-up on: + * RXDV (PA17) => PHY normal mode (not Test mode) + * ERX0 (PA14) => PHY ADDR0 + * ERX1 (PA15) => PHY ADDR1 + * ERX2 (PA25) => PHY ADDR2 + * ERX3 (PA26) => PHY ADDR3 + * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 + * + * PHY has internal pull-down + */ + writel((1 << 14) | (1 << 15) | (1 << 17) | + (1 << 25), &pio->pioa.pudr); + + erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; + + /* Need to reset PHY -> 500ms reset */ + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) | + AT91_RSTC_MR_URSTEN, &rstc->mr); + + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); + /* Wait for end hardware reset */ + while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) + ; + + /* Restore NRST value */ + writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr); + + /* Re-enable pull-up */ + writel((1 << 14) | (1 << 15) | (1 << 17) | + (1 << 25), &pio->pioa.puer); + + at91_macb_hw_init(); +} +#endif + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + +#ifdef CONFIG_MK_portuxG20 + gd->bd->bi_arch_number = MACH_TYPE_PORTUXG20; +#else + gd->bd->bi_arch_number = MACH_TYPE_STAMP9G20; +#endif + + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + at91_set_pio_output(AT91_PIO_PORTC, 9, 1); + at91_set_pio_output(AT91_PIO_PORTC, 5, 1); + + at91_serial_hw_init(); +#ifdef CONFIG_CMD_NAND + stamp9G20_nand_hw_init(); +#endif +#ifdef CONFIG_HAS_DATAFLASH + at91_spi0_hw_init((1 << 0) || (1 << 1)); +#endif +#ifdef CONFIG_MACB + stamp9G20_macb_hw_init(); +#endif + + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE + , CONFIG_SYS_SDRAM_SIZE); + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +void reset_phy(void) +{ +#ifdef CONFIG_MACB + /* + * Initialize ethernet HW addr prior to starting Linux, + * needed for nfsroot + */ + eth_init(gd->bd); +#endif +} +#endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0x00); +#endif + return rc; +} diff --git a/include/configs/stamp9G20.h b/include/configs/stamp9G20.h new file mode 100644 index 0000000..7a8fb87 --- /dev/null +++ b/include/configs/stamp9G20.h @@ -0,0 +1,180 @@ +/* + * (C) 2010 Achim Ehrlich <aehrlich(a)taskit.de> + * taskit GmbH <www.taskit.de> + * + * Configuation settings for the Stamp9G20 CPU module. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_AT91_GPIO + +/* ARM asynchronous clock */ +/* 18.432 MHz crystal */ +#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 +/* 1ms resolution */ +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_ARM926EJS 1 +#define CONFIG_AT91SAM9G20 1 +#define CONFIG_ARCH_CPU_INIT +#undef CONFIG_USE_IRQ +/* enable passing of ATAGs */ +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT + +/* pad the watchdog */ + +#define CONFIG_AT91SAM9_WATCHDOG +#define CONFIG_HW_WATCHDOG + +/* + * Hardware drivers + */ +#define CONFIG_ATMEL_USART 1 + +/* USART 3 is DBGU */ +#define CONFIG_USART3 1 + +#define CONFIG_BOOTDELAY 3 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_IMLS + +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_NAND 1 +#define CONFIG_CMD_USB 1 + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x08000000 + +/* DataFlash */ +#undef CONFIG_ATMEL_DATAFLASH_SPI +#undef CONFIG_HAS_DATAFLASH + +/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 1 +/* our ALE is AD21 */ +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +/* our CLE is AD22 */ +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTC, 13 +/* needed for nand_util.c */ +#define CONFIG_SYS_64BIT_VSPRINTF +#endif + +/* NOR flash - no real flash on this board */ +#define CONFIG_SYS_NO_FLASH 1 + +/* Ethernet */ +#define CONFIG_MACB 1 +#define CONFIG_RMII 1 +#define CONFIG_NET_MULTI 1 +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_RESET_PHY_R 1 + +/* USB */ +#define CONFIG_USB_ATMEL +#define CONFIG_USB_OHCI_NEW 1 +#define CONFIG_DOS_PARTITION 1 +#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END 0x23e00000 + +/* bootstrap + u-boot + env + linux in nandflash */ +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_OFFSET 0x60000 +#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_BOOTCOMMAND "run sdboot" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtdparts=mtdparts=atmel_nand:128k(bootstrap)ro," \ + "256k(uboot)ro,128k(env1)ro," \ + "128k(env2)ro,2M(linux),-(root)rw\0" \ + "sdboot=setenv bootargs ${basicargs} mem=${ramsize} " \ + "${mtdparts} root=/dev/mmcblk0p1 rootdelay=1; " \ + "nand read 0x22000000 0xA0000 0x200000; " \ + "bootm 22000000\0" \ + "flashboot=setenv bootargs ${basicargs} ${mtdparts} " \ + "root=/dev/mtdblock5 rootfstype=jffs2; " \ + "nand read 0x22000000 0xA0000 0x200000; " \ + "bootm 22000000\0" \ + "ramsize=64M\0" \ + "basicargs=console=ttyS0,115200\0" \ + "" + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ + +#define CONFIG_STACKSIZE (32*1024) /* regular stack */ + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif -- 1.6.4.4

4 6

[U-Boot] [PATCH] Support for Calao USB A9263 board based on AT91SAM9263 CPU
by Thomas Petazzoni 20 Aug '10

20 Aug '10

The Calao USB A9263 board is a board manufactured and sold by Calao Systems <http://www.calao-systems.com>. Its components are very similar to the AT91SAM9263EK board, so its configuration is based on the configuration of this board. There are however some differences: different clocks, no LCD, etc. Signed-off-by: Thomas Petazzoni <thomas.petazzoni(a)free-electrons.com> --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/calao/usb-a9263/Makefile | 58 ++++++++++++ board/calao/usb-a9263/config.mk | 24 +++++ board/calao/usb-a9263/partition.c | 38 ++++++++ board/calao/usb-a9263/usb-a9263.c | 185 +++++++++++++++++++++++++++++++++++++ include/configs/usb-a9263.h | 183 ++++++++++++++++++++++++++++++++++++ 8 files changed, 496 insertions(+), 0 deletions(-) create mode 100644 board/calao/usb-a9263/Makefile create mode 100644 board/calao/usb-a9263/config.mk create mode 100644 board/calao/usb-a9263/partition.c create mode 100644 board/calao/usb-a9263/usb-a9263.c create mode 100644 include/configs/usb-a9263.h diff --git a/MAINTAINERS b/MAINTAINERS index 9734b1d..03f990c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -667,6 +667,10 @@ Peter Pearse <peter.pearse(a)arm.com> versatile ARM926EJ-S versatile ARM926EJ-S +Thomas Petazzoni <thomas.petazzoni(a)free-electrons.com> + + usb-a9263 ARM926EJS (AT91SAM9263 SoC) + Dave Peverley <dpeverley(a)mpc-data.co.uk> omap730p2 ARM926EJS diff --git a/MAKEALL b/MAKEALL index ab1bb6f..99ce563 100755 --- a/MAKEALL +++ b/MAKEALL @@ -657,6 +657,7 @@ LIST_at91=" \ SBC35_A9G20 \ TNY_A9260 \ TNY_A9G20 \ + usb9263 \ " ######################################################################### diff --git a/Makefile b/Makefile index ed6156f..d5b7f76 100644 --- a/Makefile +++ b/Makefile @@ -2874,6 +2874,9 @@ TNY_A9260_config : unconfig @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h @$(MKCONFIG) -a tny_a9260 arm arm926ejs tny_a9260 calao at91 +usb_a9263_config : unconfig + $(MKCONFIG) -a usb-a9263 arm arm926ejs usb-a9263 calao at91 + ######################################################################## ## ARM Integrator boards - see doc/README-integrator for more info. integratorap_config \ diff --git a/board/calao/usb-a9263/Makefile b/board/calao/usb-a9263/Makefile new file mode 100644 index 0000000..ec79872 --- /dev/null +++ b/board/calao/usb-a9263/Makefile @@ -0,0 +1,58 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# (C) Copyright 2008 +# Stelian Pop <stelian.pop(a)leadtechdesign.com> +# Lead Tech Design <www.leadtechdesign.com> +# +# (C) Copyright 2009 +# Thomas Petazzoni, Free Electrons, <thomas.petazzoni(a)free-electrons.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += usb-a9263.o +COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/calao/usb-a9263/config.mk b/board/calao/usb-a9263/config.mk new file mode 100644 index 0000000..2724a7d --- /dev/null +++ b/board/calao/usb-a9263/config.mk @@ -0,0 +1,24 @@ +# +# (C) Copyright 2009 +# Thomas Petazzoni, Free Electrons, <thomas.petazzoni(a)free-electrons.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0x23f00000 diff --git a/board/calao/usb-a9263/partition.c b/board/calao/usb-a9263/partition.c new file mode 100644 index 0000000..614ef0d --- /dev/null +++ b/board/calao/usb-a9263/partition.c @@ -0,0 +1,38 @@ +/* + * (C) Copyright 2008-2009 + * Ulf Samuelsson <ulf(a)atmel.com> + * Thomas Petazzoni, Free Electrons, <thomas.petazzoni(a)free-electrons.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <config.h> +#include <asm/hardware.h> +#include <dataflash.h> + +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; + +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ +}; + +/*define the area offsets*/ +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { + {0x00000000, 0x00001FFF, FLAG_PROTECT_SET, 0, "Bootstrap"}, + {0x00002000, 0x00003FFF, FLAG_PROTECT_CLEAR, 0, "Environment"}, + {0x00004000, 0xFFFFFFFF, FLAG_PROTECT_SET, 0, "U-Boot"}, +}; diff --git a/board/calao/usb-a9263/usb-a9263.c b/board/calao/usb-a9263/usb-a9263.c new file mode 100644 index 0000000..ca66f01 --- /dev/null +++ b/board/calao/usb-a9263/usb-a9263.c @@ -0,0 +1,185 @@ +/* + * (C) Copyright 2007-2009 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * Thomas Petazzoni, Free Electrons, <thomas.petazzoni(a)free-electrons.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/sizes.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91sam9263_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> +#include <asm/arch/hardware.h> +#if defined(CONFIG_MACB) +#include <net.h> +#endif +#include <netdev.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +#ifdef CONFIG_CMD_NAND +static void usb_a9263_nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBI0CSA); + at91_sys_write(AT91_MATRIX_EBI0CSA, + csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | +#ifdef CONFIG_SYS_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CONFIG_SYS_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(2)); + + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA | + 1 << AT91SAM9263_ID_PIOCDE); + + /* Configure RDY/BSY */ + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + + /* Enable NandFlash */ + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); +} +#endif + +#ifdef CONFIG_MACB +static void usb_a9263_macb_hw_init(void) +{ + unsigned long rstc; + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC); + + /* + * Disable pull-up on: + * RXDV (PC25) => PHY normal mode (not Test mode) + * ERX0 (PE25) => PHY ADDR0 + * ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0 + * + * PHY has internal pull-down + */ + writel(pin_to_mask(AT91_PIN_PC25), + pin_to_controller(AT91_PIN_PC0) + PIO_PUDR); + writel(pin_to_mask(AT91_PIN_PE25) | + pin_to_mask(AT91_PIN_PE26), + pin_to_controller(AT91_PIN_PE0) + PIO_PUDR); + + rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL; + + /* Need to reset PHY -> 500ms reset */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0D << 8)) | + AT91_RSTC_URSTEN); + + at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); + + /* Wait for end hardware reset */ + while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); + + /* Restore NRST value */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (rstc) | + AT91_RSTC_URSTEN); + + /* Re-enable pull-up */ + writel(pin_to_mask(AT91_PIN_PC25), + pin_to_controller(AT91_PIN_PC0) + PIO_PUER); + writel(pin_to_mask(AT91_PIN_PE25) | + pin_to_mask(AT91_PIN_PE26), + pin_to_controller(AT91_PIN_PE0) + PIO_PUER); + + at91_macb_hw_init(); +} +#endif + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + + /* arch number of USB-A9263-Board */ + gd->bd->bi_arch_number = MACH_TYPE_USB_A9263; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + at91_serial_hw_init(); +#ifdef CONFIG_CMD_NAND + usb_a9263_nand_hw_init(); +#endif +#ifdef CONFIG_HAS_DATAFLASH + at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */ + at91_spi0_hw_init(1 << 0); +#endif +#ifdef CONFIG_MACB + usb_a9263_macb_hw_init(); +#endif +#ifdef CONFIG_USB_OHCI_NEW + at91_uhp_hw_init(); +#endif + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = get_ram_size((long*) PHYS_SDRAM, + PHYS_SDRAM_SIZE); + if (gd->bd->bi_dram[0].size != PHYS_SDRAM_SIZE) + return -1; + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)AT91SAM9263_BASE_EMAC, 0x00); +#endif + return rc; +} diff --git a/include/configs/usb-a9263.h b/include/configs/usb-a9263.h new file mode 100644 index 0000000..aa398aa --- /dev/null +++ b/include/configs/usb-a9263.h @@ -0,0 +1,183 @@ +/* + * (C) Copyright 2007-2009 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * Thomas Petazzoni, Free Electrons, <thomas.petazzoni(a)free-electrons.com> + * + * Configuration settings for the Calao USB-A9263 board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/at91sam9263.h> + +/* ARM asynchronous clock */ +#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/ +#define CONFIG_CALAO_USB_A9263 1 /* on an Calao USB A 9263 Board */ +#define CONFIG_ARCH_CPU_INIT +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT + +/* + * Hardware drivers + */ +#define CONFIG_ATMEL_USART 1 +#undef CONFIG_USART0 +#undef CONFIG_USART1 +#undef CONFIG_USART2 +#define CONFIG_USART3 1 /* USART 3 is DBGU */ + +/* LCD */ +#undef CONFIG_LCD + +#define CONFIG_BOOTDELAY 3 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE + +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_NAND 1 +#define CONFIG_CMD_USB 1 + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 +#define PHYS_SDRAM_SIZE 0x04000000 + +/* DataFlash */ +#define CONFIG_ATMEL_DATAFLASH_SPI +#define CONFIG_HAS_DATAFLASH 1 +#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) +#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 +#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 +#define AT91_SPI_CLK 8000000 +#define DATAFLASH_TCSS (0x1c << 16) +#define DATAFLASH_TCHS (0x1 << 24) + +/* no NOR flash */ +#define CONFIG_SYS_NO_FLASH 1 + +/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 1 +/* our ALE is AD21 */ +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +/* our CLE is AD22 */ +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 +#endif + +/* Ethernet */ +#define CONFIG_MACB 1 +#define CONFIG_RMII 1 +#define CONFIG_NET_MULTI 1 +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_MACB_SEARCH_PHY 1 + +/* USB */ +#define CONFIG_USB_ATMEL +#define CONFIG_USB_OHCI_NEW 1 +#define CONFIG_DOS_PARTITION 1 +#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91SAM9263_UHP_BASE +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END 0x23e00000 + +/* bootstrap + u-boot + env in dataflash on CS0 */ +#define CONFIG_ENV_IS_IN_DATAFLASH 1 +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0) +#define CONFIG_ENV_OFFSET 0x2000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_BOOTCOMMAND "nboot 21000000 0" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock1 " \ + "mtdparts=atmel_nand:2m(kernel)ro,-(root) "\ + "rw rootfstype=jffs2" + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, \ + 0x1000) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ + +#define CONFIG_STACKSIZE (32*1024) /* regular stack */ + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif -- 1.6.3.3

2 1

[U-Boot] changes to U-boot and GPL
by Mangelschots, Jef 18 Aug '10

18 Aug '10

We are getting confused when reading the GPL and interpreting how it applies to our situation. We are adding features (not changing existing ones) to U-boot particular to our in-house developed system which we sell as a product to our customers. These changes involve adding a menu command for common tasks particular to our product and adding an in-house developed protocol for transferring files over a proprietary bus. We do not see these changes as being useful to the general U-boot community. We do have some concerns about security and opening our product (which is safety-critical) for malicious hacking by exposing the modifications. This modified U-boot will be deployed on our products. It will not make sense to use on any other platforms. Our question is: Do we need to submit our changes to the U-boot maintainers for inclusion in the mainline distribution code ? We understand the philosophy of GPL to give our customers the source code so they have the ability to inspect, modify and outsource And customization without being dependent on us. In that light we have no problem in either providing our customers with the full source code upon their request OR simply load the full source code in the file system of the box it is shipped with. So if a customer wants the code, they can load it of the box they bought from us. Any suggestions ? Thank you ________________________________ Any files attached to this e-mail will have been checked with virus detection software prior to transmission but you should carry out your own virus check before opening any attachment. Safetran Systems Corp does not accept liability for any damage or loss which may be caused by software viruses. The contents of this e-mail and any attachments are the property of Safetran Systems Corp and are intended for the confidential use by the named recipient only. They may be legally privileged and should not be communicated to, or relied upon, by any other person without written consent. If you are not the addressee, please notify us immediately at the following address: Safetran Systems Corporation, 2400 Nelson Miller Parkway, Louisville, Kentucky 40223. Safetran Systems Corp is a subsidiary of Invensys Plc. Registered office: Portland House, Bressenden Place, London, SW1E 5BF. UK Registered in England and Wales No. 1641421.

4 7

[U-Boot] please update ARM mach-types
by Minkyu Kang 18 Aug '10

18 Aug '10

Dear Tom, Could you please update ARM machine types? I will post the new board that is named goni, but mach-types is not updated. Thanks. Minkyu Kang

3 2

[U-Boot] [PATCH] OMAP3: remove unused config macros
by Grazvydas Ignotas 13 Aug '10

13 Aug '10

Most OMAP3 boards have various flash related macros in their configs that are either not referenced anywhere in the code or are used by drivers that are not enabled. Remove them. Signed-off-by: Grazvydas Ignotas <notasas(a)gmail.com> --- include/configs/omap3_beagle.h | 18 ------------------ include/configs/omap3_evm.h | 18 ------------------ include/configs/omap3_overo.h | 18 ------------------ include/configs/omap3_pandora.h | 20 -------------------- include/configs/omap3_sdp3430.h | 7 ------- include/configs/omap3_zoom1.h | 18 ------------------ include/configs/omap3_zoom2.h | 10 ---------- 7 files changed, 0 insertions(+), 109 deletions(-) diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 08d79ac..f8266b1 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -291,9 +291,6 @@ #define PISMO1_NAND_SIZE GPMC_SIZE_128M #define PISMO1_ONEN_SIZE GPMC_SIZE_128M -#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */ - /* one chip */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ #define CONFIG_SYS_FLASH_BASE boot_flash_base @@ -310,21 +307,6 @@ #define CONFIG_ENV_OFFSET boot_flash_off #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET -/*----------------------------------------------------------------------- - * CFI FLASH driver setup - */ -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) - -/* Flash banks JFFS2 should use */ -#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ - CONFIG_SYS_MAX_NAND_DEVICE) -#define CONFIG_SYS_JFFS2_MEM_NAND -/* use flash_info[2] */ -#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 - #ifndef __ASSEMBLY__ extern unsigned int boot_flash_base; extern volatile unsigned int boot_flash_env_addr; diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 0d99f7d..39eb4b5 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -295,9 +295,6 @@ #define PISMO1_NAND_SIZE GPMC_SIZE_128M #define PISMO1_ONEN_SIZE GPMC_SIZE_128M -#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */ - /* on one chip */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ #define CONFIG_SYS_FLASH_BASE boot_flash_base @@ -314,21 +311,6 @@ #define CONFIG_ENV_OFFSET boot_flash_off #define CONFIG_ENV_ADDR boot_flash_env_addr -/*----------------------------------------------------------------------- - * CFI FLASH driver setup - */ -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) - -/* Flash banks JFFS2 should use */ -#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ - CONFIG_SYS_MAX_NAND_DEVICE) -#define CONFIG_SYS_JFFS2_MEM_NAND -/* use flash_info[2] */ -#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 - #ifndef __ASSEMBLY__ extern unsigned int boot_flash_base; extern volatile unsigned int boot_flash_env_addr; diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index a43500b..b5b2dbe 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -260,9 +260,6 @@ #define PISMO1_NAND_SIZE GPMC_SIZE_128M #define PISMO1_ONEN_SIZE GPMC_SIZE_128M -#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */ - /* one chip */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ #define CONFIG_SYS_FLASH_BASE boot_flash_base @@ -279,21 +276,6 @@ #define CONFIG_ENV_OFFSET boot_flash_off #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET -/*----------------------------------------------------------------------- - * CFI FLASH driver setup - */ -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) - -/* Flash banks JFFS2 should use */ -#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ - CONFIG_SYS_MAX_NAND_DEVICE) -#define CONFIG_SYS_JFFS2_MEM_NAND -/* use flash_info[2] */ -#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 - #ifndef __ASSEMBLY__ extern unsigned int boot_flash_base; extern volatile unsigned int boot_flash_env_addr; diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 945c053..9e3ee99 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -252,40 +252,20 @@ #define PISMO1_NAND_SIZE GPMC_SIZE_128M #define PISMO1_ONEN_SIZE GPMC_SIZE_128M -#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */ - /* one chip */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ #define CONFIG_SYS_FLASH_BASE boot_flash_base /* Monitor at start of flash */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP #define CONFIG_ENV_IS_IN_NAND 1 -#define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */ #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */ #define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec #define CONFIG_ENV_OFFSET boot_flash_off #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET -/*----------------------------------------------------------------------- - * CFI FLASH driver setup - */ -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) - -/* Flash banks JFFS2 should use */ -#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ - CONFIG_SYS_MAX_NAND_DEVICE) -#define CONFIG_SYS_JFFS2_MEM_NAND -/* use flash_info[2] */ -#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 - #ifndef __ASSEMBLY__ extern unsigned int boot_flash_base; extern volatile unsigned int boot_flash_env_addr; diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h index b4919db..e3a7073 100644 --- a/include/configs/omap3_sdp3430.h +++ b/include/configs/omap3_sdp3430.h @@ -158,10 +158,6 @@ #define PHYS_FLASH_SIZE (128 << 20) #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max sectors on one chip */ -/* timeout values are in milliseconds */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) - /* OMITTED: single 2 Gbit KFM2G16 OneNAND flash */ #define CONFIG_ENV_IS_IN_FLASH 1 @@ -337,9 +333,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) -#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 - /* * NAND FLASH usage ... default nCS1: * - four 128KB sectors for X-Loader diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index ae7ebf9..834d8f0 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -276,9 +276,6 @@ #define PISMO1_NAND_SIZE GPMC_SIZE_128M #define PISMO1_ONEN_SIZE GPMC_SIZE_128M -#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */ - /* one chip */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ #define CONFIG_SYS_FLASH_BASE boot_flash_base @@ -295,21 +292,6 @@ #define CONFIG_ENV_OFFSET boot_flash_off #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET -/*----------------------------------------------------------------------- - * CFI FLASH driver setup - */ -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) - -/* Flash banks JFFS2 should use */ -#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ - CONFIG_SYS_MAX_NAND_DEVICE) -#define CONFIG_SYS_JFFS2_MEM_NAND -/* use flash_info[2] */ -#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 - #ifndef __ASSEMBLY__ extern unsigned int boot_flash_base; extern volatile unsigned int boot_flash_env_addr; diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h index c88c732..865659f 100644 --- a/include/configs/omap3_zoom2.h +++ b/include/configs/omap3_zoom2.h @@ -245,9 +245,6 @@ #define PISMO1_NAND_SIZE GPMC_SIZE_128M #define PISMO1_ONEN_SIZE GPMC_SIZE_128M -#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */ - /* one chip */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ #define CONFIG_SYS_FLASH_BASE boot_flash_base @@ -262,13 +259,6 @@ #define CONFIG_ENV_OFFSET boot_flash_off #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET -/*----------------------------------------------------------------------- - * CFI FLASH driver setup - */ -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) - #ifndef __ASSEMBLY__ extern unsigned int boot_flash_base; extern volatile unsigned int boot_flash_env_addr; -- 1.6.3.3

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[U-Boot] [PATCH] Create a new driver for Atmel at91/avr MCI adapters that uses the u-boot mmc framework.
by Rob Emanuele 10 Aug '10

10 Aug '10

To use it on your platform add defines like these: #define CONFIG_MMC 1 #define CONFIG_GENERIC_MMC 1 #define CONFIG_GENERIC_ATMEL_MCI 1 /*change this for your cpu */ #define MMCI_BASE 0xFFF80000 Then create an init routine in your platform code: /* this is a weak define that we are overriding */ int board_mmc_init(bd_t *bd) { /* This calls your code to clock the interface * and set the pins up, etc. */ mmc_hw_init(); /* This calls the atmel_mmc_init in gen_atmel_mci.c */ return atmel_mmc_init(bd); } Signed-off-by: Rob Emanuele <rob(a)emanuele.us> --- drivers/mmc/Makefile | 1 + drivers/mmc/gen_atmel_mci.c | 330 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 331 insertions(+), 0 deletions(-) create mode 100644 drivers/mmc/gen_atmel_mci.c diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 6fa04b8..1785253 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libmmc.a COBJS-$(CONFIG_GENERIC_MMC) += mmc.o +COBJS-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o COBJS-$(CONFIG_ATMEL_MCI) += atmel_mci.o COBJS-$(CONFIG_BFIN_SDH) += bfin_sdh.o COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c new file mode 100644 index 0000000..9e3430a --- /dev/null +++ b/drivers/mmc/gen_atmel_mci.c @@ -0,0 +1,330 @@ +/* + * Copyright 2010, Rob Emanuele <rob(a)emanuele.us> + * + * Original Driver: + * Copyright (C) 2004-2006 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <common.h> +#include <command.h> +#include <hwconfig.h> +#include <mmc.h> +#include <part.h> +#include <malloc.h> +#include <mmc.h> +#include <asm/io.h> +#include <asm/errno.h> +#include <asm/byteorder.h> +#include <asm/arch/clk.h> +#include <asm/arch/memory-map.h> +#include "atmel_mci.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifndef CONFIG_SYS_MMC_CLK_OD +#define CONFIG_SYS_MMC_CLK_OD 150000 +#endif +#define MMC_DEFAULT_BLKLEN 512 + +void dump_cmd(uint cmdr, uint arg, uint status, const char* msg) +{ + printf("gen_atmel_mci: CMDR 0x%08x (%2u) ARGR 0x%08x (SR: 0x%08x) %s\n", + cmdr, cmdr&0x3F, arg, status, msg); +} + +/* Setup for MCI Clock and Block Size */ +static void mci_set_mode(unsigned long hz, unsigned long blklen) +{ + unsigned long bus_hz; + unsigned long clkdiv; + + if (hz > 0) { + bus_hz = get_mck_clk_rate(); + clkdiv = (bus_hz / hz) / 2 - 1; + } else { + clkdiv = ~0UL; + } + + printf("mmc: setting clock %lu Hz, block size %lu\n", + hz, blklen); + + if (clkdiv & ~255UL) { + clkdiv = 255; + printf("mmc: clock %lu too low; setting CLKDIV to 255\n", + hz); + } + + blklen &= 0xfffc; + /* On some platforms RDPROOF and WRPROOF are ignored */ + mmci_writel(MR, (MMCI_BF(CLKDIV, clkdiv) + | MMCI_BF(BLKLEN, blklen) + | MMCI_BIT(RDPROOF) + | MMCI_BIT(WRPROOF))); +} + +/* Return the CMDR with flags for a given command and data packet */ +static uint atmel_encode_cmd(struct mmc_cmd *cmd, struct mmc_data *data, uint* error_flags) +{ + uint cmdr = 0; + /* Default Flags for Errors */ + *error_flags |= (MMCI_BIT(DTOE) | MMCI_BIT(RDIRE) | MMCI_BIT(RENDE) | MMCI_BIT(RINDE) | MMCI_BIT(RTOE)); + + /* Default Flags for the Command */ + cmdr |= MMCI_BIT(MAXLAT); + + if (data) { + cmdr |= MMCI_BF(TRCMD,1); + + if (data->blocks > 1) { + cmdr |= MMCI_BF(TRTYP,1); + } + + if (data->flags & MMC_DATA_READ) + cmdr |= MMCI_BIT(TRDIR); + } + + if (cmd->resp_type & MMC_RSP_CRC) + *error_flags |= MMCI_BIT(RCRCE); + + if (cmd->resp_type & MMC_RSP_136) + cmdr |= MMCI_BF(RSPTYP,2); + else if (cmd->resp_type & MMC_RSP_BUSY) + cmdr |= MMCI_BF(RSPTYP,3); + else if (cmd->resp_type & MMC_RSP_PRESENT) + cmdr |= MMCI_BF(RSPTYP,1); + + return cmdr | MMCI_BF(CMDNB,cmd->cmdidx); +} + +static uint atmel_data_read(uint* data, uint error_flags) +{ + uint status; + do { + status = mmci_readl(SR); + if (status & (error_flags | MMCI_BIT(OVRE))) + goto io_fail; + } while (!(status & MMCI_BIT(RXRDY))); + + if (status & MMCI_BIT(RXRDY)) { + *data = mmci_readl(RDR); + status = 0; + } +io_fail: + return status; +} + +static uint atmel_data_write(uint* data, uint error_flags) +{ + uint status; + do { + status = mmci_readl(SR); + if (status & (error_flags | MMCI_BIT(UNRE))) + goto io_fail; + } while (!(status & MMCI_BIT(TXRDY))); + + if (status & MMCI_BIT(TXRDY)) { + mmci_writel(TDR,*data); + status = 0; + } +io_fail: + return status; +} + +/* + * Sends a command out on the bus and deals with the block data. + * Takes the mmc pointer, a command pointer, and an optional data pointer. + */ +static int +atmel_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) +{ + uint cmdr; + uint error_flags = 0; + uint status; + + /* Figure out the transfer arguments */ + cmdr = atmel_encode_cmd(cmd, data, &error_flags); + + /* Send the command */ + mmci_writel(ARGR,cmd->cmdarg); + mmci_writel(CMDR, cmdr); + +#if GEN_ATMEL_MCI_DEBUG + dump_cmd(cmdr, cmd->cmdarg, 0, "COMMAND Dbg Msg"); +#endif + + /* Wait for the command to complete */ + while (!((status = mmci_readl(SR)) & MMCI_BIT(CMDRDY))); + + if (status & error_flags) { + dump_cmd(cmdr, cmd->cmdarg, status, "COMMAND Failed"); + return COMM_ERR; + } + + /* Copy the response to the response buffer */ + if (cmd->resp_type & MMC_RSP_136) { + cmd->response[0] = mmci_readl(RSPR); + cmd->response[1] = mmci_readl(RSPR1); + cmd->response[2] = mmci_readl(RSPR2); + cmd->response[3] = mmci_readl(RSPR3); + } else + cmd->response[0] = mmci_readl(RSPR); + + /* transfer all of the blocks */ + if (data) { + uint word_count, block_count; + uint* ioptr; + uint sys_blocksize, dummy, i; + uint (*atmel_data_op)(uint* data, uint error_flags); + + if (data->flags & MMC_DATA_READ) { + atmel_data_op = atmel_data_read; + sys_blocksize = mmc->read_bl_len; + ioptr = (uint*)data->dest; + } else { + atmel_data_op = atmel_data_write; + sys_blocksize = mmc->write_bl_len; + ioptr = (uint*)data->src; + } + + status = 0; + for(block_count = 0; block_count < data->blocks && !status; block_count++) { + word_count = 0; + do { + status = atmel_data_op(ioptr,error_flags); + word_count++; + ioptr++; + } while(!status && word_count < (data->blocksize / 4)); +#if GEN_ATMEL_MCI_DEBUG + if (data->flags & MMC_DATA_READ) + { + char *mem_args[3]; + char mem_addr_str[16]; + char mem_len_str[16]; + printf("Command caused a block read for %u bytes (read %u bytes)\n", data->blocksize, word_count*4); + mem_args[0] = "md.l"; + sprintf(mem_addr_str,"0x%08x",(uint)(data->dest)); + mem_args[1] = mem_addr_str; + sprintf(mem_len_str,"0x%x",word_count); + mem_args[2] = mem_len_str; + printf("Dumping with: %s %s %s\n", mem_args[0], mem_args[1], mem_args[2]); + do_mem_md(NULL, 0, 3, mem_args); + } +#endif +#if GEN_ATMEL_MCI_DEBUG + if (!status && word_count < (sys_blocksize / 4)) + printf("sponging....\n"); +#endif + /* sponge the rest of a full block */ + while (!status && word_count < (sys_blocksize / 4)) { + status = atmel_data_op(&dummy,error_flags); + word_count++; + } + if (status) { + dump_cmd(cmdr, cmd->cmdarg, status, "XFER Failed"); + return COMM_ERR; + } + } + + /* Wait for Transfer End */ + i = 0; + do { + status = mmci_readl(SR); + + if (status & error_flags) { + dump_cmd(cmdr, cmd->cmdarg, status, "XFER DTIP Wait Failed"); + return COMM_ERR; + } + i++; + } while ((status & MMCI_BIT(DTIP)) && i < 10000); + if (status & MMCI_BIT(DTIP)) { + dump_cmd(cmdr, cmd->cmdarg, status, "XFER DTIP never unset, ignoring"); + } + } + + return 0; +} + +static void atmel_set_ios(struct mmc *mmc) +{ + /* Set the clock speed */ + mci_set_mode(mmc->clock, MMC_DEFAULT_BLKLEN); + + /* set the bus width and select slot A for this interface + * there is no capability for multiple slots on the same interface yet + */ + /* Bitfield SCDBUS needs to be expanded to 2 bits for 8-bit buses + */ + if (mmc->bus_width == 4) + mmci_writel(SDCR, MMCI_BF(SCDBUS,0x1)|MMCI_BF(SCDSEL,0x0)); + else + mmci_writel(SDCR, MMCI_BF(SCDBUS,0x0)|MMCI_BF(SCDSEL,0x0)); +} + +static int atmel_init(struct mmc *mmc) +{ + /* Initialize controller */ + mmci_writel(CR, MMCI_BIT(SWRST)); /* soft reset */ + mmci_writel(CR, MMCI_BIT(PWSDIS)); /* disable power save */ + mmci_writel(CR, MMCI_BIT(MCIEN)); /* enable mci */ + + /* Initial Time-outs */ + mmci_writel(DTOR, 0x5f); + /* Disable Interrupts */ + mmci_writel(IDR, ~0UL); + + /* Set defualt clocks and blocklen */ + mci_set_mode(CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN); + + return 0; +} + +static int atmel_initialize(bd_t *bis) +{ + struct mmc *mmc; + + mmc = malloc(sizeof(struct mmc)); + + sprintf(mmc->name, "Atmel MCI"); + /* We set this but atmel_mci.h makes use of MMCI_BASE directly */ + mmc->priv = (void *)MMCI_BASE; + mmc->send_cmd = atmel_send_cmd; + mmc->set_ios = atmel_set_ios; + mmc->init = atmel_init; + + /* need to be able to pass these in on a baord by board basis */ + mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; + mmc->host_caps = MMC_MODE_4BIT; + + /* High Speed Support? */ + + mmc->f_min = get_mck_clk_rate() / (2*(0xFF+1)); + mmc->f_max = get_mck_clk_rate() / (2); + + mmc_register(mmc); + + return 0; +} + +int atmel_mmc_init(bd_t *bis) +{ + return atmel_initialize(bis); +} -- 1.6.3.3

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[U-Boot] [PATCH] get_ram_size: memory content of base address was not restored
by ratbert.chuang＠gmail.com 09 Aug '10

09 Aug '10

From: Po-Yu Chuang <ratbert(a)faraday-tech.com> Signed-off-by: Po-Yu Chuang <ratbert(a)faraday-tech.com> --- common/memsize.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/common/memsize.c b/common/memsize.c index 6c275c9..99469ab 100644 --- a/common/memsize.c +++ b/common/memsize.c @@ -74,6 +74,7 @@ long get_ram_size(volatile long *base, long maxsize) return (0); } + *addr = save[i]; for (cnt = 1; cnt < maxsize / sizeof (long); cnt <<= 1) { addr = base + cnt; /* pointer arith! */ val = *addr; -- 1.6.0.4

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[U-Boot] [PATCH] AT91 Fix: return value of get_tbclk
by Jens Scharsig 07 Aug '10

07 Aug '10

* Fix: return value of get_tbclk * this fixes issue with prematurely restart/retry, if BOOT_RETRY_TIMEOUT is used Signed-off-by: Jens Scharsig <js_at_ng(a)scharsoft.de> --- cpu/arm926ejs/at91/timer.c | 5 +---- 1 files changed, 1 insertions(+), 4 deletions(-) diff --git a/cpu/arm926ejs/at91/timer.c b/cpu/arm926ejs/at91/timer.c index d21eebf..8efc34b 100644 --- a/cpu/arm926ejs/at91/timer.c +++ b/cpu/arm926ejs/at91/timer.c @@ -138,8 +138,5 @@ ulong get_timer(ulong base) */ ulong get_tbclk(void) { - ulong tbclk; - - tbclk = CONFIG_SYS_HZ; - return tbclk; + return timer_freq; } -- 1.6.0.2

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[U-Boot] u-boot ls cmd oops Unknown node type.
by H. Johnny 28 Jul '10

28 Jul '10

Hi All, The ls command in u-boot can list contains of JFFS2 filesystem. It works fine after copy (cp.b $memaddr $noraddr) jffs2 image file to flash in u-boot. After boot to linux system and copy a file to JFFS2 filesystem and do sync, reboot then got following message in u-boot. The kernel I used is 2.6.23 and u-boot is 1.3.0. ### JFFS2 loading 'image1' to 0x400000 Scanning JFFS2 FS: .- Unknown node type: 2006 len 684 offset 0x7ffd54 \ Unknown node type: 2006 len 764 offset 0x83fd04 | Unknown node type: 2006 len 616 offset 0x85fd98 .... Google this message and got some information, but is it true reason? below is from google. http://docwiki.gumstix.org/Tutorial == ### JFFS2 loading 'boot/uImage' to 0xa2000000 Scanning JFFS2 FS: . Unknown node type: 2006 len 4288 offset 0x5ef40 Unknown node type: 2006 len 6480 offset 0x7e6b0 / Unknown node type: 2006 len 4988 offset 0x9ec84 . Unknown node type: 2006 len 7368 offset 0xbe338 - Unknown node type: 2006 len 10128 offset 0xdd870 that's currently normal. The 2.6.15 kernel has changed the JFFS2 filesystem in a way that cause u-boot to report these unknown node-type messages. You can ignore the messages == Thaks for any reply. -- [To be different, do different. To be appear different, change the name.] H. Johnny

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