November 2010 - U-Boot

[U-Boot] [GIT PULL] mpc83xx: misc. fixes
by Kim Phillips 30 Nov '10

30 Nov '10

Wolfgang Denk, Please pull: The following changes since commit 844f07d8a1f1330c97631b23fbf6425db2dc1508: Coding Style (white space) cleanup (2010-11-27 23:35:14 +0100) are available in the git repository at: git://git.denx.de/u-boot-mpc83xx.git master Joakim Tjernlund (2): mpc83xx: remove some dead code, saving space mpc83xx: Make it boot again Stefan Popa (1): mpc83xx: Fix for MPC8360 ATM Quad OC3 External Phys arch/powerpc/cpu/mpc83xx/start.S | 15 ++++++++------- include/configs/MPC8360EMDS.h | 4 ++-- 2 files changed, 10 insertions(+), 9 deletions(-) Thanks, Kim

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by pat-estes＠sbcglobal.net 30 Nov '10

30 Nov '10

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by Sam Benallack-Schumacher 30 Nov '10

30 Nov '10

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[U-Boot] [PATCH 1/1 V7] Add board support for hawkboard
by Sughosh Ganu 30 Nov '10

30 Nov '10

The patch adds basic board support for TI's OMAP-L138 based Hawkboard. This board is pretty similar to the da850 EVM. Support for nand and network access is added in this version. The following bootup procedure is used. At reset, the Rom Boot Loader(RBL), initialises the ddr and the nand controllers and copies the second stage bootloader(nand_spl) to RAM. The secondary bootloader then copies u-boot from a predefined location in the nand flash to the RAM, and passes control to the u-boot image. Three config options are supported * hawkboard_config - Used to create the u-boot.bin. Tftp the u-boot.bin image to the RAM from u-boot, and flash to the nand flash at address 0xe0000. * hawkboard_nand_config - Used to generate the secondary bootloader(nand_spl) image. This creates an elf file u-boot-spl under nand_spl/. Create an AIS signed image using this file, and flash it to the nand flash at address 0x20000. The ais file should fit in one block. * hawkboard_uart_config - This is same as the first image, but with the TEXT_BASE as expected by the RBL(0xc1080000). Create the AIS Signed-off-by: Sughosh Ganu <urwithsughosh(a)gmail.com> Signed-off-by: Ben Gardiner <bengardiner(a)nanometrics.ca> --- Changes since V6 * Rebased off u-boot-ti next. * Moved CONFIG_SYS_TEXT_BASE declarations to the board config file. MAINTAINERS | 5 + arch/arm/include/asm/arch-davinci/da8xx_common.h | 3 + arch/arm/include/asm/arch-davinci/hardware.h | 5 +- board/davinci/common/Makefile | 2 +- board/davinci/common/davinci_pinmux.c | 105 +++++++++++ board/davinci/common/misc.c | 75 -------- board/davinci/da8xxevm/Makefile | 1 + board/davinci/da8xxevm/hawkboard.c | 69 +++++++ board/davinci/da8xxevm/hawkboard_nand_spl.c | 158 +++++++++++++++++ boards.cfg | 3 + doc/README.hawkboard | 93 ++++++++++ include/configs/hawkboard.h | 206 ++++++++++++++++++++++ nand_spl/board/davinci/da8xxevm/Makefile | 141 +++++++++++++++ nand_spl/board/davinci/da8xxevm/u-boot.lds | 75 ++++++++ nand_spl/nand_boot.c | 1 + 15 files changed, 865 insertions(+), 77 deletions(-) create mode 100644 board/davinci/common/davinci_pinmux.c create mode 100644 board/davinci/da8xxevm/hawkboard.c create mode 100644 board/davinci/da8xxevm/hawkboard_nand_spl.c create mode 100644 doc/README.hawkboard create mode 100644 include/configs/hawkboard.h create mode 100644 nand_spl/board/davinci/da8xxevm/Makefile create mode 100644 nand_spl/board/davinci/da8xxevm/u-boot.lds diff --git a/MAINTAINERS b/MAINTAINERS index f47fca5..ad335bc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -853,6 +853,11 @@ Alex Z lart SA1100 dnp1110 SA1110 +Syed Mohammed Khasim <sm.khasim(a)gmail.com> +Sughosh Ganu <urwithsughosh(a)gmail.com> + + hawkboard ARM926EJS (OMAP-L138) + ------------------------------------------------------------------------- Unknown / orphaned boards: diff --git a/arch/arm/include/asm/arch-davinci/da8xx_common.h b/arch/arm/include/asm/arch-davinci/da8xx_common.h index 7ae63a6..bc3092d 100644 --- a/arch/arm/include/asm/arch-davinci/da8xx_common.h +++ b/arch/arm/include/asm/arch-davinci/da8xx_common.h @@ -19,6 +19,9 @@ #ifndef __COMMON_H #define __COMMON_H +#define HAWKBOARD_KICK0_UNLOCK 0x83e70b13 +#define HAWKBOARD_KICK1_UNLOCK 0x95a4f1e0 + struct lpsc_resource { const int lpsc_no; }; diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index 21b2076..ef616c1 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -384,7 +384,10 @@ int clk_get(enum davinci_clk_ids id); /* Boot config */ struct davinci_syscfg_regs { dv_reg revid; - dv_reg rsvd[71]; + dv_reg rsvd[13]; + dv_reg kick0; + dv_reg kick1; + dv_reg rsvd1[56]; dv_reg pinmux[20]; dv_reg suspsrc; dv_reg chipsig; diff --git a/board/davinci/common/Makefile b/board/davinci/common/Makefile index 5ddb564..a1d3de2 100644 --- a/board/davinci/common/Makefile +++ b/board/davinci/common/Makefile @@ -29,7 +29,7 @@ endif LIB = $(obj)lib$(VENDOR).o -COBJS := misc.o +COBJS := misc.o davinci_pinmux.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/davinci/common/davinci_pinmux.c b/board/davinci/common/davinci_pinmux.c new file mode 100644 index 0000000..ce58f71 --- /dev/null +++ b/board/davinci/common/davinci_pinmux.c @@ -0,0 +1,105 @@ +/* + * DaVinci pinmux functions. + * + * Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson(a)gefanuc.com> + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> + * Copyright (C) 2004 Texas Instruments. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <asm/arch/hardware.h> +#include <asm/io.h> +#include <asm/arch/davinci_misc.h> + +/* + * Change the setting of a pin multiplexer field. + * + * Takes an array of pinmux settings similar to: + * + * struct pinmux_config uart_pins[] = { + * { &davinci_syscfg_regs->pinmux[8], 2, 7 }, + * { &davinci_syscfg_regs->pinmux[9], 2, 0 } + * }; + * + * Stepping through the array, each pinmux[n] register has the given value + * set in the pin mux field specified. + * + * The number of pins in the array must be passed (ARRAY_SIZE can provide + * this value conveniently). + * + * Returns 0 if all field numbers and values are in the correct range, + * else returns -1. + */ +int davinci_configure_pin_mux(const struct pinmux_config *pins, + const int n_pins) +{ + int i; + + /* check for invalid pinmux values */ + for (i = 0; i < n_pins; i++) { + if (pins[i].field >= PIN_MUX_NUM_FIELDS || + (pins[i].value & ~PIN_MUX_FIELD_MASK) != 0) + return -1; + } + + /* configure the pinmuxes */ + for (i = 0; i < n_pins; i++) { + const int offset = pins[i].field * PIN_MUX_FIELD_SIZE; + const unsigned int value = pins[i].value << offset; + const unsigned int mask = PIN_MUX_FIELD_MASK << offset; + const dv_reg *mux = pins[i].mux; + + writel(value | (readl(mux) & (~mask)), mux); + } + + return 0; +} + +/* + * Configure multiple pinmux resources. + * + * Takes an pinmux_resource array of pinmux_config and pin counts: + * + * const struct pinmux_resource pinmuxes[] = { + * PINMUX_ITEM(uart_pins), + * PINMUX_ITEM(i2c_pins), + * }; + * + * The number of items in the array must be passed (ARRAY_SIZE can provide + * this value conveniently). + * + * Each item entry is configured in the defined order. If configuration + * of any item fails, -1 is returned and none of the following items are + * configured. On success, 0 is returned. + */ +int davinci_configure_pin_mux_items(const struct pinmux_resource *item, + const int n_items) +{ + int i; + + for (i = 0; i < n_items; i++) { + if (davinci_configure_pin_mux(item[i].pins, + item[i].n_pins) != 0) + return -1; + } + + return 0; +} diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c index a30047b..f25ad7e 100644 --- a/board/davinci/common/misc.c +++ b/board/davinci/common/misc.c @@ -95,78 +95,3 @@ void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr) } #endif /* DAVINCI_EMAC */ - -/* - * Change the setting of a pin multiplexer field. - * - * Takes an array of pinmux settings similar to: - * - * struct pinmux_config uart_pins[] = { - * { &davinci_syscfg_regs->pinmux[8], 2, 7 }, - * { &davinci_syscfg_regs->pinmux[9], 2, 0 } - * }; - * - * Stepping through the array, each pinmux[n] register has the given value - * set in the pin mux field specified. - * - * The number of pins in the array must be passed (ARRAY_SIZE can provide - * this value conveniently). - * - * Returns 0 if all field numbers and values are in the correct range, - * else returns -1. - */ -int davinci_configure_pin_mux(const struct pinmux_config *pins, - const int n_pins) -{ - int i; - - /* check for invalid pinmux values */ - for (i = 0; i < n_pins; i++) { - if (pins[i].field >= PIN_MUX_NUM_FIELDS || - (pins[i].value & ~PIN_MUX_FIELD_MASK) != 0) - return -1; - } - - /* configure the pinmuxes */ - for (i = 0; i < n_pins; i++) { - const int offset = pins[i].field * PIN_MUX_FIELD_SIZE; - const unsigned int value = pins[i].value << offset; - const unsigned int mask = PIN_MUX_FIELD_MASK << offset; - const dv_reg *mux = pins[i].mux; - - writel(value | (readl(mux) & (~mask)), mux); - } - - return 0; -} - -/* - * Configure multiple pinmux resources. - * - * Takes an pinmux_resource array of pinmux_config and pin counts: - * - * const struct pinmux_resource pinmuxes[] = { - * PINMUX_ITEM(uart_pins), - * PINMUX_ITEM(i2c_pins), - * }; - * - * The number of items in the array must be passed (ARRAY_SIZE can provide - * this value conveniently). - * - * Each item entry is configured in the defined order. If configuration - * of any item fails, -1 is returned and none of the following items are - * configured. On success, 0 is returned. - */ -int davinci_configure_pin_mux_items(const struct pinmux_resource *item, - const int n_items) -{ - int i; - - for (i = 0; i < n_items; i++) { - if (davinci_configure_pin_mux(item[i].pins, - item[i].n_pins) != 0) - return -1; - } - - return 0; -} diff --git a/board/davinci/da8xxevm/Makefile b/board/davinci/da8xxevm/Makefile index 88fee50..1816368 100644 --- a/board/davinci/da8xxevm/Makefile +++ b/board/davinci/da8xxevm/Makefile @@ -30,6 +30,7 @@ LIB = $(obj)lib$(BOARD).o COBJS-y += common.o COBJS-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o COBJS-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o +COBJS-$(CONFIG_MACH_DAVINCI_HAWK) += hawkboard.o COBJS := $(COBJS-y) diff --git a/board/davinci/da8xxevm/hawkboard.c b/board/davinci/da8xxevm/hawkboard.c new file mode 100644 index 0000000..b672c9d --- /dev/null +++ b/board/davinci/da8xxevm/hawkboard.c @@ -0,0 +1,69 @@ +/* + * Modified for Hawkboard - Syed Mohammed Khasim <khasim(a)beagleboard.org> + * + * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar(a)ti.com> + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <asm/errno.h> +#include <asm/arch/hardware.h> +#include <asm/io.h> +#include <asm/arch/davinci_misc.h> +#include <ns16550.h> +#include <asm/arch/da8xx_common.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_HAWKBOARD; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + return 0; +} + +int board_early_init_f(void) +{ + /* + * Kick Registers need to be set to allow access to Pin Mux registers + */ + writel(HAWKBOARD_KICK0_UNLOCK, &davinci_syscfg_regs->kick0); + writel(HAWKBOARD_KICK1_UNLOCK, &davinci_syscfg_regs->kick1); + + /* set cfgchip3 to select mii */ + writel(readl(&davinci_syscfg_regs->cfgchip3) & + ~(1 << 8), &davinci_syscfg_regs->cfgchip3); + + return 0; +} + +int misc_init_r(void) +{ + char buf[32]; + + printf("ARM Clock : %s MHz\n", + strmhz(buf, clk_get(DAVINCI_ARM_CLKID))); + + return 0; +} diff --git a/board/davinci/da8xxevm/hawkboard_nand_spl.c b/board/davinci/da8xxevm/hawkboard_nand_spl.c new file mode 100644 index 0000000..74eec13 --- /dev/null +++ b/board/davinci/da8xxevm/hawkboard_nand_spl.c @@ -0,0 +1,158 @@ +/* + * Modified for Hawkboard - Syed Mohammed Khasim <khasim(a)beagleboard.org> + * + * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar(a)ti.com> + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <asm/errno.h> +#include <asm/arch/hardware.h> +#include <asm/io.h> +#include <asm/arch/davinci_misc.h> +#include <ns16550.h> +#include <asm/arch/da8xx_common.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define pinmux(x) (&davinci_syscfg_regs->pinmux[x]) + +static const struct pinmux_config mii_pins[] = { + { pinmux(2), 8, 1 }, + { pinmux(2), 8, 2 }, + { pinmux(2), 8, 3 }, + { pinmux(2), 8, 4 }, + { pinmux(2), 8, 5 }, + { pinmux(2), 8, 6 }, + { pinmux(2), 8, 7 } +}; + +static const struct pinmux_config mdio_pins[] = { + { pinmux(4), 8, 0 }, + { pinmux(4), 8, 1 } +}; + +static const struct pinmux_config nand_pins[] = { + { pinmux(7), 1, 1 }, + { pinmux(7), 1, 2 }, + { pinmux(7), 1, 4 }, + { pinmux(7), 1, 5 }, + { pinmux(9), 1, 0 }, + { pinmux(9), 1, 1 }, + { pinmux(9), 1, 2 }, + { pinmux(9), 1, 3 }, + { pinmux(9), 1, 4 }, + { pinmux(9), 1, 5 }, + { pinmux(9), 1, 6 }, + { pinmux(9), 1, 7 }, + { pinmux(12), 1, 5 }, + { pinmux(12), 1, 6 } +}; + +static const struct pinmux_config uart2_pins[] = { + { pinmux(0), 4, 6 }, + { pinmux(0), 4, 7 }, + { pinmux(4), 2, 4 }, + { pinmux(4), 2, 5 } +}; + +static const struct pinmux_config i2c_pins[] = { + { pinmux(4), 2, 4 }, + { pinmux(4), 2, 5 } +}; + +static const struct pinmux_resource pinmuxes[] = { + PINMUX_ITEM(mii_pins), + PINMUX_ITEM(mdio_pins), + PINMUX_ITEM(i2c_pins), + PINMUX_ITEM(nand_pins), + PINMUX_ITEM(uart2_pins), +}; + +static const struct lpsc_resource lpsc[] = { + { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ + { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ + { DAVINCI_LPSC_EMAC }, /* image download */ + { DAVINCI_LPSC_UART2 }, /* console */ + { DAVINCI_LPSC_GPIO }, +}; + +void board_init_f(ulong bootflag) +{ + /* + * Kick Registers need to be set to allow access to Pin Mux registers + */ + writel(HAWKBOARD_KICK0_UNLOCK, &davinci_syscfg_regs->kick0); + writel(HAWKBOARD_KICK1_UNLOCK, &davinci_syscfg_regs->kick1); + + /* setup the SUSPSRC for ARM to control emulation suspend */ + writel(readl(&davinci_syscfg_regs->suspsrc) & + ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | + DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | + DAVINCI_SYSCFG_SUSPSRC_UART2), &davinci_syscfg_regs->suspsrc); + + /* Power on required peripherals + * ARM does not have acess by default to PSC0 and PSC1 + * assuming here that the DSP bootloader has set the IOPU + * such that PSC access is available to ARM + */ + da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)); + + /* configure pinmux settings */ + davinci_configure_pin_mux_items(pinmuxes, + ARRAY_SIZE(pinmuxes)); + + writel(readl(&davinci_uart2_ctrl_regs->pwremu_mgmt) | + (DAVINCI_UART_PWREMU_MGMT_FREE) | + (DAVINCI_UART_PWREMU_MGMT_URRST) | + (DAVINCI_UART_PWREMU_MGMT_UTRST), + &davinci_uart2_ctrl_regs->pwremu_mgmt); + + NS16550_init((NS16550_t)(DAVINCI_UART2_BASE), + CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); + + puts("Nand boot...\n"); + + nand_boot(); +} + +void puts(const char *str) +{ + while (*str) + putc(*str++); +} + +void putc(char c) +{ + if (gd->flags & GD_FLG_SILENT) + return; + + if (c == '\n') + NS16550_putc((NS16550_t)(DAVINCI_UART2_BASE), '\r'); + + NS16550_putc((NS16550_t)(DAVINCI_UART2_BASE), c); +} + +void hang(void) +{ + puts("### ERROR ### Please RESET the board ###\n"); + for (;;) + ; +} diff --git a/boards.cfg b/boards.cfg index 2209676..beb5d81 100644 --- a/boards.cfg +++ b/boards.cfg @@ -76,6 +76,9 @@ pm9261 arm arm926ejs - ronetix pm9263 arm arm926ejs - ronetix at91 da830evm arm arm926ejs da8xxevm davinci davinci da850evm arm arm926ejs da8xxevm davinci davinci +hawkboard arm arm926ejs da8xxevm davinci davinci +hawkboard_nand arm arm926ejs da8xxevm davinci davinci hawkboard:NAND_U_BOOT +hawkboard_uart arm arm926ejs da8xxevm davinci davinci hawkboard:UART_U_BOOT davinci_dm355evm arm arm926ejs dm355evm davinci davinci davinci_dm355leopard arm arm926ejs dm355leopard davinci davinci davinci_dm365evm arm arm926ejs dm365evm davinci davinci diff --git a/doc/README.hawkboard b/doc/README.hawkboard new file mode 100644 index 0000000..b7afec4 --- /dev/null +++ b/doc/README.hawkboard @@ -0,0 +1,93 @@ +Summary +======= +The README is for the boot procedure used for TI's OMAP-L138 based +hawkboard. The hawkboard comes with a 128MiB Nand flash and a 128MiB +DDR SDRAM along with a host of other controllers. + +The hawkboard is booted in three stages. The initial bootloader which +executes upon reset is the Rom Boot Loader(RBL) which sits in the +internal ROM of the omap. The RBL initialises the memory and the nand +controller, and copies the image stored at a predefined location(block +1) of the nand flash. The image loaded by the RBL to the memory is the +AIS signed nand_spl image. This, in turns copies the u-boot binary +from the nand flash to the memory and jumps to the u-boot entry point. + +AIS is an image format defined by TI for the images that are to be +loaded to memory by the RBL. The image is divided into a series of +sections and the image's entry point is specified. Each section comes +with meta data like the target address the section is to be copied to +and the size of the section, which is used by the RBL to load the +image. At the end of the image the RBL jumps to the image entry +point. + +The secondary stage bootloader(nand_spl) which is loaded by the RBL +then loads the u-boot from a predefined location in the nand to the +memory and jumps to the u-boot entry point. + +The reason a secondary stage bootloader is used is because the ECC +layout expected by the RBL is not the same as that used by +u-boot/linux. This also implies that for flashing the nand_spl image, +we need to use the u-boot which uses the ECC layout expected by the +RBL[1]. Booting u-boot over UART(UART boot) is explained here[2]. + + +Compilation +=========== +Three images might be needed + +* nand_spl - This is the secondary bootloader which boots the u-boot + binary. + + hawkboard_nand_config + + The nand_spl ELF gets generated under nand_spl/u-boot-spl. This + needs to be processed with the AISGen tool for generating the AIS + signed image to be flashed. Steps for generating the AIS image are + explained here[3]. + +* u-boot binary - This is the image flashed to the nand and copied to + the memory by the nand_spl. + + hawkboard_config + +* u-boot for uart boot - This is same as the u-boot binary generated + above, with the sole difference of the CONFIG_SYS_TEXT_BASE being + 0xc1080000, as expected by the RBL. + + hawkboard_uart_config + + +Flashing the images to Nand +=========================== +The nand_spl AIS image needs to be flashed to the block 1 of the +Nand flash, as that is the location the RBL expects the image[4]. For +flashing the nand_spl, boot over the u-boot specified in [1], and +flash the image + +=> tftpboot 0xc0700000 <nand_spl_ais.bin> +=> nand erase 0x20000 0x20000 +=> nand write.e 0xc0700000 0x20000 <nand_spl_size> + +The u-boot binary is flashed at location 0xe0000(block 6) of the nand +flash. The nand_spl loader expects the u-boot at this location. For +flashing the u-boot binary + +=> tftpboot 0xc0700000 u-boot.bin +=> nand erase 0xe0000 0x40000 +=> nand write.e 0xc0700000 0xe0000 <u-boot-size> + + +Links +===== + +[1] + http://code.google.com/p/hawkboard/downloads/detail?name=u-boot_uart_ais_v1… + +[2] + http://elinux.org/Hawkboard#Booting_u-boot_over_UART + +[3] + http://elinux.org/Hawkboard#Signing_u-boot_for_UART_boot + +[4] + http://processors.wiki.ti.com/index.php/RBL_UBL_and_host_program#RBL_bootin… diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h new file mode 100644 index 0000000..23a88d0 --- /dev/null +++ b/include/configs/hawkboard.h @@ -0,0 +1,206 @@ +/* + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * + * Based on davinci_dvevm.h. Original Copyrights follow: + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * Board + */ +#define CONFIG_SYS_USE_NAND 1 + +/* + * SoC Configuration + */ +#define CONFIG_MACH_DAVINCI_HAWK +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ +#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) +#define CONFIG_SYS_OSCIN_FREQ 24000000 +#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE +#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F + +#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_UART_U_BOOT) +#define CONFIG_SYS_TEXT_BASE 0xc1080000 +#else +#define CONFIG_SYS_TEXT_BASE 0xc1180000 +#endif + +/* + * Memory Info + */ +#define CONFIG_SYS_MALLOC_LEN (1*1024*1024) /* malloc() len */ +#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE +#define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */ +#define CONFIG_SYS_SDRAM_BASE 0xc0000000 +#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 -\ + GENERATED_GBL_DATA_SIZE) + +/* memtest start addr */ +#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1) + +/* memtest will be run on 16MB */ +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) + +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ + +/* + * Serial Driver info + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE +#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * Network & Ethernet Configuration + */ +#define CONFIG_EMAC_MDIO_PHY_NUM 0x7 +#if !defined(CONFIG_NAND_SPL) +#define CONFIG_DRIVER_TI_EMAC +#endif +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI + +/* + * Nand Flash + */ +#ifdef CONFIG_SYS_USE_NAND +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE +#define CONFIG_CLE_MASK 0x10 +#define CONFIG_ALE_MASK 0x8 +#define CONFIG_SYS_NAND_USE_FLASH_BBT +#define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST +#define CFG_DAVINCI_STD_NAND_LAYOUT +#define CONFIG_SYS_NAND_CS 3 +#define CONFIG_SYS_NAND_PAGE_2K +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ +/* Max number of NAND devices */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, } +#define NAND_MAX_CHIPS 1 +/* Block 0--not used by bootcode */ +#define CONFIG_ENV_OFFSET 0x0 + +#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 +#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000 +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST +#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ + CONFIG_SYS_NAND_U_BOOT_SIZE - \ + CONFIG_SYS_MALLOC_LEN - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_NAND_ECCPOS { \ + 24, 25, 26, 27, 28, \ + 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \ + 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \ + 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \ + 59, 60, 61, 62, 63 } +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 10 +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ + CONFIG_SYS_NAND_ECCSIZE) +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ + CONFIG_SYS_NAND_ECCSTEPS) +#endif /* CONFIG_SYS_USE_NAND */ + +/* + * U-Boot general configuration + */ +#define CONFIG_MISC_INIT_R +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CONFIG_SYS_PROMPT "hawkboard > " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/* + * Linux Information + */ +#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100) +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTARGS \ + "mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\ + "4M ip=static" +#define CONFIG_BOOTDELAY 3 + +/* + * U-Boot commands + */ +#include <config_cmd_default.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_MEMORY + +#ifdef CONFIG_SYS_USE_NAND +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#define CONFIG_CMD_NAND +#endif + +#ifndef CONFIG_DRIVER_TI_EMAC +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_PING +#endif + +#endif /* __CONFIG_H */ diff --git a/nand_spl/board/davinci/da8xxevm/Makefile b/nand_spl/board/davinci/da8xxevm/Makefile new file mode 100644 index 0000000..6102675 --- /dev/null +++ b/nand_spl/board/davinci/da8xxevm/Makefile @@ -0,0 +1,141 @@ +# +# (C) Copyright 2006-2007 +# Stefan Roese, DENX Software Engineering, sr(a)denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +CONFIG_NAND_SPL = y + +include $(TOPDIR)/config.mk + +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL + +SOBJS = start.o _udivsi3.o _divsi3.o +COBJS = cpu.o davinci_nand.o ns16550.o div0.o davinci_pinmux.o psc.o \ + common.o hawkboard_nand_spl.o nand_boot.o + +SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +nandobj := $(OBJTREE)/nand_spl/ + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin \ + $(nandobj)u-boot-spl-16k.bin + +all: $(ALL) + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +$(nandobj)u-boot.lds: $(LDSCRIPT) + $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@ + +# create symbolic links for common files + +# from board directory +$(obj)davinci_pinmux.c: + @rm -f $@ + @ln -s $(TOPDIR)/board/davinci/common/davinci_pinmux.c $@ + +# from drivers/mtd/nand directory +$(obj)davinci_nand.c: + @rm -f $@ + @ln -s $(TOPDIR)/drivers/mtd/nand/davinci_nand.c $@ + +# from nand_spl directory +$(obj)nand_boot.c: + @rm -f $@ + @ln -s $(TOPDIR)/nand_spl/nand_boot.c $@ + +# from drivers/serial directory +$(obj)ns16550.c: + @rm -f $@ + @ln -sf $(TOPDIR)/drivers/serial/ns16550.c $@ + +# from cpu directory +$(obj)start.S: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/cpu/arm926ejs/start.S $@ + +# from lib directory +$(obj)_udivsi3.S: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/lib/_udivsi3.S $@ + +# from lib directory +$(obj)_divsi3.S: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/lib/_divsi3.S $@ + +# from lib directory +$(obj)div0.c: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/lib/div0.c $@ + +# from SoC directory +$(obj)cpu.c: + @rm -f $@ + @ln -s $(TOPDIR)/arch/arm/cpu/arm926ejs/davinci/cpu.c $@ + +# from board directory +$(obj)hawkboard_nand_spl.c: + @rm -f $@ + ln -s $(TOPDIR)/board/davinci/da8xxevm/hawkboard_nand_spl.c $@ + +# from board directory +$(obj)common.c: + @rm -f $@ + ln -s $(TOPDIR)/board/davinci/da8xxevm/common.c $@ + +$(obj)psc.c: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/cpu/arm926ejs/davinci/psc.c $@ + + +######################################################################### + +$(obj)%.o: $(obj)%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(obj)%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/nand_spl/board/davinci/da8xxevm/u-boot.lds b/nand_spl/board/davinci/da8xxevm/u-boot.lds new file mode 100644 index 0000000..f6ccf08 --- /dev/null +++ b/nand_spl/board/davinci/da8xxevm/u-boot.lds @@ -0,0 +1,75 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0xc1080000; + + . = ALIGN(4); + .text : + { + start.o (.text) + cpu.o (.text) + nand_boot.o (.text) + + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { + *(.data) + __datarel_start = .; + *(.data.rel) + __datarelrolocal_start = .; + *(.data.rel.ro.local) + __datarellocal_start = .; + *(.data.rel.local) + __datarelro_start = .; + *(.data.rel.ro) + } + + . = ALIGN(4); + __rel_dyn_start = .; + __rel_dyn_end = .; + __dynsym_start = .; + + __got_start = .; + . = ALIGN(4); + .got : { *(.got) } + + __got_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index b9fd6f5..76b8566 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -236,6 +236,7 @@ void nand_boot(void) /* * Init board specific nand support */ + nand_chip.select_chip = NULL; nand_info.priv = &nand_chip; nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE; nand_chip.dev_ready = NULL; /* preset to NULL */ -- 1.7.0.4

2 1

[U-Boot] [PATCH] MVBLM7: make TSEC2 work again.
by Andre Schwarz 30 Nov '10

30 Nov '10

SICRH has been misconfigured, i.e. TSEC2 clock + D[0:3] are GPIOs. Fix this to be RGMII signals again. Signed-off-by: Andre Schwarz <andre.schwarz(a)matrix-vision.de> --- Kim, sorry for late submission - this has been lingering around for a while. Hopefully you can still appply it since it's a real bugfix. Regards, Andre include/configs/MVBLM7.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index 28e0d1b..431e102 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -348,7 +348,7 @@ #define CONFIG_SYS_SCCR_TSEC1CM 1 #define CONFIG_SYS_SCCR_TSEC2CM 1 -#define CONFIG_SYS_SICRH 0x1fff8003 +#define CONFIG_SYS_SICRH 0x1fef0003 #define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1 | SICRL_USB0) #define CONFIG_SYS_HID0_INIT 0x000000000 -- 1.7.0.4

3 5

[U-Boot] [PATCH 0/6] RFC: True PIC on 83xx
by Joakim Tjernlund 30 Nov '10

30 Nov '10

Here goes my attempt to revive true PIC on ppc, starting with 83xx. This uses a a new gcc option(which I have just impl.) to add msingle-pic-base also save a lot of code: before: text data bss dec hex filename 222728 14336 24228 261292 3fcac u-boot after: text data bss dec hex filename 218556 6580 24228 249364 3ce14 u-boot As can seen, I only have to add two LINK_OFF calls in early C code to pull this off. Oh, this is based on the last u-boot release so it migth not apply without minor mods. It depends on 2 other patches which I have already sent. Anyhow, if this is an acceptable approach I will clean it up once the ongoing release is out. Joakim Tjernlund (6): mpc83xx: Add relocation support for -fpic mpc83xx: Make start.S true PIC mpc83xx: Add link vs. load address calculation mpc83xx: Add support form -msingle-pic-base mpc83xx: Add true PIC support. powerpc: Add LINK_OFF calls in early C-code. arch/powerpc/cpu/mpc83xx/cpu_init.c | 2 +- arch/powerpc/cpu/mpc83xx/start.S | 107 +++++++++++++++++++++-- arch/powerpc/cpu/mpc83xx/u-boot.lds | 5 +- arch/powerpc/lib/board.c | 2 +- include/common.h | 5 + nand_spl/board/freescale/mpc8313erdb/u-boot.lds | 4 +- nand_spl/board/freescale/mpc8315erdb/u-boot.lds | 4 +- 7 files changed, 114 insertions(+), 15 deletions(-) -- 1.7.2.2

6 36

[U-Boot] [PATCH] armv7, timer: move static data to global_data struct
by Heiko Schocher 30 Nov '10

30 Nov '10

timer.c use static data and change this before relocation, where bss section (in which the static data is stored) is not valid. Instead before relocation there is the .rel.dyn section overlayed. Move all static variables into global_data structure. Tested on the omap3_beagle board. Signed-off-by: Heiko Schocher <hs(a)denx.de> cc: Albert ARIBAUD <albert.aribaud(a)free.fr> cc: Steve Sakoman <steve(a)sakoman.com> --- arch/arm/cpu/armv7/mx5/timer.c | 23 +++++++++---------- arch/arm/cpu/armv7/omap-common/timer.c | 22 +++++++++--------- arch/arm/cpu/armv7/s5p-common/timer.c | 38 ++++++++++++++----------------- arch/arm/include/asm/global_data.h | 10 ++++++++ 4 files changed, 49 insertions(+), 44 deletions(-) diff --git a/arch/arm/cpu/armv7/mx5/timer.c b/arch/arm/cpu/armv7/mx5/timer.c index 3044fcf..bfb22a7 100644 --- a/arch/arm/cpu/armv7/mx5/timer.c +++ b/arch/arm/cpu/armv7/mx5/timer.c @@ -27,6 +27,8 @@ #include <asm/io.h> #include <asm/arch/imx-regs.h> +DECLARE_GLOBAL_DATA_PTR; + /* General purpose timers registers */ struct mxc_gpt { unsigned int control; @@ -44,9 +46,6 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR; #define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */ #define GPTCR_TEN (1) /* Timer enable */ -static ulong timestamp; -static ulong lastinc; - int timer_init(void) { int i; @@ -75,21 +74,21 @@ void reset_timer(void) void reset_timer_masked(void) { ulong val = __raw_readl(&cur_gpt->counter); - lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ); - timestamp = 0; + gd->lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ); + gd->timestamp = 0; } ulong get_timer_masked(void) { ulong val = __raw_readl(&cur_gpt->counter); val /= (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ); - if (val >= lastinc) - timestamp += (val - lastinc); + if (val >= gd->lastinc) + gd->timestamp += (val - gd->lastinc); else - timestamp += ((0xFFFFFFFF / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ)) - - lastinc) + val; - lastinc = val; - return timestamp; + gd->timestamp += ((0xFFFFFFFF / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ)) + - gd->lastinc) + val; + gd->lastinc = val; + return gd->timestamp; } ulong get_timer(ulong base) @@ -99,7 +98,7 @@ ulong get_timer(ulong base) void set_timer(ulong t) { - timestamp = t; + gd->timestamp = t; } /* delay x useconds AND preserve advance timestamp value */ diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c index 6b8cf7b..8897b12 100644 --- a/arch/arm/cpu/armv7/omap-common/timer.c +++ b/arch/arm/cpu/armv7/omap-common/timer.c @@ -35,8 +35,8 @@ #include <common.h> #include <asm/io.h> -static ulong timestamp; -static ulong lastinc; +DECLARE_GLOBAL_DATA_PTR; + static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; /* @@ -74,7 +74,7 @@ ulong get_timer(ulong base) void set_timer(ulong t) { - timestamp = t; + gd->timestamp = t; } /* delay x useconds */ @@ -96,8 +96,8 @@ void __udelay(unsigned long usec) void reset_timer_masked(void) { /* reset time, capture current incrementer value time */ - lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); - timestamp = 0; /* start "advancing" time stamp from 0 */ + gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); + gd->timestamp = 0; /* start "advancing" time stamp from 0 */ } ulong get_timer_masked(void) @@ -105,14 +105,14 @@ ulong get_timer_masked(void) /* current tick value */ ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); - if (now >= lastinc) /* normal mode (non roll) */ + if (now >= gd->lastinc) /* normal mode (non roll) */ /* move stamp fordward with absoulte diff ticks */ - timestamp += (now - lastinc); + gd->timestamp += (now - gd->lastinc); else /* we have rollover of incrementer */ - timestamp += ((TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ)) - - lastinc) + now; - lastinc = now; - return timestamp; + gd->timestamp += ((TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ)) + - gd->lastinc) + now; + gd->lastinc = now; + return gd->timestamp; } /* diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index 0490650..2933ec0 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -37,11 +37,7 @@ #define TCON_TIMER4_SHIFT 20 -static unsigned long count_value; - -/* Internal tick units */ -static unsigned long long timestamp; /* Monotonic incrementing timer */ -static unsigned long lastdec; /* Last decremneter snapshot */ +DECLARE_GLOBAL_DATA_PTR; /* macro to read the 16 bit timer */ static inline struct s5p_timer *s5p_get_base_timer(void) @@ -65,19 +61,19 @@ int timer_init(void) writel((PRESCALER_1 & 0xff) << 8, &timer->tcfg0); writel((MUX_DIV_2 & 0xf) << MUX4_DIV_SHIFT, &timer->tcfg1); - if (count_value == 0) { + if (gd->count_value == 0) { /* reset initial value */ /* count_value = 2085937.5(HZ) (per 1 sec)*/ - count_value = get_pwm_clk() / ((PRESCALER_1 + 1) * + gd->count_value = get_pwm_clk() / ((PRESCALER_1 + 1) * (MUX_DIV_2 + 1)); /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ - count_value = count_value / 100; + gd->count_value = gd->count_value / 100; } /* set count value */ - writel(count_value, &timer->tcntb4); - lastdec = count_value; + writel(gd->count_value, &timer->tcntb4); + gd->lastdec = gd->count_value; val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) | TCON4_AUTO_RELOAD; @@ -88,7 +84,7 @@ int timer_init(void) /* start PWM timer 4 */ writel(val | TCON4_START, &timer->tcon); - timestamp = 0; + gd->timestamp = 0; return 0; } @@ -108,7 +104,7 @@ unsigned long get_timer(unsigned long base) void set_timer(unsigned long t) { - timestamp = t; + gd->timestamp = t; } /* delay x useconds */ @@ -125,11 +121,11 @@ void __udelay(unsigned long usec) * 3. finish normalize. */ tmo = usec / 1000; - tmo *= (CONFIG_SYS_HZ * count_value / 10); + tmo *= (CONFIG_SYS_HZ * gd->count_value / 10); tmo /= 1000; } else { /* else small number, don't kill it prior to HZ multiply */ - tmo = usec * CONFIG_SYS_HZ * count_value / 10; + tmo = usec * CONFIG_SYS_HZ * gd->count_value / 10; tmo /= (1000 * 1000); } @@ -154,8 +150,8 @@ void reset_timer_masked(void) struct s5p_timer *const timer = s5p_get_base_timer(); /* reset time */ - lastdec = readl(&timer->tcnto4); - timestamp = 0; + gd->lastdec = readl(&timer->tcnto4); + gd->timestamp = 0; } unsigned long get_timer_masked(void) @@ -163,14 +159,14 @@ unsigned long get_timer_masked(void) struct s5p_timer *const timer = s5p_get_base_timer(); unsigned long now = readl(&timer->tcnto4); - if (lastdec >= now) - timestamp += lastdec - now; + if (gd->lastdec >= now) + gd->timestamp += gd->lastdec - now; else - timestamp += lastdec + count_value - now; + gd->timestamp += gd->lastdec + gd->count_value - now; - lastdec = now; + gd->lastdec = now; - return timestamp; + return gd->timestamp; } /* diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index ada3fbb..16dc27c 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -61,6 +61,16 @@ typedef struct global_data { unsigned long tbu; unsigned long long timer_reset_value; #endif +#if defined(CONFIG_OMAP) || defined(CONFIG_MX51) + unsigned long timestamp; + unsigned long lastinc; +#endif +#if defined(CONFIG_S5P) + unsigned long count_value; + /* Internal tick units */ + unsigned long long timestamp; /* Monotonic incrementing timer */ + unsigned long lastdec; /* Last decremneter snapshot */ +#endif unsigned long relocaddr; /* Start address of U-Boot in RAM */ phys_size_t ram_size; /* RAM size */ unsigned long mon_len; /* monitor len */ -- 1.7.2.3

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[U-Boot] [PATCH] OMAP3: SDP3430: Fix ARM relocation support
by Dirk Behme 30 Nov '10

30 Nov '10

Signed-off-by: Dirk Behme <dirk.behme(a)googlemail.com> --- Compile tested only. board/ti/sdp3430/config.mk | 2 +- include/configs/omap3_sdp3430.h | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) Index: u-boot.git/board/ti/sdp3430/config.mk =================================================================== --- u-boot.git.orig/board/ti/sdp3430/config.mk +++ u-boot.git/board/ti/sdp3430/config.mk @@ -30,4 +30,4 @@ # (mem base + reserved) # For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80008000 Index: u-boot.git/include/configs/omap3_sdp3430.h =================================================================== --- u-boot.git.orig/include/configs/omap3_sdp3430.h +++ u-boot.git/include/configs/omap3_sdp3430.h @@ -309,6 +309,12 @@ #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */ #endif +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) /* * SDRAM Memory Map */

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[U-Boot] [PATCH] ARMV7: S5P: timer: get the count_value from register when call udelay
by Minkyu Kang 30 Nov '10

30 Nov '10

Because of count_value is set to tcnb4 register, should be get from this register when call udelay function. Signed-off-by: Minkyu Kang <mk7.kang(a)samsung.com> --- arch/arm/cpu/armv7/s5p-common/timer.c | 18 +++++++++--------- 1 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index 0490650..651fd5d 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -65,15 +65,12 @@ int timer_init(void) writel((PRESCALER_1 & 0xff) << 8, &timer->tcfg0); writel((MUX_DIV_2 & 0xf) << MUX4_DIV_SHIFT, &timer->tcfg1); - if (count_value == 0) { - /* reset initial value */ - /* count_value = 2085937.5(HZ) (per 1 sec)*/ - count_value = get_pwm_clk() / ((PRESCALER_1 + 1) * - (MUX_DIV_2 + 1)); - - /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ - count_value = count_value / 100; - } + /* count_value = 2085937.5(HZ) (per 1 sec)*/ + count_value = get_pwm_clk() / ((PRESCALER_1 + 1) * + (MUX_DIV_2 + 1)); + + /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ + count_value = count_value / 100; /* set count value */ writel(count_value, &timer->tcntb4); @@ -114,8 +111,11 @@ void set_timer(unsigned long t) /* delay x useconds */ void __udelay(unsigned long usec) { + struct s5p_timer *const timer = s5p_get_base_timer(); unsigned long tmo, tmp; + count_value = readl(&timer->tcntb4); + if (usec >= 1000) { /* * if "big" number, spread normalization -- 1.7.0.4

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[U-Boot] [PATCH 2/2] S5P: goni: fix for relocation
by Minkyu Kang 30 Nov '10

30 Nov '10

Signed-off-by: Minkyu Kang <mk7.kang(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- board/samsung/goni/goni.c | 10 ++++++++-- include/configs/s5p_goni.h | 2 ++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c index 0b09eba..581935d 100644 --- a/board/samsung/goni/goni.c +++ b/board/samsung/goni/goni.c @@ -43,14 +43,20 @@ int board_init(void) int dram_init(void) { + gd->ram_size = PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE + + PHYS_SDRAM_3_SIZE; + + return 0; +} + +void dram_init_banksize(void) +{ gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; gd->bd->bi_dram[2].start = PHYS_SDRAM_3; gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; - - return 0; } #ifdef CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 541aec0..f53e798 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -217,4 +217,6 @@ #define CONFIG_DOS_PARTITION 1 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) + #endif /* __CONFIG_H */ -- 1.7.0.4

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