August 2009 - U-Boot

[U-Boot] [PATCH 2/2] ppc/85xx: Added PCIe support for P1 P2 RDB
by Poonam Aggrwal 24 Aug '09

24 Aug '09

* Added PCIe support for P1 P2 RDB * Calls the fsl_pci_init_port function to initialize all the PCIe ports on the board. Signed-off-by: Poonam Aggrwal <poonam.aggrwal(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- - applies on git.denx.de/u-boot-mpc85xx.git branch->next - depends on "[PATCH 1/2] driver/fsl_pci: Added fsl_pci_init_port function to initialize a single PCIe port." board/freescale/p1_p2_rdb/Makefile | 3 +- board/freescale/p1_p2_rdb/pci.c | 118 ++++++++++++++++++++++++++++++++++++ include/configs/P1_P2_RDB.h | 6 ++ 3 files changed, 126 insertions(+), 1 deletions(-) create mode 100644 board/freescale/p1_p2_rdb/pci.c diff --git a/board/freescale/p1_p2_rdb/Makefile b/board/freescale/p1_p2_rdb/Makefile index 9107263..ad1b769 100644 --- a/board/freescale/p1_p2_rdb/Makefile +++ b/board/freescale/p1_p2_rdb/Makefile @@ -25,9 +25,10 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a COBJS-y += $(BOARD).o +COBJS-y += ddr.o COBJS-y += law.o +COBJS-$(CONFIG_PCI) += pci.o COBJS-y += tlb.o -COBJS-y += ddr.o SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) diff --git a/board/freescale/p1_p2_rdb/pci.c b/board/freescale/p1_p2_rdb/pci.c new file mode 100644 index 0000000..1f46ca6 --- /dev/null +++ b/board/freescale/p1_p2_rdb/pci.c @@ -0,0 +1,118 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <pci.h> +#include <asm/immap_85xx.h> +#include <asm/io.h> +#include <asm/fsl_pci.h> +#include <libfdt.h> +#include <fdt_support.h> + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_PCIE1 +static struct pci_controller pcie1_hose; +#endif + +#ifdef CONFIG_PCIE2 +static struct pci_controller pcie2_hose; +#endif + +void pci_init_board(void) +{ + struct fsl_pci_info pci_info[2]; + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + uint devdisr = in_be32(&gur->devdisr); + uint io_sel = (in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_IO_SEL) >> 19; + uint host_agent = (in_be32(&gur->porbmsr) & MPC85xx_PORBMSR_HA) >> 16; + int num = 0; + int first_free_busno = 0; + int last_busno; + + int pcie_ep, pcie_configured; + + debug (" pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n", + devdisr, io_sel, host_agent); + + if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)) + printf (" eTSEC2 is in sgmii mode.\n"); + +#ifdef CONFIG_PCIE2 + SET_STD_PCIE_INFO(pci_info[num], 2); + pcie_ep = (host_agent == 2) || (host_agent == 4) || + (host_agent == 6) || (host_agent == 0); + pcie_configured = (io_sel == 0xE); + + if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ + printf ("\n PCIE2 connected to Slot 1 as %s (base address %x)", + pcie_ep ? "End Point": "Root Complex", pci_info[num].regs); + last_busno = fsl_pci_init_port(&pci_info[num], + &pcie2_hose, first_free_busno); + first_free_busno = last_busno; + num++; + } else { + printf (" PCIE2: disabled\n"); + } +#else + set_bits32(&gur->devdisr, MPC85xx_DEVDISR_PCIE2); /* disable */ +#endif + +#ifdef CONFIG_PCIE1 + SET_STD_PCIE_INFO(pci_info[num], 1); + + pcie_ep = (host_agent <= 1) || (host_agent == 4) || + (host_agent == 5); + pcie_configured = (io_sel == 0xE); + + if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ + printf ("\n PCIE1 connected to Slot 2 as %s (base address %x)", + pcie_ep ? "End Point" : "Root Complex", + pci_info[num].regs); + last_busno = fsl_pci_init_port(&pci_info[num], + &pcie1_hose, first_free_busno); + first_free_busno = last_busno; + num++; + } else { + printf (" PCIE1: disabled\n"); + } +#else + set_bits32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */ +#endif +} + +void ft_pci_board_setup(void *blob) +{ +/* According to h/w manual, PCIE2 is at lower address(0x9000) + * than PCIE1(0xa000). + * Hence PCIE2 is made to occupy the pci1 position in dts to + * keep the addresses sorted there. + * Generally the case with all FSL SOCs. + */ +#ifdef CONFIG_PCIE2 + ft_fsl_pci_setup(blob, "pci1", &pcie2_hose); +#endif +#ifdef CONFIG_PCIE1 + ft_fsl_pci_setup(blob, "pci2", &pcie1_hose); +#endif +} diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 9591641..6d44d6c 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -35,6 +35,12 @@ #define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48/P1020/P2020,etc*/ #define CONFIG_FSL_ELBC 1 /* Enable eLBC Support */ +#define CONFIG_PCI 1 /* Enable PCI/PCIE */ +#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ +#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE -- 1.5.6.5

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[U-Boot] [PATCH 1/2] driver/fsl_pci: Added fsl_pci_init_port function to initialize a single PCIe port.
by Poonam Aggrwal 24 Aug '09

24 Aug '09

* Added a generic function fsl_pci_init_port in drivers/pci/fsl_pci.c to initialize a PCIe port. * fsl_pci_init_port can be called from board specific pcie initialization routine, per-port. * This will reduce the code redundancy in the most of the Freescale board specific PCIe inits. * All the FSL 85xx boards can use it for PCIe initialization. Signed-off-by: Poonam Aggrwal <poonam.aggrwal(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- - applies on git.denx.de/u-boot-mpc85xx.git branch->next - next patch following it makes use of this patch for PCIe initialization on P1&P2 RDB drivers/pci/fsl_pci_init.c | 41 +++++++++++++++++++++++++++++++++++++++++ include/asm-ppc/fsl_pci.h | 26 ++++++++++++++++++++++++++ 2 files changed, 67 insertions(+), 0 deletions(-) diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index ee89aaa..9e9e1b7 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -412,6 +412,47 @@ void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data) } } +int fsl_pci_init_port(struct fsl_pci_info *pci_info, + struct pci_controller *hose, int busno) +{ + volatile ccsr_fsl_pci_t *pci; + struct pci_region *r; + + pci = (ccsr_fsl_pci_t *) pci_info->regs; + + if (in_be32(&pci->pme_msg_det)) { + out_be32(&pci->pme_msg_det, 0xffffffff); + debug (" with errors. Clearing. Now 0x%08x", + pci->pme_msg_det); + } + + r = hose->regions + hose->region_count; + + /* outbound memory */ + pci_set_region(r++, + pci_info->mem_bus, + pci_info->mem_phys, + pci_info->mem_size, + PCI_REGION_MEM); + + /* outbound io */ + pci_set_region(r++, + pci_info->io_bus, + pci_info->io_phys, + pci_info->io_size, + PCI_REGION_IO); + + hose->region_count = r - hose->regions; + hose->first_busno = busno; + + fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); + + printf("\n PCIE%x on bus %02x - %02x\n", pci_info->pci_num, + hose->first_busno, hose->last_busno); + + return(hose->last_busno + 1); +} + /* Enable inbound PCI config cycles for agent/endpoint interface */ void fsl_pci_config_unlock(struct pci_controller *hose) { diff --git a/include/asm-ppc/fsl_pci.h b/include/asm-ppc/fsl_pci.h index b2ff0e9..2b6421a 100644 --- a/include/asm-ppc/fsl_pci.h +++ b/include/asm-ppc/fsl_pci.h @@ -154,4 +154,30 @@ typedef struct ccsr_pci { char res24[252]; } ccsr_fsl_pci_t; +struct fsl_pci_info { + phys_size_t regs; + pci_addr_t mem_bus; + phys_size_t mem_phys; + pci_size_t mem_size; + pci_addr_t io_bus; + phys_size_t io_phys; + pci_size_t io_size; + int pci_num; +}; + +int fsl_pci_init_port(struct fsl_pci_info *pci_info, + struct pci_controller *hose, int busno); + +#define SET_STD_PCIE_INFO(x, num) \ +{ \ + x.regs = CONFIG_SYS_PCIE##num##_ADDR; \ + x.mem_bus = CONFIG_SYS_PCIE##num##_MEM_BUS; \ + x.mem_phys = CONFIG_SYS_PCIE##num##_MEM_PHYS; \ + x.mem_size = CONFIG_SYS_PCIE##num##_MEM_SIZE; \ + x.io_bus = CONFIG_SYS_PCIE##num##_IO_BUS; \ + x.io_phys = CONFIG_SYS_PCIE##num##_IO_PHYS; \ + x.io_size = CONFIG_SYS_PCIE##num##_IO_SIZE; \ + x.pci_num = num; \ +} + #endif -- 1.5.6.5

2 1

[U-Boot] ERROR: too many flash sectors
by SlinceArm 24 Aug '09

24 Aug '09

Hi , everyone . My u-boot version is 2009-01 and i try porting u-boot on pxa270 development board. when i power on my board then minicom show these information DRAM: 64 MB ERROR: too many flash sectors ERROR: too many flash sectors Flash: 32 MB then i can save setenv , but when i earse my flash ,it cause one error Error: end address not on sector boundary and here is my flinfo : Bank # 1: CFI conformant FLASH (32 x 16) Size: 32 MB in 128 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18 Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 2 ms, buffer size: 64 bytes Sector Start Addresses: 00000000 RO 00040000 RO 00080000 RO 000C0000 RO 00100000 RO etc... And i dont know my network chip work or not . ( my chip is LAN91C113 ) when i ping some address , it show ethid=0000... LAN91C113:PHY auto-negotiate timed out then my bootloader freeze .... would someone can help me ? thanks. -- View this message in context: http://www.nabble.com/-U-Boot--ERROR%3A-too-many-flash-sectors-tp25063511p2… Sent from the Uboot - Users mailing list archive at Nabble.com.

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[U-Boot] Help Needed - Realtek 8100B (8139) Ethernet not working
by Graeme Russ 24 Aug '09

24 Aug '09

Hi All, I'm having real trouble getting the two RTL8100B Ethernet chips working on my board. I can probe them, but not much else. The strange thing is, on first bootup, it complains about SROM address not matching environment address which goes away after a soft reset. However, whenever I try to execute a network command, it always complains about missing Ethernet addresses. I've enabled RX and TX debugging, and this is the end result of my efforts: U-Boot 2009.08-rc3-00024-gf248001-dirty (Aug 24 2009 - 22:01:22) U-Boot code: FFFFEE00 -> 03FD4503 data: 03FDAAE8 -> 03FDB9B7 BSS: 03FDB580 -> 03FE2C6B stack: 03FE2C6C -> 03FEAC6B DRAM Configuration: Bank #0: 00000000 64 MB Bank #1: 04000000 64 MB Bank #2: 08000000 0 kB Bank #3: 08000000 0 kB Flash: 32.5 MB set_irq(): map INTA to IRQ10 fixup_irq: device 12 pin A irq 10 set_irq(): map INTB to IRQ9 fixup_irq: device 13 pin B irq 9 Net: Initializing Ethernet RTL8139#0, RTL8139#1 Warning: RTL8139#1 MAC addresses don't match: Address in SROM is 00:00:00:08:00:00 Address in environment is fe:fd:ff:ef:f7:ff Serck Controls eNET boot > pci Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x1022 0x3000 Bridge device 0x00 00.0c.00 0x10ec 0x8139 Network controller 0x00 00.0d.00 0x10ec 0x8139 Network controller 0x00 boot > pci header 00.0c.00 vendor ID = 0x10ec device ID = 0x8139 command register = 0x0007 status register = 0x0290 revision ID = 0x10 class code = 0x02 (Network controller) sub class code = 0x00 programming interface = 0x00 cache line = 0x00 latency time = 0x20 header type = 0x00 BIST = 0x00 base address 0 = 0x00001001 base address 1 = 0x10000000 base address 2 = 0x00000000 base address 3 = 0x00000000 base address 4 = 0x00000000 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x10ec sub system ID = 0x8139 expansion ROM base address = 0x00000000 interrupt line = 0x0a interrupt pin = 0x01 min Grant = 0x20 max Latency = 0x40 boot > pci header 00.0d.00 vendor ID = 0x10ec device ID = 0x8139 command register = 0x0007 status register = 0x0290 revision ID = 0x10 class code = 0x02 (Network controller) sub class code = 0x00 programming interface = 0x00 cache line = 0x00 latency time = 0x20 header type = 0x00 BIST = 0x00 base address 0 = 0x00001101 base address 1 = 0x10000100 base address 2 = 0x00000000 base address 3 = 0x00000000 base address 4 = 0x00000000 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x10ec sub system ID = 0x8139 expansion ROM base address = 0x00000000 interrupt line = 0x09 interrupt pin = 0x01 min Grant = 0x20 max Latency = 0x40 boot > bootp rx ring address is 3FDC5C4 *** ERROR: `ethaddr' not set rx ring address is 3FDC5C4 rtl_poll: int 0 rx error 0 rx ring address is 3FDC5C4 *** ERROR: `eth1addr' not set rx ring address is 3FDC5C4 rtl_poll: int 0 rx error 0 rx ring address is 3FDC5C4 boot > printenv bootargs=root=/dev/mtdblock0 console=ttyS0,9600 bootdelay=15 baudrate=9600 ipaddr=10.1.1.5 netmask=255.255.255.0 eth1addr=fe:fd:ff:ef:f7:ff ethaddr=fe:fd:ff:ef:f7:ff stdin=serial stdout=serial stderr=serial ethact=RTL8139#0 Environment size: 224/131067 bytes boot > reset resetting ... Resetting using SC520 MMCR U-Boot 2009.08-rc3-00024-gf248001-dirty (Aug 24 2009 - 22:01:22) U-Boot code: FFFFEE00 -> 03FD4503 data: 03FDAAE8 -> 03FDB9B7 BSS: 03FDB580 -> 03FE2C6B stack: 03FE2C6C -> 03FEAC6B DRAM Configuration: Bank #0: 00000000 64 MB Bank #1: 04000000 64 MB Bank #2: 08000000 0 kB Bank #3: 08000000 0 kB Flash: 32.5 MB set_irq(): map INTA to IRQ10 fixup_irq: device 12 pin A irq 10 set_irq(): map INTB to IRQ9 fixup_irq: device 13 pin B irq 9 Net: Initializing Ethernet RTL8139#0, RTL8139#1 Serck Controls eNET boot > ping 10.1.1.2 rx ring address is 3FDC5C4 *** ERROR: `ethaddr' not set rx ring address is 3FDC5C4 rtl_poll: int 0 rx error 0 rx ring address is 3FDC5C4 *** ERROR: `eth1addr' not set rx ring address is 3FDC5C4 rtl_poll: int 0 rx error 0 rx ring address is 3FDC5C4 ping failed; host 10.1.1.2 is not alive boot >

1 0

[U-Boot] [PATCH 1/2] Replace BCD2BIN and BIN2BCD macros with inline functions
by Albin Tonnerre 24 Aug '09

24 Aug '09

In the process, also remove backward-compatiblity macros BIN_TO_BCD and BCD_TO_BIN and update the sole board using them to use the new bin2bcd and bcd2bin instead Signed-off-by: Albin Tonnerre <albin.tonnerre(a)free-electrons.com> --- board/rsdproto/rsdproto.c | 17 ++++++++--------- drivers/rtc/m41t62.c | 24 ++++++++++++------------ drivers/rtc/rtc4543.c | 28 ++++++++++++++-------------- drivers/rtc/s3c44b0_rtc.c | 42 +++++++++++++++++++++--------------------- drivers/rtc/x1205.c | 28 ++++++++++++++-------------- include/bcd.h | 19 ++++++++++++------- include/linux/mc146818rtc.h | 12 ------------ 7 files changed, 81 insertions(+), 89 deletions(-) diff --git a/board/rsdproto/rsdproto.c b/board/rsdproto/rsdproto.c index 26edb2e..10759b7 100644 --- a/board/rsdproto/rsdproto.c +++ b/board/rsdproto/rsdproto.c @@ -26,6 +26,7 @@ #include <ioports.h> #include <mpc8260.h> #include <i2c.h> +#include <bcd.h> /* define to initialise the SDRAM on the local bus */ #undef INIT_LOCAL_BUS_SDRAM @@ -208,16 +209,14 @@ void read_RS5C372_time (struct tm *timedate) { unsigned char buffer[8]; -#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10) - if (! i2c_read (RS5C372_PPC_I2C_ADR, 0, 1, buffer, sizeof (buffer))) { - timedate->tm_sec = BCD_TO_BIN (buffer[0]); - timedate->tm_min = BCD_TO_BIN (buffer[1]); - timedate->tm_hour = BCD_TO_BIN (buffer[2]); - timedate->tm_wday = BCD_TO_BIN (buffer[3]); - timedate->tm_mday = BCD_TO_BIN (buffer[4]); - timedate->tm_mon = BCD_TO_BIN (buffer[5]); - timedate->tm_year = BCD_TO_BIN (buffer[6]) + 2000; + timedate->tm_sec = bcd2bin (buffer[0]); + timedate->tm_min = bcd2bin (buffer[1]); + timedate->tm_hour = bcd2bin (buffer[2]); + timedate->tm_wday = bcd2bin (buffer[3]); + timedate->tm_mday = bcd2bin (buffer[4]); + timedate->tm_mon = bcd2bin (buffer[5]); + timedate->tm_year = bcd2bin (buffer[6]) + 2000; } else { /*printf("i2c error %02x\n", rc); */ memset (timedate, 0, sizeof (struct tm)); diff --git a/drivers/rtc/m41t62.c b/drivers/rtc/m41t62.c index cfe84f9..3d7bb46 100644 --- a/drivers/rtc/m41t62.c +++ b/drivers/rtc/m41t62.c @@ -76,16 +76,16 @@ int rtc_get(struct rtc_time *tm) buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); - tm->tm_sec = BCD2BIN(buf[M41T62_REG_SEC] & 0x7f); - tm->tm_min = BCD2BIN(buf[M41T62_REG_MIN] & 0x7f); - tm->tm_hour = BCD2BIN(buf[M41T62_REG_HOUR] & 0x3f); - tm->tm_mday = BCD2BIN(buf[M41T62_REG_DAY] & 0x3f); + tm->tm_sec = bcd2bin(buf[M41T62_REG_SEC] & 0x7f); + tm->tm_min = bcd2bin(buf[M41T62_REG_MIN] & 0x7f); + tm->tm_hour = bcd2bin(buf[M41T62_REG_HOUR] & 0x3f); + tm->tm_mday = bcd2bin(buf[M41T62_REG_DAY] & 0x3f); tm->tm_wday = buf[M41T62_REG_WDAY] & 0x07; - tm->tm_mon = BCD2BIN(buf[M41T62_REG_MON] & 0x1f); + tm->tm_mon = bcd2bin(buf[M41T62_REG_MON] & 0x1f); /* assume 20YY not 19YY, and ignore the Century Bit */ /* U-Boot needs to add 1900 here */ - tm->tm_year = BCD2BIN(buf[M41T62_REG_YEAR]) + 100 + 1900; + tm->tm_year = bcd2bin(buf[M41T62_REG_YEAR]) + 100 + 1900; debug("%s: tm is secs=%d, mins=%d, hours=%d, " "mday=%d, mon=%d, year=%d, wday=%d\n", @@ -109,19 +109,19 @@ int rtc_set(struct rtc_time *tm) /* Merge time-data and register flags into buf[0..7] */ buf[M41T62_REG_SSEC] = 0; buf[M41T62_REG_SEC] = - BIN2BCD(tm->tm_sec) | (buf[M41T62_REG_SEC] & ~0x7f); + bin2bcd(tm->tm_sec) | (buf[M41T62_REG_SEC] & ~0x7f); buf[M41T62_REG_MIN] = - BIN2BCD(tm->tm_min) | (buf[M41T62_REG_MIN] & ~0x7f); + bin2bcd(tm->tm_min) | (buf[M41T62_REG_MIN] & ~0x7f); buf[M41T62_REG_HOUR] = - BIN2BCD(tm->tm_hour) | (buf[M41T62_REG_HOUR] & ~0x3f) ; + bin2bcd(tm->tm_hour) | (buf[M41T62_REG_HOUR] & ~0x3f) ; buf[M41T62_REG_WDAY] = (tm->tm_wday & 0x07) | (buf[M41T62_REG_WDAY] & ~0x07); buf[M41T62_REG_DAY] = - BIN2BCD(tm->tm_mday) | (buf[M41T62_REG_DAY] & ~0x3f); + bin2bcd(tm->tm_mday) | (buf[M41T62_REG_DAY] & ~0x3f); buf[M41T62_REG_MON] = - BIN2BCD(tm->tm_mon) | (buf[M41T62_REG_MON] & ~0x1f); + bin2bcd(tm->tm_mon) | (buf[M41T62_REG_MON] & ~0x1f); /* assume 20YY not 19YY */ - buf[M41T62_REG_YEAR] = BIN2BCD(tm->tm_year % 100); + buf[M41T62_REG_YEAR] = bin2bcd(tm->tm_year % 100); if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE)) { printf("I2C write failed in %s()\n", __func__); diff --git a/drivers/rtc/rtc4543.c b/drivers/rtc/rtc4543.c index 242d9bc..b60e37d 100644 --- a/drivers/rtc/rtc4543.c +++ b/drivers/rtc/rtc4543.c @@ -49,13 +49,13 @@ int rtc_get(struct rtc_time *tm) /* Read 52 bits into our buffer */ tws_read(buffer, 52); - tm->tm_sec = BCD2BIN( buffer[0] & 0x7F); - tm->tm_min = BCD2BIN( buffer[1] & 0x7F); - tm->tm_hour = BCD2BIN( buffer[2] & 0x3F); - tm->tm_wday = BCD2BIN( buffer[3] & 0x07); - tm->tm_mday = BCD2BIN((buffer[3] & 0xF0) >> 4 | (buffer[4] & 0x0F) << 4); - tm->tm_mon = BCD2BIN((buffer[4] & 0x30) >> 4 | (buffer[5] & 0x0F) << 4); - tm->tm_year = BCD2BIN((buffer[5] & 0xF0) >> 4 | (buffer[6] & 0x0F) << 4) + 2000; + tm->tm_sec = bcd2bin( buffer[0] & 0x7F); + tm->tm_min = bcd2bin( buffer[1] & 0x7F); + tm->tm_hour = bcd2bin( buffer[2] & 0x3F); + tm->tm_wday = bcd2bin( buffer[3] & 0x07); + tm->tm_mday = bcd2bin((buffer[3] & 0xF0) >> 4 | (buffer[4] & 0x0F) << 4); + tm->tm_mon = bcd2bin((buffer[4] & 0x30) >> 4 | (buffer[5] & 0x0F) << 4); + tm->tm_year = bcd2bin((buffer[5] & 0xF0) >> 4 | (buffer[6] & 0x0F) << 4) + 2000; tm->tm_yday = 0; tm->tm_isdst = 0; @@ -81,17 +81,17 @@ int rtc_set(struct rtc_time *tm) tm->tm_hour, tm->tm_min, tm->tm_sec); memset(buffer, 0, 7); - buffer[0] = BIN2BCD(tm->tm_sec); - buffer[1] = BIN2BCD(tm->tm_min); - buffer[2] = BIN2BCD(tm->tm_hour); - buffer[3] = BIN2BCD(tm->tm_wday); - tmp = BIN2BCD(tm->tm_mday); + buffer[0] = bin2bcd(tm->tm_sec); + buffer[1] = bin2bcd(tm->tm_min); + buffer[2] = bin2bcd(tm->tm_hour); + buffer[3] = bin2bcd(tm->tm_wday); + tmp = bin2bcd(tm->tm_mday); buffer[3] |= (tmp & 0x0F) << 4; buffer[4] = (tmp & 0xF0) >> 4; - tmp = BIN2BCD(tm->tm_mon); + tmp = bin2bcd(tm->tm_mon); buffer[4] |= (tmp & 0x0F) << 4; buffer[5] = (tmp & 0xF0) >> 4; - tmp = BIN2BCD(tm->tm_year % 100); + tmp = bin2bcd(tm->tm_year % 100); buffer[5] |= (tmp & 0x0F) << 4; buffer[6] = (tmp & 0xF0) >> 4; diff --git a/drivers/rtc/s3c44b0_rtc.c b/drivers/rtc/s3c44b0_rtc.c index bfb744a..a027fb1 100644 --- a/drivers/rtc/s3c44b0_rtc.c +++ b/drivers/rtc/s3c44b0_rtc.c @@ -37,24 +37,24 @@ int rtc_get (struct rtc_time* tm) { RTCCON |= 1; - tm->tm_year = BCD2BIN(BCDYEAR); - tm->tm_mon = BCD2BIN(BCDMON); - tm->tm_wday = BCD2BIN(BCDDATE); - tm->tm_mday = BCD2BIN(BCDDAY); - tm->tm_hour = BCD2BIN(BCDHOUR); - tm->tm_min = BCD2BIN(BCDMIN); - tm->tm_sec = BCD2BIN(BCDSEC); + tm->tm_year = bcd2bin(BCDYEAR); + tm->tm_mon = bcd2bin(BCDMON); + tm->tm_wday = bcd2bin(BCDDATE); + tm->tm_mday = bcd2bin(BCDDAY); + tm->tm_hour = bcd2bin(BCDHOUR); + tm->tm_min = bcd2bin(BCDMIN); + tm->tm_sec = bcd2bin(BCDSEC); if (tm->tm_sec==0) { /* we have to re-read the rtc data because of the "one second deviation" problem */ /* see RTC datasheet for more info about it */ - tm->tm_year = BCD2BIN(BCDYEAR); - tm->tm_mon = BCD2BIN(BCDMON); - tm->tm_mday = BCD2BIN(BCDDAY); - tm->tm_wday = BCD2BIN(BCDDATE); - tm->tm_hour = BCD2BIN(BCDHOUR); - tm->tm_min = BCD2BIN(BCDMIN); - tm->tm_sec = BCD2BIN(BCDSEC); + tm->tm_year = bcd2bin(BCDYEAR); + tm->tm_mon = bcd2bin(BCDMON); + tm->tm_mday = bcd2bin(BCDDAY); + tm->tm_wday = bcd2bin(BCDDATE); + tm->tm_hour = bcd2bin(BCDHOUR); + tm->tm_min = bcd2bin(BCDMIN); + tm->tm_sec = bcd2bin(BCDSEC); } RTCCON &= ~1; @@ -75,13 +75,13 @@ int rtc_set (struct rtc_time* tm) tm->tm_year -= 2000; RTCCON |= 1; - BCDYEAR = BIN2BCD(tm->tm_year); - BCDMON = BIN2BCD(tm->tm_mon); - BCDDAY = BIN2BCD(tm->tm_mday); - BCDDATE = BIN2BCD(tm->tm_wday); - BCDHOUR = BIN2BCD(tm->tm_hour); - BCDMIN = BIN2BCD(tm->tm_min); - BCDSEC = BIN2BCD(tm->tm_sec); + BCDYEAR = bin2bcd(tm->tm_year); + BCDMON = bin2bcd(tm->tm_mon); + BCDDAY = bin2bcd(tm->tm_mday); + BCDDATE = bin2bcd(tm->tm_wday); + BCDHOUR = bin2bcd(tm->tm_hour); + BCDMIN = bin2bcd(tm->tm_min); + BCDSEC = bin2bcd(tm->tm_sec); RTCCON &= 1; return 0; diff --git a/drivers/rtc/x1205.c b/drivers/rtc/x1205.c index 56115b0..ceba7c3 100644 --- a/drivers/rtc/x1205.c +++ b/drivers/rtc/x1205.c @@ -116,13 +116,13 @@ int rtc_get(struct rtc_time *tm) buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); - tm->tm_sec = BCD2BIN(buf[CCR_SEC]); - tm->tm_min = BCD2BIN(buf[CCR_MIN]); - tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */ - tm->tm_mday = BCD2BIN(buf[CCR_MDAY]); - tm->tm_mon = BCD2BIN(buf[CCR_MONTH]); /* mon is 0-11 */ - tm->tm_year = BCD2BIN(buf[CCR_YEAR]) - + (BCD2BIN(buf[CCR_Y2K]) * 100); + tm->tm_sec = bcd2bin(buf[CCR_SEC]); + tm->tm_min = bcd2bin(buf[CCR_MIN]); + tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */ + tm->tm_mday = bcd2bin(buf[CCR_MDAY]); + tm->tm_mon = bcd2bin(buf[CCR_MONTH]); /* mon is 0-11 */ + tm->tm_year = bcd2bin(buf[CCR_YEAR]) + + (bcd2bin(buf[CCR_Y2K]) * 100); tm->tm_wday = buf[CCR_WDAY]; debug("%s: tm is secs=%d, mins=%d, hours=%d, " @@ -143,21 +143,21 @@ int rtc_set(struct rtc_time *tm) tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec); - buf[CCR_SEC] = BIN2BCD(tm->tm_sec); - buf[CCR_MIN] = BIN2BCD(tm->tm_min); + buf[CCR_SEC] = bin2bcd(tm->tm_sec); + buf[CCR_MIN] = bin2bcd(tm->tm_min); /* set hour and 24hr bit */ - buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) | X1205_HR_MIL; + buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL; - buf[CCR_MDAY] = BIN2BCD(tm->tm_mday); + buf[CCR_MDAY] = bin2bcd(tm->tm_mday); /* month, 1 - 12 */ - buf[CCR_MONTH] = BIN2BCD(tm->tm_mon); + buf[CCR_MONTH] = bin2bcd(tm->tm_mon); /* year, since the rtc epoch*/ - buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100); + buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100); buf[CCR_WDAY] = tm->tm_wday & 0x07; - buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100); + buf[CCR_Y2K] = bin2bcd(tm->tm_year / 100); /* this sequence is required to unlock the chip */ rtc_write(X1205_REG_SR, X1205_SR_WEL); diff --git a/include/bcd.h b/include/bcd.h index c545308..af4aa9c 100644 --- a/include/bcd.h +++ b/include/bcd.h @@ -3,18 +3,23 @@ * at your option. */ -/* macros to translate to/from binary and binary-coded decimal (frequently - * found in RTC chips). +/* inline functions to translate to/from binary and binary-coded decimal + * (frequently found in RTC chips). */ #ifndef _BCD_H #define _BCD_H -#define BCD2BIN(val) (((val) & 0x0f) + ((val)>>4)*10) -#define BIN2BCD(val) ((((val)/10)<<4) + (val)%10) +#include <linux/types.h> -/* backwards compat */ -#define BCD_TO_BIN(val) ((val)=BCD2BIN(val)) -#define BIN_TO_BCD(val) ((val)=BIN2BCD(val)) +static inline unsigned int bcd2bin(u8 val) +{ + return ((val) & 0x0f) + ((val) >> 4) * 10; +} + +static inline u8 bin2bcd (unsigned int val) +{ + return (((val / 10) << 4) | (val % 10)); +} #endif /* _BCD_H */ diff --git a/include/linux/mc146818rtc.h b/include/linux/mc146818rtc.h index 227feeb..0644d92 100644 --- a/include/linux/mc146818rtc.h +++ b/include/linux/mc146818rtc.h @@ -83,16 +83,4 @@ #define RTC_VALID RTC_REG_D # define RTC_VRT 0x80 /* valid RAM and time */ /**********************************************************************/ - -/* example: !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) - * determines if the following two #defines are needed - */ -#ifndef BCD_TO_BIN -#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10) -#endif - -#ifndef BIN_TO_BCD -#define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10) -#endif - #endif /* _MC146818RTC_H */ -- 1.6.0.4

4 9

[U-Boot] [PATCH] jffs2: some fixes to summary support
by Ilya Yanok 24 Aug '09

24 Aug '09

This patch fixes some issues with JFFS2 summary support in U-Boot. 1/ Summary support made compilation configurable (as summary support considered expiremental even in Linux). 2/ Summary code can do unaligned 16-bit and 32-bit memory accesses. We need to get data byte by byte to exclude data aborts. 3/ Make summary scan in two passes so we can safely fall back to full scan if we found unsupported entry in the summary. Signed-off-by: Ilya Yanok <yanok(a)emcraft.com> --- fs/jffs2/jffs2_1pass.c | 122 ++++++++++++++++++++++++++++++++---------------- 1 files changed, 81 insertions(+), 41 deletions(-) diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index 11b66ab..ba8ac51 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -120,6 +120,7 @@ #include <jffs2/jffs2.h> #include <jffs2/jffs2_1pass.h> #include <linux/mtd/compat.h> +#include <asm/errno.h> #include "jffs2_private.h" @@ -1220,8 +1221,30 @@ jffs2_1pass_rescan_needed(struct part_info *part) return 0; } +#ifdef CONFIG_JFFS2_SUMMARY +static u32 sum_get_unaligned32(u32 *ptr) +{ + u32 val; + u8 *p = (u8 *)ptr; + + val = *p | (*(p + 1) << 8) | (*(p + 2) << 16) | (*(p + 3) << 24); + + return __le32_to_cpu(val); +} + +static u16 sum_get_unaligned16(u16 *ptr) +{ + u16 val; + u8 *p = (u8 *)ptr; + + val = *p | (*(p + 1) << 8); + + return __le16_to_cpu(val); +} + #define dbg_summary(...) do {} while (0); -/* Process the stored summary information - helper function for +/* + * Process the stored summary information - helper function for * jffs2_sum_scan_sumnode() */ @@ -1230,54 +1253,64 @@ static int jffs2_sum_process_sum_data(struct part_info *part, uint32_t offset, struct b_lists *pL) { void *sp; - int i; + int i, pass; + void *ret; - sp = summary->sum; + for (pass = 0; pass < 2; pass++) { + sp = summary->sum; - for (i = 0; i < summary->sum_num; i++) { - dbg_summary("processing summary index %d\n", i); + for (i = 0; i < summary->sum_num; i++) { + struct jffs2_sum_unknown_flash *spu = sp; + dbg_summary("processing summary index %d\n", i); - switch (((struct jffs2_sum_unknown_flash *)sp)->nodetype) { - case JFFS2_NODETYPE_INODE: { + switch (sum_get_unaligned16(&spu->nodetype)) { + case JFFS2_NODETYPE_INODE: { struct jffs2_sum_inode_flash *spi; - spi = sp; - - dbg_summary("Inode at 0x%08x-0x%08x\n", - offset + spi->offset, - offset + spi->offset + spi->totlen); + if (pass) { + spi = sp; - if (insert_node(&pL->frag, (u32) part->offset + - offset + spi->offset) == NULL) - return -1; + ret = insert_node(&pL->frag, + (u32)part->offset + + offset + + sum_get_unaligned32( + &spi->offset)); + if (ret == NULL) + return -1; + } - sp += JFFS2_SUMMARY_INODE_SIZE; + sp += JFFS2_SUMMARY_INODE_SIZE; - break; - } - - case JFFS2_NODETYPE_DIRENT: { - struct jffs2_sum_dirent_flash *spd; - spd = sp; - - dbg_summary("Dirent at 0x%08x-0x%08x\n", - offset + spd->offset, - offset + spd->offset + spd->totlen); - - if (insert_node(&pL->dir, (u32) part->offset + - offset + spd->offset) == NULL) - return -1; - - sp += JFFS2_SUMMARY_DIRENT_SIZE(spd->nsize); + break; + } + case JFFS2_NODETYPE_DIRENT: { + struct jffs2_sum_dirent_flash *spd; + spd = sp; + if (pass) { + ret = insert_node(&pL->dir, + (u32) part->offset + + offset + + sum_get_unaligned32( + &spd->offset)); + if (ret == NULL) + return -1; + } + + sp += JFFS2_SUMMARY_DIRENT_SIZE( + spd->nsize); - break; - } - default : { - uint16_t nodetype = - ((struct jffs2_sum_unknown_flash *) - sp)->nodetype; - printf("Unsupported node type %x found in " - "summary!\n", nodetype); - break; + break; + } + default : { + uint16_t nodetype = sum_get_unaligned16( + &spu->nodetype); + printf("Unsupported node type %x found" + " in summary!\n", + nodetype); + if ((nodetype & JFFS2_COMPAT_MASK) == + JFFS2_FEATURE_INCOMPAT) + return -EIO; + return -EBADMSG; + } } } } @@ -1335,6 +1368,8 @@ int jffs2_sum_scan_sumnode(struct part_info *part, uint32_t offset, dbg_summary("Summary : CLEANMARKER node \n"); ret = jffs2_sum_process_sum_data(part, offset, summary, pL); + if (ret == -EBADMSG) + return 0; if (ret) return ret; /* real error */ @@ -1345,6 +1380,7 @@ crc_err: return 0; } +#endif /* CONFIG_JFFS2_SUMMARY */ #ifdef DEBUG_FRAGMENTS static void @@ -1450,13 +1486,16 @@ jffs2_1pass_build_lists(struct part_info * part) uint32_t buf_ofs = sector_ofs; uint32_t buf_len; uint32_t ofs, prevofs; +#ifdef CONFIG_JFFS2_SUMMARY struct jffs2_sum_marker *sm; void *sumptr = NULL; uint32_t sumlen; int ret; +#endif WATCHDOG_RESET(); +#ifdef CONFIG_JFFS2_SUMMARY buf_len = sizeof(*sm); /* Read as much as we want into the _end_ of the preallocated @@ -1504,6 +1543,7 @@ jffs2_1pass_build_lists(struct part_info * part) continue; } +#endif /* CONFIG_JFFS2_SUMMARY */ buf_len = EMPTY_SCAN_SIZE(part->sector_size); -- 1.6.0.6

5 7

[U-Boot] PATCH - Added support to YANU Nios2 uart
by Renato Andreola 24 Aug '09

24 Aug '09

From eae7788c435cfab344c9741c9501475e9ab2797a Mon Sep 17 00:00:00 2001 From: Renato Andreola <renato.andreola(a)imagos.it> Date: Mon, 24 Aug 2009 11:10:44 +0200 Subject: [PATCH] Yanu Support for U-Boot with this patch YANU uart (from opencores) support will be added to u-boot. Remember to modify properly your board files for defining physical address etc etc --- cpu/nios2/serial.c | 170 +++++++++++++++++++++++++++++++++++++++++++++++++- include/nios2-yanu.h | 122 ++++++++++++++++++++++++++++++++++++ 2 files changed, 291 insertions(+), 1 deletions(-) create mode 100644 include/nios2-yanu.h diff --git a/cpu/nios2/serial.c b/cpu/nios2/serial.c index 8bbb803..84be160 100644 --- a/cpu/nios2/serial.c +++ b/cpu/nios2/serial.c @@ -26,6 +26,7 @@ #include <watchdog.h> #include <asm/io.h> #include <nios2-io.h> +#include <nios2-yanu.h> DECLARE_GLOBAL_DATA_PTR; @@ -74,10 +75,177 @@ int serial_getc (void) return (c); } +#elif defined(CONFIG_CONSOLE_YANU) +/*-----------------------------------------------------------------*/ +/* YANU Imagos serial port */ +/*-----------------------------------------------------------------*/ + +static yanu_uart_t *uart = (yanu_uart_t *)CONFIG_SYS_NIOS_CONSOLE; + +#if defined(CONFIG_NIOS_FIXEDBAUD) + +/* Everything's already setup for fixed-baud PTF assignment*/ + +void serial_setbrg (void) +{ + int n, k; + const unsigned max_uns = 0xFFFFFFFF; + unsigned best_n, best_m, baud; + + /* compute best N and M couple */ + best_n = YANU_MAX_PRESCALER_N; + for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) + { + if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n+4)) >= (unsigned)CONFIG_BAUDRATE) + { + best_n = n; + break; + } + } + for (k=0; ; k++) + { + if ((unsigned)CONFIG_BAUDRATE <= (max_uns >> (15+n-k))) + break; + } + best_m = ((unsigned)CONFIG_BAUDRATE * (1 << (15+n-k))) / ((unsigned)CONFIG_SYS_CLK_FREQ >> k); + + baud = best_m + best_n * YANU_BAUDE; + writel(&uart->baud, baud); + + return; +} + +#else + +void serial_setbrg (void) +{ + DECLARE_GLOBAL_DATA_PTR; + int n, k; + const unsigned max_uns = 0xFFFFFFFF; + unsigned best_n, best_m, baud; + + /* compute best N and M couple */ + best_n = YANU_MAX_PRESCALER_N; + for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) + { + if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n+4)) >= gd->baudrate) + { + best_n = n; + break; + } + } + for (k=0; ; k++) + { + if (gd->baudrate <= (max_uns >> (15+n-k))) + break; + } + best_m = (gd->baudrate * (1 << (15+n-k))) / ((unsigned)CONFIG_SYS_CLK_FREQ >> k); + + baud = best_m + best_n * YANU_BAUDE; + writel(&uart->baud, baud); + + return; +} + + +#endif /* CFG_NIOS_FIXEDBAUD */ + +int serial_init (void) +{ + unsigned action,control; + + /* status register cleanup */ + action = YANU_ACTION_RRRDY | + YANU_ACTION_RTRDY | + YANU_ACTION_ROE | + YANU_ACTION_RBRK | + YANU_ACTION_RFE | + YANU_ACTION_RPE | + YANU_ACTION_RFE | + YANU_ACTION_RFIFO_CLEAR | + YANU_ACTION_TFIFO_CLEAR; + + writel(&uart->action, action); + + /* control register cleanup */ + /* no interrupts enabled */ + /* one stop bit */ + /* hardware flow control disabled */ + /* 8 bits */ + control = (0x7 << YANU_CONTROL_BITS_POS); + /* enven parity just to be clean */ + control |= YANU_CONTROL_PAREVEN; + /* we set threshold for fifo */ + control |= YANU_CONTROL_RDYDLY * YANU_RXFIFO_DLY; + control |= YANU_CONTROL_TXTHR * YANU_TXFIFO_THR; + + writel(&uart->control, control); + + /* to set baud rate */ + serial_setbrg(); + + return (0); +} + + +/*----------------------------------------------------------------------- + * YANU CONSOLE + *---------------------------------------------------------------------*/ +void serial_putc (char c) +{ + int tx_chars; + unsigned status; + + if (c == '\n') + serial_putc ('\r'); + + while (1) + { + status = readl(&uart->status); + tx_chars = (status>>YANU_TFIFO_CHARS_POS) + & ((1<<YANU_TFIFO_CHARS_N)-1); + if (tx_chars < YANU_TXFIFO_SIZE-1) + break; + WATCHDOG_RESET (); + } + + writel(&uart->data, (unsigned char)c); +} + +void serial_puts (const char *s) +{ + while (*s != 0) + { + serial_putc (*s++); + } +} + + +int serial_tstc(void) +{ + unsigned status ; + + status = readl(&uart->status); + return(((status>>YANU_RFIFO_CHARS_POS) & ((1<<YANU_RFIFO_CHARS_N)-1)) > 0); +} + + +int serial_getc (void) +{ + while (serial_tstc() == 0) + WATCHDOG_RESET (); + + /* first we pull the char */ + writel(&uart->action, YANU_ACTION_RFIFO_PULL); + + return(readl(&uart->data) & YANU_DATA_CHAR_MASK); +} + +#else /*CONFIG_CONSOLE_YANU*/ + /*------------------------------------------------------------------ * UART the serial port *-----------------------------------------------------------------*/ -#else static nios_uart_t *uart = (nios_uart_t *) CONFIG_SYS_NIOS_CONSOLE; diff --git a/include/nios2-yanu.h b/include/nios2-yanu.h new file mode 100644 index 0000000..c8c868a --- /dev/null +++ b/include/nios2-yanu.h @@ -0,0 +1,122 @@ +/* + * (C) Copyright 2006, Imagos S.a.s <www.imagos.it> + * Renato Andreola <renato.andreola(a)imagos.it> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/************************************************************************* + * Altera NiosII YANU serial interface by Imagos + * please see http://www.opencores.org/project,yanu for + * information/downloads + ************************************************************************/ + +#ifndef __NIOS2_YANU_H__ +#define __NIOS2_YANU_H__ + +#define YANU_MAX_PRESCALER_N ((1 << 4) - 1) /* 15 */ +#define YANU_MAX_PRESCALER_M ((1 << 11) -1) /* 2047 */ +#define YANU_FIFO_SIZE (16) +#define YANU_RXFIFO_SIZE (YANU_FIFO_SIZE) +#define YANU_TXFIFO_SIZE (YANU_FIFO_SIZE) + +#define YANU_RXFIFO_DLY (10*11) +#define YANU_TXFIFO_THR (10) +#define YANU_DATA_CHAR_MASK (0xFF) + +/* data register */ +#define YANU_DATA_OFFSET (0) /* data register offset */ + +#define YANU_CONTROL_OFFSET (4) /* control register offset */ +/* interrupt enable */ +#define YANU_CONTROL_IE_RRDY (1<<0) /* ie on received character ready */ +#define YANU_CONTROL_IE_OE (1<<1) /* ie on rx overrun */ +#define YANU_CONTROL_IE_BRK (1<<2) /* ie on break detect */ +#define YANU_CONTROL_IE_FE (1<<3) /* ie on framing error */ +#define YANU_CONTROL_IE_PE (1<<4) /* ie on parity error */ +#define YANU_CONTROL_IE_TRDY (1<<5) /* ie interrupt on tranmitter ready */ +/* control bits */ +#define YANU_CONTROL_BITS_POS (6) /* bits number pos */ +#define YANU_CONTROL_BITS (1<<YANU_CONTROL_BITS_POS) /* number of rx/tx bits per word. 3 bit unsigned integer */ +#define YANU_CONTROL_BITS_N (3) /* ... its bit filed length */ +#define YANU_CONTROL_PARENA (1<<9) /* enable parity bit transmission/reception */ +#define YANU_CONTROL_PAREVEN (1<<10) /* parity even */ +#define YANU_CONTROL_STOPS (1<<11) /* number of stop bits */ +#define YANU_CONTROL_HHENA (1<<12) /* Harware Handshake enable... */ +#define YANU_CONTROL_FORCEBRK (1<<13) /* if set than txd = active (0) */ +/* tuning part */ +#define YANU_CONTROL_RDYDLY (1<<14) /* delay from "first" before setting rrdy (in bit) */ +#define YANU_CONTROL_RDYDLY_N (8) /* ... its bit filed length */ +#define YANU_CONTROL_TXTHR (1<<22) /* tx interrupt threshold: the trdy set if txfifo_chars<= txthr (chars) */ +#define YANU_CONTROL_TXTHR_N (4) /* ... its bit field length */ + + +#define YANU_BAUD_OFFSET (8) /* baud register offset */ +#define YANU_BAUDM (1<<0) /* baud mantissa lsb */ +#define YANU_BAUDM_N (12) /* ...its bit filed length */ +#define YANU_BAUDE (1<<12) /* baud exponent lsb */ +#define YANU_BAUDE_N (4) /* ...its bit field length */ + +#define YANU_ACTION_OFFSET (12) /* action register... write only */ +#define YANU_ACTION_RRRDY (1<<0) /* reset rrdy */ +#define YANU_ACTION_ROE (1<<1) /* reset oe */ +#define YANU_ACTION_RBRK (1<<2) /* reset brk */ +#define YANU_ACTION_RFE (1<<3) /* reset fe */ +#define YANU_ACTION_RPE (1<<4) /* reset pe */ +#define YANU_ACTION_SRRDY (1<<5) /* set rrdy */ +#define YANU_ACTION_SOE (1<<6) /* set oe */ +#define YANU_ACTION_SBRK (1<<7) /* set brk */ +#define YANU_ACTION_SFE (1<<8) /* set fe */ +#define YANU_ACTION_SPE (1<<9) /* set pe */ +#define YANU_ACTION_RFIFO_PULL (1<<10) /* pull a char from rx fifo we MUST do it before taking a char */ +#define YANU_ACTION_RFIFO_CLEAR (1<<11) /* clear rx fifo */ +#define YANU_ACTION_TFIFO_CLEAR (1<<12) /* clear tx fifo */ +#define YANU_ACTION_RTRDY (1<<13) /* clear trdy */ +#define YANU_ACTION_STRDY (1<<14) /* set trdy */ + +#define YANU_STATUS_OFFSET (16) +#define YANU_STATUS_RRDY (1<<0) /* rxrdy flag */ +#define YANU_STATUS_TRDY (1<<1) /* txrdy flag */ +#define YANU_STATUS_OE (1<<2) /* rx overrun error */ +#define YANU_STATUS_BRK (1<<3) /* rx break detect flag */ +#define YANU_STATUS_FE (1<<4) /* rx framing error flag */ +#define YANU_STATUS_PE (1<<5) /* rx parity erro flag */ +#define YANU_RFIFO_CHARS_POS (6) +#define YANU_RFIFO_CHARS (1<<RFIFO_CHAR_POS) /* number of chars into rx fifo */ +#define YANU_RFIFO_CHARS_N (5) /* ...its bit field length: 32 chars */ +#define YANU_TFIFO_CHARS_POS (11) +#define YANU_TFIFO_CHARS (1<<TFIFO_CHAR_POS) /* number of chars into tx fifo */ +#define YANU_TFIFO_CHARS_N (5) /* ...its bit field length: 32 chars */ + +typedef volatile struct yanu_uart_t +{ + volatile unsigned data; +/* control register (RW) 32-bit */ + volatile unsigned control; +/* baud/prescaler register (RW) 32-bit */ + volatile unsigned baud; +/* action register (W) 32-bit */ + volatile unsigned action; +/* status register (R) 32-bit */ + volatile unsigned status; +/* magic register (R) 32-bit */ + volatile unsigned magic; +} yanu_uart_t; + +#endif -- 1.5.5

2 1

[U-Boot] [PATCH v2][repost] arm: Kirkwood: add SYSRSTn Duration Counter Support
by Prafulla Wadaskar 24 Aug '09

24 Aug '09

I am sorry for previous post v2, pls ignore it, this is the right patch for the same This feature can be used to trigger special command "sysrstcmd" using reset key long press event and environment variable "sysrstdelay" is set (useful for reset to factory or manufacturing mode execution) Kirkwood SoC implements a hardware-based SYSRSTn duration counter. When SYSRSTn is asserted low, a SYSRSTn duration counter is running. The counter value is stored in the SYSRSTn Length Counter Register The counter is based on the 25-MHz reference clock (40ns) It is a 29-bit counter, yielding a maximum counting duration of 2^29/25 MHz (21.4 seconds). When the counter reach its maximum value, it remains at this value until counter reset is triggered by setting bit 31 of KW_REG_SYSRST_CNT Implementation: Upon long reset assertion (> ${sysrstdleay} in secs) sysrstcmd will be executed if pre-defined in environment variables. This feature will be disabled if "sysrstdelay" variable is unset. for-ex. setenv sysrst_cmd "echo starting factory reset; nand erase 0xa0000 0x20000; echo finish ed sysrst command;" will erase particular nand sector if triggered by this event Signed-off-by: Prafulla Wadaskar <prafulla(a)marvell.com> --- Change log: v2: updated as per review feedback for v1 bug fix in the previous post (V2) fixed cpu/arm926ejs/kirkwood/cpu.c | 75 +++++++++++++++++++++++++++++++++++ include/asm-arm/arch-kirkwood/cpu.h | 2 + 2 files changed, 77 insertions(+), 0 deletions(-) diff --git a/cpu/arm926ejs/kirkwood/cpu.c b/cpu/arm926ejs/kirkwood/cpu.c index 795a739..97318ff 100644 --- a/cpu/arm926ejs/kirkwood/cpu.c +++ b/cpu/arm926ejs/kirkwood/cpu.c @@ -195,6 +195,78 @@ int kw_config_mpp(u32 mpp0_7, u32 mpp8_15, u32 mpp16_23, u32 mpp24_31, return 0; } +/* + * SYSRSTn Duration Counter Support + * + * Kirkwood SoC implements a hardware-based SYSRSTn duration counter. + * When SYSRSTn is asserted low, a SYSRSTn duration counter is running. + * The SYSRSTn duration counter is useful for implementing a manufacturer + * or factory reset. Upon a long reset assertion that is greater than a + * pre-configured environment variable value for sysrstdelay, + * The counter value is stored in the SYSRSTn Length Counter Register + * The counter is based on the 25-MHz reference clock (40ns) + * It is a 29-bit counter, yielding a maximum counting duration of + * 2^29/25 MHz (21.4 seconds). When the counter reach its maximum value, + * it remains at this value until counter reset is triggered by setting + * bit 31 of KW_REG_SYSRST_CNT + */ +static void kw_sysrst_action(void) +{ + int ret; + char *s = getenv("sysrstcmd"); + + if (!s) { + printf("Error.. %s failed, check sysrstcmd\n", + __FUNCTION__); + return; + } + + printf("Starting %s process...\n", __FUNCTION__); +#if !defined(CONFIG_SYS_HUSH_PARSER) + ret = run_command (s, 0); +#else + ret = parse_string_outer(s, FLAG_PARSE_SEMICOLON + | FLAG_EXIT_FROM_LOOP); +#endif + if (ret < 0) + printf("Error.. %s failed\n", __FUNCTION__); + else + printf("%s process finished\n", __FUNCTION__); +} + +static void kw_sysrst_check(void) +{ + u32 sysrst_cnt, sysrst_dly; + char *s; + + /* + * no action if sysrstdelay environment variable is not defined + */ + s = getenv("sysrstdelay"); + if (s == NULL) + return; + + /* read sysrstdelay value */ + sysrst_dly = (u32) simple_strtoul(s, NULL, 10); + + /* read SysRst Length counter register (bits 28:0) */ + sysrst_cnt = (0x1fffffff & readl(KW_REG_SYSRST_CNT)); + printf("H/w Rst hold time: %d.%d secs\n", + sysrst_cnt / SYSRST_CNT_1SEC_VAL, + sysrst_cnt % SYSRST_CNT_1SEC_VAL); + + /* clear the counter for next valid read*/ + writel(1 << 31, KW_REG_SYSRST_CNT); + + /* + * sysrst_action: + * if H/w Reset key is pressed and hold for time + * more than sysrst_dly in seconds + */ + if (sysrst_cnt >= SYSRST_CNT_1SEC_VAL * sysrst_dly) + kw_sysrst_action(); +} + #if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo(void) { @@ -298,6 +370,9 @@ int arch_misc_init(void) temp = get_cr(); set_cr(temp & ~CR_V); + /* checks and execute resset to factory event */ + kw_sysrst_check(); + return 0; } #endif /* CONFIG_ARCH_MISC_INIT */ diff --git a/include/asm-arm/arch-kirkwood/cpu.h b/include/asm-arm/arch-kirkwood/cpu.h index d1440af..b3022a3 100644 --- a/include/asm-arm/arch-kirkwood/cpu.h +++ b/include/asm-arm/arch-kirkwood/cpu.h @@ -36,6 +36,8 @@ ((_x ? KW_EGIGA0_BASE : KW_EGIGA1_BASE) + 0x44c) #define KW_REG_DEVICE_ID (KW_MPP_BASE + 0x34) +#define KW_REG_SYSRST_CNT (KW_MPP_BASE + 0x50) +#define SYSRST_CNT_1SEC_VAL (25*1000000) #define KW_REG_MPP_OUT_DRV_REG (KW_MPP_BASE + 0xE0) enum memory_bank { -- 1.5.3.3

3 12

[U-Boot] [PATCH] Remove deprecated 'autoscr' command
by Peter Tyser 24 Aug '09

24 Aug '09

The more standard 'source' command provides identical functionality to the autoscr command. Environment variable names/values on the MVBC_P, MVBML7, kmeter1, mgcoge, and km8xx boards were updated to no longer refernce 'autoscr'. Signed-off-by: Peter Tyser <ptyser(a)xes-inc.com> --- There was a fair amount of grey area as far as environment variable naming for those variables that used to refernce autoscr. I tended to lean toward using "script" in the variable name as I thought that was a lot more descriptive than "source", which could mean lots of different things. eg I migrated autoscr_addr to script_addr instead of source_addr. I also figured the "autoscript" and "autoscript_uname" variables were more descriptive than "autosource" and "autosource_uname", so they were left alone. If others (especially board maintainers affected) have a strong opinion about environment variable naming let me know. board/LEOX/elpt860/README.LEOX | 2 +- board/matrix_vision/mvbc_p/mvbc_p_autoscript | 4 ++-- board/matrix_vision/mvblm7/mvblm7_autoscript | 4 ++-- board/musenki/README | 2 +- common/cmd_source.c | 18 ------------------ doc/README.IPHASE4539 | 2 +- doc/README.m52277evb | 2 +- doc/README.m5373evb | 2 +- doc/README.m54455evb | 2 +- doc/README.m5475evb | 2 +- doc/feature-removal-schedule.txt | 19 ------------------- include/configs/MVBC_P.h | 14 +++++++------- include/configs/MVBLM7.h | 14 +++++++------- include/configs/keymile-common.h | 6 +++--- 14 files changed, 28 insertions(+), 65 deletions(-) diff --git a/board/LEOX/elpt860/README.LEOX b/board/LEOX/elpt860/README.LEOX index 25524af..e8ab867 100644 --- a/board/LEOX/elpt860/README.LEOX +++ b/board/LEOX/elpt860/README.LEOX @@ -68,7 +68,6 @@ Type "run nfsboot" to mount root filesystem over NFS Hit any key to stop autoboot: 0 LEOX_elpt860: help askenv - get environment variables from stdin -autoscr - run script from memory base - print or set address offset bdinfo - print Board Info structure bootm - boot application image from memory @@ -100,6 +99,7 @@ run - run commands in an environment variable saveenv - save environment variables to persistent storage setenv - set environment variables sleep - delay execution for some time +source - run script from memory tftpboot- boot image via network using TFTP protocol and env variables ipaddr and serverip version - print monitor version diff --git a/board/matrix_vision/mvbc_p/mvbc_p_autoscript b/board/matrix_vision/mvbc_p/mvbc_p_autoscript index 5cee6c5..ab8184f 100644 --- a/board/matrix_vision/mvbc_p/mvbc_p_autoscript +++ b/board/matrix_vision/mvbc_p/mvbc_p_autoscript @@ -22,7 +22,7 @@ setenv set_static_nm setenv netmask \${static_netmask} setenv set_static_gw setenv gatewayip \${static_gateway} setenv set_ip setenv ip \${ipaddr}::\${gatewayip}:\${netmask} setenv ramparam setenv bootargs root=/dev/ram0 ro rootfstype=squashfs -if test ${autoscr_boot} != no; +if test ${autoscript_boot} != no; then if test ${netboot} = yes; then @@ -40,5 +40,5 @@ then echo "=== bootfromflash ===" run cpdtb rundtb bootfromflash else - echo "=== boot stopped with autoscr_boot no ===" + echo "=== boot stopped with autoscript_boot no ===" fi diff --git a/board/matrix_vision/mvblm7/mvblm7_autoscript b/board/matrix_vision/mvblm7/mvblm7_autoscript index 6f9357f..dc385fd 100644 --- a/board/matrix_vision/mvblm7/mvblm7_autoscript +++ b/board/matrix_vision/mvblm7/mvblm7_autoscript @@ -21,7 +21,7 @@ setenv set_static_nm setenv netmask \${static_netmask} setenv set_static_gw setenv gatewayip \${static_gateway} setenv set_ip setenv ip \${ipaddr}::\${gatewayip}:\${netmask} setenv ramparam setenv bootargs root=/dev/ram0 ro rootfstype=squashfs -if test ${autoscr_boot} != no; +if test ${autoscript_boot} != no; then if test ${netboot} = yes; then @@ -39,5 +39,5 @@ then echo "=== bootfromflash ===" run cpdtb rundtb bootfromflash else - echo "=== boot stopped with autoscr_boot no ===" + echo "=== boot stopped with autoscript_boot no ===" fi diff --git a/board/musenki/README b/board/musenki/README index 135a01a..084ab54 100644 --- a/board/musenki/README +++ b/board/musenki/README @@ -34,7 +34,6 @@ Out: serial Err: serial Hit any key to stop autoboot: 0 => help -autoscr - run script from memory base - print or set address offset bdinfo - print Board Info structure bootm - boot application image from memory @@ -67,6 +66,7 @@ reset - Perform RESET of the CPU run - run commands in an environment variable saveenv - save environment variables to persistent storage setenv - set environment variables +source - run script from memory tftpboot- boot image via network using TFTP protocol and env variables ipaddr and serverip version - print monitor version diff --git a/common/cmd_source.c b/common/cmd_source.c index 965b8b1..1424d30 100644 --- a/common/cmd_source.c +++ b/common/cmd_source.c @@ -236,22 +236,4 @@ U_BOOT_CMD( "unit name in the form of addr:<subimg_uname>" #endif ); - -/* - * Keep for now for backward compatibility; - * remove later when support for "autoscr" goes away. - */ -static int -do_autoscr (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - printf ("\n### WARNING ### " - "\"autoscr\" is deprecated, use \"source\" instead ###\n\n"); - return do_source (cmdtp, flag, argc, argv); -} - -U_BOOT_CMD( - autoscr, 2, 0, do_autoscr, - "DEPRECATED - use \"source\" command instead", - "" -); #endif diff --git a/doc/README.IPHASE4539 b/doc/README.IPHASE4539 index defad30..b804e06 100644 --- a/doc/README.IPHASE4539 +++ b/doc/README.IPHASE4539 @@ -54,7 +54,6 @@ connector as follows: ------------------------------------------------------------------------------ => help -autoscr - run script from memory base - print or set address offset bdinfo - print Board Info structure bootm - boot application image from memory @@ -88,6 +87,7 @@ run - run commands in an environment variable saveenv - save environment variables to persistent storage setenv - set environment variables sleep - delay execution for some time +source - run script from memory tftpboot- boot image via network using TFTP protocol and env variables ipaddr and serverip version - print monitor version diff --git a/doc/README.m52277evb b/doc/README.m52277evb index bec77b4..40f9028 100644 --- a/doc/README.m52277evb +++ b/doc/README.m52277evb @@ -184,7 +184,6 @@ baudrate = 115200 bps -> -> help ? - alias for 'help' -autoscr - run script from memory base - print or set address offset bdinfo - print Board Info structure boot - boot default, i.e., run 'bootcmd' @@ -227,5 +226,6 @@ run - run commands in an environment variable saveenv - save environment variables to persistent storage setenv - set environment variables sleep - delay execution for some time +source - run script from memory version - print monitor version -> diff --git a/doc/README.m5373evb b/doc/README.m5373evb index 0bd1101..5591748 100644 --- a/doc/README.m5373evb +++ b/doc/README.m5373evb @@ -195,7 +195,6 @@ baudrate = 115200 bps -> -> help ? - alias for 'help' -autoscr - run script from memory base - print or set address offset bdinfo - print Board Info structure boot - boot default, i.e., run 'bootcmd' @@ -243,6 +242,7 @@ run - run commands in an environment variable saveenv - save environment variables to persistent storage setenv - set environment variables sleep - delay execution for some time +source - run script from memory tftpboot- boot image via network using TFTP protocol version - print monitor version -> tftp 0x40800000 uImage diff --git a/doc/README.m54455evb b/doc/README.m54455evb index b769ff9..1888e16 100644 --- a/doc/README.m54455evb +++ b/doc/README.m54455evb @@ -276,7 +276,6 @@ baudrate = 115200 bps -> -> help ? - alias for 'help' -autoscr - run script from memory base - print or set address offset bdinfo - print Board Info structure boot - boot default, i.e., run 'bootcmd' @@ -332,6 +331,7 @@ run - run commands in an environment variable saveenv - save environment variables to persistent storage setenv - set environment variables sleep - delay execution for some time +source - run script from memory tftpboot- boot image via network using TFTP protocol version - print monitor version ->bootm 4000000 diff --git a/doc/README.m5475evb b/doc/README.m5475evb index 936c018..f3a1d7b 100644 --- a/doc/README.m5475evb +++ b/doc/README.m5475evb @@ -215,7 +215,6 @@ ip_addr = 192.162.1.2 baudrate = 115200 bps -> ? ? - alias for 'help' -autoscr - run script from memory base - print or set address offset bdinfo - print Board Info structure boot - boot default, i.e., run 'bootcmd' @@ -260,6 +259,7 @@ run - run commands in an environment variable saveenv - save environment variables to persistent storage setenv - set environment variables sleep - delay execution for some time +source - run script from memory tftpboot- boot image via network using TFTP protocol usb - USB sub-system usbboot - boot from USB device diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt index 0238d97..5fe21e8 100644 --- a/doc/feature-removal-schedule.txt +++ b/doc/feature-removal-schedule.txt @@ -26,25 +26,6 @@ Who: Ben Warren <biggerbadderben(a)gmail.com> --------------------------- -What: "autoscr" command -When: Release 2009-09 - -Why: "autosrc" is an ugly and completely non-standard name. - The "autoscr" command is deprecated and will be replaced by - - the "source" command as used by other shells such as bash. - - Starting with March 2009, both commands will be supported for - a transition period of 6 months after which "autoscr" will be - removed. During the transition period existing scripts and - environment variable names remain untouched for maximum - compatibiltiy; thse will be changed when support for the - "autoscr" command get's finally dropped. - -Who: Peter Tyser <ptyser(a)xes-inc.com> - ---------------------------- - What: GPL cleanup When: August 2009 Why: Over time, a couple of files have sneaked in into the U-Boot diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h index 867e8e0..21a3c75 100644 --- a/include/configs/MVBC_P.h +++ b/include/configs/MVBC_P.h @@ -73,8 +73,8 @@ #define MV_INITRD_LENGTH 0x00400000 #define MV_SCRATCH_ADDR 0x00000000 #define MV_SCRATCH_LENGTH MV_INITRD_LENGTH -#define MV_SOURCE_ADDR 0xff840000 -#define MV_SOURCE_ADDR2 0xff850000 +#define MV_SCRIPT_ADDR 0xff840000 +#define MV_SCRIPT_ADDR2 0xff850000 #define MV_DTB_ADDR 0xfffc0000 #define CONFIG_SHOW_BOOT_PROGRESS 1 @@ -130,9 +130,9 @@ #define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_RESET_TO_RETRY 1000 -#define CONFIG_BOOTCOMMAND "if imi ${autoscr_addr}; \ - then source ${autoscr_addr}; \ - else source ${autoscr_addr2}; \ +#define CONFIG_BOOTCOMMAND "if imi ${script_addr}; \ + then source ${script_addr}; \ + else source ${script_addr2}; \ fi;" #define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs" @@ -150,8 +150,8 @@ "fpga=0\0" \ "fpgadata=" MK_STR(MV_FPGA_DATA) "\0" \ "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0" \ - "autoscr_addr=" MK_STR(MV_SOURCE_ADDR) "\0" \ - "autoscr_addr2=" MK_STR(MV_SOURCE_ADDR2) "\0" \ + "script_addr=" MK_STR(MV_SCRIPT_ADDR) "\0" \ + "script_addr2=" MK_STR(MV_SCRIPT_ADDR2) "\0" \ "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0" \ "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0" \ "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0" \ diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index aa91805..e21fe80 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -408,8 +408,8 @@ #define MV_FPGA_SIZE 0x00076ca2 #define MV_KERNEL_ADDR 0xff810000 #define MV_INITRD_ADDR 0xffb00000 -#define MV_SOURCE_ADDR 0xff804000 -#define MV_SOURCE_ADDR2 0xff806000 +#define MV_SCRIPT_ADDR 0xff804000 +#define MV_SCRIPT_ADDR2 0xff806000 #define MV_DTB_ADDR 0xff808000 #define MV_INITRD_LENGTH 0x00400000 @@ -419,9 +419,9 @@ #define MV_DTB_ADDR_RAM 0x00600000 #define MV_INITRD_ADDR_RAM 0x01000000 -#define CONFIG_BOOTCOMMAND "if imi ${autoscr_addr}; \ - then source ${autoscr_addr}; \ - else source ${autoscr_addr2}; \ +#define CONFIG_BOOTCOMMAND "if imi ${script_addr}; \ + then source ${script_addr}; \ + else source ${script_addr2}; \ fi;" #define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs" @@ -434,8 +434,8 @@ "fpga=0\0" \ "fpgadata=" MK_STR(MV_FPGA_DATA) "\0" \ "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0" \ - "autoscr_addr=" MK_STR(MV_SOURCE_ADDR) "\0" \ - "autoscr_addr2=" MK_STR(MV_SOURCE_ADDR2) "\0" \ + "script_addr=" MK_STR(MV_SCRIPT_ADDR) "\0" \ + "script_addr2=" MK_STR(MV_SCRIPT_ADDR2) "\0" \ "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0" \ "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0" \ "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0" \ diff --git a/include/configs/keymile-common.h b/include/configs/keymile-common.h index 0cc1b3b..95f16cb 100644 --- a/include/configs/keymile-common.h +++ b/include/configs/keymile-common.h @@ -171,7 +171,7 @@ "kernel_addr_r=200000\0" \ "fdt_addr_r=600000\0" \ "ram_ws=800000 \0" \ - "autoscr_ws=780000 \0" \ + "script_ws=780000 \0" \ "fdt_file=" xstr(CONFIG_HOSTNAME) "/" \ xstr(CONFIG_HOSTNAME) ".dtb\0" \ "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin \0" \ @@ -253,8 +253,8 @@ "set_new_esw_script=setenv new_esw_script " \ "new_esw_0x${IVM_BoardId}_0x${IVM_HWKey}.scr \0" \ "new_esw=run set_new_esw_script; " \ - "tftp ${autoscr_ws} ${new_esw_script}; " \ - "iminfo ${autoscr_ws}; source ${autoscr_ws} \0" \ + "tftp ${script_ws} ${new_esw_script}; " \ + "iminfo ${script_ws}; source ${script_ws} \0" \ "bootlimit=0 \0" \ CONFIG_KM_DEF_ENV_IOMUX \ CONFIG_KM_DEF_ENV_PRIVATE \ -- 1.6.2.1

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[U-Boot] [PATCH] sh/rsk7203: add missing include net.h
by Jean-Christophe PLAGNIOL-VILLARD 23 Aug '09

23 Aug '09

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> --- board/renesas/rsk7203/rsk7203.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/board/renesas/rsk7203/rsk7203.c b/board/renesas/rsk7203/rsk7203.c index 2b85799..fbf2e23 100644 --- a/board/renesas/rsk7203/rsk7203.c +++ b/board/renesas/rsk7203/rsk7203.c @@ -21,6 +21,7 @@ */ #include <common.h> +#include <net.h> #include <netdev.h> #include <asm/io.h> #include <asm/processor.h> -- 1.6.3.1

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