July 2009 - U-Boot

[U-Boot] i2c: rework multibus/multiadapter functionality
by Heiko Schocher 18 Jul '09

18 Jul '09

Hello, I want now, because the merge window is open again, restart the the multibus/multiadapter discussion. To have a base for this discusion, I made in the i2c git tree (git://git.denx.de/u-boot-i2c.git) the following new 2 branches: "multibus": Patches from Sergey Kubushyn <ksi(a)koi8.net> posted in the last merge window. see, http://lists.denx.de/pipermail/u-boot/2009-February/047465.html They were discussed, but not accepted ... also some CodingStyle comments, changes in patch hierarchic are not done ... I only synced them to actuall code to have a base for the discussion. "multibus_v2": (I couldn;t post the patches because one of them is bigger than 100k :-( and I cannot split it in 2 patches, because this would break git bisection compatibility. But the patches can be found in git://git.denx.de/u-boot-i2c.git): Based on the i2c_core from Sergeys patches, added the following suggestions from Wolfgang and me: - v2 is bisection compatible - commits are in (hopefully) logical blocks - "cur_adap" added in gd_t: This points allways to the actuall used i2c adapter: - because gd_t is writeable when running in flash, complete multiadapter/multibus functionality is usable, when running in flash - using a pointer brings faster accesses to the i2c_adapter_t struct and saves some bytes here and there (see later). - init from a i2c controller: In the "multibus" branch (also in actual code) all i2c controllers, as a precaution, getting initialized. In the "multibus_v2" branch, a i2c controller gets only initialized if it is used. This is done in i2c_set_bus_num(). Actually, I let the i2c_init_all() in code, but just call in this function i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM). This can be dropped in a second step completely. Also, with this approach, we can easy add in a second step, a i2c_deinit() function in i2c_set_bus_num(), so we can deactivate a no longer used controller. - added "hw_adapnr" in i2c_adapter_t struct: when for example a CPU has more then one i2c controller we can use this variable to differentiate which controller the actual i2c adapter uses. This results in lower codesize and lower sourcecode changes. Example: fsl_i2c driver: (MPC8548CDS only with fsl driver) multibus: [hs@pollux u-boot-i2c]$ ./MAKEALL MPC8548CDS Configuring for MPC8548CDS board... fsl_i2c.c: In function '__i2c_init': fsl_i2c.c:173: warning: assignment discards qualifiers from pointer target type text data bss dec hex filename 222168 17344 27256 266768 41210 ./u-boot multibus_v2: [hs@pollux u-boot-i2c]$ ./MAKEALL MPC8548CDS Configuring for MPC8548CDS board... text data bss dec hex filename 222080 17344 27256 266680 411b8 ./u-boot also the bitbang driver gets better maintainable: Sourcecode changes: multibus: drivers/i2c/soft_i2c.c | 704 ++++++++++++++++++++--------------- multibus_v2: drivers/i2c/soft_i2c.c | 155 +++++--- Codesize bitbang driver: (MPC8548CDS with the following bus topology: * Busses: * * 0: Direct off of FSL_I2C[0] * 1: FSL_I2C[1]->PCA9542(0)->PCA9542(0) * 2: FSL_I2C[1]->PCA9542(0)->PCA9542(1) * 3: FSL_I2C[1]->PCA9542(1) * 4: Direct off of SOFT_I2C[0] * 5: Direct off of SOFT_I2C[1] ) multibus: [hs@pollux u-boot-i2c]$ ./MAKEALL MPC8548CDS Configuring for MPC8548CDS board... fsl_i2c.c: In function '__i2c_init': fsl_i2c.c:173: warning: assignment discards qualifiers from pointer target type text data bss dec hex filename 227092 17864 27256 272212 42754 ./u-boot [hs@pollux u-boot-i2c]$ multibus_v2: [hs@pollux u-boot-i2c]$ ./MAKEALL MPC8548CDS Configuring for MPC8548CDS board... text data bss dec hex filename 225048 17868 27256 270172 41f5c ./u-boot [hs@pollux u-boot-i2c]$ For this I call for all I2C_SDA, I2C_SCL, ... defines, which holds the board specific code, now functions (This is not a must, but I did this as an example see MPC8548CDS). In this functions I use "hw_adapnr" to switch to do the adapter specific gpio settings ... If we look at the "multibus" approach, there, this is not needed but Sourcecode size and Codesize grows with each bitbang adapter ... and if I think for a board with n bitbang adapter (with n > 5) this results in nearly unmaintable source code ... I just write this here because this has to be discussed (and this was a point, which drove the last discussion in chaos). We can now easy compare such a board ... see MPC8548CDS) and discuss on facts, which version we want to have in mainline. - adding a base_addr to i2c_adap_t struct (Did this not yet, but would also a good thing to have, because when I ported for example the ppc_4xx i2c hardware adapter, I saw, that some CPUs have more than one controller, and they just differ in the base addr, so this variable would be a "good to have"). I solved this actually in adding a function in this driver, which returns the base addr depending on hw_adapnr, which is a suboptimal way ... see for an example new ppc_4xx i2c driver: in drivers/i2c/ppc4xx_i2c.c: ppc4xx_get_base () Codesize: for a board with one soft_i2c driver: [hs@pollux u-boot-i2c]$ git checkout master Switched to branch "master" Your branch is ahead of 'origin/master' by 143 commits. [hs@pollux u-boot-i2c]$ ./MAKEALL CPU86 Configuring for CPU86 board... ... booting from 64-bit flash text data bss dec hex filename 146572 22068 24144 192784 2f110 ./u-boot [hs@pollux u-boot-i2c]$ git checkout multibus Switched to branch "multibus" [hs@pollux u-boot-i2c]$ ./MAKEALL CPU86 Configuring for CPU86 board... ... booting from 64-bit flash text data bss dec hex filename 147816 22124 24144 194084 2f624 ./u-boot [hs@pollux u-boot-i2c]$ git checkout multibus_v2 Switched to branch "multibus_v2" [hs@pollux u-boot-i2c]$ ./MAKEALL CPU86 Configuring for CPU86 board... ... booting from 64-bit flash text data bss dec hex filename 147688 22128 24144 193960 2f5a8 ./u-boot [hs@pollux u-boot-i2c]$ for a board with the fsl driver: [hs@pollux u-boot-i2c]$ git checkout master ./MA Switched to branch "master" Your branch is ahead of 'origin/master' by 143 commits. [hs@pollux u-boot-i2c]$ ./MAKEALL MPC8360EMDS Configuring for MPC8360EMDS board... text data bss dec hex filename 203504 11588 26900 241992 3b148 ./u-boot [hs@pollux u-boot-i2c]$ git checkout multibus Switched to branch "multibus" [hs@pollux u-boot-i2c]$ ./MAKEALL MPC8360EMDS Configuring for MPC8360EMDS board... fsl_i2c.c: In function '__i2c_init': fsl_i2c.c:173: warning: assignment discards qualifiers from pointer target type text data bss dec hex filename 204288 11628 26900 242816 3b480 ./u-boot [hs@pollux u-boot-i2c]$ git checkout multibus_v2 Switched to branch "multibus_v2" [hs@pollux u-boot-i2c]$ ./MAKEALL MPC8360EMDS Configuring for MPC8360EMDS board... text data bss dec hex filename 204256 11632 26900 242788 3b464 ./u-boot [hs@pollux u-boot-i2c]$ at last here comes a TODO list what should be done: - add README for the multibus functionality - list of drivers to port: drivbers/i2c: bfin-twi_i2c.c mxc_i2c.c omap1510_i2c.c omap24xx_i2c.c tsi108_i2c.c grep -lr HARD_I2C cpu/ cpu/arm920t/at91rm9200/i2c.c cpu/arm920t/s3c24x0/i2c.c cpu/mpc512x/i2c.c cpu/mpc5xxx/i2c.c cpu/mpc8220/i2c.c cpu/mpc824x/drivers/i2c/i2c.c cpu/mpc8xx/i2c.c cpu/pxa/i2c.c Hope didn;t forget some more ... - test, test, test ... - i2c devices must ported to new multibus functionality. Ideas here are welcome ;-) (They must "know", on which bus they are ...) - In actuall code it is possible to add new i2c busses with the "i2c bus" command (and from code with i2c_mux_ident_muxstring()) This actual is not included in the new code, but that could be done the following way (for the multibus_v2 version, for the approach in "multibus" branch I have no idea how to make this): When running in flash, we just can use the i2c busses defined in CONFIG_SYS_I2C_ADAPTERS (should be okay in the first step. When relocating code, the i2c busses in CONFIG_SYS_I2C_ADAPTERS are converted in a dynamcial list, so we can then easy add new busses to this list. Also we define a "i2c_bus" environment variable, which contains i2c busses, that gets added when relocating. This is needed for the keymile boards. There are a lot of board versions which differ only in the i2c bus topology. With this approach, we can use one u-boot binary for all board versions, just defining the i2c bus topology in the environment ... BTW: This is also a point for using "cur_adap", because the rest of the multibus functionality doesn;t have to be changed ... So, I hope I didn;t forget something ... lets start with the discussion ... bye heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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[U-Boot] [PATCH] cmd_i2c: bugfix: add missing brace
by Alessandro Rubini 18 Jul '09

18 Jul '09

From: Alessandro Rubini <rubini-list(a)gnudd.com> The sub-command parser missed a brace, so "return 0;" is always taken and no error message is diplayed if you say "i2c scan" instead of "i2c probe", for example. Proper brace is added. Also, a misleading and unneeded else is removed. Signed-off-by: Alessandro Rubini <rubini(a)gnudd.com.it> --- common/cmd_i2c.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c index ae26845..8f0fc9e 100644 --- a/common/cmd_i2c.c +++ b/common/cmd_i2c.c @@ -1282,17 +1282,17 @@ int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) return do_i2c_crc(cmdtp, flag, argc, argv); if (!strncmp(argv[0], "pr", 2)) return do_i2c_probe(cmdtp, flag, argc, argv); - if (!strncmp(argv[0], "re", 2)) + if (!strncmp(argv[0], "re", 2)) { i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 0; + } if (!strncmp(argv[0], "lo", 2)) return do_i2c_loop(cmdtp, flag, argc, argv); #if defined(CONFIG_CMD_SDRAM) if (!strncmp(argv[0], "sd", 2)) return do_sdram(cmdtp, flag, argc, argv); #endif - else - cmd_usage(cmdtp); + cmd_usage(cmdtp); return 0; } -- 1.6.0.2

2 1

[U-Boot] USB Device Port not working in MPC8280 PowerPC
by Gurumurthy Gowdar 18 Jul '09

18 Jul '09

Dear All, am facing problem on writing USB device port driver for MPC8280,when i connect it to the host PC through USB cable .device descriptor is happening host is setting the address but device configuration is not happening properly...it hangs there in USB busy handler. below is the output of the snippet in hyperterminal for usb debugging Debug statements GetDescriptor request length = 0x40 Device Descriptor... bd status = 3ec0 In TX USB event register = 108 Recieved PID token = 0x3cc0 USB:SetAddress 2 bd status = 3800 bd status = 3ac0 In TX USB event register = 108 GetDescriptor request length = 0x12 Device Descriptor... bd status = 3ec0 In TX USB event register = 109 Recieved PID token = 0x3cc0 In USB_BUSY HANDLER : 0x108 it hangs in usb busy handler , am feeling data pid toggling may be the issue. please help me out to sort this issue....let me know if any codes are available for USB Device & USB Host testing for MPC8280. am testing in FreeScale Code Warrior IDE waiting for the reply ASAP Regards, Gurumurthy -- Gurumurthy Gowdar

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[U-Boot] [PATCH] Add bootstrap command
by Dirk Eibach 17 Jul '09

17 Jul '09

This adds a generic command for programming I2C bootstrap eeproms. Implementation for Canyonlands board is included. Signed-off-by: Dirk Eibach <eibach(a)gdsys.de> --- board/amcc/canyonlands/Makefile | 5 +- board/amcc/canyonlands/bootstrap.c | 177 ++++++------------------------------ common/Makefile | 1 + common/cmd_bootstrap.c | 75 +++++++++++++++ include/bootstrap.h | 36 +++++++ include/configs/canyonlands.h | 6 + 6 files changed, 148 insertions(+), 152 deletions(-) create mode 100644 common/cmd_bootstrap.c create mode 100644 include/bootstrap.h diff --git a/board/amcc/canyonlands/Makefile b/board/amcc/canyonlands/Makefile index 2aeead6..be51cb9 100644 --- a/board/amcc/canyonlands/Makefile +++ b/board/amcc/canyonlands/Makefile @@ -25,10 +25,11 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o -COBJS += bootstrap.o +COBJS-y := $(BOARD).o +COBJS-$(CONFIG_CMD_BOOTSTRAP) += bootstrap.o SOBJS := init.o +COBJS := $(COBJS-y) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) diff --git a/board/amcc/canyonlands/bootstrap.c b/board/amcc/canyonlands/bootstrap.c index 6dc2cca..8731b4e 100644 --- a/board/amcc/canyonlands/bootstrap.c +++ b/board/amcc/canyonlands/bootstrap.c @@ -22,174 +22,51 @@ * */ -#include <common.h> -#include <command.h> -#include <i2c.h> -#include <asm/io.h> - -/* - * NOR and NAND boot options change bytes 5, 6, 8, 9, 11. The - * values are independent of the rest of the clock settings. - */ - -#define NAND_COMPATIBLE 0x01 -#define NOR_COMPATIBLE 0x02 - -#define I2C_EEPROM_ADDR 0x52 - -static char *config_labels[] = { - "CPU: 600 PLB: 200 OPB: 100 EBC: 100", - "CPU: 800 PLB: 200 OPB: 100 EBC: 100", - "CPU:1000 PLB: 200 OPB: 100 EBC: 100", - "CPU:1066 PLB: 266 OPB: 88 EBC: 88", - NULL +#include <bootstrap.h> + +char *bootstrap_config_labels[] = { + "NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100", + "NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100", + "NOR CPU: 800 PLB: 200 OPB: 100 EBC: 100", + "NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100", + "NOR CPU:1000 PLB: 200 OPB: 100 EBC: 100", + "NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100", + "NOR CPU:1066 PLB: 266 OPB: 88 EBC: 88", + "NAND CPU:1066 PLB: 266 OPB: 88 EBC: 88", + "" }; -static u8 boot_configs[][17] = { +u8 bootstrap_configs[][CONFIG_BOOTSTRAP_BLOCKSIZE] = { { - (NAND_COMPATIBLE | NOR_COMPATIBLE), 0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0, 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 }, { - (NAND_COMPATIBLE | NOR_COMPATIBLE), + 0x86, 0x80, 0xce, 0x1f, 0x79, 0x90, 0x01, 0xa0, 0xa0, 0xe8, + 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 + }, + { 0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0, 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 }, { - (NAND_COMPATIBLE | NOR_COMPATIBLE), + 0x86, 0x80, 0xba, 0x14, 0x99, 0x90, 0x01, 0xa0, 0xa0, 0xe8, + 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 + }, + { 0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0, 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 }, { - (NAND_COMPATIBLE | NOR_COMPATIBLE), + 0x86, 0x82, 0x96, 0x19, 0xb9, 0x90, 0x01, 0xa0, 0xa0, 0xe8, + 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 + }, + { 0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0, 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 }, { - 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 + 0x86, 0x80, 0xb3, 0x01, 0x9d, 0x90, 0x01, 0xa0, 0xa0, 0xe8, + 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 } }; - -/* - * Bytes 5,6,8,9,11 change for NAND boot - */ -#if 0 -/* - * Values for 512 page size NAND chips, not used anymore, just - * keep them here for reference - */ -static u8 nand_boot[] = { - 0x90, 0x01, 0xa0, 0x68, 0x58 -}; -#else -/* - * Values for 2k page size NAND chips - */ -static u8 nand_boot[] = { - 0x90, 0x01, 0xa0, 0xe8, 0x58 -}; -#endif - -static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - u8 *buf, b_nand; - int x, y, nbytes, selcfg; - extern char console_buffer[]; - - if (argc < 2) { - cmd_usage(cmdtp); - return 1; - } - - if ((strcmp(argv[1], "nor") != 0) && - (strcmp(argv[1], "nand") != 0)) { - printf("Unsupported boot-device - only nor|nand support\n"); - return 1; - } - - /* set the nand flag based on provided input */ - if ((strcmp(argv[1], "nand") == 0)) - b_nand = 1; - else - b_nand = 0; - - printf("Available configurations: \n\n"); - - if (b_nand) { - for(x = 0, y = 0; boot_configs[x][0] != 0; x++) { - /* filter on nand compatible */ - if (boot_configs[x][0] & NAND_COMPATIBLE) { - printf(" %d - %s\n", (y+1), config_labels[x]); - y++; - } - } - } else { - for(x = 0, y = 0; boot_configs[x][0] != 0; x++) { - /* filter on nor compatible */ - if (boot_configs[x][0] & NOR_COMPATIBLE) { - printf(" %d - %s\n", (y+1), config_labels[x]); - y++; - } - } - } - - do { - nbytes = readline(" Selection [1-x / quit]: "); - - if (nbytes) { - if (strcmp(console_buffer, "quit") == 0) - return 0; - selcfg = simple_strtol(console_buffer, NULL, 10); - if ((selcfg < 1) || (selcfg > y)) - nbytes = 0; - } - } while (nbytes == 0); - - - y = (selcfg - 1); - - for (x = 0; boot_configs[x][0] != 0; x++) { - if (b_nand) { - if (boot_configs[x][0] & NAND_COMPATIBLE) { - if (y > 0) - y--; - else if (y < 1) - break; - } - } else { - if (boot_configs[x][0] & NOR_COMPATIBLE) { - if (y > 0) - y--; - else if (y < 1) - break; - } - } - } - - buf = &boot_configs[x][1]; - - if (b_nand) { - buf[5] = nand_boot[0]; - buf[6] = nand_boot[1]; - buf[8] = nand_boot[2]; - buf[9] = nand_boot[3]; - buf[11] = nand_boot[4]; - } - - if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0) - printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR); - udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); - - printf("Done\n"); - printf("Please power-cycle the board for the changes to take effect\n"); - - return 0; -} - -U_BOOT_CMD( - bootstrap, 2, 0, do_bootstrap, - "program the I2C bootstrap EEPROM", - "<nand|nor> - strap to boot from NAND or NOR flash" -); diff --git a/common/Makefile b/common/Makefile index c8e5d26..0a9a17b 100644 --- a/common/Makefile +++ b/common/Makefile @@ -71,6 +71,7 @@ COBJS-$(CONFIG_CMD_BDI) += cmd_bdinfo.o COBJS-$(CONFIG_CMD_BEDBUG) += bedbug.o cmd_bedbug.o COBJS-$(CONFIG_CMD_BMP) += cmd_bmp.o COBJS-$(CONFIG_CMD_BOOTLDR) += cmd_bootldr.o +COBJS-$(CONFIG_CMD_BOOTSTRAP) += cmd_bootstrap.o COBJS-$(CONFIG_CMD_CACHE) += cmd_cache.o COBJS-$(CONFIG_CMD_CONSOLE) += cmd_console.o COBJS-$(CONFIG_CMD_CPLBINFO) += cmd_cplbinfo.o diff --git a/common/cmd_bootstrap.c b/common/cmd_bootstrap.c new file mode 100644 index 0000000..6fceb23 --- /dev/null +++ b/common/cmd_bootstrap.c @@ -0,0 +1,75 @@ +/* + * (C) Copyright 2009 + * Dirk Eibach, Guntermann & Drunck GmbH, eibach(a)gdsys.de + * + * based on code (C) Copyright 2008 + * Stefan Roese, DENX Software Engineering, sr(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <bootstrap.h> +#include <common.h> +#include <command.h> +#include <i2c.h> +#include <asm/io.h> + +static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int x, nbytes, selcfg; + extern char console_buffer[]; + + printf("Available configurations: \n\n"); + + for (x = 0; bootstrap_config_labels[x][0] != 0; x++) + printf(" %d - %s\n", (x+1), bootstrap_config_labels[x]); + + do { + nbytes = readline(" Selection [1-x / quit]: "); + + if (nbytes) { + if (strcmp(console_buffer, "quit") == 0) + return 0; + selcfg = simple_strtol(console_buffer, NULL, 10); + if ((selcfg < 1) || (selcfg > x)) + nbytes = 0; + } + } while (nbytes == 0); + + + x = (selcfg - 1); + + if (i2c_write(CONFIG_BOOTSTRAP_I2C_EEPROM_ADDR, 0, 1, + bootstrap_configs[x], CONFIG_BOOTSTRAP_BLOCKSIZE) != 0) + printf("Error writing to EEPROM at address 0x%x\n", + CONFIG_BOOTSTRAP_I2C_EEPROM_ADDR); + udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); + + printf("Done\n"); + printf("Please power-cycle the board for the changes to take effect\n"); + + return 0; +} + +U_BOOT_CMD( + bootstrap, 1, 0, do_bootstrap, + "program the I2C bootstrap EEPROM", + "" +); diff --git a/include/bootstrap.h b/include/bootstrap.h new file mode 100644 index 0000000..61919dc --- /dev/null +++ b/include/bootstrap.h @@ -0,0 +1,36 @@ +/* + * (C) Copyright 2009 + * Dirk Eibach, Guntermann & Drunck GmbH, eibach(a)gdsys.de + * + * based on code (C) Copyright 2008 + * Stefan Roese, DENX Software Engineering, sr(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __BOOTSTRAP_H +#define __BOOTSTRAP_H + +#include <common.h> + +extern char *bootstrap_config_labels[]; +extern u8 bootstrap_configs[][CONFIG_BOOTSTRAP_BLOCKSIZE]; + +#endif /* __BOOTSTRAP_H */ diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index 48c5198..ab0bd59 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -330,6 +330,9 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 +#define CONFIG_BOOTSTRAP_I2C_EEPROM_ADDR 0x54 +#define CONFIG_BOOTSTRAP_BLOCKSIZE 16 + /* I2C SYSMON (LM75, AD7414 is almost compatible) */ #define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */ #define CONFIG_DTT_AD7414 1 /* use AD7414 */ @@ -443,10 +446,12 @@ * Commands additional to the ones defined in amcc-common.h */ #if defined(CONFIG_ARCHES) +#define CONFIG_CMD_BOOTSTRAP #define CONFIG_CMD_DTT #define CONFIG_CMD_PCI #define CONFIG_CMD_SDRAM #elif defined(CONFIG_CANYONLANDS) +#define CONFIG_CMD_BOOTSTRAP #define CONFIG_CMD_DATE #define CONFIG_CMD_DTT #define CONFIG_CMD_EXT2 @@ -457,6 +462,7 @@ #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB #elif defined(CONFIG_GLACIER) +#define CONFIG_CMD_BOOTSTRAP #define CONFIG_CMD_DATE #define CONFIG_CMD_DTT #define CONFIG_CMD_NAND -- 1.5.6.5

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[U-Boot] Pull request: u-boot-video
by Anatolij Gustschin 17 Jul '09

17 Jul '09

Dear Wolfgang, The following changes since commit bfadb17f69c256196620c32164775f063a59c34f: Anton Vorontsov (1): mpc83xx: MPC837xEMDS: Use hwconfig instead of pci_external_arbiter variable are available in the git repository at: git://git.denx.de/u-boot-video.git master Anatolij Gustschin (3): video: mb862xx: fix coding style and remove dead code video: mb862xx: use macros instead of magic numbers video: mb862xx: replace printf with puts Matthias Weisser (1): Added support for splash screen positioning README | 20 +++ common/lcd.c | 39 ++++++- drivers/video/cfb_console.c | 36 ++++++- drivers/video/mb862xx.c | 271 +++++++++++++++++++++++-------------------- include/mb862xx.h | 69 +++++++++++ 5 files changed, 304 insertions(+), 131 deletions(-) Best regards, Anatolij

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[U-Boot] [GIT PULL] Please pull microblaze
by Michal Simek 17 Jul '09

17 Jul '09

Hi Wolfgang, please pull the following changes. Thanks, Michal The following changes since commit bfadb17f69c256196620c32164775f063a59c34f: Anton Vorontsov (1): mpc83xx: MPC837xEMDS: Use hwconfig instead of pci_external_arbiter variable are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master Michal Simek (2): microblaze: Removed unused variables microblaze: Remove ignored return type for __arch__swab16 function include/asm-microblaze/byteorder.h | 4 +++- lib_microblaze/board.c | 4 ---- 2 files changed, 3 insertions(+), 5 deletions(-) -- Michal Simek, Ing. (M.Eng) w: www.monstr.eu p: +42-0-721842854

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[U-Boot] [PATCH 2/2 v2] Remove legacy NAND and disk on chip references from boards.
by Scott Wood 17 Jul '09

17 Jul '09

Signed-off-by: Scott Wood <scottwood(a)freescale.com> --- Fixed some board breakages found by the overnight MAKEALL. In particular, removed doc_probe() invocations (some of which weren't ifdeffed) and removed some CONFIG_CMD_NANDs that got left in on a few boards which were legacy NAND. board/delta/nand.c | 4 -- board/esd/common/auto_update.c | 50 ------------------- board/g2000/g2000.c | 15 ------ board/netphone/netphone.c | 16 ------ board/netta/netta.c | 15 ------ board/netta2/netta2.c | 16 ------ board/netvia/netvia.c | 15 ------ board/omap2420h4/omap2420h4.c | 23 --------- board/samsung/smdk6400/smdk6400.c | 11 ---- board/sixnet/sixnet.c | 5 -- board/stxxtc/stxxtc.c | 16 ------ board/zylonite/nand.c | 4 -- include/configs/BMW.h | 4 -- include/configs/CATcenter.h | 8 --- include/configs/CPU86.h | 10 ---- include/configs/CPU87.h | 4 -- include/configs/G2000.h | 20 ------- include/configs/GEN860T.h | 17 ------ include/configs/MIP405.h | 10 ---- include/configs/NETPHONE.h | 86 -------------------------------- include/configs/NETTA.h | 99 ------------------------------------- include/configs/NETTA2.h | 86 -------------------------------- include/configs/NETVIA.h | 74 --------------------------- include/configs/PCIPPC2.h | 12 ----- include/configs/PCIPPC6.h | 12 ----- include/configs/PIP405.h | 4 -- include/configs/PM520.h | 19 ------- include/configs/PM826.h | 14 ----- include/configs/PM828.h | 13 ----- include/configs/PPChameleonEVB.h | 26 ---------- include/configs/RBC823.h | 9 --- include/configs/SXNI855T.h | 67 ------------------------- include/configs/TQM85xx.h | 2 - include/configs/VCMA9.h | 38 -------------- include/configs/at91rm9200dk.h | 30 ----------- include/configs/csb637.h | 32 ------------ include/configs/delta.h | 9 --- include/configs/m501sk.h | 5 -- include/configs/omap2420h4.h | 36 ------------- include/configs/sbc2410x.h | 23 --------- include/configs/stxxtc.h | 82 ------------------------------ include/configs/svm_sc8xx.h | 4 -- include/configs/zylonite.h | 8 --- 43 files changed, 0 insertions(+), 1053 deletions(-) diff --git a/board/delta/nand.c b/board/delta/nand.c index aff7c54..e87d502 100644 --- a/board/delta/nand.c +++ b/board/delta/nand.c @@ -23,7 +23,6 @@ #include <common.h> #if defined(CONFIG_CMD_NAND) -#if !defined(CONFIG_NAND_LEGACY) #include <nand.h> #include <asm/arch/pxa-regs.h> @@ -550,7 +549,4 @@ int board_nand_init(struct nand_chip *nand) return 0; } -#else - #error "U-Boot legacy NAND support not available for Monahans DFC." -#endif #endif diff --git a/board/esd/common/auto_update.c b/board/esd/common/auto_update.c index 33aeb46..c4a49e2 100644 --- a/board/esd/common/auto_update.c +++ b/board/esd/common/auto_update.c @@ -27,9 +27,6 @@ #include <command.h> #include <image.h> #include <asm/byteorder.h> -#if defined(CONFIG_NAND_LEGACY) -#include <linux/mtd/nand_legacy.h> -#endif #include <fat.h> #include <part.h> @@ -58,20 +55,6 @@ extern int flash_sect_erase(ulong, ulong); extern int flash_sect_protect (int, ulong, ulong); extern int flash_write (char *, ulong, ulong); -#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY) -/* references to names in cmd_nand.c */ -#define NANDRW_READ 0x01 -#define NANDRW_WRITE 0x00 -#define NANDRW_JFFS2 0x02 -#define NANDRW_JFFS2_SKIP 0x04 -extern struct nand_chip nand_dev_desc[]; -extern int nand_legacy_rw(struct nand_chip* nand, int cmd, - size_t start, size_t len, - size_t * retlen, u_char * buf); -extern int nand_legacy_erase(struct nand_chip* nand, size_t ofs, - size_t len, int clean); -#endif - extern block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE]; int au_check_cksum_valid(int i, long nbytes) @@ -158,9 +141,6 @@ int au_do_update(int i, long sz) int off, rc; uint nbytes; int k; -#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY) - int total; -#endif hdr = (image_header_t *)LOAD_ADDR; #if defined(CONFIG_FIT) @@ -240,15 +220,6 @@ int au_do_update(int i, long sz) au_image[i].name); debug ("flash_sect_erase(%lx, %lx);\n", start, end); flash_sect_erase (start, end); - } else { -#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY) - printf ("Updating NAND FLASH with image %s\n", - au_image[i].name); - debug ("nand_legacy_erase(%lx, %lx);\n", start, end); - rc = nand_legacy_erase (nand_dev_desc, start, - end - start + 1, 0); - debug ("nand_legacy_erase returned %x\n", rc); -#endif } udelay(10000); @@ -273,18 +244,7 @@ int au_do_update(int i, long sz) rc = flash_write ((char *)addr, start, (nbytes + 1) & ~1); } else { -#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY) - debug ("nand_legacy_rw(%p, %lx, %x)\n", - addr, start, nbytes); - rc = nand_legacy_rw (nand_dev_desc, - NANDRW_WRITE | NANDRW_JFFS2, - start, nbytes, (size_t *)&total, - (uchar *)addr); - debug ("nand_legacy_rw: ret=%x total=%d nbytes=%d\n", - rc, total, nbytes); -#else rc = -1; -#endif } if (rc != 0) { printf ("Flashing failed due to error %d\n", rc); @@ -297,16 +257,6 @@ int au_do_update(int i, long sz) if (au_image[i].type != AU_NAND) { rc = crc32 (0, (uchar *)(start + off), image_get_data_size (hdr)); - } else { -#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY) - rc = nand_legacy_rw (nand_dev_desc, - NANDRW_READ | NANDRW_JFFS2 | - NANDRW_JFFS2_SKIP, - start, nbytes, (size_t *)&total, - (uchar *)addr); - rc = crc32 (0, (uchar *)(addr + off), - image_get_data_size (hdr)); -#endif } if (rc != image_get_dcrc (hdr)) { printf ("Image %s Bad Data Checksum After COPY\n", diff --git a/board/g2000/g2000.c b/board/g2000/g2000.c index 218f1be..f6f4719 100644 --- a/board/g2000/g2000.c +++ b/board/g2000/g2000.c @@ -148,21 +148,6 @@ phys_size_t initdram (int board_type) return ret; } - -#if defined(CONFIG_CMD_NAND) -#include <linux/mtd/nand_legacy.h> -extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; - -void nand_init(void) -{ - nand_probe(CONFIG_SYS_NAND_BASE); - if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) { - print_size(nand_dev_desc[0].totlen, "\n"); - } -} -#endif - - #if 0 /* test-only !!! */ int do_dumpebc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { diff --git a/board/netphone/netphone.c b/board/netphone/netphone.c index 53d3172..ce5f051 100644 --- a/board/netphone/netphone.c +++ b/board/netphone/netphone.c @@ -597,22 +597,6 @@ int board_early_init_f(void) return 0; } -#if defined(CONFIG_CMD_NAND) - -#include <linux/mtd/nand_legacy.h> - -extern ulong nand_probe(ulong physadr); -extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; - -void nand_init(void) -{ - unsigned long totlen; - - totlen = nand_probe(CONFIG_SYS_NAND_BASE); - printf ("%4lu MB\n", totlen >> 20); -} -#endif - #ifdef CONFIG_HW_WATCHDOG void hw_watchdog_reset(void) diff --git a/board/netta/netta.c b/board/netta/netta.c index 02fd94c..38c9d89 100644 --- a/board/netta/netta.c +++ b/board/netta/netta.c @@ -555,21 +555,6 @@ int board_early_init_f(void) return 0; } -#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY) - -#include <linux/mtd/nand_legacy.h> - -extern ulong nand_probe(ulong physadr); -extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; - -void nand_init(void) -{ - unsigned long totlen = nand_probe(CONFIG_SYS_NAND_BASE); - - printf ("%4lu MB\n", totlen >> 20); -} -#endif - #if defined(CONFIG_CMD_PCMCIA) int pcmcia_init(void) diff --git a/board/netta2/netta2.c b/board/netta2/netta2.c index 2ce33cf..3b0191d 100644 --- a/board/netta2/netta2.c +++ b/board/netta2/netta2.c @@ -595,22 +595,6 @@ int board_early_init_f(void) return 0; } -#if defined(CONFIG_CMD_NAND) - -#include <linux/mtd/nand_legacy.h> - -extern ulong nand_probe(ulong physadr); -extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; - -void nand_init(void) -{ - unsigned long totlen; - - totlen = nand_probe(CONFIG_SYS_NAND_BASE); - printf ("%4lu MB\n", totlen >> 20); -} -#endif - #ifdef CONFIG_HW_WATCHDOG void hw_watchdog_reset(void) diff --git a/board/netvia/netvia.c b/board/netvia/netvia.c index 0b032c4..5606996 100644 --- a/board/netvia/netvia.c +++ b/board/netvia/netvia.c @@ -415,18 +415,3 @@ int board_early_init_f(void) return 0; } - -#if defined(CONFIG_CMD_NAND) - -#include <linux/mtd/nand_legacy.h> - -extern ulong nand_probe(ulong physadr); -extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; - -void nand_init(void) -{ - unsigned long totlen = nand_probe(CONFIG_SYS_NAND_BASE); - - printf ("%4lu MB\n", totlen >> 20); -} -#endif diff --git a/board/omap2420h4/omap2420h4.c b/board/omap2420h4/omap2420h4.c index 0fe9380..8d18239 100644 --- a/board/omap2420h4/omap2420h4.c +++ b/board/omap2420h4/omap2420h4.c @@ -31,10 +31,6 @@ #include <asm/arch/mem.h> #include <i2c.h> #include <asm/mach-types.h> -#if defined(CONFIG_CMD_NAND) -#include <linux/mtd/nand_legacy.h> -extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; -#endif DECLARE_GLOBAL_DATA_PTR; @@ -846,22 +842,3 @@ void update_mux(u32 btype,u32 mtype) } } } - -#if defined(CONFIG_CMD_NAND) -void nand_init(void) -{ - extern flash_info_t flash_info[]; - - nand_probe(CONFIG_SYS_NAND_ADDR); - if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) { - print_size(nand_dev_desc[0].totlen, "\n"); - } - -#ifdef CONFIG_SYS_JFFS2_MEM_NAND - flash_info[CONFIG_SYS_JFFS2_FIRST_BANK].flash_id = nand_dev_desc[0].id; - flash_info[CONFIG_SYS_JFFS2_FIRST_BANK].size = 1024*1024*2; /* only read kernel single meg partition */ - flash_info[CONFIG_SYS_JFFS2_FIRST_BANK].sector_count = 1024; /* 1024 blocks in 16meg chip (use less for raw/copied partition) */ - flash_info[CONFIG_SYS_JFFS2_FIRST_BANK].start[0] = 0x80200000; /* ?, ram for now, open question, copy to RAM or adapt for NAND */ -#endif -} -#endif diff --git a/board/samsung/smdk6400/smdk6400.c b/board/samsung/smdk6400/smdk6400.c index bd2e45a..52cd174 100644 --- a/board/samsung/smdk6400/smdk6400.c +++ b/board/samsung/smdk6400/smdk6400.c @@ -107,17 +107,6 @@ ulong virt_to_phy_smdk6400(ulong addr) } #endif -#if defined(CONFIG_CMD_NAND) && defined(CONFIG_SYS_NAND_LEGACY) -#include <linux/mtd/nand.h> -extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; -void nand_init(void) -{ - nand_probe(CONFIG_SYS_NAND_BASE); - if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) - print_size(nand_dev_desc[0].totlen, "\n"); -} -#endif - ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t *info) { if (banknum == 0) { /* non-CFI boot flash */ diff --git a/board/sixnet/sixnet.c b/board/sixnet/sixnet.c index 6e39b01..edb5d13 100644 --- a/board/sixnet/sixnet.c +++ b/board/sixnet/sixnet.c @@ -33,11 +33,6 @@ # include <status_led.h> #endif -#if defined(CONFIG_CMD_NAND) -#include <linux/mtd/nand_legacy.h> -extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; -#endif - DECLARE_GLOBAL_DATA_PTR; #define ORMASK(size) ((-size) & OR_AM_MSK) diff --git a/board/stxxtc/stxxtc.c b/board/stxxtc/stxxtc.c index a1a36c4..717dbe2 100644 --- a/board/stxxtc/stxxtc.c +++ b/board/stxxtc/stxxtc.c @@ -574,22 +574,6 @@ int board_early_init_f(void) return 0; } -#if defined(CONFIG_CMD_NAND) - -#include <linux/mtd/nand_legacy.h> - -extern ulong nand_probe(ulong physadr); -extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; - -void nand_init(void) -{ - unsigned long totlen; - - totlen = nand_probe(CONFIG_SYS_NAND_BASE); - printf ("%4lu MB\n", totlen >> 20); -} -#endif - #ifdef CONFIG_HW_WATCHDOG void hw_watchdog_reset(void) diff --git a/board/zylonite/nand.c b/board/zylonite/nand.c index 899445e..bec54cb 100644 --- a/board/zylonite/nand.c +++ b/board/zylonite/nand.c @@ -23,7 +23,6 @@ #include <common.h> #if defined(CONFIG_CMD_NAND) -#ifdef CONFIG_NEW_NAND_CODE #include <nand.h> #include <asm/arch/pxa-regs.h> @@ -554,7 +553,4 @@ int board_nand_init(struct nand_chip *nand) return 0; } -#else - #error "U-Boot legacy NAND support not available for Monahans DFC." -#endif #endif diff --git a/include/configs/BMW.h b/include/configs/BMW.h index 24ffb00..98f6396 100644 --- a/include/configs/BMW.h +++ b/include/configs/BMW.h @@ -81,13 +81,9 @@ #include <config_cmd_default.h> #define CONFIG_CMD_DATE -#define CONFIG_CMD_DOC #define CONFIG_CMD_ELF -/* CONFIG_CMD_DOC required legacy NAND support */ -#define CONFIG_NAND_LEGACY - #if 0 #define CONFIG_PCI 1 #define CONFIG_PCI_PNP 1 /* PCI plug-and-play */ diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 39f41e6..229a513 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -209,16 +209,8 @@ /* For CATcenter there is only NAND on the module */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 #define NAND_NO_RB -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - #define CONFIG_SYS_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */ #define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ #define CONFIG_SYS_NAND0_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */ diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h index cf21fd9..6d76d9f 100644 --- a/include/configs/CPU86.h +++ b/include/configs/CPU86.h @@ -146,15 +146,6 @@ #undef CONFIG_WATCHDOG /* watchdog disabled */ /*----------------------------------------------------------------------- - * Disk-On-Chip configuration - */ - -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ - -#define CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM - -/*----------------------------------------------------------------------- * Miscellaneous configuration options */ @@ -179,7 +170,6 @@ #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DOC #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C #define CONFIG_CMD_NFS diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h index 489378a..83b010c 100644 --- a/include/configs/CPU87.h +++ b/include/configs/CPU87.h @@ -182,7 +182,6 @@ #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_DATE -#define CONFIG_CMD_DOC #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C @@ -190,9 +189,6 @@ #define CONFIG_CMD_PCI #endif - -#define CONFIG_NAND_LEGACY - /* * Miscellaneous configurable options */ diff --git a/include/configs/G2000.h b/include/configs/G2000.h index bf9fd82..6819c3e 100644 --- a/include/configs/G2000.h +++ b/include/configs/G2000.h @@ -196,32 +196,12 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 #define CONFIG_SYS_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */ #define CONFIG_SYS_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ #define CONFIG_SYS_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */ #define CONFIG_SYS_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */ -#define NAND_DISABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_CE);} while(0) -#define NAND_ENABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_NAND_CE);} while(0) -#define NAND_CTL_CLRALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_NAND_ALE);} while(0) -#define NAND_CTL_SETALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_ALE);} while(0) -#define NAND_CTL_CLRCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_NAND_CLE);} while(0) -#define NAND_CTL_SETCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_CLE);} while(0) -#define NAND_WAIT_READY(nand) while (!(in32(GPIO0_IR) & CONFIG_SYS_NAND_RDY)) - -#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0) -#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0) -#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0) -#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr)) #endif /*----------------------------------------------------------------------- diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h index 8f18ab2..12f879a 100644 --- a/include/configs/GEN860T.h +++ b/include/configs/GEN860T.h @@ -244,10 +244,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_BEDBUG -#if !defined(CONFIG_SC) - #define CONFIG_CMD_DOC -#endif - #ifdef CONFIG_POST #define CONFIG_CMD_DIAG #endif @@ -279,9 +275,6 @@ #define CONFIG_FPGA_VIRTEX2 #define CONFIG_SYS_FPGA_PROG_FEEDBACK - -#define CONFIG_NAND_LEGACY - /* * Verbose help from command monitor. */ @@ -738,16 +731,6 @@ #define BOOTFLAG_WARM 0x02 /* Software reboot */ /* - * Disk On Chip (millenium) configuration - */ -#if !defined(CONFIG_SC) -#define CONFIG_SYS_MAX_DOC_DEVICE 1 -#undef CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM -#undef CONFIG_SYS_DOC_PASSIVE_PROBE -#endif - -/* * FEC interrupt assignment */ #define FEC_INTERRUPT SIU_LEVEL1 diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index 8315cfe..264e0e7 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -84,12 +84,9 @@ #if !defined(CONFIG_MIP405T) #define CONFIG_CMD_USB - #define CONFIG_CMD_DOC #endif -#define CONFIG_NAND_LEGACY - #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /************************************************************** @@ -384,13 +381,6 @@ #define CONFIG_ISO_PARTITION /* Experimental */ /************************************************************ - * Disk-On-Chip configuration - ************************************************************/ -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ -#define CONFIG_SYS_DOC_SHORT_TIMEOUT -#define CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM -/************************************************************ * Keyboard support ************************************************************/ #undef CONFIG_ISA_KEYBOARD diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h index 796938a..8a197ad 100644 --- a/include/configs/NETPHONE.h +++ b/include/configs/NETPHONE.h @@ -497,95 +497,9 @@ #define DSP_BASE 0xF1000000 #define NAND_BASE 0xF1010000 -/****************************************************************/ - -/* NAND */ -#define CONFIG_NAND_LEGACY -#define CONFIG_SYS_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_ECC_JFFS2 -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_MTD_NAND_UNSAFE - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -/* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */ -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 20)); \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 20)); \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 17)); \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 17)); \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 18)); \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 18)); \ - } while(0) - -#if CONFIG_NETPHONE_VERSION == 1 -#define NAND_WAIT_READY(nand) \ - do { \ - int _tries = 0; \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat & (1 << (31 - 31))) == 0) \ - if (++_tries > 100000) \ - break; \ - } while (0) -#elif CONFIG_NETPHONE_VERSION == 2 -#define NAND_WAIT_READY(nand) \ - do { \ - int _tries = 0; \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 15))) == 0) \ - if (++_tries > 100000) \ - break; \ - } while (0) -#endif - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - /*****************************************************************************/ #define CONFIG_SYS_DIRECT_FLASH_TFTP -#define CONFIG_SYS_DIRECT_NAND_TFTP /*****************************************************************************/ diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 724e807..dda6179 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -616,105 +616,6 @@ #define ER_BASE 0xF1020000 #define DUMMY_BASE 0xF1FF0000 -/****************************************************************/ - -/* NAND */ -#define CONFIG_NAND_LEGACY -#define CONFIG_SYS_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_MTD_NAND_UNSAFE - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -/* #define NAND_NO_RB */ - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -/* ALE = PD3, CLE = PD4, CE = PD5, F_RY_BY = PC13 */ -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= (1 << (15 - 5)); \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~(1 << (15 - 5)); \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~(1 << (15 - 3)); \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= (1 << (15 - 3)); \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~(1 << (15 - 4)); \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= (1 << (15 - 4)); \ - } while(0) - -#ifndef NAND_NO_RB -#define NAND_WAIT_READY(nand) \ - do { \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 13))) == 0) { \ - WATCHDOG_RESET(); \ - } \ - } while (0) -#else -#define NAND_WAIT_READY(nand) udelay(12) -#endif - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - -#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */ -#define NAND_CACHE_PAGES 16 /* size of nand cache in 512 bytes pages */ - -/* - * JFFS2 partitions - * - */ -/* No command line, one static partition, whole device */ -#undef CONFIG_CMD_MTDPARTS -#define CONFIG_JFFS2_DEV "nand0" -#define CONFIG_JFFS2_PART_SIZE 0x00100000 -#define CONFIG_JFFS2_PART_OFFSET 0x00200000 - -/* mtdparts command line support */ -/* Note: fake mtd_id used, no linux mtd map file */ -/* -#define CONFIG_CMD_MTDPARTS -#define MTDIDS_DEFAULT "nand0=netta-nand" -#define MTDPARTS_DEFAULT "mtdparts=netta-nand:1m@2m(jffs2)" -*/ - /*****************************************************************************/ #define CONFIG_SYS_DIRECT_FLASH_TFTP diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index a14b2dd..167285e 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -498,95 +498,9 @@ #define DSP_BASE 0xF1000000 #define NAND_BASE 0xF1010000 -/****************************************************************/ - -/* NAND */ -#define CONFIG_NAND_LEGACY -#define CONFIG_SYS_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_ECC_JFFS2 -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_MTD_NAND_UNSAFE - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -/* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */ -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 20)); \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 20)); \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 17)); \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 17)); \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 18)); \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 18)); \ - } while(0) - -#if CONFIG_NETTA2_VERSION == 1 -#define NAND_WAIT_READY(nand) \ - do { \ - int _tries = 0; \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat & (1 << (31 - 31))) == 0) \ - if (++_tries > 100000) \ - break; \ - } while (0) -#elif CONFIG_NETTA2_VERSION == 2 -#define NAND_WAIT_READY(nand) \ - do { \ - int _tries = 0; \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 15))) == 0) \ - if (++_tries > 100000) \ - break; \ - } while (0) -#endif - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - /*****************************************************************************/ #define CONFIG_SYS_DIRECT_FLASH_TFTP -#define CONFIG_SYS_DIRECT_NAND_TFTP /*****************************************************************************/ diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h index f97bdcb..b9cf621 100644 --- a/include/configs/NETVIA.h +++ b/include/configs/NETVIA.h @@ -393,80 +393,6 @@ #endif -/*****************************************************************************/ - -#define CONFIG_NAND_LEGACY - -#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2 - -/* NAND */ -#define CONFIG_SYS_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_ECC_JFFS2 - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0040; \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0040; \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0100; \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0100; \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0080; \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0080; \ - } while(0) - -#define NAND_WAIT_READY(nand) \ - do { \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & 0x100) == 0) \ - ; \ - } while (0) - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - -#endif /*****************************************************************************/ diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h index 5951d00..99a8c4a 100644 --- a/include/configs/PCIPPC2.h +++ b/include/configs/PCIPPC2.h @@ -75,7 +75,6 @@ #define CONFIG_CMD_BSP #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DOC #define CONFIG_CMD_ELF #define CONFIG_CMD_NFS #define CONFIG_CMD_PCI @@ -84,8 +83,6 @@ #define CONFIG_PCI 1 #define CONFIG_PCI_PNP 1 /* PCI plug-and-play */ -#define CONFIG_NAND_LEGACY - /* * Miscellaneous configurable options */ @@ -251,15 +248,6 @@ #define BOOTFLAG_WARM 0x02 /* Software reboot */ /*----------------------------------------------------------------------- - * Disk-On-Chip configuration - */ - -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ - -#define CONFIG_SYS_DOC_SUPPORT_2000 -#undef CONFIG_SYS_DOC_SUPPORT_MILLENNIUM - -/*----------------------------------------------------------------------- RTC m48t59 */ #define CONFIG_RTC_MK48T59 diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h index a683a8f..66e6d24 100644 --- a/include/configs/PCIPPC6.h +++ b/include/configs/PCIPPC6.h @@ -75,7 +75,6 @@ #define CONFIG_CMD_BSP #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DOC #define CONFIG_CMD_ELF #define CONFIG_CMD_NFS #define CONFIG_CMD_PCI @@ -86,8 +85,6 @@ #define CONFIG_PCI 1 #define CONFIG_PCI_PNP 1 /* PCI plug-and-play */ -#define CONFIG_NAND_LEGACY - /* * Miscellaneous configurable options */ @@ -253,15 +250,6 @@ #define BOOTFLAG_WARM 0x02 /* Software reboot */ /*----------------------------------------------------------------------- - * Disk-On-Chip configuration - */ - -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ - -#define CONFIG_SYS_DOC_SUPPORT_2000 -#undef CONFIG_SYS_DOC_SUPPORT_MILLENNIUM - -/*----------------------------------------------------------------------- RTC m48t59 */ #define CONFIG_RTC_MK48T59 diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index e214d70..e15ed4a 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -71,14 +71,10 @@ #define CONFIG_CMD_USB #define CONFIG_CMD_MII #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_DOC #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES #define CONFIG_CMD_BSP - -#define CONFIG_NAND_LEGACY - #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /************************************************************** diff --git a/include/configs/PM520.h b/include/configs/PM520.h index ff73ef9..f9687d2 100644 --- a/include/configs/PM520.h +++ b/include/configs/PM520.h @@ -86,12 +86,6 @@ #define CONFIG_USB_STORAGE #endif -#if !defined(CONFIG_BOOT_ROM) -/* DoC requires legacy NAND for now */ -#define CONFIG_NAND_LEGACY -#endif - - /* * BOOTP options */ @@ -117,10 +111,6 @@ #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB -#if !defined(CONFIG_BOOT_ROM) -#define CONFIG_CMD_DOC -#endif - #if defined(CONFIG_MPC5200) #define CONFIG_CMD_PCI #endif @@ -186,15 +176,6 @@ #define CONFIG_RTC_PCF8563 #define CONFIG_SYS_I2C_RTC_ADDR 0x51 -/* - * Disk-On-Chip configuration - */ - -#define CONFIG_SYS_DOC_SHORT_TIMEOUT -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ - -#define CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM #define CONFIG_SYS_DOC_BASE 0xE0000000 #define CONFIG_SYS_DOC_SIZE 0x00100000 diff --git a/include/configs/PM826.h b/include/configs/PM826.h index b58f529..636bd26 100644 --- a/include/configs/PM826.h +++ b/include/configs/PM826.h @@ -169,7 +169,6 @@ #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DOC #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C #define CONFIG_CMD_NFS @@ -179,19 +178,6 @@ #define CONFIG_CMD_PCI #endif - -#define CONFIG_NAND_LEGACY - -/* - * Disk-On-Chip configuration - */ - -#define CONFIG_SYS_DOC_SHORT_TIMEOUT -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ - -#define CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM - /* * Miscellaneous configurable options */ diff --git a/include/configs/PM828.h b/include/configs/PM828.h index 96c86f7..9d620af 100644 --- a/include/configs/PM828.h +++ b/include/configs/PM828.h @@ -169,7 +169,6 @@ #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DOC #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C #define CONFIG_CMD_NFS @@ -179,18 +178,6 @@ #define CONFIG_CMD_PCI #endif - -/* - * Disk-On-Chip configuration - */ -#define CONFIG_NAND_LEGACY - -#define CONFIG_SYS_DOC_SHORT_TIMEOUT -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ - -#define CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM - /* * Miscellaneous configurable options */ diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index 16baf8c..9e54bf8 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -309,32 +309,6 @@ } \ } while(0) -#if 0 -#define SECTORSIZE 512 -#define NAND_NO_RB - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#ifdef NAND_NO_RB -/* constant delay (see also tR in the datasheet) */ -#define NAND_WAIT_READY(nand) do { \ - udelay(12); \ -} while (0) -#else -/* use the R/B pin */ -/* TBD */ -#endif - -#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0) -#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0) -#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0) -#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr)) -#endif /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index f36244d..00ac6cf 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -114,7 +114,6 @@ #define CONFIG_CMD_CDP #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG -#define CONFIG_CMD_DOC #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT @@ -329,14 +328,6 @@ #endif -/************************************************************ - * Disk-On-Chip configuration - ************************************************************/ -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ -#define CONFIG_SYS_DOC_SHORT_TIMEOUT -#define CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM - /*----------------------------------------------------------------------- * *----------------------------------------------------------------------- diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h index cac04b4..8ee8cbf 100644 --- a/include/configs/SXNI855T.h +++ b/include/configs/SXNI855T.h @@ -163,75 +163,8 @@ #define CONFIG_CMD_EEPROM #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NAND #define CONFIG_CMD_DATE - -#define CONFIG_SYS_JFFS2_SORT_FRAGMENTS - -/* - * JFFS2 partitions - * - */ -/* No command line, one static partition */ -#undef CONFIG_CMD_MTDPARTS - -/* -#define CONFIG_JFFS2_DEV "nor0" -#define CONFIG_JFFS2_PART_SIZE 0x00780000 -#define CONFIG_JFFS2_PART_OFFSET 0x00080000 -*/ - -#define CONFIG_JFFS2_DEV "nand0" -#define CONFIG_JFFS2_PART_SIZE 0x00200000 -#define CONFIG_JFFS2_PART_OFFSET 0x00000000 - -/* mtdparts command line support */ -/* Note: fake mtd_id used, no linux mtd map file */ -/* -#define CONFIG_CMD_MTDPARTS -#define MTDIDS_DEFAULT "nor0=sixnet-0,nand0=sixnet-nand" -#define MTDPARTS_DEFAULT "mtdparts=sixnet-0:7680k@512k();sixnet-nand:2m(jffs2-nand)" -*/ - -/* NAND flash support */ -#define CONFIG_NAND_LEGACY -#define CONFIG_MTD_NAND_ECC_JFFS2 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -/* DFBUSY is available on Port C, bit 12; 0 if busy */ -#define NAND_WAIT_READY(nand) \ - while (!(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & 0x0008)); -#define WRITE_NAND_COMMAND(d, adr) WRITE_NAND((d), (adr)) -#define WRITE_NAND_ADDRESS(d, adr) WRITE_NAND((d), (adr)) -#define WRITE_NAND(d, adr) \ - do { (*(volatile uint8_t *)(adr) = (uint8_t)(d)); } while (0) -#define READ_NAND(adr) (*(volatile uint8_t *)(adr)) -#define CLE_LO 0x01 /* 0 selects CLE mode (CLE high) */ -#define ALE_LO 0x02 /* 0 selects ALE mode (ALE high) */ -#define CE_LO 0x04 /* 1 selects chip (CE low) */ -#define nand_setcr(cr, val) do {*(volatile uint8_t*)(cr) = (val);} while (0) -#define NAND_DISABLE_CE(nand) \ - nand_setcr((nand)->IO_ADDR + 1, ALE_LO | CLE_LO) -#define NAND_ENABLE_CE(nand) \ - nand_setcr((nand)->IO_ADDR + 1, CE_LO | ALE_LO | CLE_LO) -#define NAND_CTL_CLRALE(nandptr) \ - nand_setcr((nandptr) + 1, CE_LO | ALE_LO | CLE_LO) -#define NAND_CTL_SETALE(nandptr) \ - nand_setcr((nandptr) + 1, CE_LO | CLE_LO) -#define NAND_CTL_CLRCLE(nandptr) \ - nand_setcr((nandptr) + 1, CE_LO | ALE_LO | CLE_LO) -#define NAND_CTL_SETCLE(nandptr) \ - nand_setcr((nandptr) + 1, CE_LO | ALE_LO) - /* * Miscellaneous configurable options */ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 6f13c63..d44fb07 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -351,8 +351,6 @@ /* NAND FLASH */ #ifdef CONFIG_NAND -#undef CONFIG_NAND_LEGACY - #define CONFIG_NAND_FSL_UPM 1 #define CONFIG_MTD_NAND_ECC_JFFS2 1 /* use JFFS2 ECC */ diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index de3092d..0480913 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -246,42 +246,4 @@ #define MULTI_PURPOSE_SOCKET_ADDR 0x08000000 -/*----------------------------------------------------------------------- - * NAND flash settings - */ -#if defined(CONFIG_CMD_NAND) - -#define CONFIG_NAND_LEGACY -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define NAND_WAIT_READY(nand) NF_WaitRB() - -#define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH) -#define NAND_ENABLE_CE(nand) NF_SetCE(NFCE_LOW) - - -#define WRITE_NAND_COMMAND(d, adr) NF_Cmd(d) -#define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d) -#define WRITE_NAND_ADDRESS(d, adr) NF_Addr(d) -#define WRITE_NAND(d, adr) NF_Write(d) -#define READ_NAND(adr) NF_Read() -/* the following functions are NOP's because S3C24X0 handles this in hardware */ -#define NAND_CTL_CLRALE(nandptr) -#define NAND_CTL_SETALE(nandptr) -#define NAND_CTL_CLRCLE(nandptr) -#define NAND_CTL_SETCLE(nandptr) - -#define CONFIG_MTD_NAND_VERIFY_WRITE 1 -#define CONFIG_MTD_NAND_ECC_JFFS2 1 - -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 56128c1..2017b66 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -117,38 +117,8 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII -#define CONFIG_CMD_NAND - -#define CONFIG_NAND_LEGACY - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ -#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ #include <asm/arch/AT91RM9200.h> /* needed for port definitions */ -#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0) -#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0) - -#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2)) - -#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0) -#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0) -#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0) -#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr)) -/* the following are NOP's in our implementation */ -#define NAND_CTL_CLRALE(nandptr) -#define NAND_CTL_SETALE(nandptr) -#define NAND_CTL_CLRCLE(nandptr) -#define NAND_CTL_SETCLE(nandptr) #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 diff --git a/include/configs/csb637.h b/include/configs/csb637.h index e1cdc7f..7a57696 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -121,38 +121,6 @@ #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_PING -#ifdef NAND_SUPPORT_HAS_BEEN_FIXED /* NAND support is broken / unimplemented */ - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ -#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ - -#include <asm/arch/AT91RM9200.h> /* needed for port definitions */ -#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0) -#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0) - -#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2)) - -#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0) -#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0) -#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0) -#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr)) -/* the following are NOP's in our implementation */ -#define NAND_CTL_CLRALE(nandptr) -#define NAND_CTL_SETALE(nandptr) -#define NAND_CTL_CLRCLE(nandptr) -#define NAND_CTL_SETCLE(nandptr) - -#endif /* NAND_SUPPORT_HAS_BEEN_FIXED */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 diff --git a/include/configs/delta.h b/include/configs/delta.h index e7186e8..9c46c5b 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -220,8 +220,6 @@ /* * NAND Flash */ -#undef CONFIG_NAND_LEGACY - #define CONFIG_SYS_NAND0_BASE 0x0 /* 0x43100040 */ /* 0x10000000 */ #undef CONFIG_SYS_NAND1_BASE @@ -255,13 +253,6 @@ #define CONFIG_MTD_DEBUG #define CONFIG_MTD_DEBUG_VERBOSE 1 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - #define CONFIG_SYS_NO_FLASH 1 #define CONFIG_ENV_IS_IN_NAND 1 diff --git a/include/configs/m501sk.h b/include/configs/m501sk.h index 1e7d90e..32a8194 100644 --- a/include/configs/m501sk.h +++ b/include/configs/m501sk.h @@ -162,11 +162,6 @@ #define CONFIG_SYS_PROMPT_HUSH_PS2 ">>" #define CONFIG_SYS_MAX_NAND_DEVICE 0 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index 1803b13..9c18842 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -147,42 +147,6 @@ #define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_BOOTPATH - -/* - * Board NAND Info. - */ -#define CONFIG_NAND_LEGACY -#define CONFIG_SYS_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/ - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)0x6800A07C = d;} while(0) -#define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)0x6800A080 = d;} while(0) -#define WRITE_NAND(d, adr) do {*(volatile u16 *)0x6800A084 = d;} while(0) -#define READ_NAND(adr) (*(volatile u16 *)0x6800A084) -#define NAND_WAIT_READY(nand) udelay(10) - -#define NAND_NO_RB 1 - -#define CONFIG_SYS_NAND_WP -#define NAND_WP_OFF() do {*(volatile u32 *)(0x6800A050) |= 0x00000010;} while(0) -#define NAND_WP_ON() do {*(volatile u32 *)(0x6800A050) &= ~0x00000010;} while(0) - -#define NAND_CTL_CLRALE(nandptr) -#define NAND_CTL_SETALE(nandptr) -#define NAND_CTL_CLRCLE(nandptr) -#define NAND_CTL_SETCLE(nandptr) -#define NAND_DISABLE_CE(nand) -#define NAND_ENABLE_CE(nand) - #define CONFIG_BOOTDELAY 3 #ifdef NFS_BOOT_DEFAULTS diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h index eab9629..f3dc7fe 100644 --- a/include/configs/sbc2410x.h +++ b/include/configs/sbc2410x.h @@ -201,29 +201,6 @@ #if defined(CONFIG_CMD_NAND) #define CONFIG_NAND_S3C2410 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define NAND_WAIT_READY(nand) NF_WaitRB() -#define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH) -#define NAND_ENABLE_CE(nand) NF_SetCE(NFCE_LOW) -#define WRITE_NAND_COMMAND(d, adr) NF_Cmd(d) -#define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d) -#define WRITE_NAND_ADDRESS(d, adr) NF_Addr(d) -#define WRITE_NAND(d, adr) NF_Write(d) -#define READ_NAND(adr) NF_Read() -/* the following functions are NOP's because S3C24X0 handles this in hardware */ -#define NAND_CTL_CLRALE(nandptr) -#define NAND_CTL_SETALE(nandptr) -#define NAND_CTL_CLRCLE(nandptr) -#define NAND_CTL_SETCLE(nandptr) -/* #undef CONFIG_MTD_NAND_VERIFY_WRITE */ #endif /* CONFIG_CMD_NAND */ #define CONFIG_SETUP_MEMORY_TAGS diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 147233d..d16262b 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -118,7 +118,6 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII -#define CONFIG_CMD_NAND #define CONFIG_CMD_NFS #define CONFIG_CMD_PING @@ -446,90 +445,9 @@ #define NAND_SIZE 0x00010000 /* 64K */ #define NAND_BASE 0xF1000000 -/****************************************************************/ - -/* NAND */ -#define CONFIG_NAND_LEGACY -#define CONFIG_SYS_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_ECC_JFFS2 -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_MTD_NAND_UNSAFE - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#undef NAND_NO_RB - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -/* ALE = PC15, CLE = PB23, CE = PA7, F_RY_BY = PA6 */ -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat) |= (1 << (15 - 7)); \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat) &= ~(1 << (15 - 7)); \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat) &= ~(1 << (15 - 15)); \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat) |= (1 << (15 - 15)); \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbdat) &= ~(1 << (31 - 23)); \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbdat) |= (1 << (31 - 23)); \ - } while(0) - -#ifndef NAND_NO_RB -#define NAND_WAIT_READY(nand) \ - do { \ - int _tries = 0; \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat & (1 << (15 - 6))) == 0) \ - if (++_tries > 100000) \ - break; \ - } while (0) -#else -#define NAND_WAIT_READY(nand) udelay(12) -#endif - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - /*****************************************************************************/ #define CONFIG_SYS_DIRECT_FLASH_TFTP -#define CONFIG_SYS_DIRECT_NAND_TFTP /*****************************************************************************/ diff --git a/include/configs/svm_sc8xx.h b/include/configs/svm_sc8xx.h index 3917a1b..425f472 100644 --- a/include/configs/svm_sc8xx.h +++ b/include/configs/svm_sc8xx.h @@ -147,12 +147,8 @@ #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DOC #define CONFIG_CMD_DATE - -#define CONFIG_NAND_LEGACY - /* * Miscellaneous configurable options */ diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h index 15c3708..0500042 100644 --- a/include/configs/zylonite.h +++ b/include/configs/zylonite.h @@ -193,7 +193,6 @@ /* * NAND Flash */ -#define CONFIG_NEW_NAND_CODE #define CONFIG_SYS_NAND0_BASE 0x0 #undef CONFIG_SYS_NAND1_BASE @@ -227,13 +226,6 @@ #define CONFIG_MTD_DEBUG #define CONFIG_MTD_DEBUG_VERBOSE 1 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - #define CONFIG_SYS_NO_FLASH 1 #define CONFIG_ENV_IS_IN_NAND 1 -- 1.5.6.rc1.6.gc53ad

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[U-Boot] [PATCH] cmd_mmc: make curr_device static
by Mike Frysinger 17 Jul '09

17 Jul '09

The curr_device variable isn't used outside of cmd_mmc, so mark it static to avoid conflicts with other pieces of code (like sata which also exports a curr_device). Otherwise we end up with stuff like: common/libcommon.a(cmd_sata.o):(.data.curr_device+0x0): multiple definition of `curr_device' common/libcommon.a(cmd_mmc.o):(.data.curr_device+0x0): first defined here Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- common/cmd_mmc.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c index 32fe49b..0e3393b 100644 --- a/common/cmd_mmc.c +++ b/common/cmd_mmc.c @@ -26,7 +26,7 @@ #include <mmc.h> #ifndef CONFIG_GENERIC_MMC -int curr_device = -1; +static int curr_device = -1; int do_mmc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { -- 1.6.3.1

2 5

[U-Boot] [PATCH] envcrc: add missing dependencies on env storage
by Mike Frysinger 17 Jul '09

17 Jul '09

When the envcrc building was made conditional, it missed a bunch of env storage types, so add all currently supported types. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- tools/Makefile | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/tools/Makefile b/tools/Makefile index 43c284c..5c764bb 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -69,9 +69,13 @@ include $(TOPDIR)/config.mk BIN_FILES-$(CONFIG_CMD_LOADS) += img2srec$(SFX) BIN_FILES-y += mkimage$(SFX) BIN_FILES-$(CONFIG_ENV_IS_EMBEDDED) += envcrc$(SFX) +BIN_FILES-$(CONFIG_ENV_IS_IN_DATAFLASH) += envcrc$(SFX) BIN_FILES-$(CONFIG_ENV_IS_IN_EEPROM) += envcrc$(SFX) BIN_FILES-$(CONFIG_ENV_IS_IN_FLASH) += envcrc$(SFX) +BIN_FILES-$(CONFIG_ENV_IS_IN_ONENAND) += envcrc$(SFX) +BIN_FILES-$(CONFIG_ENV_IS_IN_NAND) += envcrc$(SFX) BIN_FILES-$(CONFIG_ENV_IS_IN_NVRAM) += envcrc$(SFX) +BIN_FILES-$(CONFIG_ENV_IS_IN_SPI_FLASH) += envcrc$(SFX) BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX) BIN_FILES-$(CONFIG_CMD_NET) += gen_eth_addr$(SFX) BIN_FILES-$(CONFIG_LCD_LOGO) += bmp_logo$(SFX) -- 1.6.3.1

2 1

[U-Boot] [PATCH] eth_receive(): Do not assume that caller always wants full packet.
by Piotr Ziecik 17 Jul '09

17 Jul '09

When packets arrive on the interface that are larger than the buffer being passed to U-Boot from a standalone application, then the eth_receive() returns -1 and leaves the packet saved. The next call to eth_receive() will find that same packet and can fail for the exact same reason. A typical scenario is the loader doing ARP with a buffer of 66 bytes. The end result is that the ARP will fail and the loader panics. This patch fixes above problem by allowing partial packet read. Signed-off-by: Marcel Moolenaar <xcllnt(a)mac.com> Signed-off-by: Piotr Ziecik <kosmo(a)semihalf.com> --- net/eth.c | 5 +---- 1 files changed, 1 insertions(+), 4 deletions(-) diff --git a/net/eth.c b/net/eth.c index 3d93966..f0124f8 100644 --- a/net/eth.c +++ b/net/eth.c @@ -416,10 +416,7 @@ int eth_receive(volatile void *packet, int length) return -1; } - if (length < eth_rcv_bufs[eth_rcv_current].length) - return -1; - - length = eth_rcv_bufs[eth_rcv_current].length; + length = min(length, eth_rcv_bufs[eth_rcv_current].length); for (i = 0; i < length; i++) p[i] = eth_rcv_bufs[eth_rcv_current].data[i]; -- 1.5.2.2

6 9