July 2009 - U-Boot

[U-Boot] [PATCH] 85xx: Enable the DDR3 SPD support for P2020DS board
by Dave Liu 22 Nov '09

22 Nov '09

* The ELPIDA 2GB unbuffered DDR3 SDRAM DIMMs - EBJ21EE8BAFA-AE-E 600MT/s, 667MT/s and 800MT/s passed on P2020DS * Micron 1GB unbuffered DDR3 SDRAM DIMMs - MT9JSF12872AY-1G4D1 600MT/s, 667MT/s and 800MT/s passed on P2020DS Signed-off-by: Dave Liu <daveliu(a)freescale.com> Signed-off-by: Travis Wheatley <Travis.Wheatley(a)freescale.com> --- board/freescale/p2020ds/ddr.c | 34 ++++++++++++++++------------------ include/configs/P2020DS.h | 6 ++++-- 2 files changed, 20 insertions(+), 20 deletions(-) diff --git a/board/freescale/p2020ds/ddr.c b/board/freescale/p2020ds/ddr.c index b9c0cb2..aaff6e8 100644 --- a/board/freescale/p2020ds/ddr.c +++ b/board/freescale/p2020ds/ddr.c @@ -51,27 +51,21 @@ typedef struct { * cpo 2-0x1E (30) */ - -/* XXX: these values need to be checked for all interleaving modes. */ -/* XXX: No reliable dual-rank 800 MHz setting has been found. It may - * seem reliable, but errors will appear when memory intensive - * program is run. */ -/* XXX: Single rank at 800 MHz is OK. */ const board_specific_parameters_t board_specific_parameters[][20] = { { /* memory controller 0 */ - /* lo| hi| num| clk| cpo|wrdata|2T */ - /* mhz| mhz|ranks|adjst| | delay| */ - { 0, 333, 2, 6, 7, 3, 0}, - {334, 400, 2, 6, 9, 3, 0}, - {401, 549, 2, 6, 11, 3, 0}, - {550, 680, 2, 1, 10, 5, 0}, - {681, 850, 2, 1, 12, 5, 1}, - { 0, 333, 1, 6, 7, 3, 0}, - {334, 400, 1, 6, 9, 3, 0}, - {401, 549, 1, 6, 11, 3, 0}, - {550, 680, 1, 1, 10, 5, 0}, - {681, 850, 1, 1, 12, 5, 0} + /* lo| hi| num| clk| cpo|wrdata|2T */ + /* mhz| mhz|ranks|adjst| | delay| */ + { 0, 333, 2, 4, 0x1f, 2, 0}, + {334, 400, 2, 4, 0x1f, 2, 0}, + {401, 549, 2, 4, 0x1f, 2, 0}, + {550, 680, 2, 4, 0x1f, 3, 0}, + {681, 850, 2, 4, 0x1f, 4, 0}, + { 0, 333, 1, 4, 0x1f, 2, 0}, + {334, 400, 1, 4, 0x1f, 2, 0}, + {401, 549, 1, 4, 0x1f, 2, 0}, + {550, 680, 1, 4, 0x1f, 3, 0}, + {681, 850, 1, 4, 0x1f, 4, 0} }, }; @@ -127,4 +121,8 @@ void fsl_ddr_board_options(memctl_options_t *popts, * - number of DIMMs installed */ popts->half_strength_driver_enable = 0; + /* + * Disable write leveling + */ + popts->wrlvl_en = 0; } diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index e4119e3..0564242 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -82,8 +82,8 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ #endif -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x7fffffff +#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00400000 #define CONFIG_PANIC_HANG /* do not reset board on panic */ /* @@ -121,6 +121,8 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy); #define CONFIG_CHIP_SELECTS_PER_CTRL 2 /* I2C addresses of SPD EEPROMs */ +#define CONFIG_SPD_EEPROM +#define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD EEPROM located on I2C bus 0 */ #define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */ -- 1.5.4

2 1

[U-Boot] [PATCH 2/2] 85xx: add the nfsboot/ramboot to default environment
by Dave Liu 22 Nov '09

22 Nov '09

Give the MPC8569MDS board one default environment var. Signed-off-by: Dave Liu <daveliu(a)freescale.com> --- include/configs/MPC8569MDS.h | 72 ++++++++++++++++++++++++------------------ 1 files changed, 41 insertions(+), 31 deletions(-) diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index b0af5dc..7fd2b56 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -409,46 +409,56 @@ extern unsigned long get_clock_freq(void); * Environment Configuration */ #define CONFIG_HOSTNAME mpc8569mds -#define CONFIG_ROOTPATH /nfsroot -#define CONFIG_BOOTFILE your.uImage +#define CONFIG_ROOTPATH /tftpboot +#define CONFIG_BOOTFILE uImage.8569 +#define CONFIG_HAS_ETH0 +#define CONFIG_ETHADDR 00:E0:0C:85:69:01 +#define CONFIG_HAS_ETH1 +#define CONFIG_ETH1ADDR 00:E0:0C:85:69:02 + +#define CONFIG_IPADDR 192.168.1.100 #define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 +#define CONFIG_GATEWAYIP 192.168.1.254 #define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/ +#define CONFIG_LOADADDR 1000000 /*default location for tftp and bootm*/ #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ #undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ #define CONFIG_BAUDRATE 115200 -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "consoledev=ttyS0\0" \ - "ramdiskaddr=600000\0" \ - "ramdiskfile=your.ramdisk.u-boot\0" \ - "fdtaddr=400000\0" \ - "fdtfile=your.fdt.dtb\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs\0" \ - "ramargs=setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs\0" \ - -#define CONFIG_NFSBOOTCOMMAND \ - "run nfsargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define CONFIG_RAMBOOTCOMMAND \ - "run ramargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "bootm $loadaddr $ramdiskaddr" - -#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "uboot=u-boot.8569\0" \ + "tftpflash=tftpboot $loadaddr $uboot; " \ + "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "consoledev=ttyS0\0" \ + "ramdiskaddr=2000000\0" \ + "ramdiskfile=ramdisk.8569\0" \ + "fdtaddr=c00000\0" \ + "fdtfile=dtb.8569\0" + +#define CONFIG_NFSBOOTCOMMAND \ + "setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$serverip:$rootpath " \ + "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" + +#define CONFIG_RAMBOOTCOMMAND \ + "setenv bootargs root=/dev/ram rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $ramdiskaddr $ramdiskfile;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr $ramdiskaddr $fdtaddr" #endif /* __CONFIG_H */ -- 1.5.4

2 2

[U-Boot] [PATCH 00/10][v2] Support for LogicPD i.MX27-LITEKIT development board
by Ilya Yanok 19 Nov '09

19 Nov '09

This patch set adds support for LogicPD i.MX27-LITEKIT development board. It contains support for i.MX27 CPU, support for serial console, FEC ethernet controller, NFC NAND controller and SDHC controller. Signed-off-by: Ilya Yanok <yanok(a)emcraft.com>

10 33

[U-Boot] [PATCH/RFC] Better I2C support for OMAP3
by Hugo Vincent 31 Oct '09

31 Oct '09

Hi everyone, This patch improves I2C support on OMAP3 platforms, including supporting the second and third I2C controllers (mainline only supports the first controller), and supporting writes where alen=0 (i.e. no register address - this was needed for some I2C devices I needed to drive from u-boot). Tested on Gumstix Overo with several I2C devices, on I2C1 and 3. The multi-bus support is mostly from this patch: http://www.beagleboard.org/gitweb/?p=u-boot-arm.git;a=commit;h=52eddcd07c2e… Best regards, Hugo Vincent Signed-off-by: Hugo Vincent <hugo.vincent(a)gmail.com> diff --git a/board/omap3/common/power.c b/board/omap3/common/power.c index 4908e5b..efc5dd4 100644 --- a/board/omap3/common/power.c +++ b/board/omap3/common/power.c @@ -42,6 +42,7 @@ void power_init_r(void) unsigned char byte; #ifdef CONFIG_DRIVER_OMAP34XX_I2C + i2c_set_bus_num(0); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c index 16439ac..6332965 100644 --- a/common/cmd_i2c.c +++ b/common/cmd_i2c.c @@ -1324,6 +1324,7 @@ U_BOOT_CMD( #endif ); #endif /* CONFIG_I2C_CMD_TREE */ +#if !defined(CONFIG_I2C_CMD_TREE) U_BOOT_CMD( imd, 4, 1, do_i2c_md, \ "i2c memory display", \ @@ -1378,6 +1379,7 @@ U_BOOT_CMD( " (valid chip values 50..57)\n" ); #endif +#endif /* !defined(CONFIG_I2C_CMD_TREE) */ #if defined(CONFIG_I2C_MUX) diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index 6784603..424f172 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -1,7 +1,7 @@ /* * Basic I2C functions * - * Copyright (c) 2004 Texas Instruments + * Copyright (c) 2004, 2009 Texas Instruments * * This package is free software; you can redistribute it and/or * modify it under the terms of the license found in the file @@ -18,6 +18,7 @@ * * Adapted for OMAP2420 I2C, r-woodruff2(a)ti.com * + * Some additions by Hugo Vincent <hugo.vincent(a)gmail.com> June 2009 */ #include <common.h> @@ -25,40 +24,44 @@ #include <asm/arch/i2c.h> #include <asm/io.h> +#ifdef CONFIG_OMAP34XX +#define I2C_NUM_IF 3 +#else +#define I2C_NUM_IF 2 +#endif + static void wait_for_bb (void); static u16 wait_for_pin (void); static void flush_fifo(void); +static i2c_t *i2c = (i2c_t *)I2C_DEFAULT_BASE; + void i2c_init (int speed, int slaveadd) { - u16 scl; - - writew(0x2, I2C_SYSC); /* for ES2 after soft reset */ + writew(0x2, &i2c->sysc); /* for ES2 after soft reset */ udelay(1000); - writew(0x0, I2C_SYSC); /* will probably self clear but */ + writew(0x0, &i2c->sysc); /* will probably self clear but */ - if (readw (I2C_CON) & I2C_CON_EN) { - writew (0, I2C_CON); - udelay (50000); + if (readw (&i2c->con) & I2C_CON_EN) { + writew (0, &i2c->con); + udelay (10000); } - /* 12MHz I2C module clock */ - writew (0, I2C_PSC); - speed = speed/1000; /* 100 or 400 */ - scl = ((12000/(speed*2)) - 7); /* use 7 when PSC = 0 */ - writew (scl, I2C_SCLL); - writew (scl, I2C_SCLH); + /* Timings from TRM, tested with scope - 100 kHz standard speed */ + writew (23, &i2c->psc); + writew (13, &i2c->scll); + writew (15, &i2c->sclh); /* own address */ - writew (slaveadd, I2C_OA); - writew (I2C_CON_EN, I2C_CON); + writew (slaveadd, &i2c->oa); + writew (I2C_CON_EN, &i2c->con); /* have to enable intrrupts or OMAP i2c module doesn't work */ writew (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | - I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE); + I2C_IE_NACK_IE | I2C_IE_AL_IE, &i2c->ie); udelay (1000); flush_fifo(); - writew (0xFFFF, I2C_STAT); - writew (0, I2C_CNT); + writew (0xFFFF, &i2c->stat); + writew (0, &i2c->cnt); } static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) @@ -70,19 +77,19 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) wait_for_bb (); /* one byte only */ - writew (1, I2C_CNT); + writew (1, &i2c->cnt); /* set slave address */ - writew (devaddr, I2C_SA); + writew (devaddr, &i2c->sa); /* no stop bit needed here */ - writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON); + writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, &i2c- >con); status = wait_for_pin (); if (status & I2C_STAT_XRDY) { /* Important: have to use byte access */ - writeb (regoffset, I2C_DATA); + writeb (regoffset, &i2c->data); udelay (20000); - if (readw (I2C_STAT) & I2C_STAT_NACK) { + if (readw (&i2c->stat) & I2C_STAT_NACK) { i2c_error = 1; } } else { @@ -91,28 +98,28 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) if (!i2c_error) { /* free bus, otherwise we can't use a combined transction */ - writew (0, I2C_CON); - while (readw (I2C_STAT) || (readw (I2C_CON) & I2C_CON_MST)) { + writew (0, &i2c->con); + while (readw (&i2c->stat) || (readw (&i2c->con) & I2C_CON_MST)) { udelay (10000); /* Have to clear pending interrupt to clear I2C_STAT */ - writew (0xFFFF, I2C_STAT); + writew (0xFFFF, &i2c->stat); } wait_for_bb (); /* set slave address */ - writew (devaddr, I2C_SA); + writew (devaddr, &i2c->sa); /* read one byte from slave */ - writew (1, I2C_CNT); + writew (1, &i2c->cnt); /* need stop bit here */ writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, - I2C_CON); + &i2c->con); status = wait_for_pin (); if (status & I2C_STAT_RRDY) { #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) - *value = readb (I2C_DATA); + *value = readb (&i2c->data); #else - *value = readw (I2C_DATA); + *value = readw (&i2c->data); #endif udelay (20000); } else { @@ -120,17 +127,17 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) } if (!i2c_error) { - writew (I2C_CON_EN, I2C_CON); - while (readw (I2C_STAT) - || (readw (I2C_CON) & I2C_CON_MST)) { + writew (I2C_CON_EN, &i2c->con); + while (readw (&i2c->stat) + || (readw (&i2c->con) & I2C_CON_MST)) { udelay (10000); - writew (0xFFFF, I2C_STAT); + writew (0xFFFF, &i2c->stat); } } } flush_fifo(); - writew (0xFFFF, I2C_STAT); - writew (0, I2C_CNT); + writew (0xFFFF, &i2c->stat); + writew (0, &i2c->cnt); return i2c_error; } @@ -143,12 +150,12 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value) wait_for_bb (); /* two bytes */ - writew (2, I2C_CNT); + writew (2, &i2c->cnt); /* set slave address */ - writew (devaddr, I2C_SA); + writew (devaddr, &i2c->sa); /* stop bit needed here */ writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX | - I2C_CON_STP, I2C_CON); + I2C_CON_STP, &i2c->con); /* wait until state change */ status = wait_for_pin (); @@ -156,24 +163,78 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value) if (status & I2C_STAT_XRDY) { #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) /* send out 1 byte */ - writeb (regoffset, I2C_DATA); - writew (I2C_STAT_XRDY, I2C_STAT); + writeb (regoffset, &i2c->data); + writew (I2C_STAT_XRDY, &i2c->stat); status = wait_for_pin (); if ((status & I2C_STAT_XRDY)) { /* send out next 1 byte */ - writeb (value, I2C_DATA); - writew (I2C_STAT_XRDY, I2C_STAT); + writeb (value, &i2c->data); + writew (I2C_STAT_XRDY, &i2c->stat); } else { i2c_error = 1; } #else /* send out two bytes */ - writew ((value << 8) + regoffset, I2C_DATA); + writew ((value << 8) + regoffset, &i2c->data); #endif /* must have enough delay to allow BB bit to go low */ - udelay (50000); - if (readw (I2C_STAT) & I2C_STAT_NACK) { + udelay (1000); + if (readw (&i2c->stat) & I2C_STAT_NACK) { + i2c_error = 1; + } + } else { + i2c_error = 1; + } + + if (!i2c_error) { + int eout = 200; + + writew (I2C_CON_EN, &i2c->con); + while ((stat = readw (&i2c->stat)) || (readw (&i2c->con) & I2C_CON_MST)) { + udelay (1000); + /* have to read to clear intrrupt */ + writew (0xFFFF, &i2c->stat); + if(--eout == 0) /* better leave with error than hang */ + break; + } + } + flush_fifo(); + writew (0xFFFF, &i2c->stat); + writew (0, &i2c->cnt); + return i2c_error; +} + +/* Write just one byte (no reg offset) */ +static int i2c_write_byte_raw (u8 devaddr, u8 value) +{ + int i2c_error = 0; + u16 status, stat; + + /* wait until bus not busy */ + wait_for_bb (); + + /* one bytes */ + writew (1, &i2c->cnt); + /* set slave address */ + writew (devaddr, &i2c->sa); + /* stop bit needed here */ + writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX | + I2C_CON_STP, &i2c->con); + + /* wait until state change */ + status = wait_for_pin (); + + if (status & I2C_STAT_XRDY) { + /* send out 1 byte */ + writeb (value, &i2c->data); + writew (I2C_STAT_XRDY, &i2c->stat); + + status = wait_for_pin (); + + /* must have enough delay to allow BB bit to go low */ + udelay (1000); + if (readw (&i2c->stat) & I2C_STAT_NACK) { i2c_error = 1; } } else { @@ -183,18 +244,18 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value) if (!i2c_error) { int eout = 200; - writew (I2C_CON_EN, I2C_CON); - while ((stat = readw (I2C_STAT)) || (readw (I2C_CON) & I2C_CON_MST)) { + writew (I2C_CON_EN, &i2c->con); + while ((stat = readw (&i2c->stat)) || (readw (&i2c->con) & I2C_CON_MST)) { udelay (1000); /* have to read to clear intrrupt */ - writew (0xFFFF, I2C_STAT); + writew (0xFFFF, &i2c->stat); if(--eout == 0) /* better leave with error than hang */ break; } } flush_fifo(); - writew (0xFFFF, I2C_STAT); - writew (0, I2C_CNT); + writew (0xFFFF, &i2c->stat); + writew (0, &i2c->cnt); return i2c_error; } @@ -205,14 +266,14 @@ static void flush_fifo(void) * you get a bus error */ while(1){ - stat = readw(I2C_STAT); + stat = readw(&i2c->stat); if(stat == I2C_STAT_RRDY){ #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) - readb(I2C_DATA); + readb(&i2c->data); #else - readw(I2C_DATA); + readw(&i2c->data); #endif - writew(I2C_STAT_RRDY,I2C_STAT); + writew(I2C_STAT_RRDY,&i2c->stat); udelay(1000); }else break; @@ -223,7 +284,7 @@ int i2c_probe (uchar chip) { int res = 1; /* default = fail */ - if (chip == readw (I2C_OA)) { + if (chip == readw (&i2c->oa)) { return res; } @@ -231,27 +292,27 @@ int i2c_probe (uchar chip) wait_for_bb (); /* try to read one byte */ - writew (1, I2C_CNT); + writew (1, &i2c->cnt); /* set slave address */ - writew (chip, I2C_SA); + writew (chip, &i2c->sa); /* stop bit needed here */ - writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, I2C_CON); + writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, &i2c- >con); /* enough delay for the NACK bit set */ - udelay (50000); + udelay (1000); - if (!(readw (I2C_STAT) & I2C_STAT_NACK)) { + if (!(readw (&i2c->stat) & I2C_STAT_NACK)) { res = 0; /* success case */ flush_fifo(); - writew(0xFFFF, I2C_STAT); + writew(0xFFFF, &i2c->stat); } else { - writew(0xFFFF, I2C_STAT); /* failue, clear sources*/ - writew (readw (I2C_CON) | I2C_CON_STP, I2C_CON); /* finish up xfer */ + writew(0xFFFF, &i2c->stat); /* failue, clear sources*/ + writew (readw (&i2c->con) | I2C_CON_STP, &i2c->con); /* finish up xfer */ udelay(20000); wait_for_bb (); } flush_fifo(); - writew (0, I2C_CNT); /* don't allow any more data in...we don't want it.*/ - writew(0xFFFF, I2C_STAT); + writew (0, &i2c->cnt); /* don't allow any more data in...we don't want it.*/ + writew(0xFFFF, &i2c->stat); return res; } @@ -284,23 +345,34 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) { int i; - if (alen > 1) { - printf ("I2C read: addr len %d not supported\n", alen); + if (alen > 1 || alen < 0) { + printf ("I2C write: addr len %d not supported\n", alen); return 1; } if (addr + len > 256) { - printf ("I2C read: address out of range\n"); + printf ("I2C write: address out of range\n"); return 1; } - for (i = 0; i < len; i++) { - if (i2c_write_byte (chip, addr + i, buffer[i])) { - printf ("I2C read: I/O error\n"); - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - return 1; + if (alen == 1) + for (i = 0; i < len; i++) + { + if (i2c_write_byte (chip, addr + i, buffer[i])) { + printf ("I2C write: I/O error\n"); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + return 1; + } + } + else if (alen == 0) + for (i = 0; i < len; i++) + { + if (i2c_write_byte_raw (chip, buffer[i])) { + printf ("I2C write: I/O error\n"); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + return 1; + } } - } return 0; } @@ -310,17 +382,17 @@ static void wait_for_bb (void) int timeout = 10; u16 stat; - writew(0xFFFF, I2C_STAT); /* clear current interruts...*/ - while ((stat = readw (I2C_STAT) & I2C_STAT_BB) && timeout--) { - writew (stat, I2C_STAT); - udelay (50000); + writew(0xFFFF, &i2c->stat); /* clear current interruts...*/ + while ((stat = readw (&i2c->stat) & I2C_STAT_BB) && timeout--) { + writew (stat, &i2c->stat); + udelay (1000); } if (timeout <= 0) { printf ("timed out in wait_for_bb: I2C_STAT=%x\n", - readw (I2C_STAT)); + readw (&i2c->stat)); } - writew(0xFFFF, I2C_STAT); /* clear delayed stuff*/ + writew(0xFFFF, &i2c->stat); /* clear delayed stuff*/ } static u16 wait_for_pin (void) @@ -330,7 +402,7 @@ static u16 wait_for_pin (void) do { udelay (1000); - status = readw (I2C_STAT); + status = readw (&i2c->stat); } while ( !(status & (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY | I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK | @@ -338,8 +410,55 @@ static u16 wait_for_pin (void) if (timeout <= 0) { printf ("timed out in wait_for_pin: I2C_STAT=%x\n", - readw (I2C_STAT)); - writew(0xFFFF, I2C_STAT); + readw (&i2c->stat)); + writew(0xFFFF, &i2c->stat); } return status; } + +int i2c_set_bus_num(unsigned int bus) +{ + if ((bus < 0) || (bus >= I2C_NUM_IF)) { + printf("Bad bus: %d\n", bus); + return -1; + } + +#ifdef CONFIG_OMAP34XX + if (bus == 2) + i2c = (i2c_t *)I2C_BASE3; + else +#endif + if (bus == 1) + i2c = (i2c_t *)I2C_BASE2; + else + i2c = (i2c_t *)I2C_BASE1; + + return 0; +} + +int i2c_get_bus_num(void) +{ +#ifdef CONFIG_OMAP34XX + if (i2c == (i2c_t *)I2C_BASE3) + return 2; + else +#endif + if (i2c == (i2c_t *)I2C_BASE2) + return 1; + else if (i2c == (i2c_t *)I2C_BASE1) + return 0; + else + return -1; +} + +int i2c_get_bus_speed() +{ + return 100000; +} + +int i2c_set_bus_speed(int speed) +{ + printf("Not yet implemented\n"); + return -1; +} + diff --git a/drivers/mmc/omap3_mmc.c b/drivers/mmc/omap3_mmc.c index e90db7e..234fddf 100644 --- a/drivers/mmc/omap3_mmc.c +++ b/drivers/mmc/omap3_mmc.c @@ -62,6 +62,9 @@ void twl4030_mmc_config(void) { unsigned char data; + i2c_set_bus_num(0); + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + data = DEV_GRP_P1; i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEV_GRP, 1, &data, 1); data = VMMC1_VSEL_30; diff --git a/include/asm-arm/arch-omap3/i2c.h b/include/asm-arm/arch- omap3/i2c.h index 3937f35..9638abc 100644 --- a/include/asm-arm/arch-omap3/i2c.h +++ b/include/asm-arm/arch-omap3/i2c.h @@ -25,21 +25,24 @@ #define I2C_DEFAULT_BASE I2C_BASE1 -#define I2C_REV (I2C_DEFAULT_BASE + 0x00) -#define I2C_IE (I2C_DEFAULT_BASE + 0x04) -#define I2C_STAT (I2C_DEFAULT_BASE + 0x08) -#define I2C_IV (I2C_DEFAULT_BASE + 0x0c) -#define I2C_BUF (I2C_DEFAULT_BASE + 0x14) -#define I2C_CNT (I2C_DEFAULT_BASE + 0x18) -#define I2C_DATA (I2C_DEFAULT_BASE + 0x1c) -#define I2C_SYSC (I2C_DEFAULT_BASE + 0x20) -#define I2C_CON (I2C_DEFAULT_BASE + 0x24) -#define I2C_OA (I2C_DEFAULT_BASE + 0x28) -#define I2C_SA (I2C_DEFAULT_BASE + 0x2c) -#define I2C_PSC (I2C_DEFAULT_BASE + 0x30) -#define I2C_SCLL (I2C_DEFAULT_BASE + 0x34) -#define I2C_SCLH (I2C_DEFAULT_BASE + 0x38) -#define I2C_SYSTEST (I2C_DEFAULT_BASE + 0x3c) +typedef struct i2c { + unsigned int rev; /* 0x00 */ + unsigned int ie; /* 0x04 */ + unsigned int stat; /* 0x08 */ + unsigned int iv; /* 0x0c */ + unsigned int res1; /* 0x10 */ + unsigned int buf; /* 0x14 */ + unsigned int cnt; /* 0x18 */ + unsigned int data; /* 0x1c */ + unsigned int sysc; /* 0x20 */ + unsigned int con; /* 0x24 */ + unsigned int oa; /* 0x28 */ + unsigned int sa; /* 0x2c */ + unsigned int psc; /* 0x30 */ + unsigned int scll; /* 0x34 */ + unsigned int sclh; /* 0x38 */ + unsigned int systest; /* 0x3c */ +} i2c_t; /* I2C masks */ diff --git a/include/configs/omap3_overo.h b/include/configs/ omap3_overo.h index b2c42fa..d8f7a9e 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -103,6 +103,7 @@ "4m(kernel),-(fs)" #define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_I2C_CMD_TREE /* New-style command interface */ #define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_CMD_NAND /* NAND support */ @@ -113,6 +114,7 @@ #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #undef CONFIG_CMD_NFS /* NFS support */ +#define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SLAVE 1

4 4

[U-Boot] Question about M29W128G CFI QRY bug
by Richard Retanubun 27 Oct '09

27 Oct '09

Hi Stefan, I'm trying to get u-boot 2009.03 on coldfire to boot on flash part M29W128G. I think I am getting hit by this bug in the flash chip http://lists.infradead.org/pipermail/linux-mtd/2008-July/022252.html The debug output is as follows: U-Boot 2009.03dvl-00087-gd53876a-dirty (Apr 09 2009 - 19:00:37) CPU: Freescale ColdFire MCF5270 rev. 1, at 150 MHz Board: Ruggedcom MCF5270 I2C: ready DRAM: 8 MB Top of RAM usable for U-Boot at: 00800000 Reserving 172k for U-Boot at: 007d4000 Reserving 256k for malloc() at: 00794000 Reserving 58 Bytes for Board Info at: 00793fc6 Reserving 56 Bytes for Global Data at: 00793f8e Reserving 64k for boot parameters at: 00783f8e Stack Pointer at: 00783f68 Start relocate of code from ff000400 to 007d4000 Now running in RAM - U-Boot at: 007d4000 FLASH: flash detect cfi fwc addr ff000000 cmd f0 f0f0 16bit x 8 bit fwc addr ff000000 cmd ff ffff 16bit x 8 bit fwc addr ff0000aa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr ff000020 is= ff00 5151 [snip] Note that we suffer from the same bug, where QRY is not being setup properly. The notes there offers a remedy by sending ff before f0. (or skipping ff altogether). Am I on the right track here and if so, how can I make the same fix in u-boot? Thanks for your time - Richard <Raw debug output> U-Boot 2009.03dvl-00087-gd53876a-dirty (Apr 09 2009 - 19:00:37) CPU: Freescale ColdFire MCF5270 rev. 1, at 150 MHz Board: Ruggedcom MCF5270 I2C: ready DRAM: 8 MB Top of RAM usable for U-Boot at: 00800000 Reserving 172k for U-Boot at: 007d4000 Reserving 256k for malloc() at: 00794000 Reserving 58 Bytes for Board Info at: 00793fc6 Reserving 56 Bytes for Global Data at: 00793f8e Reserving 64k for boot parameters at: 00783f8e Stack Pointer at: 00783f68 Start relocate of code from ff000400 to 007d4000 Now running in RAM - U-Boot at: 007d4000 FLASH: flash detect cfi fwc addr ff000000 cmd f0 f0f0 16bit x 8 bit fwc addr ff000000 cmd ff ffff 16bit x 8 bit fwc addr ff0000aa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr ff000020 is= ff00 5151 fwc addr ff000aaa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr ff000020 is= ff00 5151 fwc addr ff000000 cmd f0 00f0 16bit x 16 bit fwc addr ff000000 cmd ff 00ff 16bit x 16 bit fwc addr ff0000aa cmd 98 0098 16bit x 16 bit is= cmd 51(Q) addr ff000020 is= ff00 0051 fwc addr ff000aaa cmd 98 0098 16bit x 16 bit is= cmd 51(Q) addr ff000020 is= ff00 0051 fwc addr ff000000 cmd f0 f0f0f0f0 32bit x 8 bit fwc addr ff000000 cmd ff ffffffff 32bit x 8 bit fwc addr ff000154 cmd 98 98989898 32bit x 8 bit is= cmd 51(Q) addr ff000040 is= ff0004b4 51515151 fwc addr ff001554 cmd 98 98989898 32bit x 8 bit is= cmd 51(Q) addr ff000040 is= ff0004b4 51515151 fwc addr ff000000 cmd f0 00f000f0 32bit x 16 bit fwc addr ff000000 cmd ff 00ff00ff 32bit x 16 bit fwc addr ff000154 cmd 98 00980098 32bit x 16 bit is= cmd 51(Q) addr ff000040 is= ff0004b4 00510051 fwc addr ff001554 cmd 98 00980098 32bit x 16 bit is= cmd 51(Q) addr ff000040 is= ff0004b4 00510051 fwc addr ff000000 cmd f0 000000f0 32bit x 32 bit fwc addr ff000000 cmd ff 000000ff 32bit x 32 bit fwc addr ff000154 cmd 98 00000098 32bit x 32 bit is= cmd 51(Q) addr ff000040 is= ff0004b4 00000051 fwc addr ff001554 cmd 98 00000098 32bit x 32 bit is= cmd 51(Q) addr ff000040 is= ff0004b4 00000051 fwrite addr ff000000 cmd f0 fffffffffffffffffffff0 64 bit x 8 bit fwrite addr ff000000 cmd ff ffffffffffffffffffffff 64 bit x 8 bit fwrite addr ff0002a8 cmd 98 ffffffffffffffffffff98 64 bit x 8 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234005151515151 fwrite addr ff002aa8 cmd 98 ffffffffffffffffffff98 64 bit x 8 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234005151515151 fwrite addr ff000000 cmd f0 00ff00ff00ff00fffffff0 64 bit x 16 bit fwrite addr ff000000 cmd ff 00ff00ff00ff00ffffffff 64 bit x 16 bit fwrite addr ff0002a8 cmd 98 00ff00ff00ff00ffffff98 64 bit x 16 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234005100510051 fwrite addr ff002aa8 cmd 98 00ff00ff00ff00ffffff98 64 bit x 16 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234005100510051 fwrite addr ff000000 cmd f0 000000ff000000fffffff0 64 bit x 32 bit fwrite addr ff000000 cmd ff 000000ff000000ffffffff 64 bit x 32 bit fwrite addr ff0002a8 cmd 98 000000ff000000ffffff98 64 bit x 32 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234005100000051 fwrite addr ff002aa8 cmd 98 000000ff000000ffffff98 64 bit x 32 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234005100000051 fwrite addr ff000000 cmd f0 00000000000000fffffff0 64 bit x 64 bit fwrite addr ff000000 cmd ff 00000000000000ffffffff 64 bit x 64 bit fwrite addr ff0002a8 cmd 98 00000000000000ffffff98 64 bit x 64 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234000000000051 fwrite addr ff002aa8 cmd 98 00000000000000ffffff98 64 bit x 64 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234000000000051 not found ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB flash_protect ON: from 0xFF000400 to 0xFF0231FF flash_protect ON: from 0xFF004000 to 0xFF005FFF *** failed *** Ignoring flash failure, see if we boot In: serial Out: serial Err: serial MAC: ethaddr 00:00:00:00:01:00 U-Boot relocated to 007d4000 Net: FEC0 [PRIME] ### main_loop entered: bootdelay=0

3 11

[U-Boot] [PATCH/RFC] env: always build env_embedded and envcrc
by Mike Frysinger 27 Oct '09

27 Oct '09

The envcrc utility is only called when it is actually needed, so having the internal code depend on ENV_IS_EMBEDDED isn't necessary. Plus, by always building it, external utils can manipulate the environment blob without having to mess around with defines. Same logic holds for env_embedded. It is already compiled for the majority of boards into a 0 byte file, so enabling it all the time shouldn't cause noticable change in overhead. The difference now is that we link it into U-Boot itself only when CONFIG_ENV_IS_EMBEDDED is defined. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- common/Makefile | 7 ++----- common/env_embedded.c | 7 ------- tools/Makefile | 10 +--------- tools/envcrc.c | 11 +---------- 4 files changed, 4 insertions(+), 31 deletions(-) diff --git a/common/Makefile b/common/Makefile index 3781738..2ace329 100644 --- a/common/Makefile +++ b/common/Makefile @@ -49,12 +49,9 @@ COBJS-y += cmd_nvedit.o # environment COBJS-y += env_common.o +COBJS-$(CONFIG_ENV_IS_EMBEDDED) += env_embedded.o COBJS-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o -COBJS-$(CONFIG_ENV_IS_EMBEDDED) += env_embedded.o -COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_embedded.o -COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_embedded.o -COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_embedded.o COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o COBJS-$(CONFIG_ENV_IS_IN_MG_DISK) += env_mgdisk.o COBJS-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o @@ -168,7 +165,7 @@ OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS)) CPPFLAGS += -I.. -all: $(LIB) $(AOBJS) +all: $(LIB) $(AOBJS) $(obj)env_embedded.o $(LIB): $(obj).depend $(OBJS) $(AR) $(ARFLAGS) $@ $(OBJS) diff --git a/common/env_embedded.c b/common/env_embedded.c index ae6cac4..e27e1cd 100644 --- a/common/env_embedded.c +++ b/common/env_embedded.c @@ -41,11 +41,6 @@ #endif /* - * Generate embedded environment table - * inside U-Boot image, if needed. - */ -#if defined(ENV_IS_EMBEDDED) -/* * Only put the environment in it's own section when we are building * U-Boot proper. The host based program "tools/envcrc" does not need * a seperate section. Note that ENV_CRC is only defined when building @@ -210,5 +205,3 @@ unsigned long env_size __PPCTEXT__ = sizeof(env_t); * Add in absolutes. */ GEN_ABS(env_offset, CONFIG_ENV_OFFSET); - -#endif /* ENV_IS_EMBEDDED */ diff --git a/tools/Makefile b/tools/Makefile index b5a1e39..d24f114 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -68,14 +68,7 @@ include $(TOPDIR)/config.mk # Generated executable files BIN_FILES-$(CONFIG_CMD_LOADS) += img2srec$(SFX) BIN_FILES-y += mkimage$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_EMBEDDED) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_DATAFLASH) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_EEPROM) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_FLASH) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_ONENAND) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_NAND) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_NVRAM) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_SPI_FLASH) += envcrc$(SFX) +BIN_FILES-y += envcrc$(SFX) BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX) BIN_FILES-$(CONFIG_CMD_NET) += gen_eth_addr$(SFX) BIN_FILES-$(CONFIG_LCD_LOGO) += bmp_logo$(SFX) @@ -93,7 +86,6 @@ EXT_OBJ_FILES-y += common/image.o # Source files located in the tools directory OBJ_FILES-$(CONFIG_CMD_LOADS) += img2srec.o OBJ_FILES-y += mkimage.o -OBJ_FILES-$(CONFIG_ENV_IS_EMBEDDED) += envcrc.o OBJ_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1.o OBJ_FILES-$(CONFIG_CMD_NET) += gen_eth_addr.o OBJ_FILES-$(CONFIG_LCD_LOGO) += bmp_logo.o diff --git a/tools/envcrc.c b/tools/envcrc.c index 5b0f7cd..d02a7db 100644 --- a/tools/envcrc.c +++ b/tools/envcrc.c @@ -50,10 +50,6 @@ # if defined(CONFIG_ENV_ADDR_REDUND) && !defined(CONFIG_ENV_SIZE_REDUND) # define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE # endif -# if (CONFIG_ENV_ADDR >= CONFIG_SYS_MONITOR_BASE) && \ - ((CONFIG_ENV_ADDR + CONFIG_ENV_SIZE) <= (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)) -# define ENV_IS_EMBEDDED 1 -# endif # if defined(CONFIG_ENV_ADDR_REDUND) || defined(CONFIG_ENV_OFFSET_REDUND) # define CONFIG_SYS_REDUNDAND_ENVIRONMENT 1 # endif @@ -70,14 +66,11 @@ extern uint32_t crc32 (uint32_t, const unsigned char *, unsigned int); -#ifdef ENV_IS_EMBEDDED extern unsigned int env_size; extern unsigned char environment; -#endif /* ENV_IS_EMBEDDED */ int main (int argc, char **argv) { -#ifdef ENV_IS_EMBEDDED unsigned char pad = 0x00; uint32_t crc; unsigned char *envptr = &environment, @@ -131,8 +124,6 @@ int main (int argc, char **argv) } else { printf ("0x%08X\n", crc); } -#else - printf ("0\n"); -#endif + return EXIT_SUCCESS; } -- 1.6.3.3

3 40

[U-Boot] Please pull u-boot-i2c.git next branch
by Heiko Schocher 15 Oct '09

15 Oct '09

The following changes since commit 6b8edfde22acc574b5532e9f086e6a7287a9bc78: Wolfgang Denk (1): Prepare v2009.06-rc1 are available in the git repository at: git://git.denx.de/u-boot-i2c.git next Peter Tyser (12): i2c.h: Provide a default CONFIG_SYS_I2C_SLAVE value cpci750: i2c cleanup Marvell: i2c cleanup mpc7448hpc2: Add CONFIG_SYS_I2C_SPEED define tsi108_i2c: Add i2c_init() stub function cm5200: Make function test command names more unique i2c: Create common default i2c_[set|get]_bus_speed() functions i2c: Remove deprecated individual i2c commands i2c: Update references to individual i2c commands cmd_i2c: Clean up i2c command argument parsing cmd_i2c: Clean up trivial helper functions cmd_i2c: Fix i2c help command output when CONFIG_I2C_MUX README | 20 +---- board/Marvell/common/i2c.c | 19 +++-- board/cm5200/cmd_cm5200.c | 18 ++-- board/esd/cpci750/i2c.c | 16 ++-- board/esd/tasreg/tasreg.c | 4 +- common/cmd_eeprom.c | 4 - common/cmd_i2c.c | 176 +++++++++++++------------------------- cpu/arm920t/at91rm9200/i2c.c | 10 -- cpu/mpc512x/i2c.c | 14 --- cpu/mpc8260/i2c.c | 16 ---- cpu/ppc4xx/40x_spd_sdram.c | 4 - cpu/ppc4xx/44x_spd_ddr.c | 4 - cpu/ppc4xx/i2c.c | 14 --- doc/README.ebony | 20 ++-- doc/README.m52277evb | 8 +-- doc/README.m5373evb | 8 +-- doc/README.m54455evb | 8 +-- doc/README.m5475evb | 8 +-- doc/README.ppc440 | 4 +- doc/README.xpedite1k | 6 +- doc/feature-removal-schedule.txt | 12 --- drivers/i2c/soft_i2c.c | 14 --- drivers/i2c/tsi108_i2c.c | 11 ++- include/configs/DU405.h | 1 - include/configs/DU440.h | 1 - include/configs/MPC8313ERDB.h | 1 - include/configs/MPC8349EMDS.h | 1 - include/configs/MPC8349ITX.h | 1 - include/configs/MPC8360ERDK.h | 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8569MDS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/MVBLM7.h | 1 - include/configs/PMC440.h | 1 - include/configs/SIMPC8313.h | 1 - include/configs/XPEDITE5200.h | 1 - include/configs/XPEDITE5370.h | 1 - include/configs/ads5121.h | 1 - include/configs/at91rm9200ek.h | 1 - include/configs/bubinga.h | 2 +- include/configs/katmai.h | 1 - include/configs/keymile-common.h | 1 - include/configs/kmeter1.h | 1 - include/configs/korat.h | 1 - include/configs/mpc7448hpc2.h | 1 + include/configs/sacsng.h | 6 +- include/configs/sbc8349.h | 1 - include/configs/socrates.h | 1 - include/configs/taihu.h | 2 +- include/i2c.h | 12 ++- 51 files changed, 140 insertions(+), 324 deletions(-) -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

6 5

[U-Boot] eth/net driver documentation
by Mike Frysinger 05 Oct '09

05 Oct '09

is there any documentation that covers the NET_MULTI driver stack ? i.e. if i was a network chip vendor and wanted to write a u-boot driver for my part, where would i look ? or is it a matter of "the code is the documentation" ? i can start a small doc that covers the existing stack if that is the case ... more to keep my sanity so i dont have to keep going through the ethernet stack to remind myself of how things fit together ;). -mike

5 22

[U-Boot] [PATCH][Net] Convert SMC91111 Ethernet driver to CONFIG_NET_MULTI API
by Ben Warren 05 Oct '09

05 Oct '09

All in-tree boards that use this controller have CONFIG_NET_MULTI added Also: - changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111 - cleaned up line lengths - modified all boards that override weak function in this driver - modified all eeprom standalone apps to work with new driver Signed-off-by: Ben Warren <biggerbadderben(a)gmail.com> --- board/altera/ep1c20/ep1c20.c | 12 + board/altera/ep1s10/ep1s10.c | 12 + board/altera/ep1s40/ep1s40.c | 12 + board/armltd/integrator/integrator.c | 13 +- board/armltd/versatile/versatile.c | 12 + board/bf533-ezkit/bf533-ezkit.c | 12 + board/bf533-stamp/bf533-stamp.c | 12 + board/bf538f-ezkit/bf538f-ezkit.c | 12 + board/bf561-ezkit/bf561-ezkit.c | 12 + board/blackstamp/blackstamp.c | 12 + board/cerf250/cerf250.c | 12 + board/cm-bf533/cm-bf533.c | 12 + board/cm-bf561/cm-bf561.c | 12 + board/cradle/cradle.c | 12 + board/delta/delta.c | 12 + board/dnp1110/dnp1110.c | 12 + board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c | 12 + board/gaisler/gr_ep2s60/gr_ep2s60.c | 12 + board/innokom/innokom.c | 12 + board/logodl/logodl.c | 12 + board/lpd7a40x/lpd7a40x.c | 12 + board/ms7722se/ms7722se.c | 12 + board/netstar/eeprom.c | 57 ++-- board/netstar/netstar.c | 12 + board/psyent/pk1c20/pk1c20.c | 12 + board/pxa255_idp/pxa_idp.c | 12 + board/renesas/MigoR/migo_r.c | 12 + board/st/nhk8815/nhk8815.c | 12 + board/voiceblue/eeprom.c | 57 ++-- board/voiceblue/voiceblue.c | 12 + board/xaeniax/xaeniax.c | 12 + board/xm250/xm250.c | 12 + board/xsengine/xsengine.c | 12 + board/zylonite/zylonite.c | 12 + drivers/net/Makefile | 2 +- drivers/net/smc91111.c | 491 ++++++++++++------------- drivers/net/smc91111.h | 192 +++++----- examples/standalone/smc91111_eeprom.c | 98 +++--- include/configs/EP1C20.h | 3 +- include/configs/EP1S10.h | 3 +- include/configs/EP1S40.h | 3 +- include/configs/MigoR.h | 3 +- include/configs/PK1C20.h | 3 +- include/configs/bf533-ezkit.h | 3 +- include/configs/bf533-stamp.h | 3 +- include/configs/bf538f-ezkit.h | 3 +- include/configs/bf561-ezkit.h | 3 +- include/configs/blackstamp.h | 3 +- include/configs/cerf250.h | 3 +- include/configs/cm-bf533.h | 3 +- include/configs/cm-bf561.h | 3 +- include/configs/cradle.h | 3 +- include/configs/dnp1110.h | 3 +- include/configs/gr_cpci_ax2000.h | 3 +- include/configs/gr_ep2s60.h | 3 +- include/configs/innokom.h | 3 +- include/configs/integratorcp.h | 3 +- include/configs/logodl.h | 3 +- include/configs/lpd7a400-10.h | 3 +- include/configs/lpd7a404-10.h | 3 +- include/configs/ms7722se.h | 3 +- include/configs/netstar.h | 3 +- include/configs/nhk8815.h | 3 +- include/configs/pxa255_idp.h | 3 +- include/configs/versatile.h | 3 +- include/configs/voiceblue.h | 3 +- include/configs/xaeniax.h | 3 +- include/configs/xm250.h | 3 +- include/configs/xsengine.h | 3 +- include/configs/zylonite.h | 2 +- include/netdev.h | 1 + 71 files changed, 888 insertions(+), 490 deletions(-) diff --git a/board/altera/ep1c20/ep1c20.c b/board/altera/ep1c20/ep1c20.c index c5bfb85..82900f7 100644 --- a/board/altera/ep1c20/ep1c20.c +++ b/board/altera/ep1c20/ep1c20.c @@ -22,6 +22,7 @@ */ #include <common.h> +#include <netdev.h> int board_early_init_f (void) { @@ -38,3 +39,14 @@ phys_size_t initdram (int board_type) { return (0); } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/altera/ep1s10/ep1s10.c b/board/altera/ep1s10/ep1s10.c index de9bf42..cf886da 100644 --- a/board/altera/ep1s10/ep1s10.c +++ b/board/altera/ep1s10/ep1s10.c @@ -22,6 +22,7 @@ */ #include <common.h> +#include <netdev.h> int board_early_init_f (void) { @@ -38,3 +39,14 @@ phys_size_t initdram (int board_type) { return (0); } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/altera/ep1s40/ep1s40.c b/board/altera/ep1s40/ep1s40.c index c0eca17..6395de7 100644 --- a/board/altera/ep1s40/ep1s40.c +++ b/board/altera/ep1s40/ep1s40.c @@ -22,6 +22,7 @@ */ #include <common.h> +#include <netdev.h> int checkboard (void) { @@ -33,3 +34,14 @@ phys_size_t initdram (int board_type) { return (0); } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c index a46deea..518944e 100644 --- a/board/armltd/integrator/integrator.c +++ b/board/armltd/integrator/integrator.c @@ -34,9 +34,7 @@ */ #include <common.h> -#ifdef CONFIG_PCI #include <netdev.h> -#endif DECLARE_GLOBAL_DATA_PTR; @@ -127,9 +125,16 @@ extern void dram_query(void); return 0; } -#ifdef CONFIG_PCI +#ifdef CONFIG_CMD_NET int board_eth_init(bd_t *bis) { - return pci_eth_init(bis); + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif +#ifdef CONFIG_PCI + rc += pci_eth_init(bis); +#endif + return rc; } #endif diff --git a/board/armltd/versatile/versatile.c b/board/armltd/versatile/versatile.c index 197bc89..6e836dd 100644 --- a/board/armltd/versatile/versatile.c +++ b/board/armltd/versatile/versatile.c @@ -34,6 +34,7 @@ */ #include <common.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -89,3 +90,14 @@ int dram_init (void) { return 0; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/bf533-ezkit/bf533-ezkit.c b/board/bf533-ezkit/bf533-ezkit.c index d5f0b7c..ff0e15e 100644 --- a/board/bf533-ezkit/bf533-ezkit.c +++ b/board/bf533-ezkit/bf533-ezkit.c @@ -26,6 +26,7 @@ */ #include <common.h> +#include <netdev.h> #include "psd4256.h" #include "flash-defines.h" @@ -57,3 +58,14 @@ int misc_init_r(void) return 0; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/bf533-stamp/bf533-stamp.c b/board/bf533-stamp/bf533-stamp.c index 7108dda..32e7174 100644 --- a/board/bf533-stamp/bf533-stamp.c +++ b/board/bf533-stamp/bf533-stamp.c @@ -26,6 +26,7 @@ */ #include <common.h> +#include <netdev.h> #include <asm/io.h> #include "bf533-stamp.h" @@ -283,3 +284,14 @@ void __led_toggle(led_id_t mask) } #endif + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/bf538f-ezkit/bf538f-ezkit.c b/board/bf538f-ezkit/bf538f-ezkit.c index bbee989..1897405 100644 --- a/board/bf538f-ezkit/bf538f-ezkit.c +++ b/board/bf538f-ezkit/bf538f-ezkit.c @@ -7,6 +7,7 @@ */ #include <common.h> +#include <netdev.h> #include <config.h> #include <asm/blackfin.h> @@ -25,3 +26,14 @@ phys_size_t initdram(int board_type) gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; return gd->bd->bi_memsize; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/bf561-ezkit/bf561-ezkit.c b/board/bf561-ezkit/bf561-ezkit.c index 5aede17..24347e2 100644 --- a/board/bf561-ezkit/bf561-ezkit.c +++ b/board/bf561-ezkit/bf561-ezkit.c @@ -26,6 +26,7 @@ */ #include <common.h> +#include <netdev.h> #include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; @@ -43,3 +44,14 @@ phys_size_t initdram(int board_type) gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; return gd->bd->bi_memsize; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/blackstamp/blackstamp.c b/board/blackstamp/blackstamp.c index b671899..524c86c 100644 --- a/board/blackstamp/blackstamp.c +++ b/board/blackstamp/blackstamp.c @@ -12,6 +12,7 @@ */ #include <common.h> +#include <netdev.h> #include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; @@ -44,3 +45,14 @@ void swap_to(int device_id) SSYNC(); } #endif + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/cerf250/cerf250.c b/board/cerf250/cerf250.c index 307894f..59346bc 100644 --- a/board/cerf250/cerf250.c +++ b/board/cerf250/cerf250.c @@ -26,6 +26,7 @@ */ #include <common.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -71,3 +72,14 @@ int dram_init (void) return 0; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/cm-bf533/cm-bf533.c b/board/cm-bf533/cm-bf533.c index 7eb761d..6598e27 100644 --- a/board/cm-bf533/cm-bf533.c +++ b/board/cm-bf533/cm-bf533.c @@ -7,6 +7,7 @@ */ #include <common.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -23,3 +24,14 @@ phys_size_t initdram(int board_type) gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; return gd->bd->bi_memsize; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/cm-bf561/cm-bf561.c b/board/cm-bf561/cm-bf561.c index 5bce9eb..b204d7c 100644 --- a/board/cm-bf561/cm-bf561.c +++ b/board/cm-bf561/cm-bf561.c @@ -7,6 +7,7 @@ */ #include <common.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -23,3 +24,14 @@ phys_size_t initdram(int board_type) gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; return gd->bd->bi_memsize; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/cradle/cradle.c b/board/cradle/cradle.c index 6d8d555..21eb655 100644 --- a/board/cradle/cradle.c +++ b/board/cradle/cradle.c @@ -27,6 +27,7 @@ #include <asm/arch/pxa-regs.h> #include <common.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -223,3 +224,14 @@ dram_init (void) PHYS_SDRAM_3_SIZE + PHYS_SDRAM_4_SIZE ); } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/delta/delta.c b/board/delta/delta.c index 84ff47e..a294213 100644 --- a/board/delta/delta.c +++ b/board/delta/delta.c @@ -22,6 +22,7 @@ */ #include <common.h> +#include <netdev.h> #include <i2c.h> #include <da9030.h> #include <malloc.h> @@ -363,3 +364,14 @@ void hw_watchdog_reset(void) i2c_reg_write(addr, SYS_CONTROL_A, val); } #endif + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/dnp1110/dnp1110.c b/board/dnp1110/dnp1110.c index ab8e7be..c215f5f 100644 --- a/board/dnp1110/dnp1110.c +++ b/board/dnp1110/dnp1110.c @@ -23,6 +23,7 @@ */ #include <common.h> +#include <netdev.h> #include <SA-1100.h> DECLARE_GLOBAL_DATA_PTR; @@ -53,3 +54,14 @@ int dram_init (void) return (0); } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c index 105a747..7fe85b8 100644 --- a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c +++ b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c @@ -19,6 +19,7 @@ */ #include <common.h> +#include <netdev.h> #include <config.h> #include <asm/leon.h> @@ -37,3 +38,14 @@ int misc_init_r(void) { return 0; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/gaisler/gr_ep2s60/gr_ep2s60.c b/board/gaisler/gr_ep2s60/gr_ep2s60.c index 2904d32..7241c6d 100644 --- a/board/gaisler/gr_ep2s60/gr_ep2s60.c +++ b/board/gaisler/gr_ep2s60/gr_ep2s60.c @@ -19,6 +19,7 @@ */ #include <common.h> +#include <netdev.h> #include <config.h> #include <asm/leon.h> @@ -37,3 +38,14 @@ int misc_init_r(void) { return 0; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/innokom/innokom.c b/board/innokom/innokom.c index c2b88ae..3412f10 100644 --- a/board/innokom/innokom.c +++ b/board/innokom/innokom.c @@ -24,6 +24,7 @@ */ #include <common.h> +#include <netdev.h> #include <asm/arch/pxa-regs.h> #include <asm/mach-types.h> @@ -182,3 +183,14 @@ void show_boot_progress (int status) return; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/logodl/logodl.c b/board/logodl/logodl.c index c57210a..2562ecc 100644 --- a/board/logodl/logodl.c +++ b/board/logodl/logodl.c @@ -23,6 +23,7 @@ */ #include <common.h> +#include <netdev.h> #include <asm/arch/pxa-regs.h> DECLARE_GLOBAL_DATA_PTR; @@ -120,3 +121,14 @@ void show_boot_progress (int status) return; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/lpd7a40x/lpd7a40x.c b/board/lpd7a40x/lpd7a40x.c index 7edb65e..437dad0 100644 --- a/board/lpd7a40x/lpd7a40x.c +++ b/board/lpd7a40x/lpd7a40x.c @@ -26,6 +26,7 @@ */ #include <common.h> +#include <netdev.h> #if defined(CONFIG_LH7A400) #include <lh7a400.h> #elif defined(CONFIG_LH7A404) @@ -79,3 +80,14 @@ int dram_init (void) return 0; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/ms7722se/ms7722se.c b/board/ms7722se/ms7722se.c index 32234d3..4e40b17 100644 --- a/board/ms7722se/ms7722se.c +++ b/board/ms7722se/ms7722se.c @@ -24,6 +24,7 @@ */ #include <common.h> +#include <netdev.h> #include <asm/io.h> #include <asm/processor.h> @@ -57,3 +58,14 @@ void led_set_state(unsigned short value) { writew(value & 0xFF, LED_BASE); } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/netstar/eeprom.c b/board/netstar/eeprom.c index 5806128..1366457 100644 --- a/board/netstar/eeprom.c +++ b/board/netstar/eeprom.c @@ -27,43 +27,42 @@ #include <common.h> #include <exports.h> #include <timestamp.h> +#include <net.h> #include "../drivers/net/smc91111.h" -#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE - -static u16 read_eeprom_reg(u16 reg) +static u16 read_eeprom_reg(struct eth_device *dev, u16 reg) { int timeout; - SMC_SELECT_BANK(2); - SMC_outw(reg, PTR_REG); + SMC_SELECT_BANK(dev, 2); + SMC_outw(dev, reg, PTR_REG); - SMC_SELECT_BANK(1); - SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD, + SMC_SELECT_BANK(dev, 1); + SMC_outw(dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD, CTL_REG); timeout = 100; - while((SMC_inw (CTL_REG) & CTL_RELOAD) && --timeout) + while((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --timeout) udelay(100); if (timeout == 0) { printf("Timeout Reading EEPROM register %02x\n", reg); return 0; } - return SMC_inw (GP_REG); + return SMC_inw (dev, GP_REG); } -static int write_eeprom_reg(u16 value, u16 reg) +static int write_eeprom_reg(struct eth_device *dev, u16 value, u16 reg) { int timeout; - SMC_SELECT_BANK(2); - SMC_outw(reg, PTR_REG); + SMC_SELECT_BANK(dev, 2); + SMC_outw(dev, reg, PTR_REG); - SMC_SELECT_BANK(1); - SMC_outw(value, GP_REG); - SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG); + SMC_SELECT_BANK(dev, 1); + SMC_outw(dev, value, GP_REG); + SMC_outw(dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG); timeout = 100; - while ((SMC_inw(CTL_REG) & CTL_STORE) && --timeout) + while ((SMC_inw(dev, CTL_REG) & CTL_STORE) && --timeout) udelay (100); if (timeout == 0) { printf("Timeout Writing EEPROM register %02x\n", reg); @@ -73,17 +72,17 @@ static int write_eeprom_reg(u16 value, u16 reg) return 1; } -static int write_data(u16 *buf, int len) +static int write_data(struct eth_device *dev, u16 *buf, int len) { u16 reg = 0x23; while (len--) - write_eeprom_reg(*buf++, reg++); + write_eeprom_reg(dev, *buf++, reg++); return 0; } -static int verify_macaddr(char *s) +static int verify_macaddr(struct eth_device *dev, char *s) { u16 reg; int i, err = 0; @@ -91,7 +90,7 @@ static int verify_macaddr(char *s) printf("MAC Address: "); err = i = 0; for (i = 0; i < 3; i++) { - reg = read_eeprom_reg(0x20 + i); + reg = read_eeprom_reg(dev, 0x20 + i); printf("%02x:%02x%c", reg & 0xff, reg >> 8, i != 2 ? ':' : '\n'); if (s) err |= reg != ((u16 *)s)[i]; @@ -100,7 +99,7 @@ static int verify_macaddr(char *s) return err ? 0 : 1; } -static int set_mac(char *s) +static int set_mac(struct eth_device *dev, char *s) { int i; char *e, eaddr[6]; @@ -112,7 +111,7 @@ static int set_mac(char *s) } for (i = 0; i < 3; i++) - write_eeprom_reg(*(((u16 *)eaddr) + i), 0x20 + i); + write_eeprom_reg(dev, *(((u16 *)eaddr) + i), 0x20 + i); return 0; } @@ -150,6 +149,10 @@ int eeprom(int argc, char *argv[]) int i, len, ret; unsigned char buf[58], *p; + struct eth_device dev = { + .iobase = CONFIG_SMC91111_BASE + }; + app_startup(argv); if (get_version() != XF_VERSION) { printf("Wrong XF_VERSION.\n"); @@ -160,14 +163,14 @@ int eeprom(int argc, char *argv[]) return crcek(); - if ((SMC_inw (BANK_SELECT) & 0xFF00) != 0x3300) { + if ((SMC_inw (&dev, BANK_SELECT) & 0xFF00) != 0x3300) { printf("SMSC91111 not found.\n"); return 2; } /* Called without parameters - print MAC address */ if (argc < 2) { - verify_macaddr(NULL); + verify_macaddr(&dev, NULL); return 0; } @@ -201,8 +204,8 @@ int eeprom(int argc, char *argv[]) } /* First argument (MAC) is mandatory */ - set_mac(argv[1]); - if (verify_macaddr(argv[1])) { + set_mac(&dev, argv[1]); + if (verify_macaddr(&dev, argv[1])) { printf("*** MAC address does not match! ***\n"); return 4; } @@ -210,7 +213,7 @@ int eeprom(int argc, char *argv[]) while (len--) *p++ = 0; - write_data((u16 *)buf, sizeof(buf) >> 1); + write_data(&dev, (u16 *)buf, sizeof(buf) >> 1); return 0; } diff --git a/board/netstar/netstar.c b/board/netstar/netstar.c index ffd60bf..df1704b 100644 --- a/board/netstar/netstar.c +++ b/board/netstar/netstar.c @@ -21,6 +21,7 @@ */ #include <common.h> +#include <netdev.h> #include <i2c.h> #include <flash.h> #include <nand.h> @@ -115,3 +116,14 @@ int board_nand_init(struct nand_chip *nand) return 0; } #endif + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/psyent/pk1c20/pk1c20.c b/board/psyent/pk1c20/pk1c20.c index 95b48bc..0a24866 100644 --- a/board/psyent/pk1c20/pk1c20.c +++ b/board/psyent/pk1c20/pk1c20.c @@ -22,6 +22,7 @@ */ #include <common.h> +#include <netdev.h> int board_early_init_f (void) { @@ -38,3 +39,14 @@ phys_size_t initdram (int board_type) { return (0); } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/pxa255_idp/pxa_idp.c b/board/pxa255_idp/pxa_idp.c index e9e479c..05e30ec 100644 --- a/board/pxa255_idp/pxa_idp.c +++ b/board/pxa255_idp/pxa_idp.c @@ -31,6 +31,7 @@ */ #include <common.h> +#include <netdev.h> #include <command.h> DECLARE_GLOBAL_DATA_PTR; @@ -133,3 +134,14 @@ U_BOOT_CMD(idpcmd, CONFIG_SYS_MAXARGS, 0, do_idpcmd, ); #endif + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/renesas/MigoR/migo_r.c b/board/renesas/MigoR/migo_r.c index 204ca78..c0f26ac 100644 --- a/board/renesas/MigoR/migo_r.c +++ b/board/renesas/MigoR/migo_r.c @@ -24,6 +24,7 @@ */ #include <common.h> +#include <netdev.h> #include <asm/io.h> #include <asm/processor.h> @@ -51,3 +52,14 @@ int dram_init (void) void led_set_state (unsigned short value) { } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/st/nhk8815/nhk8815.c b/board/st/nhk8815/nhk8815.c index 085a5e0..c5b8c19 100644 --- a/board/st/nhk8815/nhk8815.c +++ b/board/st/nhk8815/nhk8815.c @@ -26,6 +26,7 @@ */ #include <common.h> +#include <netdev.h> #include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; @@ -77,3 +78,14 @@ int dram_init(void) gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; return 0; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/voiceblue/eeprom.c b/board/voiceblue/eeprom.c index f01597a..2ae46d1 100644 --- a/board/voiceblue/eeprom.c +++ b/board/voiceblue/eeprom.c @@ -27,43 +27,42 @@ #include <common.h> #include <exports.h> #include <timestamp.h> +#include <net.h> #include "../drivers/net/smc91111.h" -#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE - -static u16 read_eeprom_reg(u16 reg) +static u16 read_eeprom_reg(struct eth_device *dev, u16 reg) { int timeout; - SMC_SELECT_BANK(2); - SMC_outw(reg, PTR_REG); + SMC_SELECT_BANK(dev, 2); + SMC_outw(dev, reg, PTR_REG); - SMC_SELECT_BANK(1); - SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD, + SMC_SELECT_BANK(dev, 1); + SMC_outw(dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD, CTL_REG); timeout = 100; - while((SMC_inw (CTL_REG) & CTL_RELOAD) && --timeout) + while((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --timeout) udelay(100); if (timeout == 0) { printf("Timeout Reading EEPROM register %02x\n", reg); return 0; } - return SMC_inw (GP_REG); + return SMC_inw (dev, GP_REG); } -static int write_eeprom_reg(u16 value, u16 reg) +static int write_eeprom_reg(struct eth_device *dev, u16 value, u16 reg) { int timeout; - SMC_SELECT_BANK(2); - SMC_outw(reg, PTR_REG); + SMC_SELECT_BANK(dev, 2); + SMC_outw(dev, reg, PTR_REG); - SMC_SELECT_BANK(1); - SMC_outw(value, GP_REG); - SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG); + SMC_SELECT_BANK(dev, 1); + SMC_outw(dev, value, GP_REG); + SMC_outw(dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG); timeout = 100; - while ((SMC_inw(CTL_REG) & CTL_STORE) && --timeout) + while ((SMC_inw(dev, CTL_REG) & CTL_STORE) && --timeout) udelay (100); if (timeout == 0) { printf("Timeout Writing EEPROM register %02x\n", reg); @@ -73,17 +72,17 @@ static int write_eeprom_reg(u16 value, u16 reg) return 1; } -static int write_data(u16 *buf, int len) +static int write_data(struct eth_device *dev, u16 *buf, int len) { u16 reg = 0x23; while (len--) - write_eeprom_reg(*buf++, reg++); + write_eeprom_reg(dev, *buf++, reg++); return 0; } -static int verify_macaddr(char *s) +static int verify_macaddr(struct eth_device *dev, char *s) { u16 reg; int i, err = 0; @@ -91,7 +90,7 @@ static int verify_macaddr(char *s) printf("MAC Address: "); err = i = 0; for (i = 0; i < 3; i++) { - reg = read_eeprom_reg(0x20 + i); + reg = read_eeprom_reg(dev, 0x20 + i); printf("%02x:%02x%c", reg & 0xff, reg >> 8, i != 2 ? ':' : '\n'); if (s) err |= reg != ((u16 *)s)[i]; @@ -100,7 +99,7 @@ static int verify_macaddr(char *s) return err ? 0 : 1; } -static int set_mac(char *s) +static int set_mac(struct eth_device *dev, char *s) { int i; char *e, eaddr[6]; @@ -112,7 +111,7 @@ static int set_mac(char *s) } for (i = 0; i < 3; i++) - write_eeprom_reg(*(((u16 *)eaddr) + i), 0x20 + i); + write_eeprom_reg(dev, *(((u16 *)eaddr) + i), 0x20 + i); return 0; } @@ -148,6 +147,10 @@ int eeprom(int argc, char *argv[]) int i, len, ret; unsigned char buf[58], *p; + struct eth_device dev = { + .iobase = CONFIG_SMC91111_BASE + }; + app_startup(argv); if (get_version() != XF_VERSION) { printf("Wrong XF_VERSION.\n"); @@ -156,14 +159,14 @@ int eeprom(int argc, char *argv[]) return 1; } - if ((SMC_inw (BANK_SELECT) & 0xFF00) != 0x3300) { + if ((SMC_inw (&dev, BANK_SELECT) & 0xFF00) != 0x3300) { printf("SMSC91111 not found.\n"); return 2; } /* Called without parameters - print MAC address */ if (argc < 2) { - verify_macaddr(NULL); + verify_macaddr(&dev, NULL); return 0; } @@ -197,8 +200,8 @@ int eeprom(int argc, char *argv[]) } /* First argument (MAC) is mandatory */ - set_mac(argv[1]); - if (verify_macaddr(argv[1])) { + set_mac(&dev, argv[1]); + if (verify_macaddr(&dev, argv[1])) { printf("*** MAC address does not match! ***\n"); return 4; } @@ -206,7 +209,7 @@ int eeprom(int argc, char *argv[]) while (len--) *p++ = 0; - write_data((u16 *)buf, sizeof(buf) >> 1); + write_data(&dev, (u16 *)buf, sizeof(buf) >> 1); return 0; } diff --git a/board/voiceblue/voiceblue.c b/board/voiceblue/voiceblue.c index 59b3310..5f8af2b 100644 --- a/board/voiceblue/voiceblue.c +++ b/board/voiceblue/voiceblue.c @@ -20,6 +20,7 @@ */ #include <common.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -66,3 +67,14 @@ int board_late_init(void) return 0; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/xaeniax/xaeniax.c b/board/xaeniax/xaeniax.c index 9baa457..4c19c4d 100644 --- a/board/xaeniax/xaeniax.c +++ b/board/xaeniax/xaeniax.c @@ -29,6 +29,7 @@ */ #include <common.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -71,3 +72,14 @@ int dram_init (void) return 0; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/xm250/xm250.c b/board/xm250/xm250.c index 56b1cd4..246bdde 100644 --- a/board/xm250/xm250.c +++ b/board/xm250/xm250.c @@ -27,6 +27,7 @@ #include <asm/arch/pxa-regs.h> #include <common.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -80,3 +81,14 @@ dram_init (void) return (0); } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/xsengine/xsengine.c b/board/xsengine/xsengine.c index 65923e9..4464fd4 100644 --- a/board/xsengine/xsengine.c +++ b/board/xsengine/xsengine.c @@ -26,6 +26,7 @@ */ #include <common.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -61,3 +62,14 @@ int dram_init (void) return 0; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/board/zylonite/zylonite.c b/board/zylonite/zylonite.c index 5829170..749a40f 100644 --- a/board/zylonite/zylonite.c +++ b/board/zylonite/zylonite.c @@ -26,6 +26,7 @@ */ #include <common.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -68,3 +69,14 @@ int dram_init (void) return 0; } + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 34b56d8..2df075c 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -63,7 +63,7 @@ COBJS-$(CONFIG_RTL8139) += rtl8139.o COBJS-$(CONFIG_RTL8169) += rtl8169.o COBJS-$(CONFIG_DRIVER_S3C4510_ETH) += s3c4510b_eth.o COBJS-$(CONFIG_SH_ETHER) += sh_eth.o -COBJS-$(CONFIG_DRIVER_SMC91111) += smc91111.o +COBJS-$(CONFIG_SMC91111) += smc91111.o COBJS-$(CONFIG_SMC911X) += smc911x.o COBJS-$(CONFIG_TIGON3) += tigon3.o bcm570x_autoneg.o 5701rls.o COBJS-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o diff --git a/drivers/net/smc91111.c b/drivers/net/smc91111.c index b41e4d2..5974c4d 100644 --- a/drivers/net/smc91111.c +++ b/drivers/net/smc91111.c @@ -62,6 +62,7 @@ #include <common.h> #include <command.h> #include <config.h> +#include <malloc.h> #include "smc91111.h" #include <net.h> @@ -128,11 +129,10 @@ static const char version[] = #define LAN91C111_MEMORY_MULTIPLIER (1024*2) #ifndef CONFIG_SMC91111_BASE -#define CONFIG_SMC91111_BASE 0x20000300 +#error "SMC91111 Base address must be passed to initialization funciton" +/* #define CONFIG_SMC91111_BASE 0x20000300 */ #endif -#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE - #define SMC_DEV_NAME "SMC91111" #define SMC_PHY_ADDR 0x0000 #define SMC_ALLOC_MAX_TRY 5 @@ -153,65 +153,26 @@ static const char version[] = . .------------------------------------------------------------------ */ -extern int eth_init(bd_t *bd); -extern void eth_halt(void); -extern int eth_rx(void); -extern int eth_send(volatile void *packet, int length); - #ifdef SHARED_RESOURCES extern void swap_to(int device_id); #endif /* - . This is called by register_netdev(). It is responsible for - . checking the portlist for the SMC9000 series chipset. If it finds - . one, then it will initialize the device, find the hardware information, - . and sets up the appropriate device parameters. - . NOTE: Interrupts are *OFF* when this procedure is called. - . - . NB:This shouldn't be static since it is referred to externally. -*/ -int smc_init(void); - -/* . This is called by unregister_netdev(). It is responsible for . cleaning up before the driver is finally unregistered and discarded. */ void smc_destructor(void); -/* - . The kernel calls this function when someone wants to use the device, - . typically 'ifconfig ethX up'. -*/ -static int smc_open(bd_t *bd); - - -/* - . This is called by the kernel in response to 'ifconfig ethX down'. It - . is responsible for cleaning up everything that the open routine - . does, and maybe putting the card into a powerdown state. -*/ -static int smc_close(void); - -/* - . Configures the PHY through the MII Management interface -*/ #ifndef CONFIG_SMC91111_EXT_PHY -static void smc_phy_configure(void); +static void smc_phy_configure(struct eth_device *dev); #endif /* !CONFIG_SMC91111_EXT_PHY */ -/* - . This is a separate procedure to handle the receipt of a packet, to - . leave the interrupt code looking slightly cleaner -*/ -static int smc_rcv(void); - -/* See if a MAC address is defined in the current environment. If so use it. If not - . print a warning and set the environment and other globals with the default. - . If an EEPROM is present it really should be consulted. -*/ -int smc_get_ethaddr(bd_t *bd); -int get_rom_mac(uchar *v_rom_mac); +/* See if a MAC address is defined in the current environment. If so use it. + * If not, print a warning and set the environment and other globals with the + * default. If an EEPROM is present it really should be consulted. + */ +static int smc_get_ethaddr(struct eth_device *dev); +static int get_rom_mac(struct eth_device *dev, uchar *v_rom_mac); /* ------------------------------------------------------------ @@ -233,65 +194,63 @@ int get_rom_mac(uchar *v_rom_mac); * packets being corrupt (shifted) on the wire, etc. Switching to the * inx,outx functions fixed this problem. */ -static inline word SMC_inw(dword offset); -static inline void SMC_outw(word value, dword offset); -static inline byte SMC_inb(dword offset); -static inline void SMC_outb(byte value, dword offset); -static inline void SMC_insw(dword offset, volatile uchar* buf, dword len); -static inline void SMC_outsw(dword offset, uchar* buf, dword len); #define barrier() __asm__ __volatile__("": : :"memory") -static inline word SMC_inw(dword offset) +static inline word SMC_inw(struct eth_device *dev, dword offset) { word v; - v = *((volatile word*)(SMC_BASE_ADDRESS+offset)); + v = *((volatile word*)(dev->iobase + offset)); barrier(); *(volatile u32*)(0xc0000000); return v; } -static inline void SMC_outw(word value, dword offset) +static inline void SMC_outw(struct eth_device *dev, word value, dword offset) { - *((volatile word*)(SMC_BASE_ADDRESS+offset)) = value; + *((volatile word*)(dev->iobase + offset)) = value; barrier(); *(volatile u32*)(0xc0000000); } -static inline byte SMC_inb(dword offset) +static inline byte SMC_inb(struct eth_device *dev, dword offset) { word _w; - _w = SMC_inw(offset & ~((dword)1)); + _w = SMC_inw(dev, offset & ~((dword)1)); return (offset & 1) ? (byte)(_w >> 8) : (byte)(_w); } -static inline void SMC_outb(byte value, dword offset) +static inline void SMC_outb(struct eth_device *dev, byte value, dword offset) { word _w; - _w = SMC_inw(offset & ~((dword)1)); + _w = SMC_inw(dev, offset & ~((dword)1)); if (offset & 1) - *((volatile word*)(SMC_BASE_ADDRESS+(offset & ~((dword)1)))) = (value<<8) | (_w & 0x00ff); + *((volatile word*)(dev->iobase + (offset & ~((dword)1)))) = + (value<<8) | (_w & 0x00ff); else - *((volatile word*)(SMC_BASE_ADDRESS+offset)) = value | (_w & 0xff00); + *((volatile word*)(dev->iobase + offset)) = + value | (_w & 0xff00); } -static inline void SMC_insw(dword offset, volatile uchar* buf, dword len) +static inline void SMC_insw(struct eth_device *dev, dword offset, + volatile uchar* buf, dword len) { volatile word *p = (volatile word *)buf; while (len-- > 0) { - *p++ = SMC_inw(offset); + *p++ = SMC_inw(dev, offset); barrier(); *((volatile u32*)(0xc0000000)); } } -static inline void SMC_outsw(dword offset, uchar* buf, dword len) +static inline void SMC_outsw(struct eth_device *dev, dword offset, + uchar* buf, dword len) { volatile word *p = (volatile word *)buf; while (len-- > 0) { - SMC_outw(*p++, offset); + SMC_outw(dev, *p++, offset); barrier(); *(volatile u32*)(0xc0000000); } @@ -339,18 +298,18 @@ void smc_get_macaddr( byte *addr ) { /*********************************************** * Show available memory * ***********************************************/ -void dump_memory_info(void) +void dump_memory_info(struct eth_device *dev) { word mem_info; word old_bank; - old_bank = SMC_inw(BANK_SELECT)&0xF; + old_bank = SMC_inw(dev, BANK_SELECT)&0xF; - SMC_SELECT_BANK(0); - mem_info = SMC_inw( MIR_REG ); + SMC_SELECT_BANK(dev, 0); + mem_info = SMC_inw( dev, MIR_REG ); PRINTK2("Memory: %4d available\n", (mem_info >> 8)*2048); - SMC_SELECT_BANK(old_bank); + SMC_SELECT_BANK(dev, old_bank); } /* . A rather simple routine to print out a packet for debugging purposes. @@ -361,35 +320,15 @@ static void print_packet( byte *, int ); #define tx_done(dev) 1 - -/* this does a soft reset on the device */ -static void smc_reset( void ); - -/* Enable Interrupts, Receive, and Transmit */ -static void smc_enable( void ); - -/* this puts the device in an inactive state */ -static void smc_shutdown( void ); - -/* Routines to Read and Write the PHY Registers across the - MII Management Interface -*/ - -#ifndef CONFIG_SMC91111_EXT_PHY -static word smc_read_phy_register(byte phyreg); -static void smc_write_phy_register(byte phyreg, word phydata); -#endif /* !CONFIG_SMC91111_EXT_PHY */ - - -static int poll4int (byte mask, int timeout) +static int poll4int (struct eth_device *dev, byte mask, int timeout) { int tmo = get_timer (0) + timeout * CONFIG_SYS_HZ; int is_timeout = 0; - word old_bank = SMC_inw (BSR_REG); + word old_bank = SMC_inw (dev, BSR_REG); PRINTK2 ("Polling...\n"); - SMC_SELECT_BANK (2); - while ((SMC_inw (SMC91111_INT_REG) & mask) == 0) { + SMC_SELECT_BANK (dev, 2); + while ((SMC_inw (dev, SMC91111_INT_REG) & mask) == 0) { if (get_timer (0) >= tmo) { is_timeout = 1; break; @@ -397,7 +336,7 @@ static int poll4int (byte mask, int timeout) } /* restore old bank selection */ - SMC_SELECT_BANK (old_bank); + SMC_SELECT_BANK (dev, old_bank); if (is_timeout) return 1; @@ -406,12 +345,12 @@ static int poll4int (byte mask, int timeout) } /* Only one release command at a time, please */ -static inline void smc_wait_mmu_release_complete (void) +static inline void smc_wait_mmu_release_complete (struct eth_device *dev) { int count = 0; /* assume bank 2 selected */ - while (SMC_inw (MMU_CMD_REG) & MC_BUSY) { + while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) { udelay (1); /* Wait until not busy */ if (++count > 200) break; @@ -435,49 +374,50 @@ static inline void smc_wait_mmu_release_complete (void) . 5. clear all interrupts . */ -static void smc_reset (void) +static void smc_reset (struct eth_device *dev) { PRINTK2 ("%s: smc_reset\n", SMC_DEV_NAME); /* This resets the registers mostly to defaults, but doesn't affect EEPROM. That seems unnecessary */ - SMC_SELECT_BANK (0); - SMC_outw (RCR_SOFTRST, RCR_REG); + SMC_SELECT_BANK (dev, 0); + SMC_outw (dev, RCR_SOFTRST, RCR_REG); /* Setup the Configuration Register */ /* This is necessary because the CONFIG_REG is not affected */ /* by a soft reset */ - SMC_SELECT_BANK (1); + SMC_SELECT_BANK (dev, 1); #if defined(CONFIG_SMC91111_EXT_PHY) - SMC_outw (CONFIG_DEFAULT | CONFIG_EXT_PHY, CONFIG_REG); + SMC_outw (dev, CONFIG_DEFAULT | CONFIG_EXT_PHY, CONFIG_REG); #else - SMC_outw (CONFIG_DEFAULT, CONFIG_REG); + SMC_outw (dev, CONFIG_DEFAULT, CONFIG_REG); #endif /* Release from possible power-down state */ /* Configuration register is not affected by Soft Reset */ - SMC_outw (SMC_inw (CONFIG_REG) | CONFIG_EPH_POWER_EN, CONFIG_REG); + SMC_outw (dev, SMC_inw (dev, CONFIG_REG) | CONFIG_EPH_POWER_EN, + CONFIG_REG); - SMC_SELECT_BANK (0); + SMC_SELECT_BANK (dev, 0); /* this should pause enough for the chip to be happy */ udelay (10); /* Disable transmit and receive functionality */ - SMC_outw (RCR_CLEAR, RCR_REG); - SMC_outw (TCR_CLEAR, TCR_REG); + SMC_outw (dev, RCR_CLEAR, RCR_REG); + SMC_outw (dev, TCR_CLEAR, TCR_REG); /* set the control register */ - SMC_SELECT_BANK (1); - SMC_outw (CTL_DEFAULT, CTL_REG); + SMC_SELECT_BANK (dev, 1); + SMC_outw (dev, CTL_DEFAULT, CTL_REG); /* Reset the MMU */ - SMC_SELECT_BANK (2); - smc_wait_mmu_release_complete (); - SMC_outw (MC_RESET, MMU_CMD_REG); - while (SMC_inw (MMU_CMD_REG) & MC_BUSY) + SMC_SELECT_BANK (dev, 2); + smc_wait_mmu_release_complete (dev); + SMC_outw (dev, MC_RESET, MMU_CMD_REG); + while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) udelay (1); /* Wait until not busy */ /* Note: It doesn't seem that waiting for the MMU busy is needed here, @@ -485,7 +425,7 @@ static void smc_reset (void) of issuing another MMU command right after this */ /* Disable all interrupts */ - SMC_outb (0, IM_REG); + SMC_outb (dev, 0, IM_REG); } /* @@ -496,13 +436,13 @@ static void smc_reset (void) . 2. Enable the receiver . 3. Enable interrupts */ -static void smc_enable() +static void smc_enable(struct eth_device *dev) { PRINTK2("%s: smc_enable\n", SMC_DEV_NAME); - SMC_SELECT_BANK( 0 ); + SMC_SELECT_BANK( dev, 0 ); /* see the header file for options in TCR/RCR DEFAULT*/ - SMC_outw( TCR_DEFAULT, TCR_REG ); - SMC_outw( RCR_DEFAULT, RCR_REG ); + SMC_outw( dev, TCR_DEFAULT, TCR_REG ); + SMC_outw( dev, RCR_DEFAULT, RCR_REG ); /* clear MII_DIS */ /* smc_write_phy_register(PHY_CNTL_REG, 0x0000); */ @@ -522,18 +462,18 @@ static void smc_enable() . the manual says that it will wake up in response to any I/O requests . in the register space. Empirical results do not show this working. */ -static void smc_shutdown() +static void smc_shutdown(struct eth_device *dev) { PRINTK2(CARDNAME ": smc_shutdown\n"); /* no more interrupts for me */ - SMC_SELECT_BANK( 2 ); - SMC_outb( 0, IM_REG ); + SMC_SELECT_BANK( dev, 2 ); + SMC_outb( dev, 0, IM_REG ); /* and tell the card to stay away from that nasty outside world */ - SMC_SELECT_BANK( 0 ); - SMC_outb( RCR_CLEAR, RCR_REG ); - SMC_outb( TCR_CLEAR, TCR_REG ); + SMC_SELECT_BANK( dev, 0 ); + SMC_outb( dev, RCR_CLEAR, RCR_REG ); + SMC_outb( dev, TCR_CLEAR, TCR_REG ); #ifdef SHARED_RESOURCES swap_to(FLASH); #endif @@ -558,10 +498,10 @@ static void smc_shutdown() . Enable the transmit interrupt, so I know if it failed . Free the kernel data if I actually sent it. */ -static int smc_send_packet (volatile void *packet, int packet_length) +static int smc_send_packet (struct eth_device *dev, volatile void *packet, + int packet_length) { byte packet_no; - unsigned long ioaddr; byte *buf; int length; int numPages; @@ -572,9 +512,9 @@ static int smc_send_packet (volatile void *packet, int packet_length) word saved_ptr; /* save PTR and PNR registers before manipulation */ - SMC_SELECT_BANK (2); - saved_pnr = SMC_inb( PN_REG ); - saved_ptr = SMC_inw( PTR_REG ); + SMC_SELECT_BANK (dev, 2); + saved_pnr = SMC_inb( dev, PN_REG ); + saved_ptr = SMC_inw( dev, PTR_REG ); PRINTK3 ("%s: smc_hardware_send_packet\n", SMC_DEV_NAME); @@ -601,8 +541,8 @@ static int smc_send_packet (volatile void *packet, int packet_length) } /* now, try to allocate the memory */ - SMC_SELECT_BANK (2); - SMC_outw (MC_ALLOC | numPages, MMU_CMD_REG); + SMC_SELECT_BANK (dev, 2); + SMC_outw (dev, MC_ALLOC | numPages, MMU_CMD_REG); /* FIXME: the ALLOC_INT bit never gets set * * so the following will always give a * @@ -615,10 +555,10 @@ again: try++; time_out = MEMORY_WAIT_TIME; do { - status = SMC_inb (SMC91111_INT_REG); + status = SMC_inb (dev, SMC91111_INT_REG); if (status & IM_ALLOC_INT) { /* acknowledge the interrupt */ - SMC_outb (IM_ALLOC_INT, SMC91111_INT_REG); + SMC_outb (dev, IM_ALLOC_INT, SMC91111_INT_REG); break; } } while (--time_out); @@ -635,14 +575,10 @@ again: PRINTK2 ("%s: memory allocation, try %d succeeded ...\n", SMC_DEV_NAME, try); - /* I can send the packet now.. */ - - ioaddr = SMC_BASE_ADDRESS; - buf = (byte *) packet; /* If I get here, I _know_ there is a packet slot waiting for me */ - packet_no = SMC_inb (AR_REG); + packet_no = SMC_inb (dev, AR_REG); if (packet_no & AR_FAILED) { /* or isn't there? BAD CHIP! */ printf ("%s: Memory allocation failed. \n", SMC_DEV_NAME); @@ -651,20 +587,20 @@ again: /* we have a packet address, so tell the card to use it */ #ifndef CONFIG_XAENIAX - SMC_outb (packet_no, PN_REG); + SMC_outb (dev, packet_no, PN_REG); #else /* On Xaeniax board, we can't use SMC_outb here because that way * the Allocate MMU command will end up written to the command register * as well, which will lead to a problem. */ - SMC_outl (packet_no << 16, 0); + SMC_outl (dev, packet_no << 16, 0); #endif /* do not write new ptr value if Write data fifo not empty */ while ( saved_ptr & PTR_NOTEMPTY ) printf ("Write data fifo not empty!\n"); /* point to the beginning of the packet */ - SMC_outw (PTR_AUTOINC, PTR_REG); + SMC_outw (dev, PTR_AUTOINC, PTR_REG); PRINTK3 ("%s: Trying to xmit packet of length %x\n", SMC_DEV_NAME, length); @@ -677,11 +613,11 @@ again: /* send the packet length ( +6 for status, length and ctl byte ) and the status word ( set to zeros ) */ #ifdef USE_32_BIT - SMC_outl ((length + 6) << 16, SMC91111_DATA_REG); + SMC_outl (dev, (length + 6) << 16, SMC91111_DATA_REG); #else - SMC_outw (0, SMC91111_DATA_REG); + SMC_outw (dev, 0, SMC91111_DATA_REG); /* send the packet length ( +6 for status words, length, and ctl */ - SMC_outw ((length + 6), SMC91111_DATA_REG); + SMC_outw (dev, (length + 6), SMC91111_DATA_REG); #endif /* send the actual data @@ -692,10 +628,10 @@ again: . almost as much time as is saved? */ #ifdef USE_32_BIT - SMC_outsl (SMC91111_DATA_REG, buf, length >> 2); + SMC_outsl (dev, SMC91111_DATA_REG, buf, length >> 2); #ifndef CONFIG_XAENIAX if (length & 0x2) - SMC_outw (*((word *) (buf + (length & 0xFFFFFFFC))), + SMC_outw (dev, *((word *) (buf + (length & 0xFFFFFFFC))), SMC91111_DATA_REG); #else /* On XANEIAX, we can only use 32-bit writes, so we need to handle @@ -703,48 +639,48 @@ again: */ if ((length & 3) == 3) { u16 * ptr = (u16*) &buf[length-3]; - SMC_outl((*ptr) | ((0x2000 | buf[length-1]) << 16), + SMC_outl(dev, (*ptr) | ((0x2000 | buf[length-1]) << 16), SMC91111_DATA_REG); } else if ((length & 2) == 2) { u16 * ptr = (u16*) &buf[length-2]; - SMC_outl(*ptr, SMC91111_DATA_REG); + SMC_outl(dev, *ptr, SMC91111_DATA_REG); } else if (length & 1) { - SMC_outl((0x2000 | buf[length-1]), SMC91111_DATA_REG); + SMC_outl(dev, (0x2000 | buf[length-1]), SMC91111_DATA_REG); } else { - SMC_outl(0, SMC91111_DATA_REG); + SMC_outl(dev, 0, SMC91111_DATA_REG); } #endif #else - SMC_outsw (SMC91111_DATA_REG, buf, (length) >> 1); + SMC_outsw (dev, SMC91111_DATA_REG, buf, (length) >> 1); #endif /* USE_32_BIT */ #ifndef CONFIG_XAENIAX /* Send the last byte, if there is one. */ if ((length & 1) == 0) { - SMC_outw (0, SMC91111_DATA_REG); + SMC_outw (dev, 0, SMC91111_DATA_REG); } else { - SMC_outw (buf[length - 1] | 0x2000, SMC91111_DATA_REG); + SMC_outw (dev, buf[length - 1] | 0x2000, SMC91111_DATA_REG); } #endif /* and let the chipset deal with it */ - SMC_outw (MC_ENQUEUE, MMU_CMD_REG); + SMC_outw (dev, MC_ENQUEUE, MMU_CMD_REG); /* poll for TX INT */ - /* if (poll4int (IM_TX_INT, SMC_TX_TIMEOUT)) { */ + /* if (poll4int (dev, IM_TX_INT, SMC_TX_TIMEOUT)) { */ /* poll for TX_EMPTY INT - autorelease enabled */ - if (poll4int(IM_TX_EMPTY_INT, SMC_TX_TIMEOUT)) { + if (poll4int(dev, IM_TX_EMPTY_INT, SMC_TX_TIMEOUT)) { /* sending failed */ PRINTK2 ("%s: TX timeout, sending failed...\n", SMC_DEV_NAME); /* release packet */ /* no need to release, MMU does that now */ #ifdef CONFIG_XAENIAX - SMC_outw (MC_FREEPKT, MMU_CMD_REG); + SMC_outw (dev, MC_FREEPKT, MMU_CMD_REG); #endif /* wait for MMU getting ready (low) */ - while (SMC_inw (MMU_CMD_REG) & MC_BUSY) { + while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) { udelay (10); } @@ -754,7 +690,7 @@ again: return 0; } else { /* ack. int */ - SMC_outb (IM_TX_EMPTY_INT, SMC91111_INT_REG); + SMC_outb (dev, IM_TX_EMPTY_INT, SMC91111_INT_REG); /* SMC_outb (IM_TX_INT, SMC91111_INT_REG); */ PRINTK2 ("%s: Sent packet of length %d \n", SMC_DEV_NAME, length); @@ -762,11 +698,11 @@ again: /* release packet */ /* no need to release, MMU does that now */ #ifdef CONFIG_XAENIAX - SMC_outw (MC_FREEPKT, MMU_CMD_REG); + SMC_outw (dev, MC_FREEPKT, MMU_CMD_REG); #endif /* wait for MMU getting ready (low) */ - while (SMC_inw (MMU_CMD_REG) & MC_BUSY) { + while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) { udelay (10); } @@ -777,15 +713,15 @@ again: /* restore previously saved registers */ #ifndef CONFIG_XAENIAX - SMC_outb( saved_pnr, PN_REG ); + SMC_outb( dev, saved_pnr, PN_REG ); #else /* On Xaeniax board, we can't use SMC_outb here because that way * the Allocate MMU command will end up written to the command register * as well, which will lead to a problem. */ - SMC_outl(saved_pnr << 16, 0); + SMC_outl(dev, saved_pnr << 16, 0); #endif - SMC_outw( saved_ptr, PTR_REG ); + SMC_outw( dev, saved_ptr, PTR_REG ); return length; } @@ -813,27 +749,28 @@ void smc_destructor() * Set up everything, reset the card, etc .. * */ -static int smc_open (bd_t * bd) +static int smc_open (struct eth_device *dev) { int i, err; PRINTK2 ("%s: smc_open\n", SMC_DEV_NAME); /* reset the hardware */ - smc_reset (); - smc_enable (); + smc_reset (dev); + smc_enable (dev); /* Configure the PHY */ #ifndef CONFIG_SMC91111_EXT_PHY - smc_phy_configure (); + smc_phy_configure (dev); #endif /* conservative setting (10Mbps, HalfDuplex, no AutoNeg.) */ -/* SMC_SELECT_BANK(0); */ -/* SMC_outw(0, RPC_REG); */ - SMC_SELECT_BANK (1); +/* SMC_SELECT_BANK(dev, 0); */ +/* SMC_outw(dev, 0, RPC_REG); */ + SMC_SELECT_BANK (dev, 1); - err = smc_get_ethaddr (bd); /* set smc_mac_addr, and sync it with u-boot globals */ + /* set smc_mac_addr, and sync it with u-boot globals */ + err = smc_get_ethaddr (dev); if (err < 0) return -1; #ifdef USE_32_BIT @@ -842,11 +779,11 @@ static int smc_open (bd_t * bd) address = smc_mac_addr[i + 1] << 8; address |= smc_mac_addr[i]; - SMC_outw (address, (ADDR0_REG + i)); + SMC_outw (dev, address, (ADDR0_REG + i)); } #else for (i = 0; i < 6; i++) - SMC_outb (smc_mac_addr[i], (ADDR0_REG + i)); + SMC_outb (dev, smc_mac_addr[i], (ADDR0_REG + i)); #endif return 0; @@ -864,7 +801,7 @@ static int smc_open (bd_t * bd) . o otherwise, read in the packet -------------------------------------------------------------- */ -static int smc_rcv() +static int smc_rcv(struct eth_device *dev) { int packet_number; word status; @@ -876,12 +813,12 @@ static int smc_rcv() byte saved_pnr; word saved_ptr; - SMC_SELECT_BANK(2); + SMC_SELECT_BANK(dev, 2); /* save PTR and PTR registers */ - saved_pnr = SMC_inb( PN_REG ); - saved_ptr = SMC_inw( PTR_REG ); + saved_pnr = SMC_inb( dev, PN_REG ); + saved_ptr = SMC_inw( dev, PTR_REG ); - packet_number = SMC_inw( RXFIFO_REG ); + packet_number = SMC_inw( dev, RXFIFO_REG ); if ( packet_number & RXFIFO_REMPTY ) { @@ -890,16 +827,16 @@ static int smc_rcv() PRINTK3("%s: smc_rcv\n", SMC_DEV_NAME); /* start reading from the start of the packet */ - SMC_outw( PTR_READ | PTR_RCV | PTR_AUTOINC, PTR_REG ); + SMC_outw( dev, PTR_READ | PTR_RCV | PTR_AUTOINC, PTR_REG ); /* First two words are status and packet_length */ #ifdef USE_32_BIT - stat_len = SMC_inl(SMC91111_DATA_REG); + stat_len = SMC_inl(dev, SMC91111_DATA_REG); status = stat_len & 0xffff; packet_length = stat_len >> 16; #else - status = SMC_inw( SMC91111_DATA_REG ); - packet_length = SMC_inw( SMC91111_DATA_REG ); + status = SMC_inw( dev, SMC91111_DATA_REG ); + packet_length = SMC_inw( dev, SMC91111_DATA_REG ); #endif packet_length &= 0x07ff; /* mask off top bits */ @@ -923,20 +860,23 @@ static int smc_rcv() to send the DWORDs or the bytes first, or some mixture. A mixture might improve already slow PIO performance */ - SMC_insl( SMC91111_DATA_REG , NetRxPackets[0], packet_length >> 2 ); + SMC_insl( dev, SMC91111_DATA_REG, NetRxPackets[0], + packet_length >> 2 ); /* read the left over bytes */ if (packet_length & 3) { int i; - byte *tail = (byte *)(NetRxPackets[0] + (packet_length & ~3)); - dword leftover = SMC_inl(SMC91111_DATA_REG); + byte *tail = (byte *)(NetRxPackets[0] + + (packet_length & ~3)); + dword leftover = SMC_inl(dev, SMC91111_DATA_REG); for (i=0; i<(packet_length & 3); i++) *tail++ = (byte) (leftover >> (8*i)) & 0xff; } #else PRINTK3(" Reading %d words and %d byte(s) \n", (packet_length >> 1 ), packet_length & 1 ); - SMC_insw(SMC91111_DATA_REG , NetRxPackets[0], packet_length >> 1); + SMC_insw(dev, SMC91111_DATA_REG , NetRxPackets[0], + packet_length >> 1); #endif /* USE_32_BIT */ @@ -950,26 +890,26 @@ static int smc_rcv() is_error = 1; } - while ( SMC_inw( MMU_CMD_REG ) & MC_BUSY ) + while ( SMC_inw( dev, MMU_CMD_REG ) & MC_BUSY ) udelay(1); /* Wait until not busy */ /* error or good, tell the card to get rid of this packet */ - SMC_outw( MC_RELEASE, MMU_CMD_REG ); + SMC_outw( dev, MC_RELEASE, MMU_CMD_REG ); - while ( SMC_inw( MMU_CMD_REG ) & MC_BUSY ) + while ( SMC_inw( dev, MMU_CMD_REG ) & MC_BUSY ) udelay(1); /* Wait until not busy */ /* restore saved registers */ #ifndef CONFIG_XAENIAX - SMC_outb( saved_pnr, PN_REG ); + SMC_outb( dev, saved_pnr, PN_REG ); #else /* On Xaeniax board, we can't use SMC_outb here because that way * the Allocate MMU command will end up written to the command register * as well, which will lead to a problem. */ - SMC_outl( saved_pnr << 16, 0); + SMC_outl( dev, saved_pnr << 16, 0); #endif - SMC_outw( saved_ptr, PTR_REG ); + SMC_outw( dev, saved_ptr, PTR_REG ); if (!is_error) { /* Pass the packet up to the protocol layers. */ @@ -990,12 +930,12 @@ static int smc_rcv() . an 'ifconfig ethX down' . -----------------------------------------------------*/ -static int smc_close() +static int smc_close(struct eth_device *dev) { PRINTK2("%s: smc_close\n", SMC_DEV_NAME); /* clear everything */ - smc_shutdown(); + smc_shutdown(dev); return 0; } @@ -1005,20 +945,20 @@ static int smc_close() /*------------------------------------------------------------ . Modify a bit in the LAN91C111 register set .-------------------------------------------------------------*/ -static word smc_modify_regbit(int bank, int ioaddr, int reg, +static word smc_modify_regbit(struct eth_device *dev, int bank, int ioaddr, int reg, unsigned int bit, int val) { word regval; - SMC_SELECT_BANK( bank ); + SMC_SELECT_BANK( dev, bank ); - regval = SMC_inw( reg ); + regval = SMC_inw( dev, reg ); if (val) regval |= bit; else regval &= ~bit; - SMC_outw( regval, 0 ); + SMC_outw( dev, regval, 0 ); return(regval); } @@ -1026,10 +966,10 @@ static word smc_modify_regbit(int bank, int ioaddr, int reg, /*------------------------------------------------------------ . Retrieve a bit in the LAN91C111 register set .-------------------------------------------------------------*/ -static int smc_get_regbit(int bank, int ioaddr, int reg, unsigned int bit) +static int smc_get_regbit(struct eth_device *dev, int bank, int ioaddr, int reg, unsigned int bit) { - SMC_SELECT_BANK( bank ); - if ( SMC_inw( reg ) & bit) + SMC_SELECT_BANK( dev, bank ); + if ( SMC_inw( dev, reg ) & bit) return(1); else return(0); @@ -1039,20 +979,20 @@ static int smc_get_regbit(int bank, int ioaddr, int reg, unsigned int bit) /*------------------------------------------------------------ . Modify a LAN91C111 register (word access only) .-------------------------------------------------------------*/ -static void smc_modify_reg(int bank, int ioaddr, int reg, word val) +static void smc_modify_reg(struct eth_device *dev, int bank, int ioaddr, int reg, word val) { - SMC_SELECT_BANK( bank ); - SMC_outw( val, reg ); + SMC_SELECT_BANK( dev, bank ); + SMC_outw( dev, val, reg ); } /*------------------------------------------------------------ . Retrieve a LAN91C111 register (word access only) .-------------------------------------------------------------*/ -static int smc_get_reg(int bank, int ioaddr, int reg) +static int smc_get_reg(struct eth_device *dev, int bank, int ioaddr, int reg) { - SMC_SELECT_BANK( bank ); - return(SMC_inw( reg )); + SMC_SELECT_BANK( dev, bank ); + return(SMC_inw( dev, reg )); } #endif /* 0 */ @@ -1105,7 +1045,7 @@ static void smc_dump_mii_stream (byte * bits, int size) . Reads a register from the MII Management serial interface .-------------------------------------------------------------*/ #ifndef CONFIG_SMC91111_EXT_PHY -static word smc_read_phy_register (byte phyreg) +static word smc_read_phy_register (struct eth_device *dev, byte phyreg) { int oldBank; int i; @@ -1168,13 +1108,13 @@ static word smc_read_phy_register (byte phyreg) bits[clk_idx++] = 0; /* Save the current bank */ - oldBank = SMC_inw (BANK_SELECT); + oldBank = SMC_inw (dev, BANK_SELECT); /* Select bank 3 */ - SMC_SELECT_BANK (3); + SMC_SELECT_BANK (dev, 3); /* Get the current MII register value */ - mii_reg = SMC_inw (MII_REG); + mii_reg = SMC_inw (dev, MII_REG); /* Turn off all MII Interface bits */ mii_reg &= ~(MII_MDOE | MII_MCLK | MII_MDI | MII_MDO); @@ -1182,23 +1122,23 @@ static word smc_read_phy_register (byte phyreg) /* Clock all 64 cycles */ for (i = 0; i < sizeof bits; ++i) { /* Clock Low - output data */ - SMC_outw (mii_reg | bits[i], MII_REG); + SMC_outw (dev, mii_reg | bits[i], MII_REG); udelay (SMC_PHY_CLOCK_DELAY); /* Clock Hi - input data */ - SMC_outw (mii_reg | bits[i] | MII_MCLK, MII_REG); + SMC_outw (dev, mii_reg | bits[i] | MII_MCLK, MII_REG); udelay (SMC_PHY_CLOCK_DELAY); - bits[i] |= SMC_inw (MII_REG) & MII_MDI; + bits[i] |= SMC_inw (dev, MII_REG) & MII_MDI; } /* Return to idle state */ /* Set clock to low, data to low, and output tristated */ - SMC_outw (mii_reg, MII_REG); + SMC_outw (dev, mii_reg, MII_REG); udelay (SMC_PHY_CLOCK_DELAY); /* Restore original bank select */ - SMC_SELECT_BANK (oldBank); + SMC_SELECT_BANK (dev, oldBank); /* Recover input data */ phydata = 0; @@ -1222,7 +1162,8 @@ static word smc_read_phy_register (byte phyreg) /*------------------------------------------------------------ . Writes a register to the MII Management serial interface .-------------------------------------------------------------*/ -static void smc_write_phy_register (byte phyreg, word phydata) +static void smc_write_phy_register (struct eth_device *dev, byte phyreg, + word phydata) { int oldBank; int i; @@ -1288,13 +1229,13 @@ static void smc_write_phy_register (byte phyreg, word phydata) bits[clk_idx++] = 0; /* Save the current bank */ - oldBank = SMC_inw (BANK_SELECT); + oldBank = SMC_inw (dev, BANK_SELECT); /* Select bank 3 */ - SMC_SELECT_BANK (3); + SMC_SELECT_BANK (dev, 3); /* Get the current MII register value */ - mii_reg = SMC_inw (MII_REG); + mii_reg = SMC_inw (dev, MII_REG); /* Turn off all MII Interface bits */ mii_reg &= ~(MII_MDOE | MII_MCLK | MII_MDI | MII_MDO); @@ -1302,23 +1243,23 @@ static void smc_write_phy_register (byte phyreg, word phydata) /* Clock all cycles */ for (i = 0; i < sizeof bits; ++i) { /* Clock Low - output data */ - SMC_outw (mii_reg | bits[i], MII_REG); + SMC_outw (dev, mii_reg | bits[i], MII_REG); udelay (SMC_PHY_CLOCK_DELAY); /* Clock Hi - input data */ - SMC_outw (mii_reg | bits[i] | MII_MCLK, MII_REG); + SMC_outw (dev, mii_reg | bits[i] | MII_MCLK, MII_REG); udelay (SMC_PHY_CLOCK_DELAY); - bits[i] |= SMC_inw (MII_REG) & MII_MDI; + bits[i] |= SMC_inw (dev, MII_REG) & MII_MDI; } /* Return to idle state */ /* Set clock to low, data to low, and output tristated */ - SMC_outw (mii_reg, MII_REG); + SMC_outw (dev, mii_reg, MII_REG); udelay (SMC_PHY_CLOCK_DELAY); /* Restore original bank select */ - SMC_SELECT_BANK (oldBank); + SMC_SELECT_BANK (dev, oldBank); #if (SMC_DEBUG > 2 ) printf ("smc_write_phy_register(): phyaddr=%x,phyreg=%x,phydata=%x\n", @@ -1345,7 +1286,7 @@ static void smc_wait_ms(unsigned int ms) . smc_phy_fixed() if the user has requested a certain config. .-------------------------------------------------------------*/ #ifndef CONFIG_SMC91111_EXT_PHY -static void smc_phy_configure () +static void smc_phy_configure (struct eth_device *dev) { int timeout; byte phyaddr; @@ -1361,12 +1302,12 @@ static void smc_phy_configure () phyaddr = SMC_PHY_ADDR; /* Reset the PHY, setting all other bits to zero */ - smc_write_phy_register (PHY_CNTL_REG, PHY_CNTL_RST); + smc_write_phy_register (dev, PHY_CNTL_REG, PHY_CNTL_RST); /* Wait for the reset to complete, or time out */ timeout = 6; /* Wait up to 3 seconds */ while (timeout--) { - if (!(smc_read_phy_register (PHY_CNTL_REG) + if (!(smc_read_phy_register (dev, PHY_CNTL_REG) & PHY_CNTL_RST)) { /* reset complete */ break; @@ -1385,14 +1326,14 @@ static void smc_phy_configure () /* Enable PHY Interrupts (for register 18) */ /* Interrupts listed here are disabled */ - smc_write_phy_register (PHY_MASK_REG, 0xffff); + smc_write_phy_register (dev, PHY_MASK_REG, 0xffff); /* Configure the Receive/Phy Control register */ - SMC_SELECT_BANK (0); - SMC_outw (RPC_DEFAULT, RPC_REG); + SMC_SELECT_BANK (dev, 0); + SMC_outw (dev, RPC_DEFAULT, RPC_REG); /* Copy our capabilities from PHY_STAT_REG to PHY_AD_REG */ - my_phy_caps = smc_read_phy_register (PHY_STAT_REG); + my_phy_caps = smc_read_phy_register (dev, PHY_STAT_REG); my_ad_caps = PHY_AD_CSMA; /* I am CSMA capable */ if (my_phy_caps & PHY_STAT_CAP_T4) @@ -1411,18 +1352,18 @@ static void smc_phy_configure () my_ad_caps |= PHY_AD_10_HDX; /* Update our Auto-Neg Advertisement Register */ - smc_write_phy_register (PHY_AD_REG, my_ad_caps); + smc_write_phy_register (dev, PHY_AD_REG, my_ad_caps); /* Read the register back. Without this, it appears that when */ /* auto-negotiation is restarted, sometimes it isn't ready and */ /* the link does not come up. */ - smc_read_phy_register(PHY_AD_REG); + smc_read_phy_register(dev, PHY_AD_REG); PRINTK2 ("%s: phy caps=%x\n", SMC_DEV_NAME, my_phy_caps); PRINTK2 ("%s: phy advertised caps=%x\n", SMC_DEV_NAME, my_ad_caps); /* Restart auto-negotiation process in order to advertise my caps */ - smc_write_phy_register (PHY_CNTL_REG, + smc_write_phy_register (dev, PHY_CNTL_REG, PHY_CNTL_ANEG_EN | PHY_CNTL_ANEG_RST); /* Wait for the auto-negotiation to complete. This may take from */ @@ -1431,7 +1372,7 @@ static void smc_phy_configure () timeout = CONFIG_SMC_AUTONEG_TIMEOUT * 2; while (timeout--) { - status = smc_read_phy_register (PHY_STAT_REG); + status = smc_read_phy_register (dev, PHY_STAT_REG); if (status & PHY_STAT_ANEG_ACK) { /* auto-negotiate complete */ break; @@ -1447,7 +1388,7 @@ static void smc_phy_configure () /* Restart auto-negotiation */ printf ("%s: PHY restarting auto-negotiation\n", SMC_DEV_NAME); - smc_write_phy_register (PHY_CNTL_REG, + smc_write_phy_register (dev, PHY_CNTL_REG, PHY_CNTL_ANEG_EN | PHY_CNTL_ANEG_RST | PHY_CNTL_SPEED | @@ -1467,7 +1408,7 @@ static void smc_phy_configure () } /* Re-Configure the Receive/Phy Control register */ - SMC_outw (RPC_DEFAULT, RPC_REG); + SMC_outw (dev, RPC_DEFAULT, RPC_REG); smc_phy_configure_exit: ; @@ -1512,36 +1453,45 @@ static void print_packet( byte * buf, int length ) } #endif -int eth_init(bd_t *bd) { +static int smc91111_init(struct eth_device *dev, bd_t *bd) { #ifdef SHARED_RESOURCES swap_to(ETHERNET); #endif - return (smc_open(bd)); + return (smc_open(dev)); } -void eth_halt() { - smc_close(); +static void smc91111_halt(struct eth_device *dev) { + smc_close(dev); } -int eth_rx() { - return smc_rcv(); +static int smc91111_rx(struct eth_device *dev) { + return smc_rcv(dev); } -int eth_send(volatile void *packet, int length) { - return smc_send_packet(packet, length); +static int smc91111_send(struct eth_device *dev, volatile void *packet, + int length) { + return smc_send_packet(dev, packet, length); } -int smc_get_ethaddr (bd_t * bd) +static int smc_get_ethaddr (struct eth_device *dev) { uchar v_mac[6]; + char env_parm_name[10]; /* Long enough for ethxxaddr */ + u8 dev_num = ((struct smc91111_priv *)(dev->priv))->dev_num; + + if (dev_num == 0) + strncpy(env_parm_name, "ethaddr", 7); + else + sprintf(env_parm_name, "eth%huaddr", dev_num); + - if (!eth_getenv_enetaddr("ethaddr", v_mac)) { + if (!eth_getenv_enetaddr(env_parm_name, v_mac)) { /* get ROM mac value if any */ - if (!get_rom_mac(v_mac)) { - printf("\n*** ERROR: ethaddr is NOT set !!\n"); + if (!get_rom_mac(dev, v_mac)) { + printf("\n*** ERROR: %s is NOT set !!\n", env_parm_name); return -1; } - eth_setenv_enetaddr("ethaddr", v_mac); + eth_setenv_enetaddr(env_parm_name, v_mac); } smc_set_mac_addr(v_mac); /* use old function to update smc default */ @@ -1549,7 +1499,7 @@ int smc_get_ethaddr (bd_t * bd) return 0; } -int get_rom_mac (uchar *v_rom_mac) +static int get_rom_mac (struct eth_device *dev, uchar *v_rom_mac) { #ifdef HARDCODE_MAC /* used for testing or to supress run time warnings */ char hw_mac_addr[] = { 0x02, 0x80, 0xad, 0x20, 0x31, 0xb8 }; @@ -1560,13 +1510,36 @@ int get_rom_mac (uchar *v_rom_mac) int i; int valid_mac = 0; - SMC_SELECT_BANK (1); + SMC_SELECT_BANK (dev, 1); for (i=0; i<6; i++) { - v_rom_mac[i] = SMC_inb ((ADDR0_REG + i)); + v_rom_mac[i] = SMC_inb (dev, (ADDR0_REG + i)); valid_mac |= v_rom_mac[i]; } return (valid_mac ? 1 : 0); #endif + +} + +int smc91111_initialize(u8 dev_num, int base_addr) +{ + struct smc91111_priv *priv = malloc(sizeof(struct smc91111_priv)); + if (!priv) + return 0; + struct eth_device *dev = malloc(sizeof(struct eth_device)); + if (!dev) + return 0; + priv->dev_num = dev_num; + dev->priv = priv; + dev->iobase = base_addr; + + dev->init = smc91111_init; + dev->halt = smc91111_halt; + dev->send = smc91111_send; + dev->recv = smc91111_rx; + sprintf(dev->name, "%s-%hu", SMC_DEV_NAME, dev_num); + + eth_register(dev); + return 0; } diff --git a/drivers/net/smc91111.h b/drivers/net/smc91111.h index 967addd..bb45241 100644 --- a/drivers/net/smc91111.h +++ b/drivers/net/smc91111.h @@ -58,6 +58,10 @@ typedef unsigned char byte; typedef unsigned short word; typedef unsigned long int dword; +struct smc91111_priv{ + u8 dev_num; +}; + /* . DEBUGGING LEVELS . @@ -77,32 +81,32 @@ typedef unsigned long int dword; #ifdef CONFIG_PXA250 #ifdef CONFIG_XSENGINE -#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1)))) -#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r<<1)))) -#define SMC_inb(p) ({ \ - unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (p<<1)); \ +#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r<<1)))) +#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r<<1)))) +#define SMC_inb(a,p) ({ \ + unsigned int __p = (unsigned int)((a)->iobase + (p<<1)); \ unsigned int __v = *(volatile unsigned short *)((__p) & ~2); \ if (__p & 2) __v >>= 8; \ else __v &= 0xff; \ __v; }) #elif defined(CONFIG_XAENIAX) -#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r)))) -#define SMC_inw(z) ({ \ - unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (z)); \ +#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r)))) +#define SMC_inw(a,z) ({ \ + unsigned int __p = (unsigned int)((a)->iobase + (z)); \ unsigned int __v = *(volatile unsigned int *)((__p) & ~3); \ if (__p & 3) __v >>= 16; \ else __v &= 0xffff; \ __v; }) -#define SMC_inb(p) ({ \ - unsigned int ___v = SMC_inw((p) & ~1); \ +#define SMC_inb(a,p) ({ \ + unsigned int ___v = SMC_inw((a),(p) & ~1); \ if (p & 1) ___v >>= 8; \ else ___v &= 0xff; \ ___v; }) #else -#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r)))) -#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r)))) -#define SMC_inb(p) ({ \ - unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (p)); \ +#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r)))) +#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r)))) +#define SMC_inb(a,p) ({ \ + unsigned int __p = (unsigned int)((a)->iobase + (p)); \ unsigned int __v = *(volatile unsigned short *)((__p) & ~1); \ if (__p & 1) __v >>= 8; \ else __v &= 0xff; \ @@ -110,69 +114,69 @@ typedef unsigned long int dword; #endif #ifdef CONFIG_XSENGINE -#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))) = d) -#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r<<1))) = d) +#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r<<1))) = d) +#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r<<1))) = d) #elif defined (CONFIG_XAENIAX) -#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d) -#define SMC_outw(d,p) ({ \ - dword __dwo = SMC_inl((p) & ~3); \ +#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d) +#define SMC_outw(a,d,p) ({ \ + dword __dwo = SMC_inl((a),(p) & ~3); \ dword __dwn = (word)(d); \ __dwo &= ((p) & 3) ? 0x0000ffff : 0xffff0000; \ __dwo |= ((p) & 3) ? __dwn << 16 : __dwn; \ - SMC_outl(__dwo, (p) & ~3); \ + SMC_outl((a), __dwo, (p) & ~3); \ }) #else -#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d) -#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d) +#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d) +#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d) #endif -#define SMC_outb(d,r) ({ word __d = (byte)(d); \ - word __w = SMC_inw((r)&~1); \ +#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \ + word __w = SMC_inw((a),(r)&~1); \ __w &= ((r)&1) ? 0x00FF : 0xFF00; \ __w |= ((r)&1) ? __d<<8 : __d; \ - SMC_outw(__w,(r)&~1); \ + SMC_outw((a),__w,(r)&~1); \ }) -#define SMC_outsl(r,b,l) ({ int __i; \ +#define SMC_outsl(a,r,b,l) ({ int __i; \ dword *__b2; \ __b2 = (dword *) b; \ for (__i = 0; __i < l; __i++) { \ - SMC_outl( *(__b2 + __i), r); \ + SMC_outl((a), *(__b2 + __i), r); \ } \ }) -#define SMC_outsw(r,b,l) ({ int __i; \ +#define SMC_outsw(a,r,b,l) ({ int __i; \ word *__b2; \ __b2 = (word *) b; \ for (__i = 0; __i < l; __i++) { \ - SMC_outw( *(__b2 + __i), r); \ + SMC_outw((a), *(__b2 + __i), r); \ } \ }) -#define SMC_insl(r,b,l) ({ int __i ; \ +#define SMC_insl(a,r,b,l) ({ int __i ; \ dword *__b2; \ __b2 = (dword *) b; \ for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inl(r); \ - SMC_inl(0); \ + *(__b2 + __i) = SMC_inl((a),(r)); \ + SMC_inl((a),0); \ }; \ }) -#define SMC_insw(r,b,l) ({ int __i ; \ +#define SMC_insw(a,r,b,l) ({ int __i ; \ word *__b2; \ __b2 = (word *) b; \ for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inw(r); \ - SMC_inw(0); \ + *(__b2 + __i) = SMC_inw((a),(r)); \ + SMC_inw((a),0); \ }; \ }) -#define SMC_insb(r,b,l) ({ int __i ; \ +#define SMC_insb(a,r,b,l) ({ int __i ; \ byte *__b2; \ __b2 = (byte *) b; \ for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inb(r); \ - SMC_inb(0); \ + *(__b2 + __i) = SMC_inb((a),(r)); \ + SMC_inb((a),0); \ }; \ }) @@ -187,61 +191,61 @@ typedef unsigned long int dword; ((0x00FF0000UL & _x) >> 8) | \ (_x >> 24)); }) -#define SMC_inl(r) (SMC_LEON_SWAP32((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))))) -#define SMC_inl_nosw(r) ((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0)))) -#define SMC_inw(r) (SMC_LEON_SWAP16((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))))) -#define SMC_inw_nosw(r) ((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0)))) -#define SMC_inb(p) ({ \ - word ___v = SMC_inw((p) & ~1); \ +#define SMC_inl(a,r) (SMC_LEON_SWAP32((*(volatile dword *)((a)->iobase+((r)<<0))))) +#define SMC_inl_nosw(a,r) ((*(volatile dword *)((a)->iobase+((r)<<0)))) +#define SMC_inw(a,r) (SMC_LEON_SWAP16((*(volatile word *)((a)->iobase+((r)<<0))))) +#define SMC_inw_nosw(a,r) ((*(volatile word *)((a)->iobase+((r)<<0)))) +#define SMC_inb(a,p) ({ \ + word ___v = SMC_inw((a),(p) & ~1); \ if ((p) & 1) ___v >>= 8; \ else ___v &= 0xff; \ ___v; }) -#define SMC_outl(d,r) (*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))=SMC_LEON_SWAP32(d)) -#define SMC_outl_nosw(d,r) (*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))=(d)) -#define SMC_outw(d,r) (*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))=SMC_LEON_SWAP16(d)) -#define SMC_outw_nosw(d,r) (*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))=(d)) -#define SMC_outb(d,r) do{ word __d = (byte)(d); \ - word __w = SMC_inw((r)&~1); \ +#define SMC_outl(a,d,r) (*(volatile dword *)((a)->iobase+((r)<<0))=SMC_LEON_SWAP32(d)) +#define SMC_outl_nosw(a,d,r) (*(volatile dword *)((a)->iobase+((r)<<0))=(d)) +#define SMC_outw(a,d,r) (*(volatile word *)((a)->iobase+((r)<<0))=SMC_LEON_SWAP16(d)) +#define SMC_outw_nosw(a,d,r) (*(volatile word *)((a)->iobase+((r)<<0))=(d)) +#define SMC_outb(a,d,r) do{ word __d = (byte)(d); \ + word __w = SMC_inw((a),(r)&~1); \ __w &= ((r)&1) ? 0x00FF : 0xFF00; \ __w |= ((r)&1) ? __d<<8 : __d; \ - SMC_outw(__w,(r)&~1); \ + SMC_outw((a),__w,(r)&~1); \ }while(0) -#define SMC_outsl(r,b,l) do{ int __i; \ +#define SMC_outsl(a,r,b,l) do{ int __i; \ dword *__b2; \ __b2 = (dword *) b; \ for (__i = 0; __i < l; __i++) { \ - SMC_outl_nosw( *(__b2 + __i), r); \ + SMC_outl_nosw((a), *(__b2 + __i), r); \ } \ }while(0) -#define SMC_outsw(r,b,l) do{ int __i; \ +#define SMC_outsw(a,r,b,l) do{ int __i; \ word *__b2; \ __b2 = (word *) b; \ for (__i = 0; __i < l; __i++) { \ - SMC_outw_nosw( *(__b2 + __i), r); \ + SMC_outw_nosw((a), *(__b2 + __i), r); \ } \ }while(0) -#define SMC_insl(r,b,l) do{ int __i ; \ +#define SMC_insl(a,r,b,l) do{ int __i ; \ dword *__b2; \ __b2 = (dword *) b; \ for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inl_nosw(r); \ + *(__b2 + __i) = SMC_inl_nosw((a),(r)); \ }; \ }while(0) -#define SMC_insw(r,b,l) do{ int __i ; \ +#define SMC_insw(a,r,b,l) do{ int __i ; \ word *__b2; \ __b2 = (word *) b; \ for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inw_nosw(r); \ + *(__b2 + __i) = SMC_inw_nosw((a),(r)); \ }; \ }while(0) -#define SMC_insb(r,b,l) do{ int __i ; \ +#define SMC_insb(a,r,b,l) do{ int __i ; \ byte *__b2; \ __b2 = (byte *) b; \ for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inb(r); \ + *(__b2 + __i) = SMC_inb((a),(r)); \ }; \ }while(0) @@ -253,48 +257,48 @@ typedef unsigned long int dword; */ #ifdef CONFIG_ADNPESC1 -#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1)))) +#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1)))) #elif CONFIG_BLACKFIN -#define SMC_inw(r) ({ word __v = (*((volatile word *)(SMC_BASE_ADDRESS+(r)))); SSYNC(); __v;}) +#define SMC_inw(a,r) ({ word __v = (*((volatile word *)((a)->iobase+(r)))); SSYNC(); __v;}) #else -#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r)))) +#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r)))) #endif -#define SMC_inb(r) (((r)&1) ? SMC_inw((r)&~1)>>8 : SMC_inw(r)&0xFF) +#define SMC_inb(a,r) (((r)&1) ? SMC_inw((a),(r)&~1)>>8 : SMC_inw((a),(r)&0xFF)) #ifdef CONFIG_ADNPESC1 -#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))) = d) +#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+((r)<<1))) = d) #elif CONFIG_BLACKFIN -#define SMC_outw(d,r) {(*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d); SSYNC();} +#define SMC_outw(a,d,r) {(*((volatile word *)((a)->iobase+(r))) = d); SSYNC();} #else -#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d) +#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d) #endif -#define SMC_outb(d,r) ({ word __d = (byte)(d); \ - word __w = SMC_inw((r)&~1); \ +#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \ + word __w = SMC_inw((a),(r)&~1); \ __w &= ((r)&1) ? 0x00FF : 0xFF00; \ __w |= ((r)&1) ? __d<<8 : __d; \ - SMC_outw(__w,(r)&~1); \ + SMC_outw((a),__w,(r)&~1); \ }) #if 0 -#define SMC_outsw(r,b,l) outsw(SMC_BASE_ADDRESS+(r), (b), (l)) +#define SMC_outsw(a,r,b,l) outsw((a)->iobase+(r), (b), (l)) #else -#define SMC_outsw(r,b,l) ({ int __i; \ +#define SMC_outsw(a,r,b,l) ({ int __i; \ word *__b2; \ __b2 = (word *) b; \ for (__i = 0; __i < l; __i++) { \ - SMC_outw( *(__b2 + __i), r); \ + SMC_outw((a), *(__b2 + __i), r); \ } \ }) #endif #if 0 -#define SMC_insw(r,b,l) insw(SMC_BASE_ADDRESS+(r), (b), (l)) +#define SMC_insw(a,r,b,l) insw((a)->iobase+(r), (b), (l)) #else -#define SMC_insw(r,b,l) ({ int __i ; \ +#define SMC_insw(a,r,b,l) ({ int __i ; \ word *__b2; \ __b2 = (word *) b; \ for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inw(r); \ - SMC_inw(0); \ + *(__b2 + __i) = SMC_inw((a),(r)); \ + SMC_inw((a),0); \ }; \ }) #endif @@ -304,30 +308,30 @@ typedef unsigned long int dword; #if defined(CONFIG_SMC_USE_32_BIT) #ifdef CONFIG_XSENGINE -#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1)))) +#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r<<1)))) #else -#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r)))) +#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r)))) #endif -#define SMC_insl(r,b,l) ({ int __i ; \ +#define SMC_insl(a,r,b,l) ({ int __i ; \ dword *__b2; \ __b2 = (dword *) b; \ for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inl(r); \ - SMC_inl(0); \ + *(__b2 + __i) = SMC_inl((a),(r)); \ + SMC_inl((a),0); \ }; \ }) #ifdef CONFIG_XSENGINE -#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))) = d) +#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r<<1))) = d) #else -#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d) +#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d) #endif -#define SMC_outsl(r,b,l) ({ int __i; \ +#define SMC_outsl(a,r,b,l) ({ int __i; \ dword *__b2; \ __b2 = (dword *) b; \ for (__i = 0; __i < l; __i++) { \ - SMC_outl( *(__b2 + __i), r); \ + SMC_outl((a), *(__b2 + __i), r); \ } \ }) @@ -752,25 +756,25 @@ enum { /* select a register bank, 0 to 3 */ -#define SMC_SELECT_BANK(x) { SMC_outw( x, BANK_SELECT ); } +#define SMC_SELECT_BANK(a,x) { SMC_outw((a), (x), BANK_SELECT ); } /* this enables an interrupt in the interrupt mask register */ -#define SMC_ENABLE_INT(x) {\ +#define SMC_ENABLE_INT(a,x) {\ unsigned char mask;\ - SMC_SELECT_BANK(2);\ - mask = SMC_inb( IM_REG );\ + SMC_SELECT_BANK((a),2);\ + mask = SMC_inb((a), IM_REG );\ mask |= (x);\ - SMC_outb( mask, IM_REG ); \ + SMC_outb( (a), mask, IM_REG ); \ } /* this disables an interrupt from the interrupt mask register */ -#define SMC_DISABLE_INT(x) {\ +#define SMC_DISABLE_INT(a,x) {\ unsigned char mask;\ SMC_SELECT_BANK(2);\ - mask = SMC_inb( IM_REG );\ + mask = SMC_inb( (a), IM_REG );\ mask &= ~(x);\ - SMC_outb( mask, IM_REG ); \ + SMC_outb( (a), mask, IM_REG ); \ } /*---------------------------------------------------------------------- diff --git a/examples/standalone/smc91111_eeprom.c b/examples/standalone/smc91111_eeprom.c index 39e5306..a38cc4d 100644 --- a/examples/standalone/smc91111_eeprom.c +++ b/examples/standalone/smc91111_eeprom.c @@ -42,19 +42,23 @@ #define MAC 0x2 #define UNKNOWN 0x4 -void dump_reg (void); -void dump_eeprom (void); -int write_eeprom_reg (int, int); -void copy_from_eeprom (void); -void print_MAC (void); -int read_eeprom_reg (int); -void print_macaddr (void); +void dump_reg (struct eth_device *dev); +void dump_eeprom (struct eth_device *dev); +int write_eeprom_reg (struct eth_device *dev, int value, int reg); +void copy_from_eeprom (struct eth_device *dev); +void print_MAC (struct eth_device *dev); +int read_eeprom_reg (struct eth_device *dev, int reg); +void print_macaddr (struct eth_device *dev); int smc91111_eeprom (int argc, char *argv[]) { int c, i, j, done, line, reg, value, start, what; char input[50]; + struct eth_device dev = { + .iobase = CONFIG_SMC91111_BASE + }; + /* Print the ABI version */ app_startup (argv); if (XF_VERSION != (int) get_version ()) { @@ -67,7 +71,7 @@ int smc91111_eeprom (int argc, char *argv[]) SMC91111_EEPROM_INIT(); - if ((SMC_inw (BANK_SELECT) & 0xFF00) != 0x3300) { + if ((SMC_inw (&dev, BANK_SELECT) & 0xFF00) != 0x3300) { printf ("Can't find SMSC91111\n"); return (0); } @@ -211,12 +215,12 @@ int smc91111_eeprom (int argc, char *argv[]) switch (what) { case 1: printf ("Writing EEPROM register %02x with %04x\n", reg, value); - write_eeprom_reg (value, reg); + write_eeprom_reg (&dev, value, reg); break; case 2: printf ("Writing MAC register bank %i, reg %02x with %04x\n", reg >> 4, reg & 0xE, value); - SMC_SELECT_BANK (reg >> 4); - SMC_outw (value, reg & 0xE); + SMC_SELECT_BANK (&dev, reg >> 4); + SMC_outw (&dev, value, reg & 0xE); break; default: printf ("Wrong\n"); @@ -224,16 +228,16 @@ int smc91111_eeprom (int argc, char *argv[]) } break; case ('D'): - dump_eeprom (); + dump_eeprom (&dev); break; case ('M'): - dump_reg (); + dump_reg (&dev); break; case ('C'): - copy_from_eeprom (); + copy_from_eeprom (&dev); break; case ('P'): - print_macaddr (); + print_macaddr (&dev); break; default: break; @@ -244,15 +248,15 @@ int smc91111_eeprom (int argc, char *argv[]) return (0); } -void copy_from_eeprom (void) +void copy_from_eeprom (struct eth_device *dev) { int i; - SMC_SELECT_BANK (1); - SMC_outw ((SMC_inw (CTL_REG) & !CTL_EEPROM_SELECT) | CTL_RELOAD, - CTL_REG); + SMC_SELECT_BANK (dev, 1); + SMC_outw (dev, (SMC_inw (dev, CTL_REG) & !CTL_EEPROM_SELECT) | + CTL_RELOAD, CTL_REG); i = 100; - while ((SMC_inw (CTL_REG) & CTL_RELOAD) && --i) + while ((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --i) udelay (100); if (i == 0) { printf ("Timeout Refreshing EEPROM registers\n"); @@ -262,21 +266,21 @@ void copy_from_eeprom (void) } -void print_macaddr (void) +void print_macaddr (struct eth_device *dev) { int i, j, k, mac[6]; printf ("Current MAC Address in SMSC91111 "); - SMC_SELECT_BANK (1); + SMC_SELECT_BANK (dev, 1); for (i = 0; i < 5; i++) { - printf ("%02x:", SMC_inb (ADDR0_REG + i)); + printf ("%02x:", SMC_inb (dev, ADDR0_REG + i)); } - printf ("%02x\n", SMC_inb (ADDR0_REG + 5)); + printf ("%02x\n", SMC_inb (dev, ADDR0_REG + 5)); i = 0; for (j = 0x20; j < 0x23; j++) { - k = read_eeprom_reg (j); + k = read_eeprom_reg (dev, j); mac[i] = k & 0xFF; i++; mac[i] = k >> 8; @@ -289,7 +293,7 @@ void print_macaddr (void) printf ("%02x\n", mac[5]); } -void dump_eeprom (void) +void dump_eeprom (struct eth_device *dev) { int j, k; @@ -307,7 +311,8 @@ void dump_eeprom (void) if ((k == 2) || (k == 3)) printf (" "); for (j = 0; j < 0x20; j += 4) { - printf ("%02x:%04x ", j + k, read_eeprom_reg (j + k)); + printf ("%02x:%04x ", j + k, + read_eeprom_reg (dev, j + k)); } printf ("\n"); } @@ -315,46 +320,47 @@ void dump_eeprom (void) for (j = 0x20; j < 0x40; j++) { if ((j & 0x07) == 0) printf ("\n"); - printf ("%02x:%04x ", j, read_eeprom_reg (j)); + printf ("%02x:%04x ", j, read_eeprom_reg (dev, j)); } printf ("\n"); } -int read_eeprom_reg (int reg) +int read_eeprom_reg (struct eth_device *dev, int reg) { int timeout; - SMC_SELECT_BANK (2); - SMC_outw (reg, PTR_REG); + SMC_SELECT_BANK (dev, 2); + SMC_outw (dev, reg, PTR_REG); - SMC_SELECT_BANK (1); - SMC_outw (SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD, - CTL_REG); + SMC_SELECT_BANK (dev, 1); + SMC_outw (dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | + CTL_RELOAD, CTL_REG); timeout = 100; - while ((SMC_inw (CTL_REG) & CTL_RELOAD) && --timeout) + while ((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --timeout) udelay (100); if (timeout == 0) { printf ("Timeout Reading EEPROM register %02x\n", reg); return 0; } - return SMC_inw (GP_REG); + return SMC_inw (dev, GP_REG); } -int write_eeprom_reg (int value, int reg) +int write_eeprom_reg (struct eth_device *dev, int value, int reg) { int timeout; - SMC_SELECT_BANK (2); - SMC_outw (reg, PTR_REG); + SMC_SELECT_BANK (dev, 2); + SMC_outw (dev, reg, PTR_REG); - SMC_SELECT_BANK (1); - SMC_outw (value, GP_REG); - SMC_outw (SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG); + SMC_SELECT_BANK (dev, 1); + SMC_outw (dev, value, GP_REG); + SMC_outw (dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | + CTL_STORE, CTL_REG); timeout = 100; - while ((SMC_inw (CTL_REG) & CTL_STORE) && --timeout) + while ((SMC_inw (dev, CTL_REG) & CTL_STORE) && --timeout) udelay (100); if (timeout == 0) { printf ("Timeout Writing EEPROM register %02x\n", reg); @@ -365,7 +371,7 @@ int write_eeprom_reg (int value, int reg) } -void dump_reg (void) +void dump_reg (struct eth_device *dev) { int i, j; @@ -377,8 +383,8 @@ void dump_reg (void) for (i = 0; i < 0xF; i += 2) { printf ("%02x ", i); for (j = 0; j < 4; j++) { - SMC_SELECT_BANK (j); - printf ("%04x ", SMC_inw (i)); + SMC_SELECT_BANK (dev, j); + printf ("%04x ", SMC_inw (dev, i)); } printf ("\n"); } diff --git a/include/configs/EP1C20.h b/include/configs/EP1C20.h index 8941e4d..61d8e20 100644 --- a/include/configs/EP1C20.h +++ b/include/configs/EP1C20.h @@ -151,7 +151,8 @@ * cache bypass so there's no need to monkey with inx/outx macros. *----------------------------------------------------------------------*/ #define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ -#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 /* Using SMC91c111 */ #undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ #define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ diff --git a/include/configs/EP1S10.h b/include/configs/EP1S10.h index 53bd0d8..41e64e6 100644 --- a/include/configs/EP1S10.h +++ b/include/configs/EP1S10.h @@ -145,7 +145,8 @@ * cache bypass so there's no need to monkey with inx/outx macros. *----------------------------------------------------------------------*/ #define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ -#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 /* Using SMC91c111 */ #undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ #define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ diff --git a/include/configs/EP1S40.h b/include/configs/EP1S40.h index 9e9a8a4..5b332e4 100644 --- a/include/configs/EP1S40.h +++ b/include/configs/EP1S40.h @@ -145,7 +145,8 @@ * cache bypass so there's no need to monkey with inx/outx macros. *----------------------------------------------------------------------*/ #define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ -#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 /* Using SMC91c111 */ #undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ #define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index 3853574..6083892 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -50,7 +50,8 @@ #undef CONFIG_SHOW_BOOT_PROGRESS /* SMC9111 */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0xB0000000) /* MEMORY */ diff --git a/include/configs/PK1C20.h b/include/configs/PK1C20.h index 522349f..cf6f7a9 100644 --- a/include/configs/PK1C20.h +++ b/include/configs/PK1C20.h @@ -151,7 +151,8 @@ * cache bypass so there's no need to monkey with inx/outx macros. *----------------------------------------------------------------------*/ #define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ -#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 /* Using SMC91c111 */ #undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ #define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ diff --git a/include/configs/bf533-ezkit.h b/include/configs/bf533-ezkit.h index f896cb0..8f23f1d 100644 --- a/include/configs/bf533-ezkit.h +++ b/include/configs/bf533-ezkit.h @@ -65,7 +65,8 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20310300 #define SMC91111_EEPROM_INIT() \ do { \ diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h index 4be2a5c..4693f00 100644 --- a/include/configs/bf533-stamp.h +++ b/include/configs/bf533-stamp.h @@ -60,7 +60,8 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20300300 #define SMC91111_EEPROM_INIT() \ do { \ diff --git a/include/configs/bf538f-ezkit.h b/include/configs/bf538f-ezkit.h index 535687f..c4d899d 100644 --- a/include/configs/bf538f-ezkit.h +++ b/include/configs/bf538f-ezkit.h @@ -60,7 +60,8 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20310300 #define CONFIG_HOSTNAME bf538f-ezkit /* Uncomment next line to use fixed MAC address */ diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h index 4779a97..a1fa80b 100644 --- a/include/configs/bf561-ezkit.h +++ b/include/configs/bf561-ezkit.h @@ -60,7 +60,8 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x2C010300 #define CONFIG_SMC_USE_32_BIT 1 #define CONFIG_HOSTNAME bf561-ezkit diff --git a/include/configs/blackstamp.h b/include/configs/blackstamp.h index 887f3fb..6c9b3e0 100644 --- a/include/configs/blackstamp.h +++ b/include/configs/blackstamp.h @@ -30,7 +30,8 @@ /* * Board settings */ -#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20300300 /* FLASH/ETHERNET uses the same address range diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h index b924758..477b94a 100644 --- a/include/configs/cerf250.h +++ b/include/configs/cerf250.h @@ -53,7 +53,8 @@ /* * Hardware drivers */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE 0x04000300 #define CONFIG_SMC_USE_32_BIT diff --git a/include/configs/cm-bf533.h b/include/configs/cm-bf533.h index ea548e9..06eb288 100644 --- a/include/configs/cm-bf533.h +++ b/include/configs/cm-bf533.h @@ -60,7 +60,8 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20200300 #define CONFIG_HOSTNAME cm-bf533 /* Uncomment next line to use fixed MAC address */ diff --git a/include/configs/cm-bf561.h b/include/configs/cm-bf561.h index 1153f11..dd747c8 100644 --- a/include/configs/cm-bf561.h +++ b/include/configs/cm-bf561.h @@ -61,7 +61,8 @@ */ #define ADI_CMDS_NETWORK 1 /* The next 2 lines are for use with DEV-BF5xx */ -#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x28000300 /* The next 3 lines are for use with EXT-BF5xx-USB-ETH2 */ /* #define CONFIG_DRIVER_SMC911X 1 */ diff --git a/include/configs/cradle.h b/include/configs/cradle.h index b150c22..200b61e 100644 --- a/include/configs/cradle.h +++ b/include/configs/cradle.h @@ -49,7 +49,8 @@ /* * Hardware drivers */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE 0x10000300 #define CONFIG_SMC91111_EXT_PHY #define CONFIG_SMC_USE_32_BIT diff --git a/include/configs/dnp1110.h b/include/configs/dnp1110.h index b6cfc67..e48e20f 100644 --- a/include/configs/dnp1110.h +++ b/include/configs/dnp1110.h @@ -54,7 +54,8 @@ /* * Hardware drivers */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE 0x20000300 diff --git a/include/configs/gr_cpci_ax2000.h b/include/configs/gr_cpci_ax2000.h index bbe635b..d188439 100644 --- a/include/configs/gr_cpci_ax2000.h +++ b/include/configs/gr_cpci_ax2000.h @@ -292,7 +292,8 @@ /* * Ethernet configuration uses on board SMC91C111 */ -#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */ #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ diff --git a/include/configs/gr_ep2s60.h b/include/configs/gr_ep2s60.h index 7b0a08f..3a568ff 100644 --- a/include/configs/gr_ep2s60.h +++ b/include/configs/gr_ep2s60.h @@ -267,7 +267,8 @@ #ifndef USE_GRETH /* USE SMC91C111 MAC */ -#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */ #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ diff --git a/include/configs/innokom.h b/include/configs/innokom.h index ed03ad3..9cb0d42 100644 --- a/include/configs/innokom.h +++ b/include/configs/innokom.h @@ -157,7 +157,8 @@ /* * SMSC91C111 Network Card */ -#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x14000000 /* chip select 5 */ #undef CONFIG_SMC_USE_32_BIT /* 16 bit bus access */ #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index e38d569..caafc93 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -53,7 +53,8 @@ /* * Hardware drivers */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC_USE_32_BIT #define CONFIG_SMC91111_BASE 0xC8000000 #undef CONFIG_SMC91111_EXT_PHY diff --git a/include/configs/logodl.h b/include/configs/logodl.h index 5b903f0..0535ee1 100644 --- a/include/configs/logodl.h +++ b/include/configs/logodl.h @@ -133,7 +133,8 @@ * SMSC91C111 Network Card */ #if 0 -#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x10000000 /* chip select 4 */ #undef CONFIG_SMC_USE_32_BIT /* 16 bit bus access */ #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ diff --git a/include/configs/lpd7a400-10.h b/include/configs/lpd7a400-10.h index 6145c37..5f57c3a 100644 --- a/include/configs/lpd7a400-10.h +++ b/include/configs/lpd7a400-10.h @@ -72,7 +72,8 @@ * Default IO base of chip is 0x300, Card Engine has this address lines * (LAN chip) tied to Vcc, so we just care about the chip select */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0x70000000) #undef CONFIG_SMC_USE_32_BIT #define CONFIG_SMC_USE_IOFUNCS diff --git a/include/configs/lpd7a404-10.h b/include/configs/lpd7a404-10.h index ce23f3d..9074e28 100644 --- a/include/configs/lpd7a404-10.h +++ b/include/configs/lpd7a404-10.h @@ -72,7 +72,8 @@ * Default IO base of chip is 0x300, Card Engine has this address lines * (LAN chip) tied to Vcc, so we just care about the chip select */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0x70000000) #undef CONFIG_SMC_USE_32_BIT #define CONFIG_SMC_USE_IOFUNCS diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 6755af3..0251428 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -48,7 +48,8 @@ #undef CONFIG_SHOW_BOOT_PROGRESS /* SMC9111 */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0xB8000000) /* MEMORY */ diff --git a/include/configs/netstar.h b/include/configs/netstar.h index f0b4207..7bddf24 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -93,7 +93,8 @@ #define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */ #define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE 0x04000300 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 diff --git a/include/configs/nhk8815.h b/include/configs/nhk8815.h index 3e2e09f..bf0c7bc 100644 --- a/include/configs/nhk8815.h +++ b/include/configs/nhk8815.h @@ -116,7 +116,8 @@ #define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a))) #define __mem_isa(a) ((a) + PCI_MEMORY_VADDR) -#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111*/ +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 /* Using SMC91c111*/ #define CONFIG_SMC91111_BASE 0x34000300 #undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ #define CONFIG_SMC_USE_32_BIT diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index 2cae8ca..6c1defc 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -87,7 +87,8 @@ /* * Hardware drivers */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (PXA_CS5_PHYS + IDP_CS5_ETH_OFFSET + 0x300) #define CONFIG_SMC_USE_32_BIT 1 /* #define CONFIG_SMC_USE_IOFUNCS */ diff --git a/include/configs/versatile.h b/include/configs/versatile.h index a9b70cc..4273b84 100644 --- a/include/configs/versatile.h +++ b/include/configs/versatile.h @@ -82,7 +82,8 @@ * Hardware drivers */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC_USE_32_BIT #define CONFIG_SMC91111_BASE 0x10010000 #undef CONFIG_SMC91111_EXT_PHY diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h index c9c3132..0dde65d 100644 --- a/include/configs/voiceblue.h +++ b/include/configs/voiceblue.h @@ -94,7 +94,8 @@ /* * Hardware drivers */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE 0x08000300 #define CONFIG_HARD_I2C diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h index 83883f6..1329f0f 100644 --- a/include/configs/xaeniax.h +++ b/include/configs/xaeniax.h @@ -196,7 +196,8 @@ /* * SMSC91C111 Network Card */ -#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x10000300 /* chip select 3 */ #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ diff --git a/include/configs/xm250.h b/include/configs/xm250.h index f18701a..cd56ce7 100644 --- a/include/configs/xm250.h +++ b/include/configs/xm250.h @@ -50,7 +50,8 @@ /* * Hardware drivers */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE 0x04000300 #undef CONFIG_SMC91111_EXT_PHY #define CONFIG_SMC_USE_32_BIT diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h index 2697cca..f68461b 100644 --- a/include/configs/xsengine.h +++ b/include/configs/xsengine.h @@ -94,7 +94,8 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* Hardware drivers */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_NET_MULTI +#define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE 0x04000300 #define CONFIG_SMC_USE_32_BIT 1 diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h index 86b6ea1..36c341e 100644 --- a/include/configs/zylonite.h +++ b/include/configs/zylonite.h @@ -62,7 +62,7 @@ #undef TURN_ON_ETHERNET #ifdef TURN_ON_ETHERNET -# define CONFIG_DRIVER_SMC91111 1 +# define CONFIG_SMC91111 1 # define CONFIG_SMC91111_BASE 0x14000300 # define CONFIG_SMC91111_EXT_PHY # define CONFIG_SMC_USE_32_BIT diff --git a/include/netdev.h b/include/netdev.h index 3e66586..4636b57 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -73,6 +73,7 @@ int rtl8169_initialize(bd_t *bis); int scc_initialize(bd_t *bis); int skge_initialize(bd_t *bis); int smc911x_initialize(u8 dev_num, int base_addr); +int smc91111_initialize(u8 dev_num, int base_addr); int tsi108_eth_initialize(bd_t *bis); int uec_initialize(int index); int uec_standard_init(bd_t *bis); -- 1.5.6.3

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[U-Boot] autoscr command
by Berns 04 Oct '09

04 Oct '09

Hi, i use the autoscr command to store further information in a NAND at the first start. After this it modify the bootcmd and save the enviroment and the last command should restart the device. The script works fine but "saveenv" seams to abort the script file. I have used different memory location, i have checked the memory contents and i have placed saveenv at the beginning, middle and at the end of the script. It allways abort after "saveenv". I use Uboot 2008.10. Thanks for any advise. Kind Regards Rainer Berns BEKA Elektronik Rainer Berns & Rudolf Kauls GbR Siemensstrasse 29 50374 Erftstadt Tel.: +49 2235/4606-0 Fax.: +49 2235/4606-29 Email: Berns(a)BEKA-Elektronik.de

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