June 2009 - U-Boot

[U-Boot] request
by 徐建辉 22 Jun '09

22 Jun '09

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[U-Boot] [PATCH] mpc8xxx: USB: fix: access of ehci struct elements
by Vivek Mahajan 21 Jun '09

21 Jun '09

This patch fixes the access to the 'ehci' struct elements which should have been taken care off in 4ef01010aa4799c759d75e67007fdd3a38c88c8a Sorry about that. Signed-off-by: Vivek Mahajan <vivek.mahajan(a)freescale.com> --- drivers/usb/host/ehci-fsl.c | 18 +++++++++--------- 1 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index bf148c4..c674929 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -41,15 +41,15 @@ int ehci_hcd_init(void) struct usb_ehci *ehci; ehci = (struct usb_ehci *)CONFIG_SYS_MPC8xxx_USB_ADDR; - hccr = (struct ehci_hccr *)((uint32_t)ehci->caplength); + hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); hcor = (struct ehci_hcor *)((uint32_t) hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); /* Set to Host mode */ - setbits_le32((void *)ehci->usbmode, CM_HOST); + setbits_le32(&ehci->usbmode, CM_HOST); - out_be32((void *)ehci->snoop1, SNOOP_SIZE_2GB); - out_be32((void *)ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB); + out_be32(&ehci->snoop1, SNOOP_SIZE_2GB); + out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB); /* Init phy */ if (!strcmp(getenv("usb_phy_type"), "utmi")) @@ -58,13 +58,13 @@ int ehci_hcd_init(void) out_le32(&(hcor->or_portsc[0]), PORT_PTS_ULPI); /* Enable interface. */ - setbits_be32((void *)ehci->control, USB_EN); + setbits_be32(&ehci->control, USB_EN); - out_be32((void *)ehci->prictrl, 0x0000000c); - out_be32((void *)ehci->age_cnt_limit, 0x00000040); - out_be32((void *)ehci->sictrl, 0x00000001); + out_be32(&ehci->prictrl, 0x0000000c); + out_be32(&ehci->age_cnt_limit, 0x00000040); + out_be32(&ehci->sictrl, 0x00000001); - in_le32((void *)ehci->usbmode); + in_le32(&ehci->usbmode); return 0; } -- 1.5.6.5

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[U-Boot] How to add new files in uboot
by sadanand.tavadare＠wipro.com 21 Jun '09

21 Jun '09

Hi Please let me know how to add new files in u boot. Thanks Sada Please do not print this email unless it is absolutely necessary. The information contained in this electronic message and any attachments to this message are intended for the exclusive use of the addressee(s) and may contain proprietary, confidential or privileged information. If you are not the intended recipient, you should not disseminate, distribute or copy this e-mail. Please notify the sender immediately and destroy all copies of this message and any attachments. WARNING: Computer viruses can be transmitted via email. The recipient should check this email and any attachments for the presence of viruses. The company accepts no liability for any damage caused by any virus transmitted by this email. www.wipro.com

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[U-Boot] Problem building tools directory
by Gary Carlson 21 Jun '09

21 Jun '09

Hello, I am having a problem building the u-boot tools directory on a Mac. I have been doing some troubleshooting this afternoon but haven't quite been able to find a solution that doesn't break somewhere else. The make utility and I have a long distaste for each other, even though I realize it is a necessary evil. I hoping that someone can follow several tests I generated below to help explain the behavior. If I run make tools¹ (with gnu make version 3.81) it hums along shortly and then bombs out: make -C tools all cc -Wall -pedantic -idirafter /Users/garycarlson/Documents/Embedded/u-boot-at91/include -idirafter /Users/garycarlson/Documents/Embedded/u-boot-at91/include2 -idirafter /Users/garycarlson/Documents/Embedded/u-boot-at91/include -I /Users/garycarlson/Documents/Embedded/u-boot-at91/libfdt -I /Users/garycarlson/Documents/Embedded/u-boot-at91/tools -DTEXT_BASE=0x23f00000 -DUSE_HOSTCC -D__KERNEL_STRICT_NAMES -O -c -o crc32.o crc32.c i686-apple-darwin9-gcc-4.0.1: crc32.c: No such file or directory No big surprise there, since crc32.c is not in the tools directory but rather in the lib_generic directory. I would expect the compiler syntax as emitted above to fail. However the make file located in the tools directory has a rule to address this that seems to be ignored: $(obj)%.o: $(SRCTREE)/lib_generic/%.c $(CC) -g $(CFLAGS) -c -o $@ $< Now if I create a test rule for troubleshooting purposes that replaces the pattern substitution with a hardcoded rule, it works differently: $(obj)crc32.o: $(SRCTREE)/lib_generic/crc32.c $(CC) -g $(CFLAGS) -c -o $@ $< This results in at least the crc32.c file compiling cleanly (the remaining files like md5, etc. that are not covered by the test rule still fail of course): make -C tools all cc -g -Wall -pedantic -idirafter /Users/garycarlson/Documents/Embedded/u-boot-at91/include -idirafter /Users/garycarlson/Documents/Embedded/u-boot-at91/include2 -idirafter /Users/garycarlson/Documents/Embedded/u-boot-at91/include -I /Users/garycarlson/Documents/Embedded/u-boot-at91/libfdt -I /Users/garycarlson/Documents/Embedded/u-boot-at91/tools -DTEXT_BASE=0x23f00000 -DUSE_HOSTCC -D__KERNEL_STRICT_NAMES -O -c -o crc32.o /Users/garycarlson/Documents/Embedded/u-boot-at91/lib_generic/crc32.c Note that the crc32.c file is now referenced to the correct directory. My first instinct is to want to blame this as bug in the make tool, but given that it isn't one of my strengths, maybe someone else will see something that I don't! :) Thanks, Gary

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by Googlelotto＠googlemail.com 21 Jun '09

21 Jun '09

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[U-Boot] [PATCH 1/2] Create the S5PC100 SoC code under the cpu/arm_cortesa8/
by Kim, Heung Jun 20 Jun '09

20 Jun '09

Signed-off-by: HeungJun, Kim <riverful.kim(a)samsung.com> --- This patch is the new processor - S5PC100's SoC code & headers. This patch consists of 2 files. The First file is to create the new SoC code related with S5PC100 application processor. It's located in ther cpu/arm_cortesa8/s5pc100. The Second file is to create the new SoC header related with S5PC100 application processor. It's located in ther include/asm-arm/s5pc100. This file is the First. cpu/arm_cortexa8/s5pc100/Makefile | 48 +++++++ cpu/arm_cortexa8/s5pc100/config.mk | 36 ++++++ cpu/arm_cortexa8/s5pc100/cpu_init.S | 196 +++++++++++++++++++++++++++++ cpu/arm_cortexa8/s5pc100/interrupts.c | 218 +++++++++++++++++++++++++++++++++ cpu/arm_cortexa8/s5pc100/speed.c | 159 ++++++++++++++++++++++++ 5 files changed, 657 insertions(+), 0 deletions(-) create mode 100644 cpu/arm_cortexa8/s5pc100/Makefile create mode 100644 cpu/arm_cortexa8/s5pc100/config.mk create mode 100644 cpu/arm_cortexa8/s5pc100/cpu_init.S create mode 100644 cpu/arm_cortexa8/s5pc100/interrupts.c create mode 100644 cpu/arm_cortexa8/s5pc100/speed.c diff --git a/cpu/arm_cortexa8/s5pc100/Makefile b/cpu/arm_cortexa8/s5pc100/Makefile new file mode 100644 index 0000000..4688533 --- /dev/null +++ b/cpu/arm_cortexa8/s5pc100/Makefile @@ -0,0 +1,48 @@ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS-y = interrupts.o +COBJS-$(CONFIG_S5PC100) += cpu_init.o speed.o + +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/cpu/arm_cortexa8/s5pc100/config.mk b/cpu/arm_cortexa8/s5pc100/config.mk new file mode 100644 index 0000000..e05d7ae --- /dev/null +++ b/cpu/arm_cortexa8/s5pc100/config.mk @@ -0,0 +1,36 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \ + -msoft-float + +# Make ARMv5 to allow more compilers to work, even though its v6. +PLATFORM_CPPFLAGS += -march=armv5t +# ========================================================================= +# +# Supply options according to compiler version +# +# ========================================================================= +PLATFORM_CPPFLAGS +=$(call cc-option) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) +PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,\ + $(call cc-option,-malignment-traps,)) diff --git a/cpu/arm_cortexa8/s5pc100/cpu_init.S b/cpu/arm_cortexa8/s5pc100/cpu_init.S new file mode 100644 index 0000000..4510049 --- /dev/null +++ b/cpu/arm_cortexa8/s5pc100/cpu_init.S @@ -0,0 +1,196 @@ +/* + * Originates from Samsung's u-boot 1.1.6 port to S5PC1xx + * + * Copyright (C) 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> + + * Copyright (C) 2009 + * Inki Dae, SAMSUNG Electronics, <inki.dae(a)samsung.com> + * Heungjun Kim, SAMSUNG Electronics, <riverful.kim(a)samsung.com> + * Minkyu Kang, SAMSUNG Electronics, <mk7.kang(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> + + .globl mem_ctrl_asm_init +mem_ctrl_asm_init: + +#ifdef CONFIG_ONENAND_IPL + /* DLL parameter setting */ + ldr r0, =S5P_PHYCONTROL0 @ 0xe6000018 + ldr r1, =0x50101000 + str r1, [r0] +#endif + +#ifndef CONFIG_ONENAND_IPL + ldr r0, =S5P_PHYCONTROL1 @ 0xe600001c + ldr r1, =0xf4 + str r1, [r0] + + ldr r0, =S5P_PHYCONTROL2 @ 0xe6000020 + ldr r1, =0x0 + str r1, [r0] + + /* DLL on */ + ldr r0, =S5P_PHYCONTROL0 @ 0xe6000018 + ldr r1, =0x50101002 + str r1, [r0] + + /* DLL start */ + ldr r0, =S5P_PHYCONTROL0 @ 0xe6000018 + ldr r1, =0x50101003 + str r1, [r0] + + /* Force value locking for DLL off */ + ldr r0, =S5P_PHYCONTROL0 @ 0xe6000018 + ldr r1, =0x50101003 + str r1, [r0] + + /* DLL off */ + ldr r0, =S5P_PHYCONTROL0 @ 0xe6000018 + ldr r1, =0x50101001 + str r1, [r0] + + /* auto refresh off */ + ldr r0, =S5P_CONCONTROL @ 0xe6000000 + ldr r1, =0xff001010 + str r1, [r0] +#endif + +#ifdef CONFIG_ONENAND_IPL + /* + * BL%LE %LONG4, 2 chip, LPDDR, dynamic self refresh, + * force precharge, dynamic power down off + */ + ldr r0, =S5P_MEMCONTROL @ 0xe6000004 + ldr r1, =0x00212100 + str r1, [r0] + + /* 128MB config, 4banks */ + ldr r0, =S5P_MEMCONFIG0 @ 0xe6000008 + ldr r1, =0x20f80222 + str r1, [r0] +#endif + +#ifndef CONFIG_ONENAND_IPL + ldr r0, =S5P_MEMCONFIG1 @ 0xe600000c + ldr r1, =0x28f80222 + str r1, [r0] + + ldr r0, =S5P_PRECHCONFIG @ 0xe6000014 + ldr r1, =0x20000000 + str r1, [r0] +#endif + +#ifdef CONFIG_ONENAND_IPL + /* + * 7.8us*166MHz%LE %LONG1294(0x50E) 7.8us*133MHz%LE %LONG1038(0x40E), + * 100MHz%LE %LONG780(0x30C), + * 20MHz%LE %LONG156(0x9C), + * 10MHz%LE %LONG78(0x4E) + */ + ldr r0, =S5P_TIMINGAREF @ 0xe6000030 + ldr r1, =0x0000050e + str r1, [r0] + + /* 133MHz */ + ldr r0, =S5P_TIMINGROW @ 0xe6000034 + ldr r1, =0x0c233287 + str r1, [r0] + + /* twtr=3 twr=2 trtp=3 cl=3 wl=3 rl=3 */ + ldr r0, =S5P_TIMINGDATA @ 0xe6000038 + ldr r1, =0x32330303 + str r1, [r0] + + /* tfaw=4 sxsr=0x14 txp=0x14 tcke=3 tmrd=3 */ + ldr r0, =S5P_TIMINGPOWER @ 0xe600003c + ldr r1, =0x04141433 + str r1, [r0] + + /* chip0 Deselect */ + ldr r0, =S5P_DIRECTCMD @ 0xe6000010 + ldr r1, =0x07000000 + str r1, [r0] + + /* chip0 PALL */ + ldr r0, =S5P_DIRECTCMD @ 0xe6000010 + ldr r1, =0x01000000 + str r1, [r0] + + /* chip0 REFA */ + ldr r0, =S5P_DIRECTCMD @ 0xe6000010 + ldr r1, =0x05000000 + str r1, [r0] + + /* chip0 REFA */ + ldr r0, =S5P_DIRECTCMD @ 0xe6000010 + ldr r1, =0x05000000 + str r1, [r0] + + /* chip0 MRS, CL%LE %LONG3, BL%LE %LONG4 */ + ldr r0, =S5P_DIRECTCMD @ 0xe6000010 + ldr r1, =0x00000032 + str r1, [r0] +#endif + +#ifndef CONFIG_ONENAND_IPL + /* chip1 Deselect */ + ldr r0, =S5P_DIRECTCMD @ 0xe6000010 + ldr r1, =0x07100000 + str r1, [r0] + + /* chip1 PALL */ + ldr r0, =S5P_DIRECTCMD @ 0xe6000010 + ldr r1, =0x01100000 + str r1, [r0] + + /* chip1 REFA */ + ldr r0, =S5P_DIRECTCMD @ 0xe6000010 + ldr r1, =0x05100000 + str r1, [r0] + + /* chip1 REFA */ + ldr r0, =S5P_DIRECTCMD @ 0xe6000010 + ldr r1, =0x05100000 + str r1, [r0] + + /* chip1 MRS, CL%LE %LONG3, BL%LE %LONG4 */ + ldr r0, =S5P_DIRECTCMD @ 0xe6000010 + ldr r1, =0x00100032 + str r1, [r0] + + /* auto refresh on */ + ldr r0, =S5P_CONCONTROL @ 0xe6000000 + ldr r1, =0xff002030 + str r1, [r0] + +#endif + +#ifdef CONFIG_ONENAND_IPL + /* BL%LE %LONG */ + ldr r0, =S5P_MEMCONTROL @ 0xe6000004 + ldr r1, =0xff212100 + str r1, [r0] +#endif + mov pc, lr + + .ltorg diff --git a/cpu/arm_cortexa8/s5pc100/interrupts.c b/cpu/arm_cortexa8/s5pc100/interrupts.c new file mode 100644 index 0000000..3d2a2e5 --- /dev/null +++ b/cpu/arm_cortexa8/s5pc100/interrupts.c @@ -0,0 +1,218 @@ +/* + * (C) Copyright 2003 + * Texas Instruments <www.ti.com> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Alex Zuepke <azu(a)sysgo.de> + * + * (C) Copyright 2002-2004 + * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> + * + * (C) Copyright 2004 + * Philippe Robin, ARM Ltd. <philippe.robin(a)arm.com> + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> + * + * (C) Copyright 2009 + * Heungjun Kim, SAMSUNG Electronics, <riverful.kim(a)samsung.com> + * Inki Dae, SAMSUNG Electronics, <inki.dae(a)samsung.com> + * Minkyu Kang, SAMSUNG Electronics, <mk7.kang(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/clock.h> + +#define PRESCALER_0 (16 - 1) /* prescaler of PWM timer 4 */ +#define MUX4_DIV_12 (2 - 1) /* MUX 4, 1/2 period */ + +static ulong count_value; + +/* Internal tick units */ +static unsigned long long timestamp; /* Monotonic incrementing timer */ +static unsigned long lastdec; /* Last decremneter snapshot */ + +/* macro to read the 16 bit timer */ +static inline ulong READ_TIMER(void) +{ + s5pc1xx_timers_t *const timers = (s5pc1xx_timers_t *)S5P_TIMER_BASE; + + return timers->TCNTO4; +} + +int interrupt_init(void) +{ + s5pc1xx_timers_t *const timers = (s5pc1xx_timers_t *)S5P_TIMER_BASE; + + /* + * @ PWM Timer 4 + * Timer Freq(HZ) = + * PCLK / { (prescaler_value + 1) * (divider_value) } + */ + + /* set prescaler : 16 */ + /* set divider : 2 */ + timers->TCFG0 = (PRESCALER_0 & 0xff) << 8; + timers->TCFG1 = (MUX4_DIV_12 & 0xf) << 16; + + if (count_value == 0) { + + /* reset initial value */ + /* count_value = 2085937.5(HZ) (per 1 sec)*/ + count_value = get_PCLK() / ((PRESCALER_0 + 1) * + (MUX4_DIV_12 + 1)); + + /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ + count_value = count_value / 100; + } + + /* set count value */ + timers->TCNTB4 = count_value; + lastdec = count_value; + + /* auto reload & manual update */ + timers->TCON = (timers->TCON & ~(0x03 << 20)) | + S5P_TCON4_AUTO_RELOAD | S5P_TCON4_UPDATE; + + /* start PWM timer 4 */ + timers->TCON = (timers->TCON & ~(0x03 << 20)) | + S5P_TCON4_AUTO_RELOAD | S5P_TCON4_ON; + + timestamp = 0; + + return 0; +} + + +/* + * timer without interrupts + */ +void reset_timer(void) +{ + reset_timer_masked(); +} + +ulong get_timer(ulong base) +{ + return get_timer_masked() - base; +} + +void set_timer(ulong t) +{ + timestamp = t; +} + + +/* delay x useconds */ +void udelay(unsigned long usec) +{ + ulong tmo, tmp; + + if (usec >= 1000) { + + /* + * if "big" number, spread normalization + * to seconds + * 1. start to normalize for usec to ticks per sec + * 2. find number of "ticks" to wait to achieve target + * 3. finish normalize. + */ + tmo = usec / 1000; + tmo *= CONFIG_SYS_HZ; + tmo /= 1000; + + } else { + /* else small number, don't kill it prior to HZ multiply */ + tmo = usec * CONFIG_SYS_HZ; + tmo /= (1000 * 1000); + + } + + /* get current timestamp */ + tmp = get_timer(0); + + if ((tmo + tmp + 1) < tmp) { + + /* if setting this fordward will roll time stamp */ + /* reset "advancing" timestamp to 0, set lastdec value */ + reset_timer_masked(); + + } else { + + /* else, set advancing stamp wake up time */ + tmo += tmp; + } + + /* loop till event */ + while (get_timer_masked() < tmo) + ; /* nop */ +} + +void reset_timer_masked(void) +{ + /* reset time */ + lastdec = READ_TIMER(); + timestamp = 0; +} + +ulong get_timer_masked(void) +{ + /* current tick value */ + ulong now = READ_TIMER(); + + if (lastdec >= now) { + /* normal mode */ + timestamp += lastdec - now; + + } else { + /* overflow */ + timestamp += lastdec + count_value - now; + + } + lastdec = now; + + return timestamp; +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + /* We overrun in 100s */ + return CONFIG_SYS_HZ * 100; +} + diff --git a/cpu/arm_cortexa8/s5pc100/speed.c b/cpu/arm_cortexa8/s5pc100/speed.c new file mode 100644 index 0000000..9b5863b --- /dev/null +++ b/cpu/arm_cortexa8/s5pc100/speed.c @@ -0,0 +1,159 @@ +/* + * (C) Copyright 2001-2004 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2002 + * David Mueller, ELSOFT AG, d.mueller(a)elsoft.ch + * + * (C) Copyright 2009 + * Inki Dae, SAMSUNG Electronics, <inki.dae(a)samsung.com> + * Heungjun Kim, SAMSUNG Electronics, <riverful.kim(a)samsung.com> + * Minkyu Kang, SAMSUNG Electronics, <mk7.kang(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * This code should work for both the S3C2400 and the S3C2410 + * as they seem to have the same PLL and clock machinery inside. + * The different address mapping is handled by the s3c24xx.h files below. + */ + +#include <common.h> +#include <asm/arch/clock.h> + +#define APLL 0 +#define MPLL 1 +#define EPLL 2 +#define HPLL 3 + +/* ------------------------------------------------------------------------- */ +/* + * NOTE: This describes the proper use of this file. + * + * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL. + * + * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of + * the specified bus in HZ. + */ +/* ------------------------------------------------------------------------- */ + +static unsigned long get_PLLCLK(int pllreg) +{ + unsigned long r, m, p, s, mask; + + switch (pllreg) { + case APLL: + r = S5P_APLL_CON_REG; + break; + case MPLL: + r = S5P_MPLL_CON_REG; + break; + case EPLL: + r = S5P_EPLL_CON_REG; + break; + case HPLL: + r = S5P_HPLL_CON_REG; + break; + default: + hang(); + } + + if (pllreg == APLL) + mask = 0x3ff; + else + mask = 0x1ff; + + m = (r >> 16) & mask; + p = (r >> 8) & 0x3f; + s = r & 0x7; + + return m * (CONFIG_SYS_CLK_FREQ / (p * (1 << s))); +} + +/* return ARMCORE frequency */ +unsigned long get_ARMCLK(void) +{ + unsigned long div, ret; + + div = S5P_CLK_DIV0_REG; + + /* arm_ratio : [6:4] */ + return get_PLLCLK(APLL) / ((((div >> 4) & 0x7) + 1) * (div & 0x1) + 1); +} + +/* return FCLK frequency */ +unsigned long get_FCLK(void) +{ + return get_PLLCLK(APLL); +} + +/* return MCLK frequency */ +unsigned long get_MCLK(void) +{ + return get_PLLCLK(MPLL); +} + +/* return HCLK frequency */ +unsigned long get_HCLK(void) +{ + unsigned long fclk; + + uint div, div_apll, div_arm, div_d0_bus; + + div = S5P_CLK_DIV0_REG; + + div_apll = (div & 0x1) + 1; + div_arm = ((div >> 4) & 0x7) + 1; + div_d0_bus = ((div >> 8) & 0x7) + 1; + + fclk = get_FCLK(); + + return fclk / (div_apll * div_arm * div_d0_bus); +} + +/* return PCLK frequency */ +unsigned long get_PCLK(void) +{ + unsigned long fclk; + uint div = S5P_CLK_DIV1_REG; + uint div_d1_bus = ((div >> 12) & 0x7) + 1; + uint div_pclk = ((div >> 16) & 0x7) + 1; + + /* ASYNC Mode */ + fclk = get_PLLCLK(MPLL); + + return fclk/(div_d1_bus * div_pclk); +} + +/* return UCLK frequency */ +unsigned long get_UCLK(void) +{ + return get_PLLCLK(EPLL); +} + +int print_cpuinfo(void) +{ + printf("CPU:\tS5PC100@%luMHz\n", get_ARMCLK() / 1000000); + printf("\tFclk = %luMHz, Hclk = %luMHz, Pclk = %luMHz\n", + get_FCLK() / 1000000, get_HCLK() / 1000000, + get_PCLK() / 1000000); + + return 0; +} -- 1.5.6.3

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[U-Boot] [STATUS] Summer break
by Wolfgang Denk 20 Jun '09

20 Jun '09

Hi, just a short update on the release status: - The merge window for v2009.08 is open until Sun Jul 19, 2009, = 29 days remaining. - At the moment, there are no outstanding pull requests. - I'm on the verge of leaving for 2 weeks of vacation, so please don't expect any reviewing / merging / pulling from me in this time. I will be back on July 06. Enjoy the time. Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de "He was so narrow minded he could see through a keyhole with both eyes ..."

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[U-Boot] Pull request u-boot-blackfin.git
by Mike Frysinger 20 Jun '09

20 Jun '09

The following changes since commit 57fe30194d3c15c37d9ff06dbd2a4c1ffccda018: Wolfgang Denk (1): Merge branch 'master' of /home/wd/git/u-boot/custodians are available in the git repository at: git://www.denx.de/git/u-boot-blackfin.git master Mike Frysinger (4): Blackfin: bf548-ezkit: bump up monitor size Blackfin: enable -O2 in lib_generic/ for ADI/Bluetechnix boards Blackfin: fix SPI flash speed define name Blackfin: move ALL += u-boot.ldr to blackfin_config.mk Vivi Li (2): Blackfin: bump up default JTAG console timeout Blackfin: bf533-stamp/bf537-stamp: fix env settings for SPI flash Makefile | 4 +--- blackfin_config.mk | 6 ++++-- board/bf518f-ezbrd/config.mk | 3 +++ board/bf526-ezbrd/config.mk | 3 +++ board/bf527-ezkit/config.mk | 3 +++ board/bf533-ezkit/config.mk | 3 +++ board/bf533-stamp/config.mk | 3 +++ board/bf537-stamp/config.mk | 3 +++ board/bf538f-ezkit/config.mk | 3 +++ board/bf548-ezkit/config.mk | 3 +++ board/bf561-ezkit/config.mk | 3 +++ board/cm-bf527/config.mk | 3 +++ board/cm-bf533/config.mk | 3 +++ board/cm-bf537e/config.mk | 3 +++ board/cm-bf548/config.mk | 3 +++ board/cm-bf561/config.mk | 3 +++ board/tcm-bf537/config.mk | 3 +++ cpu/blackfin/jtag-console.c | 2 +- include/configs/bf518f-ezbrd.h | 2 +- include/configs/bf526-ezbrd.h | 2 +- include/configs/bf527-ezkit.h | 2 +- include/configs/bf533-stamp.h | 6 +++--- include/configs/bf537-minotaur.h | 2 +- include/configs/bf537-pnav.h | 2 +- include/configs/bf537-srv1.h | 2 +- include/configs/bf537-stamp.h | 6 +++--- include/configs/bf538f-ezkit.h | 2 +- include/configs/bf548-ezkit.h | 4 ++-- include/configs/blackstamp.h | 2 +- 29 files changed, 67 insertions(+), 22 deletions(-)

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[U-Boot] [PATCH] arm nomadik: rename board and cleanup config
by Alessandro Rubini 20 Jun '09

20 Jun '09

From: Alessandro Rubini <rubini(a)unipv.it> This patch cleans up some glitches in the initial submission: - nobody calls it "nmdk8815": the board is "nhk8815", so rename - nand and onenand can coexist, so fix config file accordingly - configure the chip select for OneNand, so it works properly - removed a pair of unused defines and reordered the jffs defs - add some comments and an explanation of the two configs Signed-off-by: Alessandro Rubini <rubini(a)unipv.it> Acked-by: Andrea Gallo <andrea.gallo(a)stericsson.com> --- If needed I can split this, but I think it's trivial enough. Over this I'll send a few additions in the next days. Makefile | 10 ++-- board/st/{nmdk8815 => nhk8815}/Makefile | 2 +- board/st/{nmdk8815 => nhk8815}/config.mk | 0 .../st/{nmdk8815/nmdk8815.c => nhk8815/nhk8815.c} | 4 ++ board/st/{nmdk8815 => nhk8815}/platform.S | 0 cpu/arm926ejs/nomadik/reset.S | 12 +---- doc/{README.nmdk8815 => README.nhk8815} | 9 +++ include/configs/{nmdk8815.h => nhk8815.h} | 57 ++++++++++++-------- 8 files changed, 55 insertions(+), 39 deletions(-) rename board/st/{nmdk8815 => nhk8815}/Makefile (98%) rename board/st/{nmdk8815 => nhk8815}/config.mk (100%) rename board/st/{nmdk8815/nmdk8815.c => nhk8815/nhk8815.c} (91%) rename board/st/{nmdk8815 => nhk8815}/platform.S (100%) rename doc/{README.nmdk8815 => README.nhk8815} (75%) rename include/configs/{nmdk8815.h => nhk8815.h} (77%) diff --git a/Makefile b/Makefile index acec1a0..14ba063 100644 --- a/Makefile +++ b/Makefile @@ -2841,17 +2841,17 @@ mx1fs2_config : unconfig netstar_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm925t netstar -nmdk8815_config \ -nmdk8815_onenand_config: unconfig +nhk8815_config \ +nhk8815_onenand_config: unconfig @mkdir -p $(obj)include @ > $(obj)include/config.h @if [ "$(findstring _onenand, $@)" ] ; then \ echo "#define CONFIG_BOOT_ONENAND" >> $(obj)include/config.h; \ - $(XECHO) "... configured for OneNand Flash"; \ + $(XECHO) "... configured to boot from OneNand Flash"; \ else \ - $(XECHO) "... configured for Nand Flash"; \ + $(XECHO) "... configured to boot from Nand Flash"; \ fi - @$(MKCONFIG) -a nmdk8815 arm arm926ejs nmdk8815 st nomadik + @$(MKCONFIG) -a nhk8815 arm arm926ejs nhk8815 st nomadik omap1510inn_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn diff --git a/board/st/nmdk8815/Makefile b/board/st/nhk8815/Makefile similarity index 98% rename from board/st/nmdk8815/Makefile rename to board/st/nhk8815/Makefile index be9a424..b37fe53 100644 --- a/board/st/nmdk8815/Makefile +++ b/board/st/nhk8815/Makefile @@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := nmdk8815.o +COBJS := nhk8815.o SOBJS := platform.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/st/nmdk8815/config.mk b/board/st/nhk8815/config.mk similarity index 100% rename from board/st/nmdk8815/config.mk rename to board/st/nhk8815/config.mk diff --git a/board/st/nmdk8815/nmdk8815.c b/board/st/nhk8815/nhk8815.c similarity index 91% rename from board/st/nmdk8815/nmdk8815.c rename to board/st/nhk8815/nhk8815.c index edf4626..085a5e0 100644 --- a/board/st/nmdk8815/nmdk8815.c +++ b/board/st/nhk8815/nhk8815.c @@ -53,6 +53,10 @@ int board_init(void) writel(0x0000305b, REG_FSMC_BCR1); writel(0x00033f33, REG_FSMC_BTR1); + /* Set up SMCS0 for OneNand: sram-like once again */ + writel(0x000030db, NOMADIK_FSMC_BASE + 0x00); /* FSMC_BCR0 */ + writel(0x02100551, NOMADIK_FSMC_BASE + 0x04); /* FSMC_BTR0 */ + icache_enable(); return 0; } diff --git a/board/st/nmdk8815/platform.S b/board/st/nhk8815/platform.S similarity index 100% rename from board/st/nmdk8815/platform.S rename to board/st/nhk8815/platform.S diff --git a/cpu/arm926ejs/nomadik/reset.S b/cpu/arm926ejs/nomadik/reset.S index 948996b..694c32b 100644 --- a/cpu/arm926ejs/nomadik/reset.S +++ b/cpu/arm926ejs/nomadik/reset.S @@ -6,20 +6,10 @@ .align 5 .globl reset_cpu reset_cpu: -#if defined CONFIG_NOMADIK_8815 - ldr r0, =NOMADIK_SRC_BASE + ldr r0, =NOMADIK_SRC_BASE /* System and Reset Controller */ ldr r1, =0x1 str r1, [r0, #0x18] -#else - ldr r1, rstctl1 /* get clkm1 reset ctl */ - mov r3, #0x0 - strh r3, [r1] /* clear it */ - mov r3, #0x8 - strh r3, [r1] /* force dsp+arm reset */ -#endif _loop_forever: b _loop_forever -rstctl1: - .word 0xfffece10 diff --git a/doc/README.nmdk8815 b/doc/README.nhk8815 similarity index 75% rename from doc/README.nmdk8815 rename to doc/README.nhk8815 index 453cfae..940f24d 100644 --- a/doc/README.nmdk8815 +++ b/doc/README.nhk8815 @@ -15,6 +15,15 @@ SDRAM configuration, PLL setup and initial loading from NAND is implemented in the X-Loader, so U-Boot is already running in SDRAM when control is handed over to it. +The Makefile offers two different configurations to be used if you +boot from Nand or OneNand. + + make nhk8815_config + make nhk8815_onenand_config + +Both support OneNand and Nand. Since U-Boot, running in RAM, can't know +where it was loaded from, the configurations differ in where the filesystem +is looked for by default. On www.st.com/nomadik and on www.stnwireless.com there are documents, summary data and white papers on Nomadik. The full datasheet for diff --git a/include/configs/nmdk8815.h b/include/configs/nhk8815.h similarity index 77% rename from include/configs/nmdk8815.h rename to include/configs/nhk8815.h index 6d7b94f..bf1a915 100644 --- a/include/configs/nmdk8815.h +++ b/include/configs/nhk8815.h @@ -1,7 +1,8 @@ /* * (C) Copyright 2005 * STMicroelectronics. - * Configuration settings for the STn8815 nomadik board. + * Configuration settings for the "Nomadik Hardware Kit" NHK-8815, + * the evaluation board for the Nomadik 8815 System on Chip. * * See file CREDITS for list of people who contributed to this * project. @@ -29,9 +30,8 @@ #define CONFIG_ARM926EJS #define CONFIG_NOMADIK -#define CONFIG_NOMADIK_8815 -#define CONFIG_NOMADIK_NDK15 -#define CONFIG_NOMADIK_NHK15 +#define CONFIG_NOMADIK_8815 /* cpu variant */ +#define CONFIG_NOMADIK_NHK8815 /* board variant */ #define CONFIG_SKIP_LOWLEVEL_INIT /* we have already been loaded to RAM */ @@ -55,6 +55,7 @@ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT "Nomadik> " #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ + sizeof(CONFIG_SYS_PROMPT) + 16) @@ -90,6 +91,7 @@ #define CONFIG_SYS_MEMTEST_END 0x0FFFFFFF #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256 * 1024) #define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */ +#define CONFIG_SYS_64BIT_VSPRINTF /* mtd desires this */ #define CONFIG_MISC_INIT_R /* call misc_init_r during start up */ @@ -120,43 +122,54 @@ #define CONFIG_SMC_USE_32_BIT #define CONFIG_BOOTFILE "uImage" -/* flash memory and filesystem information */ -#define CONFIG_DOS_PARTITION +/* Storage information: onenand and nand */ +#define CONFIG_CMD_ONENAND #define CONFIG_MTD_ONENAND_VERIFY_WRITE #define CONFIG_SYS_ONENAND_BASE 0x30000000 + +#define CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 /* SMPS0n */ +/* + * Filesystem information + * + * Since U-Boot has been loaded to RAM by vendor code, we could use + * either or both OneNand and Nand. However, we need to know where the + * filesystem lives. Comments below report vendor-selected partitions + */ #ifdef CONFIG_BOOT_ONENAND - -# define CONFIG_CMD_ONENAND /* Temporary: nand and onenand can't coexist */ /* Partition Size Start * XloaderTOC + X-Loader 256KB 0x00000000 * Memory init function 256KB 0x00040000 - * U-Boot 2MB 0x00080000 + * U-Boot + env 2MB 0x00080000 * Sysimage (kernel + ramdisk) 4MB 0x00280000 * JFFS2 Root filesystem 22MB 0x00680000 * JFFS2 User Data 227.5MB 0x01C80000 */ -# define CONFIG_JFFS2_PART_SIZE 0x400000 -# define CONFIG_JFFS2_PART_OFFSET 0x280000 - +# define CONFIG_JFFS2_DEV "onenand0" +# define CONFIG_JFFS2_PART_SIZE 0x01600000 +# define CONFIG_JFFS2_PART_OFFSET 0x00680000 # define CONFIG_ENV_IS_IN_ONENAND -# define CONFIG_ENV_SIZE (256 * 1024) -# define CONFIG_ENV_ADDR 0x30300000 - -#else /* ! CONFIG_BOOT_ONENAND */ - -# define CONFIG_CMD_NAND /* Temporary: nand and onenand can't coexist */ +# define CONFIG_ENV_SIZE 0x20000 /* 128 Kb - one sector */ +# define CONFIG_ENV_ADDR (0x00280000 - CONFIG_ENV_SIZE) +#else /* BOOT_NAND */ + /* Partition Size Start + * XloaderTOC + X-Loader 256KB 0x00000000 + * Memory init function 256KB 0x00040000 + * U-Boot + env 2MB 0x00080000 + * Kernel Image 3MB 0x00280000 + * JFFS2 Root filesystem 22MB 0x00580000 + * JFFS2 User Data 100.5MB 0x01b80000 + */ # define CONFIG_JFFS2_DEV "nand0" # define CONFIG_JFFS2_NAND 1 /* For the jffs2 support*/ -# define CONFIG_JFFS2_PART_SIZE 0x00300000 -# define CONFIG_JFFS2_PART_OFFSET 0x00280000 - +# define CONFIG_JFFS2_PART_SIZE 0x01600000 +# define CONFIG_JFFS2_PART_OFFSET 0x00580000 # define CONFIG_ENV_IS_IN_NAND # define CONFIG_ENV_SIZE 0x20000 /* 128 Kb - one sector */ -# define CONFIG_ENV_OFFSET (0x8000000 - CONFIG_ENV_SIZE) +# define CONFIG_ENV_OFFSET (0x00280000 - CONFIG_ENV_SIZE) #endif /* CONFIG_BOOT_ONENAND */ -- 1.6.0.2

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[U-Boot] iMX27 PDK board support
by Brice.Walzer＠ulp.u-strasbg.fr 20 Jun '09

20 Jun '09

Hey guys, J've seen that U-Boot V2 supports different MX27 CPU boards. Is U-Boot supported on Freescale i.MX27 PDK board ? Thanks in advance. Brice Walzer

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