May 2009 - U-Boot

Re: [U-Boot] [PATCH v10] Marvell Kirkwood family SOC support
by Prafulla Wadaskar 26 May '09

26 May '09

> -----Original Message----- > From: Stefan Roese [mailto:sr@denx.de] > Sent: Tuesday, May 26, 2009 12:43 PM > To: Prafulla Wadaskar > Subject: Re: [U-Boot] [PATCH v10] Marvell Kirkwood family SOC support > > Hi Prafulla, > > On Thursday 21 May 2009 22:24:29 Prafulla Wadaskar wrote: > > Kirkwood family controllers are highly integrated SOCs based on > > Feroceon-88FR131/Sheeva-88SV131 cpu core. > > Do you also have a NAND driver for Kirkwood in your queue? > I'm asking since I need NAND support for my custom board. If > you don't have any I will port the one from the 1.1.4 Marvell > version to mainline. Hi Stefan No need, NAND support is already mainlined in u-boot, you just need to use it I have used it for Sheevaplug board support please see the patch http://lists.denx.de/pipermail/u-boot/2009-May/053158.html Please kindly keep practice asking questions on u-boot(a)lists.denx.de so that everyone in need can use the information, vice versa answer your query Regards.. Prafulla . .

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Re: [U-Boot] [PATCH 4/4] Support NAND and OneNAND memories on the OMAP3 EVM.
by Wolfgang Denk 26 May '09

26 May '09

Dear Josh Karabin, In message <dc17cf9cca7ecf905d67dfa04deb6536608c9cf0.1243367498.git.gkarabi n(a)vocollect.com> you wrote: > This change detects the boot configuration of an OMAP3 device, > and uses that information on OMAP3 EVM builds to support > NAND or OneNAND. > > Signed-off-by: Josh Karabin <gkarabin(a)vocollect.com> > --- > board/omap3/evm/evm.c | 24 +++++++++++ > board/omap3/evm/evm.h | 4 +- > cpu/arm_cortexa8/omap3/mem.c | 71 ++++++++++++++++++++------------ > include/asm-arm/arch-omap3/sys_proto.h | 2 +- > include/configs/omap3_evm.h | 4 ++ > 5 files changed, 76 insertions(+), 29 deletions(-) > > diff --git a/board/omap3/evm/evm.c b/board/omap3/evm/evm.c > index c008c2e..e30e83f 100644 > --- a/board/omap3/evm/evm.c > +++ b/board/omap3/evm/evm.c > @@ -34,6 +34,8 @@ > #include <asm/arch/sys_proto.h> > #include <i2c.h> > #include <asm/mach-types.h> > +#include <environment.h> > +#include <command.h> > #include "evm.h" > > /* > @@ -43,8 +45,30 @@ > int board_init(void) > { > DECLARE_GLOBAL_DATA_PTR; > +#if defined(CONFIG_ENV_IS_IN_ONENAND) && defined(CONFIG_ENV_IS_IN_NAND) > + int flash_type; > + cmd_tbl_t *cmdtp; > > + flash_type = gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ > + > + switch (flash_type) { > + case PISMO1_NAND: > + env_object_ptr = &env_object_nand; > + onenand_disable_init(); > + cmdtp = find_cmd("onenand"); > + cmdtp->name = NULL; > + break; > + case PISMO1_ONENAND: > + env_object_ptr = &env_object_onenand; > + nand_disable_init(); > + cmdtp = find_cmd("nand"); > + cmdtp->name = NULL; > + break; > + } In the end we will have tons of FOO_disable_init() functions for all kinds of FOO; Maybe we can just have one common disable_cmd() function and supply it with a parameter instead? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Children begin by loving their parents. After a time they judge them. Rarely, if ever, do they forgive them. - Oscar Wilde

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Re: [U-Boot] [PATCH 3/4] Support run-time disabling of u-boot commands.
by Wolfgang Denk 26 May '09

26 May '09

Dear Josh Karabin, In message <2d0c4b7840d573c666484662662fbb953f59cfba.1243367498.git.gkarabi n(a)vocollect.com> you wrote: > Change the command parsing code to ignore command table > entries with NULL names. This makes it possible to disable a > command (say, for a supported but not connected memory) at > run time. > > Signed-off-by: Josh Karabin <gkarabin(a)vocollect.com> > --- > common/command.c | 43 +++++++++++++++++++++++++------------------ > 1 files changed, 25 insertions(+), 18 deletions(-) > > diff --git a/common/command.c b/common/command.c > index c9a3f5b..ef2cbfc 100644 > --- a/common/command.c > +++ b/common/command.c > @@ -243,15 +243,19 @@ int _do_help (cmd_tbl_t *cmd_start, int cmd_items, cmd_tbl_t * cmdtp, int > if (argc == 1) { /*show list of commands */ > cmd_tbl_t *cmd_array[cmd_items]; > int i, j, swaps; > + int cmd_array_items; I think cmd_array_items can be avoided. > /* Make array of commands from .uboot_cmd section */ > cmdtp = cmd_start; > - for (i = 0; i < cmd_items; i++) { > - cmd_array[i] = cmdtp++; > + for (i = 0, cmd_array_items = 0; i < cmd_items; i++) { > + if (cmdtp->name) { > + cmd_array[i] = cmdtp++; > + cmd_array_items++; > + } > } I don't think this is needed. You will not have any NULL entries in the .uboot_cmd section. > @@ -483,20 +488,22 @@ static int complete_cmdv(int argc, char *argv[], char last_char, int maxv, char > /* return the partial matches */ > for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) { > > - clen = strlen(cmdtp->name); > - if (clen < len) > - continue; > + if (cmdtp->name) { > + clen = strlen(cmdtp->name); > + if (clen < len) > + continue; Change the logic here. Instead of adding yet another indentation level write: if (!cmdtp->name)) continue; Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Include the success of others in your dreams for your own success.

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Re: [U-Boot] [PATCH 2/4] Support run-time disabling of NAND and OneNAND memories.
by Wolfgang Denk 26 May '09

26 May '09

Dear Josh Karabin, In message <6fef2a52802b16a737007f722b084fda737664f8.1243367498.git.gkarabi n(a)vocollect.com> you wrote: > Add "disable" functions that will prevent the initialization > function of nand and onenand interfaces from completing. > > These functions are intended to be called on boards that can > be populated with one of multiple persistent memory types. > Board initialization code must ensure that only the correct > memory type is used by called the disable function(s) of > memory types that are supported at run time, but aren't > present on the board. I don't like to have yet another implementation of runtime hardware configuration. My recommendation would be to use a device tree to configure U-Boot to your needs. If you don't want to go that far yet, then please use the mechanisms we discussed previously, i. e. please see thread "Add simple hwconfig infrastructure" at http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/58771/focus=58774 Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de It's not an optical illusion, it just looks like one. -- Phil White

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Re: [U-Boot] [PATCH 1/4] Support multiple CONFIG_ENV options in a single build.
by Wolfgang Denk 26 May '09

26 May '09

Dear Josh Karabin, In message <720c2e565183a38bc9ecc6b880373534b1826a8b.1243367498.git.gkarabi n(a)vocollect.com> you wrote: > If only a single CONFIG_ENV constant is defined at build time, > the location of the environment will correspond to that > environment. > > If multiple CONFIG_ENV constants are defined at build time, the > environment will default to one of the locations, but the > particular location is not defined. Mechanisms for selection > will be provided in later patches. What is the size impact of this patch? Note that this patch will not go in until you at least explain how you plan to implement such a selection. ... > +static void env_object_ptr_init(void) > +{ > + if (env_object_ptr) > + return; > + > +#if defined(CONFIG_ENV_IS_IN_DATAFLASH) > + env_object_ptr = &env_object_dataflash; > +#elif defined(CONFIG_ENV_IS_IN_EEPROM) > + env_object_ptr = &env_object_eeprom; > +#elif defined(CONFIG_ENV_IS_IN_FLASH) > + env_object_ptr = &env_object_flash; > +#elif defined(CONFIG_ENV_IS_IN_MG_DISK) > + env_object_ptr = &env_object_mgdisk; > +#elif defined(CONFIG_ENV_IS_IN_NAND) > + env_object_ptr = &env_object_nand; > +#elif defined(CONFIG_ENV_IS_NOWHERE) > + env_object_ptr = &env_object_nowhere; > +#elif defined(CONFIG_ENV_IS_IN_NVRAM) > + env_object_ptr = &env_object_nvram; > +#elif defined(CONFIG_ENV_IS_IN_ONENAND) > + env_object_ptr = &env_object_onenand; > +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) > + env_object_ptr = &env_object_sf; > +#else > +#error "No environment object specified!" > +#endif This looks as if the user had no choice about what the default location would be? I don't like that. > --- a/common/env_eeprom.c > +++ b/common/env_eeprom.c ... > * We are still running from ROM, so data use is limited > * Use a (moderately small) buffer on the stack > */ > -int env_init(void) > +static int init_eeprom(void) > { > ulong crc, len, new; > unsigned off; > uchar buf[64]; > > + env_ptr = NULL; > + Has this code been tested? See the comment above - we're still running from ROM, and the data segment is not writable! > diff --git a/common/env_flash.c b/common/env_flash.c > index 00792cd..7233dcb 100644 > --- a/common/env_flash.c > +++ b/common/env_flash.c ... > -int env_init(void) > +static int init_flash(void) > { > int crc1_ok = 0, crc2_ok = 0; > > @@ -104,6 +100,12 @@ int env_init(void) > ulong addr1 = (ulong)&(flash_addr->data); > ulong addr2 = (ulong)&(flash_addr_new->data); > > +#ifdef ENV_IS_EMBEDDED > + env_ptr = (env_t *)(&environment[0]); > +#else > + env_ptr = (env_t *)CONFIG_ENV_ADDR; > +#endif See above. I don't think this would work. We don't have a writable data segment yet. Be careful when moving static initializations into runtime code. The environment needs to be accessed long before the data segment becomes writable. Did you really test this code? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Remember that Beethoven wrote his first symphony in C ...

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[U-Boot] [PATCH 0/4] Support NAND and OneNAND memories on the OMAP3 EVM
by Josh Karabin 26 May '09

26 May '09

This patch series permits the OMAP3 EVM to select which set of NAND or OneNAND memory related commands to use, as a function of the detected bootstrap configuration. In addition to the OMAP3-specific parts, it abstracts the selection of the environment's location so that the choice can be made at run-time, not just compile time. It also makes it possible to disable support for compiled-in u-boot commands. In particular, the changes to memory types other than NAND and OneNAND will need some scrutiny, since I don't have a good way to test some of those systems, or even to compile them. Josh Karabin (4): Support multiple CONFIG_ENV options in a single build. Support run-time disabling of NAND and OneNAND memories. Support run-time disabling of u-boot commands. Support NAND and OneNAND memories on the OMAP3 EVM. board/omap3/evm/evm.c | 24 +++++++++++ board/omap3/evm/evm.h | 4 +- common/cmd_nvedit.c | 4 +- common/command.c | 43 +++++++++++-------- common/env_common.c | 64 ++++++++++++++++++++++++++--- common/env_dataflash.c | 25 ++++++++---- common/env_eeprom.c | 24 +++++++---- common/env_flash.c | 34 +++++++++++---- common/env_mgdisk.c | 23 +++++++---- common/env_nand.c | 61 ++++++++++++++++------------ common/env_nowhere.c | 20 +++++++-- common/env_nvram.c | 27 ++++++++---- common/env_onenand.c | 28 +++++++++---- common/env_sf.c | 21 ++++++--- cpu/arm_cortexa8/omap3/mem.c | 71 ++++++++++++++++++++------------ drivers/mtd/nand/nand.c | 10 ++++ drivers/mtd/onenand/onenand_uboot.c | 9 ++++ include/asm-arm/arch-omap3/sys_proto.h | 2 +- include/configs/omap3_evm.h | 4 ++ include/environment.h | 43 +++++++++++++++++++ include/nand.h | 1 + include/onenand_uboot.h | 1 + 22 files changed, 397 insertions(+), 146 deletions(-)

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[U-Boot] Auto-booting problem
by paras 26 May '09

26 May '09

Hi all, I am working on MPC8313erdb board. I configure U-Boot 1.3.0 for my board, But the problem is on auto-boot. When I start the board it stop on command prompt of u-boot. Please help me to solve this problem. The list of environment variables are given below. ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ U-Boot 1.3.0 (May 15 2009 - 11:35:09) MPC83XX Reset Status: Software Hard, External/Internal Soft, External/Internal Hard CPU: e300c3, MPC8313E, Rev: 10 at 333.333 MHz, CSB: 166 MHz Board: Freescale MPC8313ERDB I2C: ready DRAM: 128 MB FLASH: 8 MB NAND: 32 MiB In: serial Out: serial Err: serial Net: TSEC0, TSEC1 [PRIME] => printenv ramboot=setenv rootdev /dev/ram;run setbootargs;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr nfsboot=setenv rootdev /dev/nfs;run setbootargs;run setipargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr baudrate=115200 loads_echo=1 ethaddr=00:E0:0C:00:95:01 eth1addr=00:E0:0C:00:95:02 rootpath=/nfs/root/path hostname=mpc8313erdb bootfile=uImage loadaddr=200000 netdev=eth1 ethprime=TSEC1 uboot=u-boot.bin tftpflash=tftpboot $loadaddr $uboot; protect off 0xFE000000 +$filesize; erase 0xFE000000 +$filesize; cp.b $loadaddr 0xFE000000 $filesize; protect on 0xFE000000 +$filesize; cmp.b $e fdtaddr=400000 fdtfile=mpc8313erdb.dtb console=ttyS0 setbootargs=setenv bootargs root=$rootdev rw console=$console,$baudrate $othbootargs setipargs=setenv bootargs nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off root=$rootdev rw console=$console,$baudrate $othbootargs filesize=490000 fileaddr=100000 gatewayip=10.0.0.1 netmask=255.0.0.0 bootargs=root=/dev/mtdblock6 rootfstype=jffs2 rw console=ttyS0,115200 bootcmd=cp.b fe710000 40000 11000; go 40004; bootm fe100000 - fe700000 stdin=serial stdout=serial stderr=serial ethact=TSEC1 Environment size: 1334/8188 bytes => ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Thank in advance.

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[U-Boot] [PATCH] avr32: unified u-boot.lds
by Jean-Christophe PLAGNIOL-VILLARD 26 May '09

26 May '09

all avr32 boards use the same cpu lds so move it to cpu/$(CPU) that could be overwrite in following order SOC BOARD via the corresponding config.mk Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> Cc: Haavard Skinnemoen <haavard.skinnemoen(a)atmel.com> --- board/atmel/atngw100/u-boot.lds | 72 ---------------------- board/earthlcd/favr-32-ezkit/u-boot.lds | 70 --------------------- board/mimc/mimc200/u-boot.lds | 72 ---------------------- board/miromico/hammerhead/u-boot.lds | 72 ---------------------- cpu/at32ap/config.mk | 2 + {board/atmel/atstk1000 => cpu/at32ap}/u-boot.lds | 3 +- 6 files changed, 4 insertions(+), 287 deletions(-) delete mode 100644 board/atmel/atngw100/u-boot.lds delete mode 100644 board/earthlcd/favr-32-ezkit/u-boot.lds delete mode 100644 board/mimc/mimc200/u-boot.lds delete mode 100644 board/miromico/hammerhead/u-boot.lds rename {board/atmel/atstk1000 => cpu/at32ap}/u-boot.lds (96%) diff --git a/board/atmel/atngw100/u-boot.lds b/board/atmel/atngw100/u-boot.lds deleted file mode 100644 index a7243f2..0000000 --- a/board/atmel/atngw100/u-boot.lds +++ /dev/null @@ -1,72 +0,0 @@ -/* -*- Fundamental -*- - * - * Copyright (C) 2005-2006 Atmel Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") -OUTPUT_ARCH(avr32) -ENTRY(_start) - -SECTIONS -{ - . = 0; - _text = .; - .text : { - *(.exception.text) - *(.text) - *(.text.*) - } - _etext = .; - - .rodata : { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - . = ALIGN(8); - _data = .; - .data : { - *(.data) - *(.data.*) - } - - . = ALIGN(4); - __u_boot_cmd_start = .; - .u_boot_cmd : { - KEEP(*(.u_boot_cmd)) - } - __u_boot_cmd_end = .; - - . = ALIGN(4); - _got = .; - .got : { - *(.got) - } - _egot = .; - - . = ALIGN(8); - _edata = .; - - .bss : { - *(.bss) - *(.bss.*) - } - . = ALIGN(8); - _end = .; -} diff --git a/board/earthlcd/favr-32-ezkit/u-boot.lds b/board/earthlcd/favr-32-ezkit/u-boot.lds deleted file mode 100644 index 0d413a0..0000000 --- a/board/earthlcd/favr-32-ezkit/u-boot.lds +++ /dev/null @@ -1,70 +0,0 @@ -/* -*- Fundamental -*- - * - * Copyright (C) 2008 Atmel Corporation - * - * See file CREDITS for list of people who contributed to this project. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple - * Place, Suite 330, Boston, MA 02111-1307 USA - */ -OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") -OUTPUT_ARCH(avr32) -ENTRY(_start) - -SECTIONS -{ - . = 0; - _text = .; - .text : { - *(.exception.text) - *(.text) - *(.text.*) - } - _etext = .; - - .rodata : { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - . = ALIGN(8); - _data = .; - .data : { - *(.data) - *(.data.*) - } - - . = ALIGN(4); - __u_boot_cmd_start = .; - .u_boot_cmd : { - KEEP(*(.u_boot_cmd)) - } - __u_boot_cmd_end = .; - - . = ALIGN(4); - _got = .; - .got : { - *(.got) - } - _egot = .; - - . = ALIGN(8); - _edata = .; - - .bss (NOLOAD) : { - *(.bss) - *(.bss.*) - } - . = ALIGN(8); - _end = .; -} diff --git a/board/mimc/mimc200/u-boot.lds b/board/mimc/mimc200/u-boot.lds deleted file mode 100644 index a7243f2..0000000 --- a/board/mimc/mimc200/u-boot.lds +++ /dev/null @@ -1,72 +0,0 @@ -/* -*- Fundamental -*- - * - * Copyright (C) 2005-2006 Atmel Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") -OUTPUT_ARCH(avr32) -ENTRY(_start) - -SECTIONS -{ - . = 0; - _text = .; - .text : { - *(.exception.text) - *(.text) - *(.text.*) - } - _etext = .; - - .rodata : { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - . = ALIGN(8); - _data = .; - .data : { - *(.data) - *(.data.*) - } - - . = ALIGN(4); - __u_boot_cmd_start = .; - .u_boot_cmd : { - KEEP(*(.u_boot_cmd)) - } - __u_boot_cmd_end = .; - - . = ALIGN(4); - _got = .; - .got : { - *(.got) - } - _egot = .; - - . = ALIGN(8); - _edata = .; - - .bss : { - *(.bss) - *(.bss.*) - } - . = ALIGN(8); - _end = .; -} diff --git a/board/miromico/hammerhead/u-boot.lds b/board/miromico/hammerhead/u-boot.lds deleted file mode 100644 index a7243f2..0000000 --- a/board/miromico/hammerhead/u-boot.lds +++ /dev/null @@ -1,72 +0,0 @@ -/* -*- Fundamental -*- - * - * Copyright (C) 2005-2006 Atmel Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") -OUTPUT_ARCH(avr32) -ENTRY(_start) - -SECTIONS -{ - . = 0; - _text = .; - .text : { - *(.exception.text) - *(.text) - *(.text.*) - } - _etext = .; - - .rodata : { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - . = ALIGN(8); - _data = .; - .data : { - *(.data) - *(.data.*) - } - - . = ALIGN(4); - __u_boot_cmd_start = .; - .u_boot_cmd : { - KEEP(*(.u_boot_cmd)) - } - __u_boot_cmd_end = .; - - . = ALIGN(4); - _got = .; - .got : { - *(.got) - } - _egot = .; - - . = ALIGN(8); - _edata = .; - - .bss : { - *(.bss) - *(.bss.*) - } - . = ALIGN(8); - _end = .; -} diff --git a/cpu/at32ap/config.mk b/cpu/at32ap/config.mk index 1c12169..7e131fe 100644 --- a/cpu/at32ap/config.mk +++ b/cpu/at32ap/config.mk @@ -20,3 +20,5 @@ # MA 02111-1307 USA # PLATFORM_RELFLAGS += -mcpu=ap7000 + +LDSCRIPT := $(SRCTREE)/cpu/$(CPU)/u-boot.lds diff --git a/board/atmel/atstk1000/u-boot.lds b/cpu/at32ap/u-boot.lds similarity index 96% rename from board/atmel/atstk1000/u-boot.lds rename to cpu/at32ap/u-boot.lds index 86ef939..c9ced5d 100644 --- a/board/atmel/atstk1000/u-boot.lds +++ b/cpu/at32ap/u-boot.lds @@ -1,6 +1,6 @@ /* -*- Fundamental -*- * - * Copyright (C) 2005-2006 Atmel Corporation + * Copyright (C) 2005-2008 Atmel Corporation * * See file CREDITS for list of people who contributed to this * project. @@ -20,6 +20,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ + OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") OUTPUT_ARCH(avr32) ENTRY(_start) -- 1.6.3.1

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[U-Boot] [PATCH v2 0/3][Net][ARM] Davinci Ethernet driver cleanup
by Ben Warren 26 May '09

26 May '09

Hello, The second spin of this patchset is identical to the first but has been re-based against u-boot/next. Since there were no technical objections with the first spin, I've applied this to the net/next branch. Please let me know if there are any problems. regards, Ben

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[U-Boot] Please help for Data TLB Error in MPC8544
by duckycool 26 May '09

26 May '09

Hi all, My board can't boot normally, and I found it just hang in data tlb error through the system.map. Could any one help for this? Some regisers are as below: ============================================ DEAR: 0xf400fff0 (L1 init ram base address is 0xf4010000) IVPR : 0xfff80000 , IVPR3: 0x000004000 EELADR: 0xf4010000 , CSn_BNDS: all 0x00000000 (I think SPD of DDR is not found yet) L2MMU_TLB0 : 84000000 51000000 ff7000000 ff7000000 (CCSR is not relocated to 0xe0000000 yet) ============================================ The TLB1 registers from CodeWarrior is as below: ================================================= L2MMU_CAM0 600007CA 1C080000 FFC00000 FFC000001 (boot flash, 4M) L2MMU_CAM1 A0007FCA 1C080000 80000000 800000001 (PCIE, 1G) L2MMU_CAM2 90003FCA 1C080000 C0000000 C00000001 (PCI, 256M) L2MMU_CAM3 90003FCA 1C080000 D0000000 D00000001 (PCI, 256M) L2MMU_CAM4 80001FCA 1C080000 E0000000 E00000001 (CCSR, 64M) L2MMU_CAM5 80001FCA 1C080000 F0000000 F00000001 (?? , 64M) L2MMU_CAM6 300000CA 18080000 FF040000 FF0400001 (NAND, 64K) L2MMU_CAM7 20000042 18080000 FF010000 FF0100001 (NAND, 16K) L2MMU_CAM8 20000042 18080000 FF050000 FF0500001 (NAND, 16K) L2MMU_CAM9 C87FD651 EB40000D 27DE6000 2397E000 L2MMU_CAM10 D0E2E2DF EB680009 B494F000 8F634000 L2MMU_CAM11 00FC8DCA 5A11000D BCB9B000 77EF6000 L2MMU_CAM12 300000CA 18080000 FF000000 FF000001 (NAND, 64K) L2MMU_CAM13 D891AFD8 18180002 50A70000 F7AB6000 L2MMU_CAM14 E0F6AE97 DA390009 F5DF6000 4F425000 L2MMU_CAM15 D8EFEF88 C750000F AEBA7000 3229F000 =================================================== And this is my init.s below: ================================================================== #include <ppc_asm.tmpl> #include <ppc_defs.h> #include <asm/cache.h> #include <asm/mmu.h> #include <config.h> #include <mpc85xx.h> #define LAWAR_TRGT_PCI1 0x00000000 #define LAWAR_TRGT_PCIE1 0x00200000 #define LAWAR_TRGT_PCIE2 0x00100000 #define LAWAR_TRGT_PCIE3 0x00300000 #define LAWAR_TRGT_LBC 0x00400000 #define LAWAR_TRGT_DDR 0x00f00000 #define entry_start \ mflr r1 ; \ bl 0f ; #define entry_end \ 0: mflr r0 ; \ mtlr r1 ; \ blr ; .section .bootpg, "ax" .globl tlb1_entry tlb1_entry: entry_start /* * Number of TLB0 and TLB1 entries in the following table */ .long (2f-1f)/16 1: /* * TLB0 4K Non-cacheable, guarded * 0xff700000 4K Initial CCSRBAR mapping * * This ends up at a TLB0 Index==0 entry, and must not collide * with other TLB0 Entries. */ .long TLB1_MAS0(0, 0, 0) .long TLB1_MAS1(1, 0, 0, 0, 0) .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,1,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,0,1,0,1,0,1) /* * TLB0 16K Cacheable, guarded * Temporary Global data for initialization * * Use four 4K TLB0 entries. These entries must be cacheable * as they provide the bootstrap memory before the memory * controler and real memory have been configured. * * These entries end up at TLB0 Indicies 0x10, 0x14, 0x18 and 0x1c, * and must not collide with other TLB0 entries. */ .long TLB1_MAS0(0, 0, 0) .long TLB1_MAS1(1, 0, 0, 0, 0) .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR),0,0,0,0,0,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR),0,0,0,0,0,1,0,1,0,1) .long TLB1_MAS0(0, 0, 0) .long TLB1_MAS1(1, 0, 0, 0, 0) .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 4 * 1024),0,0,0,0,0,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 4 * 1024),0,0,0,0,0,1,0,1,0,1) .long TLB1_MAS0(0, 0, 0) .long TLB1_MAS1(1, 0, 0, 0, 0) .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 8 * 1024),0,0,0,0,0,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 8 * 1024),0,0,0,0,0,1,0,1,0,1) .long TLB1_MAS0(0, 0, 0) .long TLB1_MAS1(1, 0, 0, 0, 0) .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 12 * 1024),0,0,0,0,0,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 12 * 1024),0,0,0,0,0,1,0,1,0,1) /* * TLB 0: 4M Non-cacheable, guarded * 0xffc00000 4M Covers FLASH at 0xFFC00000 * Out of reset this entry is only 4K. */ .long TLB1_MAS0(1, 0, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_4M) .long TLB1_MAS2(E500_TLB_EPN(CFG_BOOT_BLOCK), 0,0,0,0,1,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_BOOT_BLOCK), 0,0,0,0,0,1,0,1,0,1) /* * TLB 1: 1G Non-cacheable, guarded * 0x80000000 1G PCIE 8,9,a,b */ .long TLB1_MAS0(1, 1, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1G) .long TLB1_MAS2(E500_TLB_EPN(CFG_PCIE_PHYS),0,0,0,0,1,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_PCIE_PHYS),0,0,0,0,0,1,0,1,0,1) /* * TLB 2: 256M Non-cacheable, guarded */ .long TLB1_MAS0(1, 2, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI_PHYS),0,0,0,0,1,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI_PHYS),0,0,0,0,0,1,0,1,0,1) /* * TLB 3: 256M Non-cacheable, guarded */ .long TLB1_MAS0(1, 3, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI_PHYS + 0x10000000),0,0,0,0,1,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI_PHYS + 0x10000000),0,0,0,0,0,1,0,1,0,1) /* * TLB 4: 64M Non-cacheable, guarded * 0xe000_0000 1M CCSRBAR * 0xe100_0000 255M PCI IO range */ .long TLB1_MAS0(1, 4, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M) .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR), 0,0,0,0,1,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR), 0,0,0,0,0,1,0,1,0,1) /* * TLB 5: 64M Non-cacheable, non-guarded , reserve from MPC8544DS (don't know what is it for) */ .long TLB1_MAS0(1, 5, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M) .long TLB1_MAS2(E500_TLB_EPN(0xf0000000), 0,0,0,0,0,0,0,0) .long TLB1_MAS3(E500_TLB_RPN(0xf0000000), 0,0,0,0,0,1,0,1,0,1) /* * TLB 6: 64K Non-cacheable, guarded * 0xff040000 64K 1G NAND flash 2 area 1 0xff040000 */ .long TLB1_MAS0(1, 6, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64K) .long TLB1_MAS2(E500_TLB_EPN(0xff040000), 0,0,0,0,1,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(0xff040000), 0,0,0,0,0,0,0,1,0,1) /* * TLB 7: 16K Non-cacheable, guarded * 0xff010000 16K 1G NAND flash 1 area 2 0xff010000 */ .long TLB1_MAS0(1, 7, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16K) .long TLB1_MAS2(E500_TLB_EPN(0xff010000), 0,0,0,0,0,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(0xff010000), 0,0,0,0,0,0,0,1,0,1) /* * TLB 8: 16K Non-cacheable, guarded * 0xff050000 16K 1G NAND flash 2 area 2 0xff050000 */ .long TLB1_MAS0(1, 8, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16K) .long TLB1_MAS2(E500_TLB_EPN(0xff050000), 0,0,0,0,0,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(0xff050000), 0,0,0,0,0,0,0,1,0,1) /* * TLB 12: 64K Non-cacheable, guarded * 0xff000000 64K 1G NAND flash 1 area 1 0xff000000 */ .long TLB1_MAS0(1, 12, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64K) .long TLB1_MAS2(E500_TLB_EPN(0xff000000), 0,0,0,0,1,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(0xff000000), 0,0,0,0,0,0,0,1,0,1) 2: entry_end /* * LAW(Local Access Window) configuration: */ .section .bootpg, "ax" .globl law_entry law_entry: entry_start .long (4f-3f)/8 3: .long 0 .long LAWAR_EN | LAWAR_TRGT_DDR | (LAWAR_SIZE & LAWAR_SIZE_1G) .long (CFG_PCI1_MEM_PHYS>>12) & 0xfffff .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M) .long (CFG_PCI1_IO_PHYS>>12) & 0xfffff .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_64K) .long (0xf0000000>>12) & 0xfffff .long LAWAR_EN | LAWAR_TRGT_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M) .long 0 .long 0 .long (CFG_PCIE1_IO_PHYS>>12) & 0xfffff .long LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_32G) 4: entry_end ============================================================================== What I think the problem might be 1. I didn't access the SPD to initial DDR , so failed ? 2. The TLB1_5 should take away ? 3. I shall add one more TLB for DDR ? 4. The real problem is not related with any above, and I shall post the other regisers for check ?? Thanks. -- View this message in context: http://www.nabble.com/Please-help-for-Data-TLB-Error-in-MPC8544-tp23653353p… Sent from the Uboot - Users mailing list archive at Nabble.com.

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