April 2009 - U-Boot

[U-Boot] [PATCHv4 1/3] OMAP3: Use functions print_cpuinfo() and checkboard()
by Sanjeev Premi 27 Apr '09

27 Apr '09

Use the functions print_cpuinfo() and checkboard() to display the cpu and board specific information. These functions reuse content from the existing function display_board_info() - which has been removed. Also, updated the existig OMAP3 configurations to define: - CONFIG_DISPLAY_CPUINFO - CONFIG_DISPLAY_BOARDINFO Signed-off-by: Sanjeev Premi <premi(a)ti.com> --- cpu/arm_cortexa8/omap3/board.c | 27 +++++++-- cpu/arm_cortexa8/omap3/sys_info.c | 105 +++++++++++++++----------------- include/asm-arm/arch-omap3/sys_proto.h | 1 - include/configs/omap3_beagle.h | 6 ++ include/configs/omap3_evm.h | 7 ++- include/configs/omap3_overo.h | 6 ++ include/configs/omap3_pandora.h | 6 ++ include/configs/omap3_zoom1.h | 6 ++ 8 files changed, 102 insertions(+), 62 deletions(-) diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c index 15ea936..51d5cf6 100644 --- a/cpu/arm_cortexa8/omap3/board.c +++ b/cpu/arm_cortexa8/omap3/board.c @@ -39,6 +39,8 @@ extern omap3_sysinfo sysinfo; +extern u32 is_mem_sdr(void); + /****************************************************************************** * Routine: delay * Description: spinning delay to use before udelay works @@ -272,11 +274,6 @@ int dram_init(void) { DECLARE_GLOBAL_DATA_PTR; unsigned int size0 = 0, size1 = 0; - u32 btype; - - btype = get_board_type(); - - display_board_info(btype); /* * If a second bank of DDR is attached to CS1 this is @@ -342,3 +339,23 @@ U_BOOT_CMD( ); #endif /* CONFIG_NAND_OMAP_GPMC */ + +#ifdef CONFIG_DISPLAY_BOARDINFO +/** + * Print board information + */ +int checkboard (void) +{ + char *mem_s ; + + if (is_mem_sdr()) + mem_s = "mSDR"; + else + mem_s = "LPDDR"; + + printf("%s + %s/%s\n", sysinfo.board_string, mem_s, + sysinfo.nand_string); + + return 0; +} +#endif /* CONFIG_DISPLAY_BOARDINFO */ diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c index b385b91..d605d7c 100644 --- a/cpu/arm_cortexa8/omap3/sys_info.c +++ b/cpu/arm_cortexa8/omap3/sys_info.c @@ -185,61 +185,6 @@ u32 get_board_rev(void) return 0x20; } -/********************************************************************* - * display_board_info() - print banner with board info. - *********************************************************************/ -void display_board_info(u32 btype) -{ - char *cpu_s, *mem_s, *sec_s; - - switch (get_cpu_type()) { - case OMAP3503: - cpu_s = "3503"; - break; - case OMAP3515: - cpu_s = "3515"; - break; - case OMAP3525: - cpu_s = "3525"; - break; - case OMAP3530: - cpu_s = "3530"; - break; - default: - cpu_s = "35XX"; - break; - } - - if (is_mem_sdr()) - mem_s = "mSDR"; - else - mem_s = "LPDDR"; - - switch (get_device_type()) { - case TST_DEVICE: - sec_s = "TST"; - break; - case EMU_DEVICE: - sec_s = "EMU"; - break; - case HS_DEVICE: - sec_s = "HS"; - break; - case GP_DEVICE: - sec_s = "GP"; - break; - default: - sec_s = "?"; - } - - - printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", cpu_s, - sec_s, get_cpu_rev()); - printf("%s + %s/%s\n", sysinfo.board_string, - mem_s, sysinfo.nand_string); - -} - /******************************************************** * get_base(); get upper addr of current execution *******************************************************/ @@ -305,3 +250,53 @@ u32 get_device_type(void) { return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8); } + +#ifdef CONFIG_DISPLAY_CPUINFO +/** + * Print CPU information + */ +int print_cpuinfo (void) +{ + char *cpu_s, *sec_s; + + switch (get_cpu_type()) { + case OMAP3503: + cpu_s = "3503"; + break; + case OMAP3515: + cpu_s = "3515"; + break; + case OMAP3525: + cpu_s = "3525"; + break; + case OMAP3530: + cpu_s = "3530"; + break; + default: + cpu_s = "35XX"; + break; + } + + switch (get_device_type()) { + case TST_DEVICE: + sec_s = "TST"; + break; + case EMU_DEVICE: + sec_s = "EMU"; + break; + case HS_DEVICE: + sec_s = "HS"; + break; + case GP_DEVICE: + sec_s = "GP"; + break; + default: + sec_s = "?"; + } + + printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", cpu_s, + sec_s, get_cpu_rev()); + + return 0; +} +#endif /* CONFIG_DISPLAY_CPUINFO */ diff --git a/include/asm-arm/arch-omap3/sys_proto.h b/include/asm-arm/arch-omap3/sys_proto.h index 8b554bb..830447b 100644 --- a/include/asm-arm/arch-omap3/sys_proto.h +++ b/include/asm-arm/arch-omap3/sys_proto.h @@ -47,7 +47,6 @@ u32 is_gpmc_muxed(void); u32 get_gpmc0_type(void); u32 get_gpmc0_width(void); u32 get_board_type(void); -void display_board_info(u32); u32 get_sdr_cs_size(u32); u32 get_sdr_cs_offset(u32); u32 is_running_in_sdram(void); diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 5a948e4..b844d52 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -41,6 +41,12 @@ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 8cd8a1b..ab49fa2 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -46,6 +46,12 @@ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) @@ -66,7 +72,6 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ /* initial data */ - /* * Hardware drivers */ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 51b04b6..b826cb6 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -33,6 +33,12 @@ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 40107a6..1f57f40 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -36,6 +36,12 @@ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 8e984b4..8c9bd1e 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -42,6 +42,12 @@ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -- 1.6.2.1

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[U-Boot] Uboot mtest hang on mx31
by alfred steele 27 Apr '09

27 Apr '09

Hi All. When i do a memtest without any args, it crashes after printing the first line. I know the output may vary depending on the processor and the memmap. I just wanted to knoe is this tha appropiate behaviour for mtest. CPU: Freescale i.MX31 at 531 MHz Board: MX31 3Stack DRAM: 128 MB NAND: Bad block table found at page 65472, version 0x01 Bad block table found at page 65408, version 0x01 nand_read_bbt: Bad block at 0x01b00000 nand_read_bbt: Bad block at 0x02ae0000 nand_read_bbt: Bad block at 0x02c60000 nand_read_bbt: Bad block at 0x052a0000 nand_read_bbt: Bad block at 0x052c0000 128 MiB In: serial Out: serial Err: serial Hit any key to stop autoboot: 0 => => mtest Pattern 00000000 Writing... <The serial console just freezes here, meaning an evident crash> After reboot, when i do and md for the base address 0x0, i get the following, which proabbly is the uboot image itself in RAM. So i am guessing, the memtest tries modifying the U-boot in memory and hence the crash. i am not sure though Please correct me if i am wrong. Here's the message log. CPU: Freescale i.MX31 at 531 MHz Board: MX31 3Stack DRAM: 128 MB NAND: Bad block table found at page 65472, version 0x01 Bad block table found at page 65408, version 0x01 nand_read_bbt: Bad block at 0x01b00000 nand_read_bbt: Bad block at 0x02ae0000 nand_read_bbt: Bad block at 0x02c60000 nand_read_bbt: Bad block at 0x052a0000 nand_read_bbt: Bad block at 0x052c0000 128 MiB In: serial Out: serial Err: serial Hit any key to stop autoboot: 0 =>md 0 00000000: e59ff00c e59ff018 e59ff018 e59ff018 ................ 00000010: e59ff018 b8000000 e59ff014 e59ff014 ................ 00000020: 00000090 1fffffd0 1fffffd4 1fffffd8 ................ 00000030: 1fffffdc 1fffffe0 1fffffe4 ffffffff ................ 00000040: 79706f43 68676972 63282074 30322029 Copyright (c) 20 00000050: 4d203430 726f746f 20616c6f 2e636e49 04 Motorola Inc. 00000060: 6c6c4120 67697220 20737468 65736572 All rights rese 00000070: 64657672 0000002e ffffffff ffffffff rved............ 00000080: 000002b4 000004e0 00000524 ffffffff ........$....... 00000090: e321f0d3 e59fd008 e59f0008 e12fff10 ..!.........../. 000000a0: ea000001 1fffffd0 000000e0 e321f0d3 ..............!. 000000b0: e59fd014 e59f0014 e3a0106c e5c01000 ........l....... 000000c0: e59f000c e12fff10 eafffff7 1fffffd0 ....../......... 000000d0: 1fffc800 000002b4 ffffffff ffffffff ................ 000000e0: e59f2064 e59f005c e59f1054 e3c22003 d ..\...T.... .. 000000f0: e0823000 e1500003 34912004 34802004 .0....P.. .4. .4 Thanks, Alfred.

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[U-Boot] reg. Ethernet operation
by Muralitharan Perumal 27 Apr '09

27 Apr '09

Hi experts, I just wanted to do some testing on ethernet driver in Uboot. I have a small program that will send a binary file through ethernet. But I don't have any clue on how to receive those packets in U-boot. I mean what are the API's to be used. It will be helpful if you could tell me how to do that in U-boot. Another thing is My target board is connected to eth1 of my host and i am able to ping the host from target saying it's alive. But i am not able to ping the target from the host. Does it mean, the target is restricted to send icmp responses back to host? Best Regards, Murali This E-mail and any attachments hereto are strictly confidential and intended solely for the addressee. If you are not the intended addressee please notify the sender by return and delete the message. You must not disclose, forward or copy this E-mail or attachments to any third party without the prior consent of the sender. Pace plc is registered in England and Wales (Company no. 1672847) and our Registered Office is at Victoria Road, Saltaire, West Yorkshire, BD18 3LF, UK. Tel +44 (0) 1274 532000 Fax +44 (0) 1274 532010. <http://www.pace.com> Save where otherwise agreed in writing between you and Pace (i) all orders for goods and/or services placed by you are made pursuant to Pace's standard terms and conditions of sale which may have been provided to you, or in any event are available at http://www.pace.com/uktcsale.pdf (ii) all orders for goods and/or services placed by Pace are subject to Pace's standard terms and conditions of purchase which may have been provided to you, or in any event are available at http://www.pace.com/uktcpurch.pdf. All other inconsistent terms in any other documentation including without limitation any purchase order, reschedule instruction, order acknowledgement, delivery note or invoice are hereby excluded. This message has been scanned for viruses by BlackSpider MailControl - www.blackspider.com

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[U-Boot] [PATCHv3 3/3] OMAP3: Print correct silicon revision
by Sanjeev Premi 27 Apr '09

27 Apr '09

The function display_board_info() displays incorrect silicon revision - based on the return value from function get_cpu_rev(). This patch fixes the problem. Signed-off-by: Sanjeev Premi <premi(a)ti.com> --- cpu/arm_cortexa8/cpu.c | 4 ++-- cpu/arm_cortexa8/omap3/clock.c | 5 +++-- cpu/arm_cortexa8/omap3/sys_info.c | 29 ++++++++++++++++++++++------- include/asm-arm/arch-omap3/omap3.h | 14 +++++++++----- 4 files changed, 36 insertions(+), 16 deletions(-) diff --git a/cpu/arm_cortexa8/cpu.c b/cpu/arm_cortexa8/cpu.c index 5e7b935..3e1780b 100644 --- a/cpu/arm_cortexa8/cpu.c +++ b/cpu/arm_cortexa8/cpu.c @@ -101,7 +101,7 @@ void l2cache_enable() volatile unsigned int j; /* ES2 onwards we can disable/enable L2 ourselves */ - if (get_cpu_rev() == CPU_3430_ES2) { + if (get_cpu_rev() >= CPU_3XX_ES20) { __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(i)); __asm__ __volatile__("orr %0, %0, #0x2":"=r"(i)); __asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r"(i)); @@ -131,7 +131,7 @@ void l2cache_disable() volatile unsigned int j; /* ES2 onwards we can disable/enable L2 ourselves */ - if (get_cpu_rev() == CPU_3430_ES2) { + if (get_cpu_rev() >= CPU_3XX_ES20) { __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(i)); __asm__ __volatile__("bic %0, %0, #0x2":"=r"(i)); __asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r"(i)); diff --git a/cpu/arm_cortexa8/omap3/clock.c b/cpu/arm_cortexa8/omap3/clock.c index 8ac31be..d035677 100644 --- a/cpu/arm_cortexa8/omap3/clock.c +++ b/cpu/arm_cortexa8/omap3/clock.c @@ -132,7 +132,7 @@ void prcm_init(void) void (*f_lock_pll) (u32, u32, u32, u32); int xip_safe, p0, p1, p2, p3; u32 osc_clk = 0, sys_clkin_sel; - u32 clk_index, sil_index; + u32 clk_index, sil_index = 0; prm_t *prm_base = (prm_t *)PRM_BASE; prcm_t *prcm_base = (prcm_t *)PRCM_BASE; dpll_param *dpll_param_p; @@ -170,7 +170,8 @@ void prcm_init(void) * and sil_index will get the values for that SysClk for the * appropriate silicon rev. */ - sil_index = get_cpu_rev() - 1; + if (get_cpu_rev()) + sil_index = 1; /* Unlock MPU DPLL (slows things down, and needed later) */ sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOW_POWER_BYPASS); diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c index 3f7b5e4..39a48a1 100644 --- a/cpu/arm_cortexa8/omap3/sys_info.c +++ b/cpu/arm_cortexa8/omap3/sys_info.c @@ -35,6 +35,12 @@ extern omap3_sysinfo sysinfo; static gpmc_csx_t *gpmc_cs_base = (gpmc_csx_t *)GPMC_CONFIG_CS0_BASE; static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE; static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE; +static char *rev_s[CPU_3XX_MAX_REV] = { + "1.0", + "2.0", + "2.1", + "3.0", + "3.1"}; /***************************************************************** * dieid_num_r(void) - read and set die ID @@ -76,18 +82,27 @@ u32 get_cpu_type(void) u32 get_cpu_rev(void) { u32 cpuid = 0; + ctrl_id_t *id_base; /* * On ES1.0 the IDCODE register is not exposed on L4 - * so using CPU ID to differentiate - * between ES2.0 and ES1.0. + * so using CPU ID to differentiate between ES1.0 and > ES1.0. */ __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid)); if ((cpuid & 0xf) == 0x0) - return CPU_3430_ES1; - else - return CPU_3430_ES2; + return CPU_3XX_ES10; + else { + /* Decode the IDs on > ES1.0 */ + id_base = (ctrl_id_t *) OMAP34XX_ID_L4_IO_BASE; + cpuid = (readl(&id_base->idcode) >> CPU_3XX_ID_SHIFT) & 0xf; + + /* Some early ES2.0 seem to report ID 0, fix this */ + if(cpuid == 0) + cpuid = CPU_3XX_ES20; + + return cpuid; + } } /**************************************************** @@ -277,7 +292,7 @@ int print_cpuinfo (void) sec_s = "?"; } - printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", cpu_s, - sec_s, get_cpu_rev()); + printf("OMAP%s-%s ES%s, CPU-OPP2 L3-165MHz\n", + cpu_s, sec_s, rev_s[get_cpu_rev()]); } #endif /* CONFIG_DISPLAY_CPUINFO */ diff --git a/include/asm-arm/arch-omap3/omap3.h b/include/asm-arm/arch-omap3/omap3.h index d0d2737..7c11019 100644 --- a/include/asm-arm/arch-omap3/omap3.h +++ b/include/asm-arm/arch-omap3/omap3.h @@ -167,12 +167,16 @@ typedef struct gpio { * 343x real hardware: * ES1 = rev 0 * - * 343x code defines: - * ES1 = 0+1 = 1 - * ES1 = 1+1 = 1 + * ES2 onwards, the value maps to contents of IDCODE register [31:28]. */ -#define CPU_3430_ES1 1 -#define CPU_3430_ES2 2 +#define CPU_3XX_ES10 0 +#define CPU_3XX_ES20 1 +#define CPU_3XX_ES21 2 +#define CPU_3XX_ES30 3 +#define CPU_3XX_ES31 4 +#define CPU_3XX_MAX_REV (CPU_3XX_ES31 + 1) + +#define CPU_3XX_ID_SHIFT 28 #define WIDTH_8BIT 0x0000 #define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */ -- 1.6.2.1

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[U-Boot] [PATCHv3 2/3] OMAP3: Remove unused board-types
by Sanjeev Premi 27 Apr '09

27 Apr '09

The board-types defined in struct omap3_sysinfo seem to be unused. The function display_board_info() is passed board type as an argument; which is ignored. This patch removes all uses of board-type, related definitions and functions. Signed-off-by: Sanjeev Premi <premi(a)ti.com> --- board/omap3/beagle/beagle.h | 2 -- board/omap3/evm/evm.h | 2 -- board/omap3/overo/overo.h | 2 -- board/omap3/pandora/pandora.h | 2 -- board/omap3/zoom1/zoom1.h | 2 -- cpu/arm_cortexa8/omap3/sys_info.c | 17 ----------------- include/asm-arm/arch-omap3/omap3.h | 8 -------- include/asm-arm/arch-omap3/sys_proto.h | 3 --- 8 files changed, 0 insertions(+), 38 deletions(-) diff --git a/board/omap3/beagle/beagle.h b/board/omap3/beagle/beagle.h index d66f159..5d45f01 100644 --- a/board/omap3/beagle/beagle.h +++ b/board/omap3/beagle/beagle.h @@ -24,8 +24,6 @@ #define _BEAGLE_H_ const omap3_sysinfo sysinfo = { - SDP_3430_V1, - SDP_3430_V2, DDR_STACKED, "OMAP3 Beagle board", #if defined(CONFIG_ENV_IS_IN_ONENAND) diff --git a/board/omap3/evm/evm.h b/board/omap3/evm/evm.h index 199824f..4a82a7f 100644 --- a/board/omap3/evm/evm.h +++ b/board/omap3/evm/evm.h @@ -24,8 +24,6 @@ #define _EVM_H_ const omap3_sysinfo sysinfo = { - OMAP3EVM_V1, - OMAP3EVM_V2, DDR_DISCRETE, "OMAP3 EVM board", #if defined(CONFIG_ENV_IS_IN_ONENAND) diff --git a/board/omap3/overo/overo.h b/board/omap3/overo/overo.h index e8ccc1d..b595f6a 100644 --- a/board/omap3/overo/overo.h +++ b/board/omap3/overo/overo.h @@ -24,8 +24,6 @@ #define _OVERO_H_ const omap3_sysinfo sysinfo = { - SDP_3430_V1, - SDP_3430_V2, DDR_STACKED, "Gumstix Overo board", #if defined(CONFIG_ENV_IS_IN_ONENAND) diff --git a/board/omap3/pandora/pandora.h b/board/omap3/pandora/pandora.h index dd09f12..8f0838c 100644 --- a/board/omap3/pandora/pandora.h +++ b/board/omap3/pandora/pandora.h @@ -24,8 +24,6 @@ #define _PANDORA_H_ const omap3_sysinfo sysinfo = { - SDP_3430_V1, - SDP_3430_V2, DDR_STACKED, "OMAP3 Pandora", "NAND", diff --git a/board/omap3/zoom1/zoom1.h b/board/omap3/zoom1/zoom1.h index bc8fba8..4f49a41 100644 --- a/board/omap3/zoom1/zoom1.h +++ b/board/omap3/zoom1/zoom1.h @@ -28,8 +28,6 @@ #define _BOARD_ZOOM1_H_ const omap3_sysinfo sysinfo = { - SDP_3430_V1, - SDP_3430_V2, DDR_STACKED, "OMAP3 Zoom MDK Rev 1", "NAND", diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c index f13f0be..3f7b5e4 100644 --- a/cpu/arm_cortexa8/omap3/sys_info.c +++ b/cpu/arm_cortexa8/omap3/sys_info.c @@ -130,23 +130,6 @@ u32 get_sdr_cs_offset(u32 cs) return offset; } -/*********************************************************************** - * get_board_type() - get board type based on current production stats. - * - NOTE-1-: 2 I2C EEPROMs will someday be populated with proper info. - * when they are available we can get info from there. This should - * be correct of all known boards up until today. - * - NOTE-2- EEPROMs are populated but they are updated very slowly. To - * avoid waiting on them we will use ES version of the chip to get info. - * A later version of the FPGA migth solve their speed issue. - ************************************************************************/ -u32 get_board_type(void) -{ - if (get_cpu_rev() == CPU_3430_ES2) - return sysinfo.board_type_v2; - else - return sysinfo.board_type_v1; -} - /*************************************************************************** * get_gpmc0_base() - Return current address hardware will be * fetching from. The below effectively gives what is correct, its a bit diff --git a/include/asm-arm/arch-omap3/omap3.h b/include/asm-arm/arch-omap3/omap3.h index 8c9656f..d0d2737 100644 --- a/include/asm-arm/arch-omap3/omap3.h +++ b/include/asm-arm/arch-omap3/omap3.h @@ -177,14 +177,6 @@ typedef struct gpio { #define WIDTH_8BIT 0x0000 #define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */ -/* SDP definitions according to FPGA Rev. Is this OK?? */ -#define SDP_3430_V1 0x1 -#define SDP_3430_V2 0x2 - -/* EVM definitions */ -#define OMAP3EVM_V1 0x1 -#define OMAP3EVM_V2 0x2 - /* I2C power management companion definitions */ #define PWRMGT_ADDR_ID1 0x48 #define PWRMGT_ADDR_ID2 0x49 diff --git a/include/asm-arm/arch-omap3/sys_proto.h b/include/asm-arm/arch-omap3/sys_proto.h index 830447b..7361d08 100644 --- a/include/asm-arm/arch-omap3/sys_proto.h +++ b/include/asm-arm/arch-omap3/sys_proto.h @@ -22,8 +22,6 @@ #define _SYS_PROTO_H_ typedef struct { - u32 board_type_v1; - u32 board_type_v2; u32 mtype; char *board_string; char *nand_string; @@ -46,7 +44,6 @@ u32 get_sysboot_value(void); u32 is_gpmc_muxed(void); u32 get_gpmc0_type(void); u32 get_gpmc0_width(void); -u32 get_board_type(void); u32 get_sdr_cs_size(u32); u32 get_sdr_cs_offset(u32); u32 is_running_in_sdram(void); -- 1.6.2.1

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[U-Boot] [PATCHv3 1/3] OMAP3: Use functions print_cpuinfo() and checkboard()
by Sanjeev Premi 27 Apr '09

27 Apr '09

Use the functions print_cpuinfo() and checkboard() to display the cpu and board specific information. These functions reuse content from the existing function display_board_info() - which has been removed. Also, updated the existig OMAP3 configurations to define: - CONFIG_DISPLAY_CPUINFO - CONFIG_DISPLAY_BOARDINFO Signed-off-by: Sanjeev Premi <premi(a)ti.com> --- cpu/arm_cortexa8/omap3/board.c | 24 ++++++-- cpu/arm_cortexa8/omap3/sys_info.c | 103 +++++++++++++++----------------- include/asm-arm/arch-omap3/sys_proto.h | 1 - include/configs/omap3_beagle.h | 6 ++ include/configs/omap3_evm.h | 7 ++- include/configs/omap3_overo.h | 6 ++ include/configs/omap3_pandora.h | 6 ++ include/configs/omap3_zoom1.h | 6 ++ 8 files changed, 97 insertions(+), 62 deletions(-) diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c index 15ea936..22dbe08 100644 --- a/cpu/arm_cortexa8/omap3/board.c +++ b/cpu/arm_cortexa8/omap3/board.c @@ -272,11 +272,6 @@ int dram_init(void) { DECLARE_GLOBAL_DATA_PTR; unsigned int size0 = 0, size1 = 0; - u32 btype; - - btype = get_board_type(); - - display_board_info(btype); /* * If a second bank of DDR is attached to CS1 this is @@ -342,3 +337,22 @@ U_BOOT_CMD( ); #endif /* CONFIG_NAND_OMAP_GPMC */ + +#ifdef CONFIG_DISPLAY_BOARDINFO +/** + * Print board information + */ +int checkboard (void) +{ + char *mem_s ; + + if (is_mem_sdr()) + mem_s = "mSDR"; + else + mem_s = "LPDDR"; + + printf("%s + %s/%s\n", sysinfo.board_string, mem_s, + sysinfo.nand_string); + +} +#endif /* CONFIG_DISPLAY_BOARDINFO */ diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c index b385b91..f13f0be 100644 --- a/cpu/arm_cortexa8/omap3/sys_info.c +++ b/cpu/arm_cortexa8/omap3/sys_info.c @@ -185,61 +185,6 @@ u32 get_board_rev(void) return 0x20; } -/********************************************************************* - * display_board_info() - print banner with board info. - *********************************************************************/ -void display_board_info(u32 btype) -{ - char *cpu_s, *mem_s, *sec_s; - - switch (get_cpu_type()) { - case OMAP3503: - cpu_s = "3503"; - break; - case OMAP3515: - cpu_s = "3515"; - break; - case OMAP3525: - cpu_s = "3525"; - break; - case OMAP3530: - cpu_s = "3530"; - break; - default: - cpu_s = "35XX"; - break; - } - - if (is_mem_sdr()) - mem_s = "mSDR"; - else - mem_s = "LPDDR"; - - switch (get_device_type()) { - case TST_DEVICE: - sec_s = "TST"; - break; - case EMU_DEVICE: - sec_s = "EMU"; - break; - case HS_DEVICE: - sec_s = "HS"; - break; - case GP_DEVICE: - sec_s = "GP"; - break; - default: - sec_s = "?"; - } - - - printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", cpu_s, - sec_s, get_cpu_rev()); - printf("%s + %s/%s\n", sysinfo.board_string, - mem_s, sysinfo.nand_string); - -} - /******************************************************** * get_base(); get upper addr of current execution *******************************************************/ @@ -305,3 +250,51 @@ u32 get_device_type(void) { return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8); } + +#ifdef CONFIG_DISPLAY_CPUINFO +/** + * Print CPU information + */ +int print_cpuinfo (void) +{ + char *cpu_s, *sec_s; + + switch (get_cpu_type()) { + case OMAP3503: + cpu_s = "3503"; + break; + case OMAP3515: + cpu_s = "3515"; + break; + case OMAP3525: + cpu_s = "3525"; + break; + case OMAP3530: + cpu_s = "3530"; + break; + default: + cpu_s = "35XX"; + break; + } + + switch (get_device_type()) { + case TST_DEVICE: + sec_s = "TST"; + break; + case EMU_DEVICE: + sec_s = "EMU"; + break; + case HS_DEVICE: + sec_s = "HS"; + break; + case GP_DEVICE: + sec_s = "GP"; + break; + default: + sec_s = "?"; + } + + printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", cpu_s, + sec_s, get_cpu_rev()); +} +#endif /* CONFIG_DISPLAY_CPUINFO */ diff --git a/include/asm-arm/arch-omap3/sys_proto.h b/include/asm-arm/arch-omap3/sys_proto.h index 8b554bb..830447b 100644 --- a/include/asm-arm/arch-omap3/sys_proto.h +++ b/include/asm-arm/arch-omap3/sys_proto.h @@ -47,7 +47,6 @@ u32 is_gpmc_muxed(void); u32 get_gpmc0_type(void); u32 get_gpmc0_width(void); u32 get_board_type(void); -void display_board_info(u32); u32 get_sdr_cs_size(u32); u32 get_sdr_cs_offset(u32); u32 is_running_in_sdram(void); diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 5a948e4..b844d52 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -41,6 +41,12 @@ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 8cd8a1b..ab49fa2 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -46,6 +46,12 @@ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) @@ -66,7 +72,6 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ /* initial data */ - /* * Hardware drivers */ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 51b04b6..b826cb6 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -33,6 +33,12 @@ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 40107a6..1f57f40 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -36,6 +36,12 @@ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 8e984b4..8c9bd1e 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -42,6 +42,12 @@ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -- 1.6.2.1

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[U-Boot] [PATCH 1/2] lib_generic: gunzip: New function zunzip
by Ricardo Ribalda Delgado 27 Apr '09

27 Apr '09

Separate gunzip in gunzip: Find the end of the header and call zunzip. zunzip: Inflate gunzip block without header. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)uam.es> --- lib_generic/gunzip.c | 27 ++++++++++++++++++++------- 1 files changed, 20 insertions(+), 7 deletions(-) diff --git a/lib_generic/gunzip.c b/lib_generic/gunzip.c index 01a4031..d59a448 100644 --- a/lib_generic/gunzip.c +++ b/lib_generic/gunzip.c @@ -39,6 +39,8 @@ int gunzip(void *, int, unsigned char *, unsigned long *); void *zalloc(void *, unsigned, unsigned); void zfree(void *, void *, unsigned); +int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp, + int stoponerr, int offset); void *zalloc(void *x, unsigned items, unsigned size) { @@ -59,8 +61,7 @@ void zfree(void *x, void *addr, unsigned nb) int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) { - z_stream s; - int r, i, flags; + int i, flags; /* skip header */ i = 10; @@ -84,6 +85,18 @@ int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) return (-1); } + return zunzip(dst, dstlen, src, lenp, 1, i); +} + +/* + * Uncompress blocks compressed with zlib without headers + */ +int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp, + int stoponerr, int offset) +{ + z_stream s; + int r; + s.zalloc = zalloc; s.zfree = zfree; #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) @@ -95,14 +108,14 @@ int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) r = inflateInit2(&s, -MAX_WBITS); if (r != Z_OK) { printf ("Error: inflateInit2() returned %d\n", r); - return (-1); + return -1; } - s.next_in = src + i; - s.avail_in = *lenp - i; + s.next_in = src + offset; + s.avail_in = *lenp - offset; s.next_out = dst; s.avail_out = dstlen; r = inflate(&s, Z_FINISH); - if (r != Z_STREAM_END) { + if ((r != Z_STREAM_END) && (stoponerr==1)) { printf ("Error: inflate() returned %d\n", r); inflateEnd(&s); return (-1); @@ -110,5 +123,5 @@ int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) *lenp = s.next_out - (unsigned char *) dst; inflateEnd(&s); - return (0); + return 0; } -- 1.6.2.4

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[U-Boot] [PATCH 1/2] ubifs: BUG realpath string must be ended with ZERO
by Ricardo Ribalda Delgado 27 Apr '09

27 Apr '09

If the memory used to copy the link_make is "dirty" the string wont be ended with Zero, throwing out multiple memory bugs. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)uam.es> --- v2: better doc and remove duplicated memcpy fs/ubifs/ubifs.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c index 32f9ff8..3c8b5da 100644 --- a/fs/ubifs/ubifs.c +++ b/fs/ubifs/ubifs.c @@ -641,6 +641,7 @@ int ubifs_load(char *filename, u32 addr, u32 size) ui = ubifs_inode(inode); if (((inode->i_mode & S_IFMT) == S_IFLNK) && ui->data_len) { memcpy(link_name, ui->data, ui->data_len); + link_name[ui->data_len]='\0'; printf("%s is linked to %s!\n", filename, link_name); ubifs_iput(inode); -- 1.6.2.4

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[U-Boot] [PATCH 0/5] I2C cleanup before removal of deprecated commands
by Peter Tyser 27 Apr '09

27 Apr '09

Hi Heiko, These 5 patches should clean up the compile issues that you noticed after application of the "[PATCH v2 0/7] Remove individual I2C commands and cleanup" series. I only have a build environment for powerpc boards so it'd be much appreciated if other architectures could do some basic compile testing after the "Remove individual I2C commands and cleanup" series is applied to the i2c repository. Assuming these patches are accepted, the original "v2 Remove individual I2C commands and cleanup" series should then be applied. Thanks, Peter Peter Tyser (5): i2c.h: Provide a default CONFIG_SYS_I2C_SLAVE value cpci750: i2c cleanup Marvell: i2c cleanup mpc7448hpc2: Add CONFIG_SYS_I2C_SPEED define tsi108_i2c: Add i2c_init() stub function board/Marvell/common/i2c.c | 19 ++++++++++++------- board/esd/cpci750/i2c.c | 16 ++++++++++------ common/cmd_eeprom.c | 4 ---- cpu/mpc8260/i2c.c | 3 --- cpu/ppc4xx/40x_spd_sdram.c | 4 ---- cpu/ppc4xx/44x_spd_ddr.c | 4 ---- drivers/i2c/tsi108_i2c.c | 9 +++++++++ include/configs/mpc7448hpc2.h | 1 + include/i2c.h | 12 +++++++++--- 9 files changed, 41 insertions(+), 31 deletions(-)

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[U-Boot] [PATCH v3] OMAP3: Beagle: Set pinmux conditionally for Rev C boards
by Dirk Behme 27 Apr '09

27 Apr '09

The Beagle Rev C boards pull UART2 from an alternate set of balls. Signed-off-by: Steve Sakoman <steve(a)sakoman.com> Signed-off-by: Dirk Behme <dirk.behme(a)googlemail.com> --- Changes in v3: - Allow input for Rev C GPIOs 140 - 142 - Rebase against "fix DaVinci NS16550_REG_SIZE regression" commit 7ee38c044ca5041d3378d6507580ea4ec344af96 Changes in v2: - Add space between if and (beagle_revision_c) board/omap3/beagle/beagle.c | 4 ++++ board/omap3/beagle/beagle.h | 25 +++++++++++++++++-------- 2 files changed, 21 insertions(+), 8 deletions(-) Index: u-boot-main/board/omap3/beagle/beagle.c =================================================================== --- u-boot-main.orig/board/omap3/beagle/beagle.c +++ u-boot-main/board/omap3/beagle/beagle.c @@ -130,4 +130,8 @@ int misc_init_r(void) void set_muxconf_regs(void) { MUX_BEAGLE(); + + if (beagle_revision_c) { + MUX_BEAGLE_C(); + } } Index: u-boot-main/board/omap3/beagle/beagle.h =================================================================== --- u-boot-main.orig/board/omap3/beagle/beagle.h +++ u-boot-main/board/omap3/beagle/beagle.h @@ -214,14 +214,14 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M4)) /*GPIO_138*/\ MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139*/\ /*Bluetooth*/\ - MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M4)) /*GPIO_140*/\ - MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M4)) /*GPIO_142*/\ - MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M4)) /*GPIO_141*/\ - MUX_VAL(CP(MCBSP3_FSX), (IDIS | PTD | DIS | M4)) /*GPIO_143*/\ - MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) /*UART2_CTS*/\ - MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\ - MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/\ - MUX_VAL(CP(UART2_RX), (IDIS | PTD | DIS | M4)) /*GPIO_147*/\ + MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M1)) /*UART2_CTS*/\ + MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\ + MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M1)) /*UART2_TX*/\ + MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M1)) /*UART2_RX*/\ + MUX_VAL(CP(UART2_CTS), (IEN | PTD | DIS | M4)) /*GPIO_144*/\ + MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M4)) /*GPIO_145*/\ + MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M4)) /*GPIO_146*/\ + MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M4)) /*GPIO_147*/\ /*Modem Interface */\ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\ MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_149*/ \ @@ -374,4 +374,13 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/ + +#define MUX_BEAGLE_C() \ + MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M4)) /*GPIO_140*/\ + MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M4)) /*GPIO_142*/\ + MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_141*/\ + MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) /*UART2_CTS*/\ + MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\ + MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/ + #endif

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