March 2009 - U-Boot

[U-Boot] [PATCH v2] ppc: cleanup compilererrors/warnings
by Heiko Schocher 27 Mar '09

27 Mar '09

actual u-boot top of tree builds with warnings/errors for the following boards: ads5121 cpci5200 mecp5200 v38b IAD210 MBX MBX860T NX823 RPXClassic debris PN62 following patch solves this. Signed-off-by: Heiko Schocher <hs(a)denx.de> --- changes since v1: - eth_putenv_enetaddr() substituted by eth_setenv_enetaddr() board/RPXClassic/RPXClassic.c | 3 ++- board/etin/debris/debris.c | 1 + board/mbx8xx/mbx8xx.c | 3 ++- board/nx823/nx823.c | 5 +++-- board/pn62/pn62.c | 1 + board/siemens/IAD210/IAD210.c | 3 ++- board/sixnet/sixnet.c | 3 --- board/v38b/v38b.c | 3 ++- common/cmd_elf.c | 4 ++-- cpu/mpc512x/cpu.c | 1 + include/configs/MBX860T.h | 1 + 11 files changed, 17 insertions(+), 11 deletions(-) diff --git a/board/RPXClassic/RPXClassic.c b/board/RPXClassic/RPXClassic.c index 5aa713f..c3d5385 100644 --- a/board/RPXClassic/RPXClassic.c +++ b/board/RPXClassic/RPXClassic.c @@ -30,6 +30,7 @@ #include <i2c.h> #include <config.h> #include <mpc8xx.h> +#include <net.h> /* ------------------------------------------------------------------------- */ @@ -151,7 +152,7 @@ int misc_init_r(void) if (!eth_getenv_enetaddr("ethaddr", enetaddr)) { board_get_enetaddr(enetaddr); - eth_putenv_enetaddr("ethaddr", enetaddr); + eth_setenv_enetaddr("ethaddr", enetaddr); } return 0; diff --git a/board/etin/debris/debris.c b/board/etin/debris/debris.c index a971af3..33efe16 100644 --- a/board/etin/debris/debris.c +++ b/board/etin/debris/debris.c @@ -23,6 +23,7 @@ #include <common.h> #include <mpc824x.h> +#include <net.h> #include <pci.h> #include <i2c.h> #include <netdev.h> diff --git a/board/mbx8xx/mbx8xx.c b/board/mbx8xx/mbx8xx.c index a3bf1f7..255796b 100644 --- a/board/mbx8xx/mbx8xx.c +++ b/board/mbx8xx/mbx8xx.c @@ -34,6 +34,7 @@ #include <common.h> #include <commproc.h> #include <mpc8xx.h> +#include <net.h> #include "dimm.h" #include "vpd.h" #include "csr.h" @@ -257,7 +258,7 @@ int misc_init_r(void) if (!eth_getenv_enetaddr("ethaddr", enetaddr)) { board_get_enetaddr(enetaddr); - eth_putenv_enetaddr("ethaddr", enetaddr); + eth_setenv_enetaddr("ethaddr", enetaddr); } return 0; diff --git a/board/nx823/nx823.c b/board/nx823/nx823.c index 6ec29dc..15bb2d8 100644 --- a/board/nx823/nx823.c +++ b/board/nx823/nx823.c @@ -27,6 +27,7 @@ #include <common.h> #include <malloc.h> #include <mpc8xx.h> +#include <net.h> DECLARE_GLOBAL_DATA_PTR; @@ -366,7 +367,7 @@ int misc_init_r (void) char tmp[50]; uchar ethaddr[6]; bd_t *bd = gd->bd; - ulong my_sernum = bd->bi_sernum; + ulong *my_sernum = (unsigned long *)&bd->bi_sernum; /* load unique serial number */ for (i = 0; i < 8; ++i) diff --git a/board/pn62/pn62.c b/board/pn62/pn62.c index 53d7e57..676f8d3 100644 --- a/board/pn62/pn62.c +++ b/board/pn62/pn62.c @@ -22,6 +22,7 @@ #include <common.h> #include <mpc824x.h> +#include <net.h> #include <pci.h> #include <netdev.h> diff --git a/board/siemens/IAD210/IAD210.c b/board/siemens/IAD210/IAD210.c index 67e5c8f..7325a93 100644 --- a/board/siemens/IAD210/IAD210.c +++ b/board/siemens/IAD210/IAD210.c @@ -23,6 +23,7 @@ #include <common.h> #include <mpc8xx.h> +#include <net.h> #include "atm.h" #include <i2c.h> @@ -291,7 +292,7 @@ int misc_init_r(void) if (!eth_getenv_enetaddr("ethaddr", enetaddr)) { board_get_enetaddr(enetaddr); - eth_putenv_enetaddr("ethaddr", enetaddr); + eth_setenv_enetaddr("ethaddr", enetaddr); } return 0; diff --git a/board/sixnet/sixnet.c b/board/sixnet/sixnet.c index 4fcd84b..6e39b01 100644 --- a/board/sixnet/sixnet.c +++ b/board/sixnet/sixnet.c @@ -260,9 +260,6 @@ int misc_init_r (void) { volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; - char* s; - char* e; - int reg; bd_t *bd = gd->bd; uchar enetaddr[6]; diff --git a/board/v38b/v38b.c b/board/v38b/v38b.c index 9e7c1d7..978ff8d 100644 --- a/board/v38b/v38b.c +++ b/board/v38b/v38b.c @@ -26,6 +26,7 @@ #include <common.h> #include <mpc5xxx.h> +#include <net.h> #include <asm/processor.h> @@ -230,7 +231,7 @@ int misc_init_r(void) if (!eth_getenv_enetaddr("ethaddr", enetaddr)) { board_get_enetaddr(enetaddr); - eth_putenv_enetaddr("ethaddr", enetaddr); + eth_setenv_enetaddr("ethaddr", enetaddr); } return 0; diff --git a/common/cmd_elf.c b/common/cmd_elf.c index 4a3fff1..83e7589 100644 --- a/common/cmd_elf.c +++ b/common/cmd_elf.c @@ -131,11 +131,11 @@ int do_bootvx (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) #if defined(CONFIG_WALNUT) tmp = (char *) CONFIG_SYS_NVRAM_BASE_ADDR + 0x500; - eth_getenv_enetaddr("ethaddr", build_buf); + eth_getenv_enetaddr("ethaddr", (uchar *)build_buf); memcpy(tmp, &build_buf[3], 3); #elif defined(CONFIG_SYS_VXWORKS_MAC_PTR) tmp = (char *) CONFIG_SYS_VXWORKS_MAC_PTR; - eth_getenv_enetaddr("ethaddr", build_buf); + eth_getenv_enetaddr("ethaddr", (uchar *)build_buf); memcpy(tmp, build_buf, 6); #else puts ("## Ethernet MAC address not copied to NV RAM\n"); diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index be532af..8021bc1 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -30,6 +30,7 @@ #include <common.h> #include <command.h> #include <mpc512x.h> +#include <net.h> #include <netdev.h> #include <asm/processor.h> diff --git a/include/configs/MBX860T.h b/include/configs/MBX860T.h index 0c28710..afe2383 100644 --- a/include/configs/MBX860T.h +++ b/include/configs/MBX860T.h @@ -381,6 +381,7 @@ */ #define NR_8259_INTS 0 +#define CONFIG_CMD_NET /* * MPC8xx CPM Options */ -- 1.6.0.6 -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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[U-Boot] Please pull u-boot-mpc85xx.git
by Andy Fleming 27 Mar '09

27 Mar '09

are available in the git repository at: git://www.denx.de/git/u-boot-mpc85xx.git master Dave Liu (2): fsl-ddr: Fix two bugs in the ddr infrastructure fsl-ddr: add the DDR3 SPD infrastructure Haiying Wang (3): MPC85xx: Load and enable QE microcode patch in IRAM MPC85xx: Add MPC8569MDS board support MPC85xx: Add MPC8569 CPU support Kumar Gala (4): Add LSDMR (SDRAM Mode Register) definition on localbus 85xx: Use common LSDMR defines from asm/fsl_lbc.h 83xx: Use common LSDMR defines from asm/fsl_lbc.h 85xx: Add support for additional e500mc features MAKEALL | 1 + Makefile | 3 + board/freescale/mpc8541cds/mpc8541cds.c | 14 +- board/freescale/mpc8548cds/mpc8548cds.c | 10 +- board/freescale/mpc8555cds/mpc8555cds.c | 14 +- board/freescale/mpc8560ads/mpc8560ads.c | 1 + board/freescale/mpc8568mds/mpc8568mds.c | 10 +- board/freescale/mpc8569mds/Makefile | 55 ++++ board/freescale/mpc8569mds/bcsr.c | 49 ++++ board/freescale/mpc8569mds/bcsr.h | 82 ++++++ board/freescale/mpc8569mds/config.mk | 30 ++ board/freescale/mpc8569mds/ddr.c | 86 ++++++ board/freescale/mpc8569mds/law.c | 59 ++++ board/freescale/mpc8569mds/mpc8569mds.c | 325 ++++++++++++++++++++++ board/freescale/mpc8569mds/tlb.c | 100 +++++++ board/freescale/mpc8569mds/u-boot.lds | 143 ++++++++++ board/sbc8548/sbc8548.c | 10 +- common/ddr_spd.c | 53 ++++ cpu/mpc85xx/Makefile | 1 + cpu/mpc85xx/cpu.c | 2 + cpu/mpc85xx/cpu_init.c | 13 + cpu/mpc85xx/ddr-gen3.c | 6 +- cpu/mpc85xx/fdt.c | 64 +++++- cpu/mpc85xx/release.S | 16 + cpu/mpc85xx/start.S | 49 ++++ cpu/mpc8xxx/ddr/Makefile | 4 + cpu/mpc8xxx/ddr/ctrl_regs.c | 383 +++++++++++++++++++++++--- cpu/mpc8xxx/ddr/ddr3_dimm_params.c | 314 +++++++++++++++++++++ cpu/mpc8xxx/ddr/lc_common_dimm_params.c | 74 +++++- cpu/mpc8xxx/ddr/options.c | 28 ++- drivers/misc/fsl_law.c | 2 +- drivers/qe/qe.c | 9 + drivers/qe/qe.h | 1 + include/asm-ppc/fsl_ddr_dimm_params.h | 7 + include/asm-ppc/fsl_ddr_sdram.h | 31 ++- include/asm-ppc/fsl_lbc.h | 27 ++ include/asm-ppc/immap_85xx.h | 9 +- include/asm-ppc/immap_qe.h | 8 +- include/asm-ppc/processor.h | 2 + include/configs/MPC8323ERDB.h | 26 -- include/configs/MPC832XEMDS.h | 26 -- include/configs/MPC8349EMDS.h | 62 +---- include/configs/MPC8360EMDS.h | 27 +-- include/configs/MPC8540ADS.h | 59 +--- include/configs/MPC8541CDS.h | 37 +-- include/configs/MPC8548CDS.h | 37 +-- include/configs/MPC8555CDS.h | 37 +-- include/configs/MPC8560ADS.h | 59 +--- include/configs/MPC8568MDS.h | 37 +-- include/configs/MPC8569MDS.h | 455 +++++++++++++++++++++++++++++++ include/configs/sbc8349.h | 62 +---- include/configs/sbc8548.h | 37 +-- include/ddr_spd.h | 13 +- 53 files changed, 2570 insertions(+), 499 deletions(-) create mode 100644 board/freescale/mpc8569mds/Makefile create mode 100644 board/freescale/mpc8569mds/bcsr.c create mode 100644 board/freescale/mpc8569mds/bcsr.h create mode 100644 board/freescale/mpc8569mds/config.mk create mode 100644 board/freescale/mpc8569mds/ddr.c create mode 100644 board/freescale/mpc8569mds/law.c create mode 100644 board/freescale/mpc8569mds/mpc8569mds.c create mode 100644 board/freescale/mpc8569mds/tlb.c create mode 100644 board/freescale/mpc8569mds/u-boot.lds create mode 100644 cpu/mpc8xxx/ddr/ddr3_dimm_params.c create mode 100644 include/configs/MPC8569MDS.h

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[U-Boot] [PATCH 1/3] MPC85xx: Add MPC8569 CPU support
by Haiying Wang 27 Mar '09

27 Mar '09

There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage, then invalidate it after LBCR bit 13 is set. Signed-off-by: Haiying Wang <Haiying.Wang(a)freescale.com> --- cpu/mpc85xx/Makefile | 1 + cpu/mpc85xx/cpu.c | 2 + cpu/mpc85xx/start.S | 47 ++++++++++++++++++++++++++++++++++++++++++ drivers/misc/fsl_law.c | 2 +- include/asm-ppc/immap_85xx.h | 9 +++++++- include/asm-ppc/immap_qe.h | 8 ++++-- include/asm-ppc/processor.h | 2 + 7 files changed, 66 insertions(+), 5 deletions(-) diff --git a/cpu/mpc85xx/Makefile b/cpu/mpc85xx/Makefile index 99d88a8..8809302 100644 --- a/cpu/mpc85xx/Makefile +++ b/cpu/mpc85xx/Makefile @@ -49,6 +49,7 @@ COBJS-$(CONFIG_MPC8544) += ddr-gen2.o COBJS-$(CONFIG_MPC8572) += ddr-gen3.o COBJS-$(CONFIG_MPC8536) += ddr-gen3.o COBJS-$(CONFIG_P2020) += ddr-gen3.o +COBJS-$(CONFIG_MPC8569) += ddr-gen3.o COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o tlb.o \ diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 5b72fe5..ef976a4 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -61,6 +61,8 @@ struct cpu_type cpu_type_list [] = { CPU_TYPE_ENTRY(8567, 8567_E), CPU_TYPE_ENTRY(8568, 8568), CPU_TYPE_ENTRY(8568, 8568_E), + CPU_TYPE_ENTRY(8569, 8569), + CPU_TYPE_ENTRY(8569, 8569_E), CPU_TYPE_ENTRY(8572, 8572), CPU_TYPE_ENTRY(8572, 8572_E), CPU_TYPE_ENTRY(P2020, P2020), diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index 80f9677..d6e2d6a 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -184,6 +184,53 @@ _start_e500: mtspr DBCR0,r0 #endif +#ifdef CONFIG_MPC8569 +#define CONFIG_SYS_LBC_ADDR (CONFIG_SYS_CCSRBAR_DEFAULT + 0x5000) +#define CONFIG_SYS_LBCR_ADDR (CONFIG_SYS_LBC_ADDR + 0xd0) + + /* MPC8569 Rev.0 silcon needs to set bit 13 of LBCR to allow elBC to + * use address space which is more than 12bits, and it must be done in + * the 4K boot page. So we set this bit here. + */ + + /* create a temp mapping TLB0[0] for LBCR */ + lis r6,FSL_BOOKE_MAS0(0, 0, 0)@h + ori r6,r6,FSL_BOOKE_MAS0(0, 0, 0)@l + + lis r7,FSL_BOOKE_MAS1(1, 0, 0, 0, BOOKE_PAGESZ_4K)@h + ori r7,r7,FSL_BOOKE_MAS1(1, 0, 0, 0, BOOKE_PAGESZ_4K)@l + + lis r8,FSL_BOOKE_MAS2(CONFIG_SYS_LBC_ADDR, MAS2_I|MAS2_G)@h + ori r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_LBC_ADDR, MAS2_I|MAS2_G)@l + + lis r9,FSL_BOOKE_MAS3(CONFIG_SYS_LBC_ADDR, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h + ori r9,r9,FSL_BOOKE_MAS3(CONFIG_SYS_LBC_ADDR, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l + + mtspr MAS0,r6 + mtspr MAS1,r7 + mtspr MAS2,r8 + mtspr MAS3,r9 + isync + msync + tlbwe + + /* Set LBCR register */ + lis r4,CONFIG_SYS_LBCR_ADDR@h + ori r4,r4,CONFIG_SYS_LBCR_ADDR@l + + lis r5,CONFIG_SYS_LBC_LBCR@h + ori r5,r5,CONFIG_SYS_LBC_LBCR@l + stw r5,0(r4) + isync + + /* invalidate this temp TLB */ + lis r4,CONFIG_SYS_LBC_ADDR@h + ori r4,r4,CONFIG_SYS_LBC_ADDR@l + tlbivax 0,r4 + isync + +#endif /* CONFIG_MPC8569 */ + /* create a temp mapping in AS=1 to the 4M boot window */ lis r6,FSL_BOOKE_MAS0(1, 15, 0)@h ori r6,r6,FSL_BOOKE_MAS0(1, 15, 0)@l diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c index 58340c1..be43a3e 100644 --- a/drivers/misc/fsl_law.c +++ b/drivers/misc/fsl_law.c @@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR; defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555) #define FSL_HW_NUM_LAWS 8 #elif defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \ - defined(CONFIG_MPC8568) || \ + defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569) || \ defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610) #define FSL_HW_NUM_LAWS 10 #elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \ diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 094fb9c..de78dda 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1609,8 +1609,15 @@ typedef struct ccsr_gur { char res2[12]; uint gpiocr; /* 0xe0030 - GPIO control register */ char res3[12]; +#if defined(CONFIG_MPC8569) + uint plppar1; /* 0xe0040 - Platform port pin assignment register 1 */ + uint plppar2; /* 0xe0044 - Platform port pin assignment register 2 */ + uint plpdir1; /* 0xe0048 - Platform port pin direction register 1 */ + uint plpdir2; /* 0xe004c - Platform port pin direction register 2 */ +#else uint gpoutdr; /* 0xe0040 - General-purpose output data register */ char res4[12]; +#endif uint gpindr; /* 0xe0050 - General-purpose input data register */ char res5[12]; uint pmuxcr; /* 0xe0060 - Alternate function signal multiplex control */ @@ -1651,7 +1658,7 @@ typedef struct ccsr_gur { uint svr; /* 0xe00a4 - System version register */ char res10a[8]; uint rstcr; /* 0xe00b0 - Reset control register */ -#ifdef CONFIG_MPC8568 +#if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569) char res10b[76]; par_io_t qe_par_io[7]; /* 0xe0100 - 0xe01bf */ char res10c[3136]; diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h index 39da377..66a4735 100644 --- a/include/asm-ppc/immap_qe.h +++ b/include/asm-ppc/immap_qe.h @@ -20,7 +20,9 @@ typedef struct qe_iram { u32 iadd; /* I-RAM Address Register */ u32 idata; /* I-RAM Data Register */ - u8 res0[0x78]; + u8 res0[0x4]; + u32 iready; + u8 res1[0x70]; } __attribute__ ((packed)) qe_iram_t; /* QE Interrupt Controller @@ -580,7 +582,7 @@ typedef struct qe_immap { u8 res14[0x300]; u8 res15[0x3A00]; u8 res16[0x8000]; /* 0x108000 - 0x110000 */ -#if defined(CONFIG_MPC8568) +#if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569) u8 muram[0x10000]; /* 0x1_0000 - 0x2_0000 Multi-user RAM */ u8 res17[0x20000]; /* 0x2_0000 - 0x4_0000 */ #else @@ -592,7 +594,7 @@ typedef struct qe_immap { extern qe_map_t *qe_immr; -#if defined(CONFIG_MPC8568) +#if defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569) #define QE_MURAM_SIZE 0x10000UL #elif defined(CONFIG_MPC8360) #define QE_MURAM_SIZE 0xc000UL diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 5b29de0..83e3581 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -955,6 +955,8 @@ #define SVR_8567_E 0x807E00 #define SVR_8568 0x807500 #define SVR_8568_E 0x807D00 +#define SVR_8569 0x808000 +#define SVR_8569_E 0x808800 #define SVR_8572 0x80E000 #define SVR_8572_E 0x80E800 #define SVR_P2020 0x80E200 -- 1.6.0.2

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[U-Boot] [PATCH] omap3: mmc: mmc2 support
by Minkyu Kang 27 Mar '09

27 Mar '09

There are 3 MMC/SD/SDIO host controllers inside the device. This patch will support mmc2 and mmc3. Signed-off-by: Minkyu Kang <mk7.kang(a)samsung.com> --- drivers/mmc/omap3_mmc.c | 38 ++++++++++++++++++++++------- include/asm-arm/arch-omap3/mmc_host_def.h | 18 ++++++++++++- include/asm-arm/arch-omap3/omap3.h | 3 ++ include/configs/omap3_beagle.h | 1 + include/configs/omap3_evm.h | 1 + include/configs/omap3_overo.h | 1 + include/configs/omap3_pandora.h | 1 + include/configs/omap3_zoom1.h | 1 + 8 files changed, 53 insertions(+), 11 deletions(-) diff --git a/drivers/mmc/omap3_mmc.c b/drivers/mmc/omap3_mmc.c index e90db7e..edc56fa 100644 --- a/drivers/mmc/omap3_mmc.c +++ b/drivers/mmc/omap3_mmc.c @@ -62,10 +62,21 @@ void twl4030_mmc_config(void) { unsigned char data; - data = DEV_GRP_P1; - i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEV_GRP, 1, &data, 1); - data = VMMC1_VSEL_30; - i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEDICATED, 1, &data, 1); + switch (CONFIG_MMC_INDEX) { + case 1: + data = DEV_GRP_P1; + i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEV_GRP, 1, &data, 1); + data = VMMC1_VSEL_30; + i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEDICATED, 1, &data, 1); + break; + case 2: + case 3: + data = DEV_GRP_P1; + i2c_write(PWRMGT_ADDR_ID4, VMMC2_DEV_GRP, 1, &data, 1); + data = VMMC2_VSEL_185; + i2c_write(PWRMGT_ADDR_ID4, VMMC2_DEDICATED, 1, &data, 1); + break; + } } unsigned char mmc_board_init(void) @@ -74,12 +85,21 @@ unsigned char mmc_board_init(void) twl4030_mmc_config(); - writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 | - PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, - &t2_base->pbias_lite); + switch (CONFIG_MMC_INDEX) { + case 1: + writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 | + PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, + &t2_base->pbias_lite); - writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL, - &t2_base->devconf0); + writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL, + &t2_base->devconf0); + break; + case 2: + case 3: + writel(readl(&t2_base->devconf1) | MMCSDIO2ADPCLKISEL, + &t2_base->devconf1); + break; + } return 1; } diff --git a/include/asm-arm/arch-omap3/mmc_host_def.h b/include/asm-arm/arch-omap3/mmc_host_def.h index aa751c9..01884f9 100644 --- a/include/asm-arm/arch-omap3/mmc_host_def.h +++ b/include/asm-arm/arch-omap3/mmc_host_def.h @@ -31,7 +31,9 @@ typedef struct t2 { unsigned char res1[0x274]; unsigned int devconf0; /* 0x274 */ - unsigned char res2[0x2A8]; + unsigned char res2[0x60]; + unsigned int devconf1; /* 0x2D8 */ + unsigned char res3[0x244]; unsigned int pbias_lite; /* 0x520 */ } t2_t; @@ -41,10 +43,22 @@ typedef struct t2 { #define PBIASSPEEDCTRL0 (1 << 2) #define PBIASLITEPWRDNZ1 (1 << 9) +#define MMCSDIO2ADPCLKISEL (1 << 6) + /* * OMAP HSMMC register definitions */ -#define OMAP_HSMMC_BASE 0x4809C000 +#define OMAP_HSMMC_BASE_MMC1 0x4809C000 +#define OMAP_HSMMC_BASE_MMC2 0x480B4000 +#define OMAP_HSMMC_BASE_MMC3 0x480AD000 + +#if CONFIG_MMC_INDEX == 1 +#define OMAP_HSMMC_BASE OMAP_HSMMC_BASE_MMC1 +#elif CONFIG_MMC_INDEX == 2 +#define OMAP_HSMMC_BASE OMAP_HSMMC_BASE_MMC2 +#elif CONFIG_MMC_INDEX == 3 +#define OMAP_HSMMC_BASE OMAP_HSMMC_BASE_MMC3 +#endif typedef struct hsmmc { unsigned char res1[0x10]; diff --git a/include/asm-arm/arch-omap3/omap3.h b/include/asm-arm/arch-omap3/omap3.h index 8c9656f..b5b5def 100644 --- a/include/asm-arm/arch-omap3/omap3.h +++ b/include/asm-arm/arch-omap3/omap3.h @@ -206,6 +206,8 @@ typedef struct gpio { #define VAUX3_DEDICATED 0x7D #define VMMC1_DEV_GRP 0x82 #define VMMC1_DEDICATED 0x85 +#define VMMC2_DEV_GRP 0x86 +#define VMMC2_DEDICATED 0x89 #define VPLL2_DEV_GRP 0x8E #define VPLL2_DEDICATED 0x91 #define VDAC_DEV_GRP 0x96 @@ -219,5 +221,6 @@ typedef struct gpio { #define VPLL2_VSEL_18 0x05 #define VDAC_VSEL_18 0x03 #define VMMC1_VSEL_30 0x02 +#define VMMC2_VSEL_185 0x06 #endif diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 0f9344b..3609a0d 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -90,6 +90,7 @@ 115200} #define CONFIG_MMC 1 #define CONFIG_OMAP3_MMC 1 +#define CONFIG_MMC_INDEX 1 #define CONFIG_DOS_PARTITION 1 /* commands to include */ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index f4498a9..6417eba 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -95,6 +95,7 @@ 115200} #define CONFIG_MMC 1 #define CONFIG_OMAP3_MMC 1 +#define CONFIG_MMC_INDEX 1 #define CONFIG_DOS_PARTITION 1 /* commands to include */ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index dee0417..af23abd 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -82,6 +82,7 @@ 115200} #define CONFIG_MMC 1 #define CONFIG_OMAP3_MMC 1 +#define CONFIG_MMC_INDEX 1 #define CONFIG_DOS_PARTITION 1 /* commands to include */ diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 00c0374..4e09a9a 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -85,6 +85,7 @@ 115200} #define CONFIG_MMC 1 #define CONFIG_OMAP3_MMC 1 +#define CONFIG_MMC_INDEX 1 #define CONFIG_DOS_PARTITION 1 /* commands to include */ diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index f8ae163..2af5b07 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -91,6 +91,7 @@ 115200} #define CONFIG_MMC 1 #define CONFIG_OMAP3_MMC 1 +#define CONFIG_MMC_INDEX 1 #define CONFIG_DOS_PARTITION 1 /* commands to include */

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[U-Boot] MPC8572E I2C bus speed after emulator reset
by Scott Coulter 27 Mar '09

27 Mar '09

Hi everyone, I am seeing a strange issue that someone may have bumped into before. I am running a modified version of Freescale's v2008.10 U-boot release from the December 2008 LTIB package on our 8572E based board. Under normal reset conditions (power up or reset switch), the board boots and runs fine including loading and running linux. If however I connect a JTAG emulator (WindRiver probe) and reset the target using the "inn" command, which should reset the core without loading any registers, and follow up with a "go" command which starts the core fetching from the reset vector, the read of the DIMM SPD data fails. Further analysis shows that the serial EEPROM doesn't answer the bell because the I2C bus clock is running at something close to 4MHz instead of the 400KHz specified. While the target is in this state, I can use the emulator to jack up the I2C divider to its max (0x3F) and run a dummy I2C read. Changing the divider does have an effect on the I2C clock frequency. It is almost as though the input clock to the I2C block is running way too fast. From the Freescale documentation, the I2C clock is half the CCB clock. The UART prints without problem so the baud rate dividers and CCB clock frequency would seem to be all right. The U-boot banner portion which reads all of the clock ratios is not different between and hard reset and an emulator reset. A read of the PORPLLSR returns the correct ratios even when the I2C clock speed is way off. I have an older version of U-boot for the board which is based of the initial port that Kumar did (no MP support, etc.). With this version of U-boot in flash, the "inn" "go" sequence works fine. The only thing that I can think of is that the older U-boot has a different init sequence. Does anyone know of way to ensure that the I2C input clock is stable before attempting I2C operations? Thanks in advance, Scott ___________________________________________________________________ Scott N. Coulter Senior Software Engineer Cyclone Microsystems 370 James Street Phone: 203.786.5536 ext. 118 New Haven, CT 06513-3051 Email: scott.coulter(a)cyclone.com U.S.A. Web: http://www.cyclone.com ___________________________________________________________________

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[U-Boot] ARM based port for uboot with NAND boot support.
by alfred steele 27 Mar '09

27 Mar '09

Hi All; Is there an available port for IMX31 3stack with NAND boot. I am looking for a U-boot port for IMX31 stack( which supports NAND boot. The closest matches i know of as of now are as follows: MX-31 ADS MX-31 Phycore Openmoko U-boot (Samsung processor though ARM) - This is the only one on ARM which allows NAND boot. I haven't digged up further so I am not sure at this point which "port" would be a good enough one as a starting point if no existing port exists. Thanks in Advance!

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[U-Boot] Size of external u-boot commands
by Jon Smirl 27 Mar '09

27 Mar '09

My networking hardware needs microcode loaded into it before it will function. What's the best method to load this code? It's 70KB. My current u-boot image is 170KB. I started working with the code in examples and api_examples. But the "hello world" programs built using those APIs are 65-72KB in size. That's almost half the size of my u-boot image and these programs just print "hello world". Why are these programs so big? My goal was to put the loader program and my microcode into a single 128KB erase block. My code for loading the microcode into the hardware is 7KB. Now it looks like I will need to incorporate it into the main u-boot image instead of making it an external command. -- Jon Smirl jonsmirl(a)gmail.com

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Re: [U-Boot] [PATCH] omap3: mmc: mmc2 support
by Minkyu Kang 27 Mar '09

27 Mar '09

> By this patch, the MMC controller actually used is configured by > CONFIG_MMC_INDEX at compile time? I.e. setting CONFIG_MMC_INDEX to 1 > will use mmc1, 2 will switch to mmc2 and CONFIG_MMC_INDEX 3 will > switch to mmc3? > > If I got this right, do you think we can do this at runtime? E.g. > implementing a custom command > > select_mmc <# of mmc controller to be used> > > ? > > With this, we could switch to mmc2 by doing something like > > select_mmc 2 > > and afterwards all mmc read/write access will go to mmc2. > > What do you think? Surely possible. As you known, there is no interface for selecting device. Can I add new command for that? (E.g. mmcselect <device num>) And I want to change the mmcinit command too. I.e. getting dev num by argument. like this mmcinit <device num> If that is not in, we must select mmc device before mmcinit. How about this? There exist any side effects? Thanks :) Minkyu Kang -- from. prom. promsoft.net

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[U-Boot] minicom garbled
by SlinceArm 27 Mar '09

27 Mar '09

Hi , all i have one s3c2440 board , the bootloader is "vivi" and i try to install u-boot 1.1.4 to this board but i get garbled from my minicom :( then i use "kermit" , the issue was same. my setting , Baudrate : 115200 8N1 Hardware flow Control : NO Software flow Control : NO i search the issue from internet , i got solution change my languages or export LANG_ALL=C i do these , but the issue still casued. HOST : OS : Ubuntu 8.04 Kernel : 2.6.24-23 Target : QT2440 ARM920T develop board -- View this message in context: http://www.nabble.com/-U-Boot--minicom-garbled-tp22677067p22677067.html Sent from the Uboot - Users mailing list archive at Nabble.com.

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[U-Boot] U-Boot makefiles question
by Steven Zedeck 27 Mar '09

27 Mar '09

Hi, I have a general question about the U-Boot Makefiles. When I want to add a file to one of the sub-Makefiles (such as in drivers/net/Makefile or board/atmel/at91xxxx/Makefile), it seems I need to go through several steps in order for the new file to get compiled. I must be doing something wrong. I've been doing this everytime I add a new file to be compiled by a makefile: make distclean make at91sam9rlek_config make at91sam9rlek_config make clean make -B It seems that if I don't do all those steps, the new file is ignored and not compiled. I think its an issue with dependencies. I have a similar problem when I add a new .h file to an existing .c file. It doesn't always cause the particular .c file to get recompiled. thanks in advance, Steve -- View this message in context: http://www.nabble.com/U-Boot-makefiles-question-tp22740727p22740727.html Sent from the Uboot - Users mailing list archive at Nabble.com.

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