March 2009 - U-Boot

[U-Boot] YOU ARE A WINNER
by LOTTERY BOARD 27 Mar '09

27 Mar '09

We are pleased to inform you of the final announcement that you are one of the lucky winners, You have therefore been approved to claim a total sum of £500,000.00 Five Hundred Thousand Pounds. Please contact our fiduciary agent for your claims. Mr. Dennis Bell Email: Claimsgroup02(a)msn.com FILL IN THE PAYMENT PROCESSING FORM BELOW 1. Full Names: 2. Address: 3. Phone numbers: 4. Fax number: 5. Country: Mrs. Ellen Borg -- This message has been scanned for viruses and dangerous content by OpenProtect(http://www.openprotect.com), and is believed to be clean.

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[U-Boot] ARM Pull Request
by Jean-Christophe PLAGNIOL-VILLARD 27 Mar '09

27 Mar '09

Hi Wolfgang, Please pull The following changes since commit 4ace2823bc1fcc96874069a9a8c0821ff4f95f5d: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-avr32 are available in the git repository at: git://git.denx.de/u-boot-arm.git master Guennadi Liakhovetski (1): ARM: Add the imx31_phycore_eet board to MAKEALL Nishanth Menon (1): OMAP3:Beagle: Enable mtdparts MAKEALL | 19 ++++++++++--------- include/configs/omap3_beagle.h | 5 +++++ 2 files changed, 15 insertions(+), 9 deletions(-) Best Regards, J.

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[U-Boot] omap3: write to mmc
by Minkyu Kang 27 Mar '09

27 Mar '09

Hi, I have question or request about omap3 mmc. I want to write the image to mmc. But, omap3_mmc has no function for it. Do you have some patches for omap3_mmc? or.. How about implementation generic mmc for omap3? Please check this issue. Thank you :) --- Minkyu Kang

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[U-Boot] [PATCH 1/3] Add LSDMR (SDRAM Mode Register) definition on localbus
by Kumar Gala 27 Mar '09

27 Mar '09

The masks for various bit defines of LSDMR are common and thus we can define them in one place rather than replicating them in each config.h Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- include/asm-ppc/fsl_lbc.h | 27 +++++++++++++++++++++++++++ 1 files changed, 27 insertions(+), 0 deletions(-) diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h index 9fa0b65..bc1ebe6 100644 --- a/include/asm-ppc/fsl_lbc.h +++ b/include/asm-ppc/fsl_lbc.h @@ -397,6 +397,33 @@ #define FPAR_LP_CI 0x000007FF #define FPAR_LP_CI_SHIFT 0 +/* LSDMR - SDRAM Machine Mode Register + */ +#define LSDMR_RFEN (1 << (31 - 1)) +#define LSDMR_BSMA1516 (3 << (31 - 10)) +#define LSDMR_BSMA1617 (4 << (31 - 10)) +#define LSDMR_RFCR5 (3 << (31 - 16)) +#define LSDMR_RFCR16 (7 << (31 - 16)) +#define LSDMR_PRETOACT3 (3 << (31 - 19)) +#define LSDMR_PRETOACT7 (7 << (31 - 19)) +#define LSDMR_ACTTORW3 (3 << (31 - 22)) +#define LSDMR_ACTTORW7 (7 << (31 - 22)) +#define LSDMR_ACTTORW6 (6 << (31 - 22)) +#define LSDMR_BL8 (1 << (31 - 23)) +#define LSDMR_WRC2 (2 << (31 - 27)) +#define LSDMR_WRC4 (0 << (31 - 27)) +#define LSDMR_BUFCMD (1 << (31 - 29)) +#define LSDMR_CL3 (3 << (31 - 31)) + +#define LSDMR_OP_NORMAL (0 << (31 - 4)) +#define LSDMR_OP_ARFRSH (1 << (31 - 4)) +#define LSDMR_OP_SRFRSH (2 << (31 - 4)) +#define LSDMR_OP_MRW (3 << (31 - 4)) +#define LSDMR_OP_PRECH (4 << (31 - 4)) +#define LSDMR_OP_PCHALL (5 << (31 - 4)) +#define LSDMR_OP_ACTBNK (6 << (31 - 4)) +#define LSDMR_OP_RWINV (7 << (31 - 4)) + /* LTESR - Transfer Error Status Register */ #define LTESR_BM 0x80000000 -- 1.5.6.6

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[U-Boot] [PATCH] drivers/net/tsec.c - mii_parse_sr does not wait for auto-negotiation completion bug fix
by Michael Zaidman 26 Mar '09

26 Mar '09

drivers/net/tsec.c - mii_parse_sr does not wait for auto-negotiation completion bug fix In the case when the MIIM_STATUS_LINK is 0 i.e. link is down and this is the situation immediately after power up, the code of awaiting for auto-negotiation completion now will be executed. Signed-off-by: Michael Zaidman <michael.zaidman(a)gmail.com> --- drivers/net/tsec.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 399116f..54279ca 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -363,7 +363,7 @@ uint mii_parse_sr(uint mii_reg, struct tsec_private * priv) * (ie - we're capable and it's not done) */ mii_reg = read_phy_reg(priv, MIIM_STATUS); - if ((mii_reg & MIIM_STATUS_LINK) && (mii_reg & PHY_BMSR_AUTN_ABLE) + if (!(mii_reg & MIIM_STATUS_LINK) && (mii_reg & PHY_BMSR_AUTN_ABLE) && !(mii_reg & PHY_BMSR_AUTN_COMP)) { int i = 0;

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[U-Boot] Please pull u-boot-ppc4xx
by Stefan Roese 26 Mar '09

26 Mar '09

The following changes since commit 33e88c557b29c84c52039ba05993fa70fe62afe3: Jon Smirl (1): mpc5200: suppress printf until console initialized are available in the git repository at: git://www.denx.de/git/u-boot-ppc4xx.git master Stefan Roese (1): ppc4xx: Sequoia: Fix TLB reassignment in NAND booting code board/amcc/sequoia/init.S | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

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[U-Boot] AT91 Pull Request
by Jean-Christophe PLAGNIOL-VILLARD 26 Mar '09

26 Mar '09

Hi Wolfgang, Please pull The following changes since commit ee1702d75a30d076139d1841383a1fa7220a0e11: Wolfgang Denk (1): Merge branch 'next' of ../next are available in the git repository at: git://git.denx.de/u-boot-at91.git master Jean-Christophe PLAGNIOL-VILLARD (10): at91sam9/at91cap: move common serial initialisation to cpu at91sam9/at91cap: move common spi initialisation to cpu at91sam9/at91cap: move common led management to cpu at91sam9/at91cap: move common usb host initialisation to cpu at91sam9/at91cap: move common macb initialisation to cpu atmel/at91/boards: compile dataflash partition only when dataflash is at91sam9/at91cap: move nand drivers to drivers/mtd/nand at91sam9xeek: fix soc name cmc_pu2: fix misc_init_r prototype cmc_pu2: fix implicit declaration of function 'eth_setenv_enetaddr' Nicolas Ferre (1): at91: Support for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC. MAKEALL | 1 + Makefile | 16 +++- board/afeb9260/Makefile | 1 - board/afeb9260/afeb9260.c | 72 ++--------------- board/atmel/at91cap9adk/Makefile | 3 +- board/atmel/at91cap9adk/at91cap9adk.c | 71 ++-------------- board/atmel/at91cap9adk/led.c | 46 ++--------- board/atmel/at91cap9adk/nand.c | 72 ---------------- board/atmel/at91sam9260ek/Makefile | 3 +- board/atmel/at91sam9260ek/at91sam9260ek.c | 88 +++----------------- board/atmel/at91sam9260ek/led.c | 31 +------ board/atmel/at91sam9260ek/nand.c | 78 ----------------- board/atmel/at91sam9261ek/Makefile | 3 +- board/atmel/at91sam9261ek/at91sam9261ek.c | 50 +---------- board/atmel/at91sam9261ek/led.c | 47 ++--------- board/atmel/at91sam9261ek/nand.c | 78 ----------------- board/atmel/at91sam9263ek/Makefile | 3 +- board/atmel/at91sam9263ek/at91sam9263ek.c | 85 ++----------------- board/atmel/at91sam9263ek/led.c | 46 ++--------- board/atmel/at91sam9263ek/nand.c | 78 ----------------- board/atmel/at91sam9rlek/Makefile | 3 +- board/atmel/at91sam9rlek/at91sam9rlek.c | 50 +---------- board/atmel/at91sam9rlek/led.c | 46 ++--------- board/atmel/at91sam9rlek/nand.c | 78 ----------------- board/cmc_pu2/load_sernum_ethaddr.c | 9 ++- cpu/arm926ejs/at91/Makefile | 32 +++++++- cpu/arm926ejs/at91/at91cap9_macb.c | 54 ++++++++++++ cpu/arm926ejs/at91/at91cap9_serial.c | 76 +++++++++++++++++ cpu/arm926ejs/at91/at91cap9_spi.c | 75 +++++++++++++++++ cpu/arm926ejs/at91/at91sam9260_macb.c | 63 ++++++++++++++ cpu/arm926ejs/at91/at91sam9260_serial.c | 76 +++++++++++++++++ cpu/arm926ejs/at91/at91sam9260_spi.c | 75 +++++++++++++++++ cpu/arm926ejs/at91/at91sam9261_serial.c | 76 +++++++++++++++++ cpu/arm926ejs/at91/at91sam9261_spi.c | 75 +++++++++++++++++ cpu/arm926ejs/at91/at91sam9263_macb.c | 54 ++++++++++++ cpu/arm926ejs/at91/at91sam9263_serial.c | 76 +++++++++++++++++ cpu/arm926ejs/at91/at91sam9263_spi.c | 75 +++++++++++++++++ cpu/arm926ejs/at91/at91sam9263_usb.c | 35 ++++++++ cpu/arm926ejs/at91/at91sam9rl_serial.c | 76 +++++++++++++++++ cpu/arm926ejs/at91/at91sam9rl_spi.c | 52 ++++++++++++ cpu/arm926ejs/at91/led.c | 64 ++++++++++++++ cpu/arm926ejs/at91/usb.c | 4 +- doc/README.at91 | 2 +- drivers/mtd/nand/Makefile | 1 + .../nand.c => drivers/mtd/nand/atmel_nand.c | 32 ++++---- drivers/net/macb.c | 4 +- include/asm-arm/arch-at91/at91_common.h | 38 +++++++++ include/asm-arm/arch-at91/hardware.h | 2 +- include/configs/afeb9260.h | 9 ++ include/configs/at91cap9adk.h | 14 +++ include/configs/at91sam9260ek.h | 37 +++++++- include/configs/at91sam9261ek.h | 15 ++++ include/configs/at91sam9263ek.h | 15 ++++ include/configs/at91sam9rlek.h | 15 ++++ 54 files changed, 1288 insertions(+), 992 deletions(-) delete mode 100644 board/atmel/at91cap9adk/nand.c delete mode 100644 board/atmel/at91sam9260ek/nand.c delete mode 100644 board/atmel/at91sam9261ek/nand.c delete mode 100644 board/atmel/at91sam9263ek/nand.c delete mode 100644 board/atmel/at91sam9rlek/nand.c create mode 100644 cpu/arm926ejs/at91/at91cap9_macb.c create mode 100644 cpu/arm926ejs/at91/at91cap9_serial.c create mode 100644 cpu/arm926ejs/at91/at91cap9_spi.c create mode 100644 cpu/arm926ejs/at91/at91sam9260_macb.c create mode 100644 cpu/arm926ejs/at91/at91sam9260_serial.c create mode 100644 cpu/arm926ejs/at91/at91sam9260_spi.c create mode 100644 cpu/arm926ejs/at91/at91sam9261_serial.c create mode 100644 cpu/arm926ejs/at91/at91sam9261_spi.c create mode 100644 cpu/arm926ejs/at91/at91sam9263_macb.c create mode 100644 cpu/arm926ejs/at91/at91sam9263_serial.c create mode 100644 cpu/arm926ejs/at91/at91sam9263_spi.c create mode 100644 cpu/arm926ejs/at91/at91sam9263_usb.c create mode 100644 cpu/arm926ejs/at91/at91sam9rl_serial.c create mode 100644 cpu/arm926ejs/at91/at91sam9rl_spi.c create mode 100644 cpu/arm926ejs/at91/led.c rename board/afeb9260/nand.c => drivers/mtd/nand/atmel_nand.c (72%) create mode 100644 include/asm-arm/arch-at91/at91_common.h Best Regards, J.

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Re: [U-Boot] Coldfire: MCF5271: Periodic HW watchdog petting and sleep function does not work.
by Richard Retanubun 26 Mar '09

26 Mar '09

Richard Retanubun wrote: > Hi TC, > > TC Liew wrote: >> Richard, >> >> Is there a purpose that you used DTIMER 3 but not 1 or 2? FYI: DTIMER3 >> is currently used for system time, DTIMER0 is currently used for >> udelay() in u-boot. >> >> You can change the u-boot 5271's system timer in >> include/asm-m68k/immap.h. >> #define CONFIG_SYS_TMR_BASE (MMAP_DTMR1) >> #define CONFIG_SYS_TMRINTR_NO (INT0_LO_DTMR1) >> #define CONFIG_SYS_TMRINTR_MASK (INTC_IPRL_INT20) >> >> Regards, >> TsiChung > Hi TC, Sorry for the long-delay on this issue, I got tasked with other stuff, but thanks to your hint from the last e-mail, I think I might have found the root-cause to the problem. In include/asm-m68k/immap.h. #ifdef CONFIG_M5271 #include <asm/immap_5271.h> #include <asm/m5271.h> #define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC) #define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CONFIG_SYS_UART_PORT * 0x40)) /* Timer */ #ifdef CONFIG_MCFTMR #define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CONFIG_SYS_TMR_BASE (MMAP_DTMR3) #define CONFIG_SYS_TMRPND_REG (((volatile int0_t *)(CONFIG_SYS_INTR_BASE))->iprl0) #define CONFIG_SYS_TMRINTR_NO (INT0_LO_DTMR3) #define CONFIG_SYS_TMRINTR_MASK (INTC_IPRL_INT22) #define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) #define CONFIG_SYS_TMRINTR_PRI (0) /* Level must include inorder to work */ ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif According to MCF5271 RefMan Rev 2 (07/2006) page 13-12, I think this means that the interrupt, although unmasked, have a level 0, priority 0, which essentially disables it. What should be the proper value? (0x09) will make it level 1, priority 1, is this ok? Or am I chasing the wrong rabbit? Thanks for your time - Richard

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[U-Boot] [PATCH] Coldfire M5271: Activate u-boot system timer interrupt.
by Richard Retanubun 26 Mar '09

26 Mar '09

From abd87852f80b84e77ab264acdb36e7814302b097 Mon Sep 17 00:00:00 2001 From: Richard Retanubun <RichardRetanubun(a)RuggedCom.com> Date: Thu, 26 Mar 2009 15:26:01 -0400 Subject: [PATCH] Coldfire M5271: Activate u-boot system timer interrupt. This patch assigns the u-boot system timer interrupt to interrupt level 3, priority 6. Without this patch the interrupt will be a level 0, priority 0, which disables it and cause u-boot functions that relies on the timer (e.g. sleep command) to never return. Signed-off-by: Richard Retanubun <RichardRetanubun(a)RuggedCom.com> --- include/asm-m68k/immap.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/asm-m68k/immap.h b/include/asm-m68k/immap.h index 93f730f..6a3ef03 100644 --- a/include/asm-m68k/immap.h +++ b/include/asm-m68k/immap.h @@ -149,7 +149,7 @@ #define CONFIG_SYS_TMRINTR_NO (INT0_LO_DTMR3) #define CONFIG_SYS_TMRINTR_MASK (INTC_IPRL_INT22) #define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (0) /* Level must include inorder to work */ +#define CONFIG_SYS_TMRINTR_PRI (0x1E) /* Interrupt level 3, priority 6 */ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -- 1.5.6.5

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[U-Boot] U-Boot's need for MMU
by cmfairfa＠rockwellcollins.com 26 Mar '09

26 Mar '09

Hi, I am wondering what the ramifications of not using the MMU in U-Boot are? I have an MPC8360 (e300 core) where it is capable of disabling the MMU via the MSR[IR] and MSR[DR] bits. Before disabling the MMU, I'm just wondering why U-Boot bothers to set up the MMU on CPU's that providing disabling of the MMU. PS I'm not disabling the MMU just for kicks, there are/may be some program-specific scenarios where I may need to use the option of disabling the MMU. Thanks. Christopher M. Fairfax Sr. Software Engineer Rockwell Collins +1 540-428-3344 +1 540-428-3301 cmfairfa(a)rockwellcollins.com This message contains PRIVILEGED AND PROPRIETARY INFORMATION intended solely for the use of the addressee(s) named above. Any disclosure, distribution, copying or use of the information by others is strictly prohibited. If you have received this message in error, please advise the sender by immediate reply and delete the original message. Thank you.

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