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February 2009
- 181 participants
- 548 discussions

11 Feb '09
Signed-off-by: Heiko Schocher <hs(a)denx.de>
---
cpu/mpc8xx/serial.c | 72 +++++++++++++++++----------------------------------
1 files changed, 24 insertions(+), 48 deletions(-)
diff --git a/cpu/mpc8xx/serial.c b/cpu/mpc8xx/serial.c
index 972f190..664db65 100644
--- a/cpu/mpc8xx/serial.c
+++ b/cpu/mpc8xx/serial.c
@@ -148,12 +148,10 @@ static int smc_init (void)
up->smc_rpbase = 0;
#endif
- /* Disable transmitter/receiver.
- */
+ /* Disable transmitter/receiver. */
sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
- /* Enable SDMA.
- */
+ /* Enable SDMA. */
im->im_siu_conf.sc_sdcr = 1;
/* clear error conditions */
@@ -171,21 +169,19 @@ static int smc_init (void)
#endif
#if defined(CONFIG_8xx_CONS_SMC1)
- /* Use Port B for SMC1 instead of other functions.
- */
+ /* Use Port B for SMC1 instead of other functions. */
cp->cp_pbpar |= 0x000000c0;
cp->cp_pbdir &= ~0x000000c0;
cp->cp_pbodr &= ~0x000000c0;
#else /* CONFIG_8xx_CONS_SMC2 */
# if defined(CONFIG_MPC823) || defined(CONFIG_MPC850)
- /* Use Port A for SMC2 instead of other functions.
- */
+ /* Use Port A for SMC2 instead of other functions. */
ip->iop_papar |= 0x00c0;
ip->iop_padir &= ~0x00c0;
ip->iop_paodr &= ~0x00c0;
# else /* must be a 860 then */
/* Use Port B for SMC2 instead of other functions.
- */
+ */
cp->cp_pbpar |= 0x00000c00;
cp->cp_pbdir &= ~0x00000c00;
cp->cp_pbodr &= ~0x00000c00;
@@ -232,8 +228,7 @@ static int smc_init (void)
rtx->txbd.cbd_bufaddr = (uint) &rtx->txbuf;
rtx->txbd.cbd_sc = 0;
- /* Set up the uart parameters in the parameter ram.
- */
+ /* Set up the uart parameters in the parameter ram. */
up->smc_rbase = dpaddr;
up->smc_tbase = dpaddr+sizeof(cbd_t);
up->smc_rfcr = SMC_EB;
@@ -274,8 +269,7 @@ static int smc_init (void)
smc_setbrg ();
#endif
- /* Make the first buffer the only buffer.
- */
+ /* Make the first buffer the only buffer. */
rtx->txbd.cbd_sc |= BD_SC_WRAP;
rtx->rxbd.cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
@@ -284,9 +278,7 @@ static int smc_init (void)
up->smc_maxidl = CONFIG_SYS_MAXIDLE;
rtx->rxindex = 0;
- /* Initialize Tx/Rx parameters.
- */
-
+ /* Initialize Tx/Rx parameters. */
while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
;
@@ -295,8 +287,7 @@ static int smc_init (void)
while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
;
- /* Enable transmitter/receiver.
- */
+ /* Enable transmitter/receiver. */
sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
return (0);
@@ -325,8 +316,7 @@ smc_putc(const char c)
rtx = (serialbuffer_t *)&cpmp->cp_dpmem[up->smc_rbase];
- /* Wait for last character to go.
- */
+ /* Wait for last character to go. */
rtx->txbuf = c;
rtx->txbd.cbd_datlen = 1;
rtx->txbd.cbd_sc |= BD_SC_READY;
@@ -361,8 +351,7 @@ smc_getc(void)
#endif
rtx = (serialbuffer_t *)&cpmp->cp_dpmem[up->smc_rbase];
- /* Wait for character to show up.
- */
+ /* Wait for character to show up. */
while (rtx->rxbd.cbd_sc & BD_SC_EMPTY)
WATCHDOG_RESET ();
@@ -465,8 +454,7 @@ static int scc_init (void)
}
#endif /* CONFIG_LWMON */
- /* Disable transmitter/receiver.
- */
+ /* Disable transmitter/receiver. */
sp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
#if (SCC_INDEX == 2) && defined(CONFIG_MPC850)
@@ -491,8 +479,7 @@ static int scc_init (void)
ip->iop_pdpar |= ((3 << (2 * SCC_INDEX)));
#endif
- /* Allocate space for two buffer descriptors in the DP ram.
- */
+ /* Allocate space for two buffer descriptors in the DP ram. */
#ifdef CONFIG_SYS_ALLOC_DPRAM
dpaddr = dpram_alloc_align (sizeof(cbd_t)*2 + 2, 8) ;
@@ -500,8 +487,7 @@ static int scc_init (void)
dpaddr = CPM_SERIAL2_BASE ;
#endif
- /* Enable SDMA.
- */
+ /* Enable SDMA. */
im->im_siu_conf.sc_sdcr = 0x0001;
/* Set the physical address of the host memory buffers in
@@ -515,17 +501,14 @@ static int scc_init (void)
tbdf->cbd_bufaddr = ((uint) (rbdf+2)) + 1;
tbdf->cbd_sc = 0;
- /* Set up the baud rate generator.
- */
+ /* Set up the baud rate generator. */
scc_setbrg ();
- /* Set up the uart parameters in the parameter ram.
- */
+ /* Set up the uart parameters in the parameter ram. */
up->scc_genscc.scc_rbase = dpaddr;
up->scc_genscc.scc_tbase = dpaddr+sizeof(cbd_t);
- /* Initialize Tx/Rx parameters.
- */
+ /* Initialize Tx/Rx parameters. */
while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
;
cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SCC, CPM_CR_INIT_TRX) | CPM_CR_FLG;
@@ -556,8 +539,7 @@ static int scc_init (void)
up->scc_char8 = 0x8000;
up->scc_rccm = 0xc0ff;
- /* Set low latency / small fifo.
- */
+ /* Set low latency / small fifo. */
sp->scc_gsmrh = SCC_GSMRH_RFW;
/* Set SCC(x) clock mode to 16x
@@ -566,8 +548,7 @@ static int scc_init (void)
* Wire BRG1 to SCCn
*/
- /* Set UART mode, clock divider 16 on Tx and Rx
- */
+ /* Set UART mode, clock divider 16 on Tx and Rx */
sp->scc_gsmrl &= ~0xF;
sp->scc_gsmrl |=
(SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
@@ -575,20 +556,17 @@ static int scc_init (void)
sp->scc_psmr = 0;
sp->scc_psmr |= SCU_PSMR_CL;
- /* Mask all interrupts and remove anything pending.
- */
+ /* Mask all interrupts and remove anything pending. */
sp->scc_sccm = 0;
sp->scc_scce = 0xffff;
sp->scc_dsr = 0x7e7e;
sp->scc_psmr = 0x3000;
- /* Make the first buffer the only buffer.
- */
+ /* Make the first buffer the only buffer. */
tbdf->cbd_sc |= BD_SC_WRAP;
rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
- /* Enable transmitter/receiver.
- */
+ /* Enable transmitter/receiver. */
sp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
return (0);
@@ -615,8 +593,7 @@ scc_putc(const char c)
tbdf = (cbd_t *)&cpmp->cp_dpmem[up->scc_genscc.scc_tbase];
- /* Wait for last character to go.
- */
+ /* Wait for last character to go. */
buf = (char *)tbdf->cbd_bufaddr;
@@ -653,8 +630,7 @@ scc_getc(void)
rbdf = (cbd_t *)&cpmp->cp_dpmem[up->scc_genscc.scc_rbase];
- /* Wait for character to show up.
- */
+ /* Wait for character to show up. */
buf = (unsigned char *)rbdf->cbd_bufaddr;
while (rbdf->cbd_sc & BD_SC_EMPTY)
--
1.6.0.6
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
2
1

11 Feb '09
This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN.
With this option it is possible to allow the receive
buffer for the SMC on 8xx to be greater then 1. In case
CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the
old version.
When defining CONFIG_SYS_SMC_RXBUFLEN also
CONFIG_SYS_MAXIDLE must be defined to setup the maximum
idle timeout for the SMC.
Signed-off-by: Heiko Schocher <hs(a)denx.de>
---
README | 2 +-
cpu/mpc8xx/serial.c | 94 +++++++++++++++++++++++++++++++--------------------
2 files changed, 58 insertions(+), 38 deletions(-)
diff --git a/README b/README
index fbdccb0..c17f646 100644
--- a/README
+++ b/README
@@ -487,7 +487,7 @@ The following options need to be configured:
- Console Rx buffer length
With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
the maximum receive buffer length for the SMC.
- This option is actual only for 82xx possible.
+ This option is actual only for 82xx and 8xx possible.
If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
must be defined, to setup the maximum idle timeout for
the SMC.
diff --git a/cpu/mpc8xx/serial.c b/cpu/mpc8xx/serial.c
index bd90dcd..972f190 100644
--- a/cpu/mpc8xx/serial.c
+++ b/cpu/mpc8xx/serial.c
@@ -65,6 +65,23 @@ DECLARE_GLOBAL_DATA_PTR;
#endif /* CONFIG_8xx_CONS_SCCx */
+#if !defined(CONFIG_SYS_SMC_RXBUFLEN)
+#define CONFIG_SYS_SMC_RXBUFLEN 1
+#define CONFIG_SYS_MAXIDLE 0
+#else
+#if !defined(CONFIG_SYS_MAXIDLE)
+#error "you must define CONFIG_SYS_MAXIDLE"
+#endif
+#endif
+
+typedef volatile struct serialbuffer {
+ cbd_t rxbd; /* Rx BD */
+ cbd_t txbd; /* Tx BD */
+ uint rxindex; /* index for next character to read */
+ volatile uchar rxbuf[CONFIG_SYS_SMC_RXBUFLEN];/* rx buffers */
+ volatile uchar txbuf; /* tx buffers */
+} serialbuffer_t;
+
static void serial_setdivisor(volatile cpm8xx_t *cp)
{
int divisor=(gd->cpu_clk + 8*gd->baudrate)/16/gd->baudrate;
@@ -113,12 +130,12 @@ static int smc_init (void)
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile smc_t *sp;
volatile smc_uart_t *up;
- volatile cbd_t *tbdf, *rbdf;
volatile cpm8xx_t *cp = &(im->im_cpm);
#if (!defined(CONFIG_8xx_CONS_SMC1)) && (defined(CONFIG_MPC823) || defined(CONFIG_MPC850))
volatile iop8xx_t *ip = (iop8xx_t *)&(im->im_ioport);
#endif
uint dpaddr;
+ volatile serialbuffer_t *rtx;
/* initialize pointers to SMC */
@@ -194,23 +211,26 @@ static int smc_init (void)
*/
#ifdef CONFIG_SYS_ALLOC_DPRAM
- dpaddr = dpram_alloc_align (sizeof(cbd_t)*2 + 2, 8) ;
+ /* allocate
+ * size of struct serialbuffer with bd rx/tx, buffer rx/tx and rx index
+ */
+ dpaddr = dpram_alloc_align((sizeof(serialbuffer_t)), 8);
#else
dpaddr = CPM_SERIAL_BASE ;
#endif
+ rtx = (serialbuffer_t *)&cp->cp_dpmem[dpaddr];
/* Allocate space for two buffer descriptors in the DP ram.
* For now, this address seems OK, but it may have to
* change with newer versions of the firmware.
* damm: allocating space after the two buffers for rx/tx data
*/
- rbdf = (cbd_t *)&cp->cp_dpmem[dpaddr];
- rbdf->cbd_bufaddr = (uint) (rbdf+2);
- rbdf->cbd_sc = 0;
- tbdf = rbdf + 1;
- tbdf->cbd_bufaddr = ((uint) (rbdf+2)) + 1;
- tbdf->cbd_sc = 0;
+ rtx->rxbd.cbd_bufaddr = (uint) &rtx->rxbuf;
+ rtx->rxbd.cbd_sc = 0;
+
+ rtx->txbd.cbd_bufaddr = (uint) &rtx->txbuf;
+ rtx->txbd.cbd_sc = 0;
/* Set up the uart parameters in the parameter ram.
*/
@@ -256,13 +276,13 @@ static int smc_init (void)
/* Make the first buffer the only buffer.
*/
- tbdf->cbd_sc |= BD_SC_WRAP;
- rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
+ rtx->txbd.cbd_sc |= BD_SC_WRAP;
+ rtx->rxbd.cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
- /* Single character receive.
- */
- up->smc_mrblr = 1;
- up->smc_maxidl = 0;
+ /* single/multi character receive. */
+ up->smc_mrblr = CONFIG_SYS_SMC_RXBUFLEN;
+ up->smc_maxidl = CONFIG_SYS_MAXIDLE;
+ rtx->rxindex = 0;
/* Initialize Tx/Rx parameters.
*/
@@ -285,11 +305,10 @@ static int smc_init (void)
static void
smc_putc(const char c)
{
- volatile cbd_t *tbdf;
- volatile char *buf;
volatile smc_uart_t *up;
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
+ volatile serialbuffer_t *rtx;
#ifdef CONFIG_MODEM_SUPPORT
if (gd->be_quiet)
@@ -304,19 +323,16 @@ smc_putc(const char c)
up = (smc_uart_t *) &cpmp->cp_dpmem[up->smc_rpbase];
#endif
- tbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase];
+ rtx = (serialbuffer_t *)&cpmp->cp_dpmem[up->smc_rbase];
/* Wait for last character to go.
*/
-
- buf = (char *)tbdf->cbd_bufaddr;
-
- *buf = c;
- tbdf->cbd_datlen = 1;
- tbdf->cbd_sc |= BD_SC_READY;
+ rtx->txbuf = c;
+ rtx->txbd.cbd_datlen = 1;
+ rtx->txbd.cbd_sc |= BD_SC_READY;
__asm__("eieio");
- while (tbdf->cbd_sc & BD_SC_READY) {
+ while (rtx->txbd.cbd_sc & BD_SC_READY) {
WATCHDOG_RESET ();
__asm__("eieio");
}
@@ -333,49 +349,53 @@ smc_puts (const char *s)
static int
smc_getc(void)
{
- volatile cbd_t *rbdf;
- volatile unsigned char *buf;
volatile smc_uart_t *up;
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
- unsigned char c;
+ volatile serialbuffer_t *rtx;
+ unsigned char c;
up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
#ifdef CONFIG_SYS_SMC_UCODE_PATCH
up = (smc_uart_t *) &cpmp->cp_dpmem[up->smc_rpbase];
#endif
-
- rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
+ rtx = (serialbuffer_t *)&cpmp->cp_dpmem[up->smc_rbase];
/* Wait for character to show up.
*/
- buf = (unsigned char *)rbdf->cbd_bufaddr;
-
- while (rbdf->cbd_sc & BD_SC_EMPTY)
+ while (rtx->rxbd.cbd_sc & BD_SC_EMPTY)
WATCHDOG_RESET ();
- c = *buf;
- rbdf->cbd_sc |= BD_SC_EMPTY;
+ /* the characters are read one by one,
+ * use the rxindex to know the next char to deliver
+ */
+ c = *(unsigned char *) (rtx->rxbd.cbd_bufaddr+rtx->rxindex);
+ rtx->rxindex++;
+ /* check if all char are readout, then make prepare for next receive */
+ if (rtx->rxindex >= rtx->rxbd.cbd_datlen) {
+ rtx->rxindex = 0;
+ rtx->rxbd.cbd_sc |= BD_SC_EMPTY;
+ }
return(c);
}
static int
smc_tstc(void)
{
- volatile cbd_t *rbdf;
volatile smc_uart_t *up;
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
+ volatile serialbuffer_t *rtx;
up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
#ifdef CONFIG_SYS_SMC_UCODE_PATCH
up = (smc_uart_t *) &cpmp->cp_dpmem[up->smc_rpbase];
#endif
- rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
+ rtx = (serialbuffer_t *)&cpmp->cp_dpmem[up->smc_rbase];
- return(!(rbdf->cbd_sc & BD_SC_EMPTY));
+ return !(rtx->rxbd.cbd_sc & BD_SC_EMPTY);
}
struct serial_device serial_smc_device =
--
1.6.0.6
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
2
1
V3 NAND_SPL support for phycore imx31
This patch is applied on U-Boot v2008.10 release.
Changelog:
* Added infinitive loop for ecc-error cases;
* Correct to code-style;
* Was changed mx31_nand_data_output function for support 2-k
NAND page chips (Magnus Lilja proposal);
* Was changed name of CFG_NAND_PAGE_COUNT by
CFG_NAND_PAGES_PER_BLOCK;
> V2 NAND_SPL support for phycore imx31
>
> Changelog:
>
> * Added bad block verify & skip;
> * Correct to code-style;
> * Added few comments;
>> V1 nand booting support (SPL) for phyCORE-i.MX31
>>
>> This patch allows Phytec phyCORE-i.MX31 based
>> system to boot from embed NAND-flash memory.
>> It not add support for NAND cmd and/or driver
>> for U-BOOT, it is only SPL for U-BOOT. For NAND
>> support in U-BOOT I give refer to Magnus Lilja's
>> aug/2008 patch series for PDK/Litekit boards.
>> ("[U-Boot] [PATCH v3 4/6] i.MX31: Add i.MX31
>> NAND Flash Controller driver."; MID 1219998982-
>> 21289-5-git-send-email-lilja.magnus(a)gmail.com)
>>
>> Some note: by default, Phytec phyCORE-i.MX31
>> board (pcm-037 on pcm-970) is not suitable
>> for nand-bootloading, because of SW5 switchers
>> block haven't appropriate modes(8-bit, 2k page
>> or 16-bit, 512B page) for BOOTPINS[4:0] and
>> nand-flash(8-bit mode, 512B page) contemporary.
>> There is require to make RESOLDER for really
>> nand-booting either BOOTPIN state or JN1/2 and
>> RN41/42.
>>
>> This nand-spl work with 8-bit, 512B page size nand-flash.
Signed-off-by: Maxim Artamonov <scn1874 at yandex.ru>
---
MAKEALL | 1 +
Makefile | 9 ++-
board/imx31_phycore/config.mk | 10 ++
board/imx31_phycore/lowlevel_init.S | 27 ++++-
board/imx31_phycore/u-boot-nand.lds | 62 ++++++++++
cpu/arm1136/start.S | 36 ++++--
include/asm-arm/arch-mx31/mx31-regs.h | 96 +++++++++++++++
include/configs/imx31_phycore.h | 33 +++++
nand_spl/board/imx31_phycore/Makefile | 95 +++++++++++++++
nand_spl/board/imx31_phycore/config.mk | 33 +++++
nand_spl/board/imx31_phycore/u-boot.lds | 65 ++++++++++
nand_spl/nand_boot_mx31.c | 200 +++++++++++++++++++++++++++++++
12 files changed, 656 insertions(+), 11 deletions(-)
create mode 100644 board/imx31_phycore/u-boot-nand.lds
create mode 100644 nand_spl/board/imx31_phycore/Makefile
create mode 100644 nand_spl/board/imx31_phycore/config.mk
create mode 100644 nand_spl/board/imx31_phycore/u-boot.lds
create mode 100644 nand_spl/nand_boot_mx31.c
diff --git a/MAKEALL b/MAKEALL
index 9ccb9ac..1f639a8 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -522,6 +522,7 @@ LIST_ARM11=" \
apollon \
imx31_litekit \
imx31_phycore \
+ imx31_phycore_nand \
mx31ads \
smdk6400 \
"
diff --git a/Makefile b/Makefile
index 58b8331..7519dfe 100644
--- a/Makefile
+++ b/Makefile
@@ -353,7 +353,7 @@ $(NAND_SPL): $(VERSION_FILE) $(obj)include/autoconf.mk
$(MAKE) -C nand_spl/board/$(BOARDDIR) all
$(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
- cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
+ cat $(obj)nand_spl/u-boot-spl-aligned.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
$(ONENAND_IPL): $(VERSION_FILE) $(obj)include/autoconf.mk
$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
@@ -2805,6 +2805,13 @@ imx31_litekit_config : unconfig
imx31_phycore_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 imx31_phycore NULL mx31
+imx31_phycore_nand_config : unconfig
+ @mkdir -p $(obj)include $(obj)board/imx31_phycore
+ @mkdir -p $(obj)nand_spl/board/imx31_phycore
+ @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a imx31_phycore arm arm1136 imx31_phycore NULL mx31
+ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+
mx31ads_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
diff --git a/board/imx31_phycore/config.mk b/board/imx31_phycore/config.mk
index d34dc02..412defc 100644
--- a/board/imx31_phycore/config.mk
+++ b/board/imx31_phycore/config.mk
@@ -1 +1,11 @@
+#
+# (C) Copyright 2008
+# was changed by Maxim Artamonov, <scn1874 at yandex.ru>
+#
+
+ifndef CONFIG_NAND_SPL
TEXT_BASE = 0x87f00000
+else
+TEXT_BASE = 0x87ec0000
+endif
+
diff --git a/board/imx31_phycore/lowlevel_init.S b/board/imx31_phycore/lowlevel_init.S
index c5d6eb0..afae317 100644
--- a/board/imx31_phycore/lowlevel_init.S
+++ b/board/imx31_phycore/lowlevel_init.S
@@ -1,5 +1,7 @@
/*
- *
+ * (C) Copyright 2008
+ * Maxim Artamonov, <scn1874 at yandex.ru>
+ *
* (c) 2007 Pengutronix, Sascha Hauer <s.hauer(a)pengutronix.de>
*
* See file CREDITS for list of people who contributed to this
@@ -43,6 +45,20 @@
bcs 1b
.endm
+#ifdef CONFIG_NAND_SPL
+/* somewhat macro to reduce bin size for CONFIG_NAND_SPL*/
+.macro FILLREGS begreg, val, count, step
+ ldr r2, =\begreg
+ ldr r3, =\val
+ ldr r4, =\count
+2:
+ str r3, [r2]
+ add r2, r2, #\step
+ subs r4, r4, #1
+ bcs 2b
+.endm
+#endif
+
.globl lowlevel_init
lowlevel_init:
@@ -60,10 +76,18 @@ lowlevel_init:
REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(0x43) | PLL_MFI(12) | PLL_MFN(1)
+#ifdef CONFIG_NAND_SPL
+ FILLREGS 0x43FAC26C, 0, 0x3, 0x4
+#else
REG 0x43FAC26C, 0 /* SDCLK */
REG 0x43FAC270, 0 /* CAS */
REG 0x43FAC274, 0 /* RAS */
+#endif /* CONFIG_NAND_SPL */
REG 0x43FAC27C, 0x1000 /* CS2 (CSD0) */
+
+#ifdef CONFIG_NAND_SPL
+ FILLREGS 0x43FAC284, 0, 0x17, 0x4
+#else
REG 0x43FAC284, 0 /* DQM3 */
REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) */
REG 0x43FAC28C, 0
@@ -87,6 +111,7 @@ lowlevel_init:
REG 0x43FAC2D4, 0
REG 0x43FAC2D8, 0
REG 0x43FAC2DC, 0
+#endif /* CONFIG_NAND_SPL */
REG 0xB8001010, 0x00000004
REG 0xB8001004, 0x006ac73a
REG 0xB8001000, 0x92100000
diff --git a/board/imx31_phycore/u-boot-nand.lds b/board/imx31_phycore/u-boot-nand.lds
new file mode 100644
index 0000000..bd09a8d
--- /dev/null
+++ b/board/imx31_phycore/u-boot-nand.lds
@@ -0,0 +1,62 @@
+/*
+ * (C) Copyright 2008
+ * Maxim Artamonov, <scn1874 at yandex.ru>
+ *
+ * January 2004 - Changed to support H4 device
+ * Copyright (c) 2004 Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm1136/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
index 51b664d..596efe9 100644
--- a/cpu/arm1136/start.S
+++ b/cpu/arm1136/start.S
@@ -1,6 +1,9 @@
/*
* armboot - Startup Code for OMP2420/ARM1136 CPU-core
*
+ *
+ * Copyright (c) 2008 Maxim Artamonov, <scn1874 at yandex.ru>
+ *
* Copyright (c) 2004 Texas Instruments <r-woodruff2(a)ti.com>
*
* Copyright (c) 2001 Marius Gr�ger <mag(a)sysgo.de>
@@ -32,6 +35,15 @@
#include <version.h>
.globl _start
_start: b reset
+#ifdef CONFIG_NAND_SPL
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+#else
#ifdef CONFIG_ONENAND_IPL
ldr pc, _hang
ldr pc, _hang
@@ -68,6 +80,7 @@ _irq: .word irq
_fiq: .word fiq
_pad: .word 0x12345678 /* now 16*4=64 */
#endif /* CONFIG_ONENAND_IPL */
+#endif /* CONFIG_NAND_SPL */
.global _end_vect
_end_vect:
@@ -156,9 +169,9 @@ relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
cmp r0, r1 /* don't reloc during debug */
-#ifndef CONFIG_ONENAND_IPL
+#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
beq stack_setup
-#endif /* CONFIG_ONENAND_IPL */
+#endif /* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/
ldr r2, _armboot_start
ldr r3, _bss_start
@@ -175,7 +188,7 @@ copy_loop:
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
-#ifdef CONFIG_ONENAND_IPL
+#if defined(CONFIG_ONENAND_IPL) || defined (CONFIG_NAND_SPL)
sub sp, r0, #128 /* leave 32 words for abort-stack */
#else
sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
@@ -184,14 +197,14 @@ stack_setup:
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
-#endif /* CONFIG_ONENAND_IPL */
+#endif /* CONFIG_ONENAND_IPL || CONFIG_NAND_SPL*/
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
-#ifndef CONFIG_ONENAND_IPL
+#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
@@ -200,12 +213,15 @@ clbss_l:str r2, [r0] /* clear loop... */
ldr pc, _start_armboot
+#ifdef CONFIG_NAND_SPL
+_start_armboot: .word nand_boot
+#else
#ifdef CONFIG_ONENAND_IPL
_start_armboot: .word start_oneboot
#else
_start_armboot: .word start_armboot
-#endif
-
+#endif /* CONFIG_ONENAND_IPL */
+#endif /* CONFIG_NAND_SPL */
/*
*************************************************************************
@@ -244,7 +260,7 @@ cpu_init_crit:
mov lr, ip /* restore link */
mov pc, lr /* back to my caller */
-#ifndef CONFIG_ONENAND_IPL
+#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
/*
*************************************************************************
*
@@ -357,11 +373,12 @@ cpu_init_crit:
.macro get_fiq_stack @ setup FIQ stack
ldr sp, FIQ_STACK_START
.endm
-#endif /* CONFIG_ONENAND_IPL */
+#endif /* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/
/*
* exception handlers
*/
+#ifndef CONFIG_NAND_SPL
#ifdef CONFIG_ONENAND_IPL
.align 5
do_hang:
@@ -436,3 +453,4 @@ arm1136_cache_flush:
mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
mov pc, lr @ back to caller
#endif /* CONFIG_ONENAND_IPL */
+#endif /* !CONFIG_NAND_SPL*/
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h
index b04a718..78825f5 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -168,4 +168,100 @@
#define CS5_BASE 0xB6000000
#define PCMCIA_MEM_BASE 0xC0000000
+/*
+ * NAND controller
+ */
+#define NFC_BASE_ADDR 0xB8000000
+
+/*
+ * Addresses for NFC registers
+ */
+#define NFC_BUF_SIZE (*((volatile u16 *)(NFC_BASE_ADDR + 0xE00)))
+#define NFC_BUF_ADDR (*((volatile u16 *)(NFC_BASE_ADDR + 0xE04)))
+#define NFC_FLASH_ADDR (*((volatile u16 *)(NFC_BASE_ADDR + 0xE06)))
+#define NFC_FLASH_CMD (*((volatile u16 *)(NFC_BASE_ADDR + 0xE08)))
+#define NFC_CONFIG (*((volatile u16 *)(NFC_BASE_ADDR + 0xE0A)))
+#define NFC_ECC_STATUS_RESULT (*((volatile u16 *)(NFC_BASE_ADDR + 0xE0C)))
+#define NFC_RSLTMAIN_AREA (*((volatile u16 *)(NFC_BASE_ADDR + 0xE0E)))
+#define NFC_RSLTSPARE_AREA (*((volatile u16 *)(NFC_BASE_ADDR + 0xE10)))
+#define NFC_WRPROT (*((volatile u16 *)(NFC_BASE_ADDR + 0xE12)))
+#define NFC_UNLOCKSTART_BLKADDR (*((volatile u16 *)(NFC_BASE_ADDR + 0xE14)))
+#define NFC_UNLOCKEND_BLKADDR (*((volatile u16 *)(NFC_BASE_ADDR + 0xE16)))
+#define NFC_NF_WRPRST (*((volatile u16 *)(NFC_BASE_ADDR + 0xE18)))
+#define NFC_CONFIG1 (*((volatile u16 *)(NFC_BASE_ADDR + 0xE1A)))
+#define NFC_CONFIG2 (*((volatile u16 *)(NFC_BASE_ADDR + 0xE1C)))
+
+/*
+ * Addresses for NFC RAM BUFFER Main area 0
+ */
+#define MAIN_AREA0 (volatile u16 *)(NFC_BASE_ADDR + 0x000)
+#define MAIN_AREA1 (volatile u16 *)(NFC_BASE_ADDR + 0x200)
+#define MAIN_AREA2 (volatile u16 *)(NFC_BASE_ADDR + 0x400)
+#define MAIN_AREA3 (volatile u16 *)(NFC_BASE_ADDR + 0x600)
+
+/*
+ * Addresses for NFC SPARE BUFFER Spare area 0
+ */
+#define SPARE_AREA0 (volatile u16 *)(NFC_BASE_ADDR + 0x800)
+#define SPARE_AREA1 (volatile u16 *)(NFC_BASE_ADDR + 0x810)
+#define SPARE_AREA2 (volatile u16 *)(NFC_BASE_ADDR + 0x820)
+#define SPARE_AREA3 (volatile u16 *)(NFC_BASE_ADDR + 0x830)
+
+/*
+ * Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register for Command
+ * operation
+ */
+#define NFC_CMD 0x1
+
+/*
+ * Set INT to 0, FADD to 1, rest to 0 in NFC_CONFIG2 Register for Address
+ * operation
+ */
+#define NFC_ADDR 0x2
+
+/*
+ * Set INT to 0, FDI to 1, rest to 0 in NFC_CONFIG2 Register for Input
+ * operation
+ */
+#define NFC_INPUT 0x4
+
+/*
+ * Set INT to 0, FDO to 001, rest to 0 in NFC_CONFIG2 Register for Data
+ * Output operation
+ */
+#define NFC_OUTPUT 0x8
+
+/*
+ * Set INT to 0, FD0 to 010, rest to 0 in NFC_CONFIG2 Register for Read ID
+ * operation
+ */
+#define NFC_ID 0x10
+
+/*
+ * Set INT to 0, FDO to 100, rest to 0 in NFC_CONFIG2 Register for Read
+ * Status operation
+ */
+#define NFC_STATUS 0x20
+
+/*
+ * Set INT to 1, rest to 0 in NFC_CONFIG2 Register for Read Status
+ * operation
+ */
+#define NFC_INT 0x8000
+
+#define NFC_SP_EN (1 << 2)
+#define NFC_ECC_EN (1 << 3)
+#define NFC_INT_MSK (1 << 4)
+#define NFC_BIG (1 << 5)
+#define NFC_RST (1 << 6)
+#define NFC_CE (1 << 7)
+#define NFC_ONE_CYCLE (1 << 8)
+
+/*
+ * NFMS bit in RCSR register for pagesize of nandflash
+ */
+#define NFMS (*((volatile u32 *)CCM_RCSR))
+#define NFMS_BIT 30
+
#endif /* __ASM_ARCH_MX31_REGS_H */
+
diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h
index 1540203..44ffaf3 100644
--- a/include/configs/imx31_phycore.h
+++ b/include/configs/imx31_phycore.h
@@ -1,4 +1,7 @@
/*
+ * (C) Copyright 2008
+ * Maxim Artamonov, <scn1874 at yandex.ru>
+ *
* (C) Copyright 2004
* Texas Instruments.
* Richard Woodruff <r-woodruff2(a)ti.com>
@@ -34,6 +37,11 @@
#define CONFIG_MX31_HCLK_FREQ 26000000
#define CONFIG_MX31_CLK32 32000
+#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_RELOCATE_UBOOT
+#endif
+
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
@@ -172,6 +180,31 @@
#define CFG_FLASH_ERASE_TOUT (100*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (100*CFG_HZ) /* Timeout for Flash Write */
+/*-----------------------------------------------------------------------
+ * NAND flash
+ */
+
+#define NAND_MAX_CHIPS 1
+#define CFG_MAX_NAND_DEVICE 1
+#define CFG_NAND_BASE 0x40000000
+
+/*
+ * Because of small buffer size of NFC in iMX31, SPL has to fit into 2kB.
+ */
+
+/*CFG_NAND_U_BOOT_OFFS and CFG_NAND_U_BOOT_SIZE must be align to full pages*/
+#define CFG_NAND_U_BOOT_OFFS 0x800
+#define CFG_NAND_U_BOOT_SIZE 0x30000
+#define CFG_NAND_U_BOOT_DST 0x87f00000 /* Load big U-Boot to this addr */
+#define CFG_NAND_U_BOOT_START CFG_NAND_U_BOOT_DST /* Start big U-Boot from */
+#define CFG_NAND_SPL_DST CFG_NAND_U_BOOT_DST-0x40000 /* Relocate NAND_SPL to this adress*/
+
+#define CFG_NAND_PAGE_SIZE 0x200
+#define CFG_NAND_BLOCK_SIZE 0x4000
+#define CFG_NAND_PAGES_PER_BLOCK 0x20
+/*for NAND_SPL*/
+#define CFG_NAND_CHIP_SIZE 0x4000000
+
/*
* JFFS2 partitions
*/
diff --git a/nand_spl/board/imx31_phycore/Makefile b/nand_spl/board/imx31_phycore/Makefile
new file mode 100644
index 0000000..0aabea3
--- /dev/null
+++ b/nand_spl/board/imx31_phycore/Makefile
@@ -0,0 +1,95 @@
+#
+# (C) Copyright 2008
+# Maxim Artamonov, <scn1874 at yandex.ru>
+#
+# (C) Copyright 2006-2007
+# Stefan Roese, DENX Software Engineering, sr(a)denx.de.
+#
+# (C) Copyright 2008
+# Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+CONFIG_NAND_SPL = y
+
+include $(TOPDIR)/config.mk
+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+AFLAGS += -DCONFIG_NAND_SPL
+CFLAGS += -DCONFIG_NAND_SPL
+
+SOBJS = start.o lowlevel_init.o
+COBJS = nand_boot_mx31.o
+
+SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS := $(SOBJS) $(COBJS)
+LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+
+nandobj := $(OBJTREE)/nand_spl/
+
+ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-aligned.bin
+
+all: $(obj).depend $(ALL)
+
+$(nandobj)u-boot-spl-aligned.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(nandobj)u-boot-spl: $(OBJS)
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+ -Map $(nandobj)u-boot-spl.map \
+ -o $(nandobj)u-boot-spl
+
+# create symbolic links for common files
+
+# from cpu directory
+$(obj)start.S:
+ @rm -f $@
+ @ln -s $(TOPDIR)/cpu/arm1136/start.S $@
+
+# from board directory
+$(obj)lowlevel_init.S:
+ @rm -f $@
+ @ln -s $(TOPDIR)/board/imx31_phycore/lowlevel_init.S $@
+
+# from nand_spl directory
+$(obj)nand_boot_mx31.c:
+ @rm -f $@
+ @ln -s $(TOPDIR)/nand_spl/nand_boot_mx31.c $@
+
+#########################################################################
+
+$(obj)%.o: $(obj)%.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o: $(obj)%.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/nand_spl/board/imx31_phycore/config.mk b/nand_spl/board/imx31_phycore/config.mk
new file mode 100644
index 0000000..4c271c5
--- /dev/null
+++ b/nand_spl/board/imx31_phycore/config.mk
@@ -0,0 +1,33 @@
+#
+# (C) Copyright 2008
+# Maxim Artamonov, <scn1874 at yandex.ru>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+# phyCORE-i.MX31 - PHYTEC’s phyCORE Single Board Computer module
+
+# TEXT_BASE for SPL: = CFG_NAND_U_BOOT_DST-0x40000 is set in board/imx31_phycore/config.mk
+
+# PAD_TO used to generate a 2kByte binary needed for the combined image
+# -> PAD_TO = TEXT_BASE + 2048
+PAD_TO := $(shell expr $$[$(TEXT_BASE) + 2048])
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
diff --git a/nand_spl/board/imx31_phycore/u-boot.lds b/nand_spl/board/imx31_phycore/u-boot.lds
new file mode 100644
index 0000000..d25abf8
--- /dev/null
+++ b/nand_spl/board/imx31_phycore/u-boot.lds
@@ -0,0 +1,65 @@
+/*
+ *
+ * (C) Copyright 2008
+ * Maxim Artamonov, <scn1874 at yandex.ru>
+ *
+ * January 2004 - Changed to support H4 device
+ * Copyright (c) 2004 Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ start.o (.text)
+ lowlevel_init.o (.text)
+ nand_boot_mx31.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/nand_spl/nand_boot_mx31.c b/nand_spl/nand_boot_mx31.c
new file mode 100644
index 0000000..be22d18
--- /dev/null
+++ b/nand_spl/nand_boot_mx31.c
@@ -0,0 +1,200 @@
+/*
+ * (C) Copyright 2008
+ * Maxim Artamonov, <scn1874 at yandex.ru>
+ *
+ * (C) Copyright 2006-2008
+ * Stefan Roese, DENX Software Engineering, sr(a)denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <nand.h>
+#include <asm-arm/arch/mx31-regs.h>
+
+static void mx31_wait_ready(void)
+{
+ while (1) {
+ if (NFC_CONFIG2 & NFC_INT) {
+ NFC_CONFIG2 = NFC_CONFIG2 & (~NFC_INT);/* int flag reset */
+ break;
+ }
+ }
+}
+
+static void mx31_nand_init(void)
+{
+ /* unlocking RAM Buff */
+ NFC_CONFIG = 0x2;
+
+ /* hardware ECC checking and correct */
+ NFC_CONFIG1 = NFC_ECC_EN;
+}
+
+static void mx31_nand_command(unsigned short command)
+{
+ NFC_FLASH_CMD = command;
+ NFC_CONFIG2 = NFC_CMD;
+ mx31_wait_ready();
+}
+
+static void mx31_nand_page_address(unsigned int page_address)
+{
+ unsigned int page_count;
+
+ NFC_FLASH_ADDR = 0x00;
+ NFC_CONFIG2 = NFC_ADDR;
+ mx31_wait_ready();
+
+ /* code only for 2kb flash */
+ if (CFG_NAND_PAGE_SIZE == 0x800){
+ NFC_FLASH_ADDR = 0x00;
+ NFC_CONFIG2 = NFC_ADDR;
+ mx31_wait_ready();
+ };
+
+ page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
+
+ if (page_address <= page_count){
+ page_count--;/* transform 0x01000000 to 0x00ffffff */
+ do {
+ NFC_FLASH_ADDR = (unsigned short)(page_address & 0xff);
+ NFC_CONFIG2 = NFC_ADDR;
+ mx31_wait_ready();
+ page_address = page_address >> 8;
+ page_count = page_count >> 8;
+ } while (page_count);
+ }
+}
+
+static void mx31_nand_data_output(void)
+{
+ int i;
+
+ /*
+ * The NAND controller requires four output commands for
+ * large page devices.
+ */
+ for (i = 0; i < (CFG_NAND_PAGE_SIZE / 512); i++) {
+ NFC_CONFIG1 = NFC_ECC_EN;
+ NFC_BUF_ADDR = i; /* read in i:th buffer */
+ NFC_CONFIG2 = NFC_OUTPUT;
+ mx31_wait_ready();
+ }
+}
+
+static int mx31_nand_check_ecc(void)
+{
+ unsigned short ecc_status_registr;
+
+ ecc_status_registr = NFC_ECC_STATUS_RESULT;
+
+ if (ecc_status_registr != 0)
+ return 1;/* error */
+ return 0;
+}
+
+static int mx31_read_page(unsigned int page_address, unsigned char *buf)
+{
+ int i;
+ volatile u32 *p1, *p2, a;
+
+ mx31_nand_init ();
+ NFC_BUF_ADDR = 0; /* read in first 0 buffer */
+ mx31_nand_command (NAND_CMD_READ0);
+ mx31_nand_page_address (page_address);
+
+ if (CFG_NAND_CHIP_SIZE >= 0x08000000)
+ mx31_nand_command (NAND_CMD_READSTART);
+
+ mx31_nand_data_output ();/* fill the main buffer 0 */
+
+ if (mx31_nand_check_ecc ())
+ while (1) {
+ /* hang-loop in case of ecc-error */
+ }
+
+ p1 = (u32 *)MAIN_AREA0;
+ p2 = (u32 *)buf;
+
+ /* main copy loop from NAND-buffer to SDRAM memory */
+ for (i=0; i < (CFG_NAND_PAGE_SIZE / 4); i++) {
+ *p2 = *p1;
+ p1++;
+ p2++;
+ }
+
+ p1 = (u32 *)SPARE_AREA0;
+
+ /* it is hardware specific code for 8-bit 512 B NAND-flash spare area */
+ p1++;
+ a = *p1;
+ a = (a & 0x0000ff00) >> 8;
+
+ if (a != 0xff) /* bad block marker verify */
+ return 1;/* potential bad block */
+
+ return 0;
+}
+
+static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
+{
+ int i, bb;
+
+ mx31_nand_init ();
+
+ /* convert from to page number */
+ from = from / CFG_NAND_PAGE_SIZE;
+
+ i = 0;
+
+ while (i < (size/CFG_NAND_PAGE_SIZE)) {
+
+ if ((from*CFG_NAND_PAGE_SIZE) >= CFG_NAND_CHIP_SIZE)
+ return 2;/* memory segment violation */
+
+ bb = mx31_read_page (from, buf);
+
+ /* checking first page of each block */
+ /* if this page has bb marker, then skip whole block */
+ if ((!(from % CFG_NAND_PAGES_PER_BLOCK)) && bb) {
+ from = from + CFG_NAND_PAGES_PER_BLOCK;
+ }
+ else {
+ i++;
+ from++;
+ buf = buf + CFG_NAND_PAGE_SIZE;
+ }
+ }
+ return 0;
+}
+
+/*
+ * The main entry for NAND booting. It's necessary that SDRAM is already
+ * configured and available since this code loads the main U-Boot image
+ * from NAND into SDRAM and starts it from there.
+ */
+void nand_boot(void)
+{
+ __attribute__((noreturn)) void (*uboot)(void);
+
+ /* CFG_NAND_U_BOOT_OFFS and CFG_NAND_U_BOOT_SIZE must */
+ /* be align to full pages */
+ nand_load (CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE, \
+ (uchar *)CFG_NAND_U_BOOT_DST);
+
+ uboot = (void *)CFG_NAND_U_BOOT_START;
+ uboot ();
+}
--
1.5.2.4
4
3

[U-Boot] [PATCH] common/{hush, kgdb, serial}.c: build by COBJS-$(...) in Makefile
by Mike Frysinger 11 Feb '09
by Mike Frysinger 11 Feb '09
11 Feb '09
Move global '#ifdef CONFIG_xxx .... #endif' out of the .c files and into
the COBJS-$(CONFIG_xxx) in the Makefile. Also delete unused var in kgdb
code in the process.
Signed-off-by: Mike Frysinger <vapier(a)gentoo.org>
---
common/Makefile | 6 +++---
common/hush.c | 2 --
common/kgdb.c | 7 -------
common/serial.c | 4 ----
4 files changed, 3 insertions(+), 16 deletions(-)
diff --git a/common/Makefile b/common/Makefile
index 88ee981..eae0244 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -35,11 +35,11 @@ COBJS-y += command.o
COBJS-y += devices.o
COBJS-y += dlmalloc.o
COBJS-y += exports.o
-COBJS-y += hush.o
+COBJS-$(CONFIG_SYS_HUSH_PARSER) += hush.o
COBJS-y += image.o
COBJS-y += memsize.o
COBJS-y += s_record.o
-COBJS-y += serial.o
+COBJS-$(CONFIG_SERIAL_MULTI) += serial.o
COBJS-y += xyzModem.o
# core command
@@ -145,7 +145,7 @@ COBJS-$(CONFIG_DDR_SPD) += ddr_spd.o
COBJS-$(CONFIG_CMD_DOC) += docecc.o
COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o
COBJS-y += flash.o
-COBJS-y += kgdb.o
+COBJS-$(CONFIG_CMD_KGDB) += kgdb.o
COBJS-$(CONFIG_LCD) += lcd.o
COBJS-$(CONFIG_LYNXKDI) += lynxkdi.o
COBJS-$(CONFIG_UPDATE_TFTP) += update.o
diff --git a/common/hush.c b/common/hush.c
index 9aef6e4..d7aca89 100644
--- a/common/hush.c
+++ b/common/hush.c
@@ -96,7 +96,6 @@
/*cmd_boot.c*/
extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* do_bootd */
#endif
-#ifdef CONFIG_SYS_HUSH_PARSER
#ifndef __U_BOOT__
#include <ctype.h> /* isalpha, isdigit */
#include <unistd.h> /* getpid */
@@ -3632,5 +3631,4 @@ U_BOOT_CMD(
);
#endif
-#endif /* CONFIG_SYS_HUSH_PARSER */
/****************************************************************************/
diff --git a/common/kgdb.c b/common/kgdb.c
index adc15dd..f6e50a0 100644
--- a/common/kgdb.c
+++ b/common/kgdb.c
@@ -92,8 +92,6 @@
#include <kgdb.h>
#include <command.h>
-#if defined(CONFIG_CMD_KGDB)
-
#undef KGDB_DEBUG
/*
@@ -587,8 +585,3 @@ U_BOOT_CMD(
" program if it is executed (see the \"hello_world\"\n"
" example program in the U-Boot examples directory)."
);
-#else
-
-int kgdb_not_configured = 1;
-
-#endif
diff --git a/common/serial.c b/common/serial.c
index b38d1e7..09385d0 100644
--- a/common/serial.c
+++ b/common/serial.c
@@ -27,8 +27,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_SERIAL_MULTI)
-
static struct serial_device *serial_devices = NULL;
static struct serial_device *serial_current = NULL;
@@ -255,5 +253,3 @@ void serial_puts (const char *s)
serial_current->puts (s);
}
-
-#endif /* CONFIG_SERIAL_MULTI */
--
1.6.1.2
2
1

11 Feb '09
Signed-off-by: Mike Frysinger <vapier(a)gentoo.org>
---
lib_generic/Makefile | 10 +++++-----
lib_generic/bzlib.c | 3 ---
lib_generic/bzlib_crctable.c | 3 ---
lib_generic/bzlib_decompress.c | 3 ---
lib_generic/bzlib_huffman.c | 3 ---
lib_generic/bzlib_randtable.c | 3 ---
6 files changed, 5 insertions(+), 20 deletions(-)
diff --git a/lib_generic/Makefile b/lib_generic/Makefile
index 162dcdb..e4c1d17 100644
--- a/lib_generic/Makefile
+++ b/lib_generic/Makefile
@@ -28,11 +28,11 @@ CFLAGS := $(CFLAGS:-Os=-O2)
LIB = $(obj)libgeneric.a
COBJS-$(CONFIG_ADDR_MAP) += addr_map.o
-COBJS-y += bzlib.o
-COBJS-y += bzlib_crctable.o
-COBJS-y += bzlib_decompress.o
-COBJS-y += bzlib_randtable.o
-COBJS-y += bzlib_huffman.o
+COBJS-$(CONFIG_BZIP2) += bzlib.o
+COBJS-$(CONFIG_BZIP2) += bzlib_crctable.o
+COBJS-$(CONFIG_BZIP2) += bzlib_decompress.o
+COBJS-$(CONFIG_BZIP2) += bzlib_randtable.o
+COBJS-$(CONFIG_BZIP2) += bzlib_huffman.o
COBJS-y += crc16.o
COBJS-y += crc32.o
COBJS-y += ctype.o
diff --git a/lib_generic/bzlib.c b/lib_generic/bzlib.c
index 0d3f9c2..5844e18 100644
--- a/lib_generic/bzlib.c
+++ b/lib_generic/bzlib.c
@@ -1,7 +1,6 @@
#include <config.h>
#include <common.h>
#include <watchdog.h>
-#ifdef CONFIG_BZIP2
/*
* This file is a modified version of bzlib.c from the bzip2-1.0.2
@@ -1600,5 +1599,3 @@ void bz_internal_error(int errcode)
/*-------------------------------------------------------------*/
/*--- end bzlib.c ---*/
/*-------------------------------------------------------------*/
-
-#endif /* CONFIG_BZIP2 */
diff --git a/lib_generic/bzlib_crctable.c b/lib_generic/bzlib_crctable.c
index 63770cd..325b966 100644
--- a/lib_generic/bzlib_crctable.c
+++ b/lib_generic/bzlib_crctable.c
@@ -1,5 +1,4 @@
#include <config.h>
-#ifdef CONFIG_BZIP2
/*-------------------------------------------------------------*/
/*--- Table for doing CRCs ---*/
@@ -144,5 +143,3 @@ UInt32 BZ2_crc32Table[256] = {
/*-------------------------------------------------------------*/
/*--- end crctable.c ---*/
/*-------------------------------------------------------------*/
-
-#endif /* CONFIG_BZIP2 */
diff --git a/lib_generic/bzlib_decompress.c b/lib_generic/bzlib_decompress.c
index a575052..4412b8a 100644
--- a/lib_generic/bzlib_decompress.c
+++ b/lib_generic/bzlib_decompress.c
@@ -1,7 +1,6 @@
#include <config.h>
#include <common.h>
#include <watchdog.h>
-#ifdef CONFIG_BZIP2
/*-------------------------------------------------------------*/
/*--- Decompression machinery ---*/
@@ -673,5 +672,3 @@ Int32 BZ2_decompress ( DState* s )
/*-------------------------------------------------------------*/
/*--- end decompress.c ---*/
/*-------------------------------------------------------------*/
-
-#endif /* CONFIG_BZIP2 */
diff --git a/lib_generic/bzlib_huffman.c b/lib_generic/bzlib_huffman.c
index effae98..801b8ec 100644
--- a/lib_generic/bzlib_huffman.c
+++ b/lib_generic/bzlib_huffman.c
@@ -1,5 +1,4 @@
#include <config.h>
-#ifdef CONFIG_BZIP2
/*-------------------------------------------------------------*/
/*--- Huffman coding low-level stuff ---*/
@@ -228,5 +227,3 @@ void BZ2_hbCreateDecodeTables ( Int32 *limit,
/*-------------------------------------------------------------*/
/*--- end huffman.c ---*/
/*-------------------------------------------------------------*/
-
-#endif /* CONFIG_BZIP2 */
diff --git a/lib_generic/bzlib_randtable.c b/lib_generic/bzlib_randtable.c
index a0dd573..c3dc7e4 100644
--- a/lib_generic/bzlib_randtable.c
+++ b/lib_generic/bzlib_randtable.c
@@ -1,5 +1,4 @@
#include <config.h>
-#ifdef CONFIG_BZIP2
/*-------------------------------------------------------------*/
/*--- Table for randomising repetitive blocks ---*/
@@ -124,5 +123,3 @@ Int32 BZ2_rNums[512] = {
/*-------------------------------------------------------------*/
/*--- end randtable.c ---*/
/*-------------------------------------------------------------*/
-
-#endif /* CONFIG_BZIP2 */
--
1.6.1.2
2
1

11 Feb '09
At some point an intentional double space at the end of the sentence
got changed into a tab in the GPL header line:
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
This patch fixes the damage.
Signed-off-by: Gerald Van Baren <vanbaren(a)cideas.com>
---
drivers/usb/usb_ohci.c | 2 +-
drivers/video/mb862xx.c | 2 +-
drivers/video/smiLynxEM.c | 2 +-
include/configs/MPC832XEMDS.h | 2 +-
include/mb862xx.h | 2 +-
include/netdev.h | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/usb_ohci.c b/drivers/usb/usb_ohci.c
index d68fdcf..0bbee0f 100644
--- a/drivers/usb/usb_ohci.c
+++ b/drivers/usb/usb_ohci.c
@@ -27,7 +27,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
diff --git a/drivers/video/mb862xx.c b/drivers/video/mb862xx.c
index 22a85d1..01eda55 100644
--- a/drivers/video/mb862xx.c
+++ b/drivers/video/mb862xx.c
@@ -12,7 +12,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
diff --git a/drivers/video/smiLynxEM.c b/drivers/video/smiLynxEM.c
index 59b43ef..2001e9c 100644
--- a/drivers/video/smiLynxEM.c
+++ b/drivers/video/smiLynxEM.c
@@ -12,7 +12,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index bc56e68..ad8ea89 100644
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -8,7 +8,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
diff --git a/include/mb862xx.h b/include/mb862xx.h
index 1af5670..164305f 100644
--- a/include/mb862xx.h
+++ b/include/mb862xx.h
@@ -12,7 +12,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
diff --git a/include/netdev.h b/include/netdev.h
index ce1ecbd..ba5f8d2 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -12,7 +12,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
--
1.5.6.5
2
1
Hello?
I fixed miscalculated total sectors when using reserve area feature.
Also I changed CONFIG_MG_DISK_RES's unit to KB. (Byte is too small and
also needs sector size alignment.)
Any comments will be appreciated.
Signed-off-by: unsik Kim <donari75(a)gmail.com>
---
common/Makefile | 2 +
common/cmd_mgdisk.c | 76 +++++
common/cmd_nvedit.c | 8 +-
common/env_mgdisk.c | 90 ++++++
disk/part.c | 8 +-
disk/part_amiga.c | 5 +-
disk/part_dos.c | 1 +
disk/part_efi.c | 1 +
disk/part_iso.c | 1 +
disk/part_mac.c | 1 +
doc/README.mflash | 93 +++++++
drivers/block/Makefile | 5 +-
drivers/block/mg_disk.c | 635 +++++++++++++++++++++++++++++++++++++++++++
drivers/block/mg_disk_prv.h | 140 ++++++++++
fs/fat/fat.c | 2 +
include/config_cmd_all.h | 1 +
include/environment.h | 12 +
include/mg_disk.h | 51 ++++
include/part.h | 1 +
19 files changed, 1125 insertions(+), 8 deletions(-)
diff --git a/common/Makefile b/common/Makefile
index 93e3963..3a85c2a 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -53,6 +53,7 @@ COBJS-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o
COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o
COBJS-y += env_embedded.o
COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
+COBJS-$(CONFIG_ENV_IS_IN_MG_DISK) += env_mgdisk.o
COBJS-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o
COBJS-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o
@@ -104,6 +105,7 @@ COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o
COBJS-$(CONFIG_ID_EEPROM) += cmd_mac.o
COBJS-$(CONFIG_CMD_MEMORY) += cmd_mem.o
COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o
+COBJS-$(CONFIG_CMD_MG_DISK) += cmd_mgdisk.o
COBJS-$(CONFIG_MII) += miiphyutil.o
COBJS-$(CONFIG_CMD_MII) += miiphyutil.o
COBJS-$(CONFIG_CMD_MII) += cmd_mii.o
diff --git a/common/cmd_mgdisk.c b/common/cmd_mgdisk.c
new file mode 100644
index 0000000..f2f5061
--- /dev/null
+++ b/common/cmd_mgdisk.c
@@ -0,0 +1,76 @@
+/*
+ * (C) Copyright 2009 mGine co.
+ * unsik Kim <donari75(a)gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+
+#if defined (CONFIG_CMD_MG_DISK)
+
+#include <mg_disk.h>
+
+int do_mg_disk_cmd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ u32 from, to, size;
+
+ switch (argc) {
+ case 2:
+ if (!strcmp(argv[1], "init"))
+ mg_disk_init();
+ else
+ return 1;
+ break;
+ case 4:
+ from = simple_strtoul(argv[2], NULL, 0);
+ to = simple_strtoul(argv[3], NULL, 0);
+ size = simple_strtoul(argv[4], NULL, 0);
+
+ if (!strcmp(argv[1], "read"))
+ mg_disk_read(from, (u8 *)to, size);
+ else if (!strcmp(argv[1], "write"))
+ mg_disk_write(to, (u8 *)from, size);
+ else if (!strcmp(argv[1], "readsec"))
+ mg_disk_read_sects((void *)to, from, size);
+ else if (!strcmp(argv[1], "writesec"))
+ mg_disk_write_sects((void *)from, to, size);
+ else
+ return 1;
+ break;
+ default:
+ printf("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+ return 0;
+}
+
+U_BOOT_CMD(
+ mgd, 5, 0, do_mg_disk_cmd,
+ "mgd - mgine m[g]flash command\n",
+ ": mgine mflash IO mode (disk) command\n"
+ " - initialize : mgd init\n"
+ " - random read : mgd read [from] [to] [size]\n"
+ " - random write : mgd write [from] [to] [size]\n"
+ " - sector read : mgd readsec [sector] [to] [counts]\n"
+ " - sector write : mgd writesec [from] [sector] [counts]\n"
+);
+
+#endif
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index 1fcb4c9..649b23d 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -52,15 +52,17 @@
DECLARE_GLOBAL_DATA_PTR;
-#if !defined(CONFIG_ENV_IS_IN_NVRAM) && \
- !defined(CONFIG_ENV_IS_IN_EEPROM) && \
+#if !defined(CONFIG_ENV_IS_IN_EEPROM) && \
!defined(CONFIG_ENV_IS_IN_FLASH) && \
!defined(CONFIG_ENV_IS_IN_DATAFLASH) && \
+ !defined(CONFIG_ENV_IS_IN_MG_DISK) && \
!defined(CONFIG_ENV_IS_IN_NAND) && \
+ !defined(CONFIG_ENV_IS_IN_NVRAM) && \
!defined(CONFIG_ENV_IS_IN_ONENAND) && \
!defined(CONFIG_ENV_IS_IN_SPI_FLASH) && \
!defined(CONFIG_ENV_IS_NOWHERE)
-# error Define one of
CONFIG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|SPI_FLASH|NOWHERE}
+# error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|ONENAND|\
+SPI_FLASH|MG_DISK|NVRAM|NOWHERE}
#endif
#define XMK_STR(x) #x
diff --git a/common/env_mgdisk.c b/common/env_mgdisk.c
new file mode 100644
index 0000000..2b4949f
--- /dev/null
+++ b/common/env_mgdisk.c
@@ -0,0 +1,90 @@
+/*
+ * (C) Copyright 2009 mGine co.
+ * unsik Kim <donari75(a)gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <mg_disk.h>
+
+/* references to names in env_common.c */
+extern uchar default_environment[];
+extern int default_environment_size;
+
+char * env_name_spec = "MG_DISK";
+
+env_t *env_ptr = 0;
+
+DECLARE_GLOBAL_DATA_PTR;
+
+uchar env_get_char_spec(int index)
+{
+ return (*((uchar *) (gd->env_addr + index)));
+}
+
+void env_relocate_spec(void)
+{
+ unsigned int err;
+
+ err = mg_disk_init();
+ if (err) {
+ puts ("*** Warning - mg_disk_init error");
+ goto OUT;
+ }
+ err = mg_disk_read(CONFIG_ENV_ADDR, (u_char *)env_ptr, CONFIG_ENV_SIZE);
+ if (err) {
+ puts ("*** Warning - mg_disk_read error");
+ goto OUT;
+ }
+
+ if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc) {
+ puts ("*** Warning - CRC error");
+ goto OUT;
+ }
+
+ return;
+
+OUT:
+ printf (", using default environment\n\n");
+ set_default_env();
+}
+
+int saveenv(void)
+{
+ unsigned int err;
+ env_ptr->crc = crc32(0, env_ptr->data, ENV_SIZE);
+ err = mg_disk_write(CONFIG_ENV_ADDR, (u_char *)env_ptr,
+ CONFIG_ENV_SIZE);
+ if (err)
+ puts ("*** Warning - mg_disk_write error\n\n");
+ return err;
+}
+
+int env_init(void)
+{
+ /* use default */
+ gd->env_addr = (ulong) & default_environment[0];
+ gd->env_valid = 1;
+
+ return 0;
+}
diff --git a/disk/part.c b/disk/part.c
index e353cee..fe299c7 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -35,6 +35,7 @@
#endif
#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_MG_DISK) || \
defined(CONFIG_CMD_SATA) || \
defined(CONFIG_CMD_SCSI) || \
defined(CONFIG_CMD_USB) || \
@@ -65,6 +66,9 @@ static const struct block_drvr block_drvr[] = {
#if defined(CONFIG_SYSTEMACE)
{ .name = "ace", .get_dev = systemace_get_dev, },
#endif
+#if defined(CONFIG_CMD_MG_DISK)
+ { .name = "mgd", .get_dev = mg_disk_get_dev, },
+#endif
{ },
};
@@ -91,6 +95,7 @@ block_dev_desc_t *get_dev(char* ifname, int dev)
#endif
#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_MG_DISK) || \
defined(CONFIG_CMD_SATA) || \
defined(CONFIG_CMD_SCSI) || \
defined(CONFIG_CMD_USB) || \
@@ -203,11 +208,12 @@ void dev_print (block_dev_desc_t *dev_desc)
#endif
#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_MG_DISK) || \
defined(CONFIG_CMD_SATA) || \
defined(CONFIG_CMD_SCSI) || \
defined(CONFIG_CMD_USB) || \
defined(CONFIG_MMC) || \
- defined(CONFIG_SYSTEMACE) )
+ defined(CONFIG_SYSTEMACE) )
#if defined(CONFIG_MAC_PARTITION) || \
defined(CONFIG_DOS_PARTITION) || \
diff --git a/disk/part_amiga.c b/disk/part_amiga.c
index 6c3d748..6f25173 100644
--- a/disk/part_amiga.c
+++ b/disk/part_amiga.c
@@ -27,6 +27,7 @@
#include "part_amiga.h"
#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_MG_DISK) || \
defined(CONFIG_CMD_SCSI) || \
defined(CONFIG_CMD_USB) || \
defined(CONFIG_MMC) || \
@@ -154,7 +155,7 @@ struct rigid_disk_block
*get_rdisk(block_dev_desc_t *dev_desc)
s = getenv("amiga_scanlimit");
if (s)
- limit = atoi(s);
+ limit = simple_strtoul(s, NULL, 10);
else
limit = AMIGA_BLOCK_LIMIT;
@@ -195,7 +196,7 @@ struct bootcode_block
*get_bootcode(block_dev_desc_t *dev_desc)
s = getenv("amiga_scanlimit");
if (s)
- limit = atoi(s);
+ limit = simple_strtoul(s, NULL, 10);
else
limit = AMIGA_BLOCK_LIMIT;
diff --git a/disk/part_dos.c b/disk/part_dos.c
index 4d778ec..845cdb6 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -36,6 +36,7 @@
#include "part_dos.h"
#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_MG_DISK) || \
defined(CONFIG_CMD_SATA) || \
defined(CONFIG_CMD_SCSI) || \
defined(CONFIG_CMD_USB) || \
diff --git a/disk/part_efi.c b/disk/part_efi.c
index d8a8111..4cf79fb 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -37,6 +37,7 @@
#include "part_efi.h"
#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_MG_DISK) || \
defined(CONFIG_CMD_SATA) || \
defined(CONFIG_CMD_SCSI) || \
defined(CONFIG_CMD_USB) || \
diff --git a/disk/part_iso.c b/disk/part_iso.c
index 72ff868..8348ce8 100644
--- a/disk/part_iso.c
+++ b/disk/part_iso.c
@@ -26,6 +26,7 @@
#include "part_iso.h"
#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_MG_DISK) || \
defined(CONFIG_CMD_SCSI) || \
defined(CONFIG_CMD_SATA) || \
defined(CONFIG_CMD_USB) || \
diff --git a/disk/part_mac.c b/disk/part_mac.c
index 1922fe5..fce4cc7 100644
--- a/disk/part_mac.c
+++ b/disk/part_mac.c
@@ -35,6 +35,7 @@
#include "part_mac.h"
#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_MG_DISK) || \
defined(CONFIG_CMD_SCSI) || \
defined(CONFIG_CMD_SATA) || \
defined(CONFIG_CMD_USB) || \
diff --git a/doc/README.mflash b/doc/README.mflash
new file mode 100644
index 0000000..d0d0f7b
--- /dev/null
+++ b/doc/README.mflash
@@ -0,0 +1,93 @@
+
+This document describes m[g]flash support in u-boot.
+
+Contents
+ 1. Overview
+ 2. Porting mflash driver
+ 3. Mflash command
+ 4. Misc.
+
+1. Overview
+Mflash and gflash are embedded flash drive. The only difference is mflash is
+MCP(Multi Chip Package) device. These two device operate exactly same way.
+So the rest mflash repersents mflash and gflash altogether.
+
+2. Porting mflash driver
+
+2-1. Board configuration
+* Mflash driver support
+#define CONFIG_CMD_MG_DISK
+
+* Environment variable support (optional)
+#define CONFIG_ENV_IS_IN_MG_DISK
+Also CONFIG_ENV_ADDR and CONFIG_ENV_SIZE should be defined.
+CONFIG_ENV_ADDR is byte offset starting from 0.
+
+Following example sets environment variable location to 0x80000 (1024'th
+sector) and size of 0x400 (1024 byte)
+#define CONFIG_ENV_ADDR 0x80000
+#define CONFIG_ENV_SIZE 0x400
+
+* Reserved size config (optional)
+If you want to use some reserved area for bootloader, environment variable or
+whatever, use CONFIG_MG_DISK_RES. The unit is KB. Mflash's block operation
+method use this value as start offset. So any u-boot's partition table parser
+and file system command work consistently. You can access this area by using
+mflash command.
+
+Following example sets 10MB of reserved area.
+#define CONFIG_MG_DISK_RES 10240
+
+2-2. Porting mg_get_drv_data function
+Mflash is active device and need some gpio control for proper operation.
+This board dependency resolved by using mg_get_drv_data function.
+Port this function at your board init file. See include/mg_disk.h
+
+Here is some pseudo example.
+
+static void custom_hdrst_pin (u8 level)
+{
+ if (level)
+ /* set hard reset pin to high */
+ else
+ /* set hard reset pin to low */
+}
+
+static void custom_ctrl_pin_init (void)
+{
+ /* Set hard reset, write protect, deep power down pins
+ * to gpio.
+ * Set these pins to output high
+ */
+}
+
+struct mg_drv_data* mg_get_drv_data (void)
+{
+ static struct mg_drv_data prv;
+
+ prv.base = /* base address of mflash */
+ prv.mg_ctrl_pin_init = custom_ctrl_pin_init;
+ prv.mg_hdrst_pin = custom_hdrst_pin;
+
+ return &prv;
+}
+
+3. Mflash command
+
+* initialize : mgd init
+* random read : mgd read [from] [to] [size]
+ ex) read 256 bytes from 0x300000 of mflash to 0xA0100000 of host memory
+ mgd read 0x300000 0xA0100000 256
+* random write : mgd write [from] [to] [size]
+* sector read : mgd readsec [sector] [to] [count]
+ ex) read 10 sectors starts from 400 sector to 0xA0100000
+ mgd readsec 400 0xA0100000 10
+* sector write : mgd writesec [from] [sector] [count]
+
+4. Misc.
+Mflash's device interface name for block driver is "mgd".
+Here is ext2 file system access example.
+
+ mgd init
+ ext2ls mgd 0:1 /boot
+ ext2load mgd 0:1 0xa0010000 /boot/uImage 1954156
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index 59388d9..eccefc1 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -25,13 +25,14 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libblock.a
-COBJS-$(CONFIG_SCSI_AHCI) += ahci.o
COBJS-$(CONFIG_ATA_PIIX) += ata_piix.o
+COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o
COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o
+COBJS-$(CONFIG_IDE_SIL680) += sil680.o
COBJS-$(CONFIG_LIBATA) += libata.o
COBJS-$(CONFIG_PATA_BFIN) += pata_bfin.o
COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o
-COBJS-$(CONFIG_IDE_SIL680) += sil680.o
+COBJS-$(CONFIG_SCSI_AHCI) += ahci.o
COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
COBJS-$(CONFIG_SYSTEMACE) += systemace.o
diff --git a/drivers/block/mg_disk.c b/drivers/block/mg_disk.c
new file mode 100644
index 0000000..193a441
--- /dev/null
+++ b/drivers/block/mg_disk.c
@@ -0,0 +1,635 @@
+/*
+ * (C) Copyright 2009 mGine co.
+ * unsik Kim <donari75(a)gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <part.h>
+#include <ata.h>
+#include <asm/io.h>
+#include "mg_disk_prv.h"
+
+#ifdef CONFIG_CMD_MG_DISK
+
+#ifndef CONFIG_MG_DISK_RES
+#define CONFIG_MG_DISK_RES 0
+#endif
+
+#define MG_RES_SEC ((CONFIG_MG_DISK_RES) << 1)
+
+#define MG_BASE (host.drv_data->base)
+
+static struct mg_host host;
+
+static block_dev_desc_t mg_disk_dev = {
+ .if_type = IF_TYPE_ATAPI,
+ .part_type = PART_TYPE_UNKNOWN,
+ .type = DEV_TYPE_HARDDISK,
+ .blksz = MG_SECTOR_SIZE,
+ .priv = &host };
+
+static void mg_dump_status (const char *msg, unsigned int stat, unsigned err)
+{
+ char *name = MG_DEV_NAME;
+
+ printf("%s: %s: status=0x%02x { ", name, msg, stat & 0xff);
+ if (stat & MG_REG_STATUS_BIT_BUSY)
+ printf("Busy ");
+ if (stat & MG_REG_STATUS_BIT_READY)
+ printf("DriveReady ");
+ if (stat & MG_REG_STATUS_BIT_WRITE_FAULT)
+ printf("WriteFault ");
+ if (stat & MG_REG_STATUS_BIT_SEEK_DONE)
+ printf("SeekComplete ");
+ if (stat & MG_REG_STATUS_BIT_DATA_REQ)
+ printf("DataRequest ");
+ if (stat & MG_REG_STATUS_BIT_CORRECTED_ERROR)
+ printf("CorrectedError ");
+ if (stat & MG_REG_STATUS_BIT_ERROR)
+ printf("Error ");
+ printf("}\n");
+
+ if ((stat & MG_REG_STATUS_BIT_ERROR)) {
+ printf("%s: %s: error=0x%02x { ", name, msg, err & 0xff);
+ if (err & MG_REG_ERR_BBK)
+ printf("BadSector ");
+ if (err & MG_REG_ERR_UNC)
+ printf("UncorrectableError ");
+ if (err & MG_REG_ERR_IDNF)
+ printf("SectorIdNotFound ");
+ if (err & MG_REG_ERR_ABRT)
+ printf("DriveStatusError ");
+ if (err & MG_REG_ERR_AMNF)
+ printf("AddrMarkNotFound ");
+ printf("}\n");
+ }
+}
+
+#if CONFIG_SYS_HZ == 1000
+#define msecs_to_hz(s) (s)
+#else
+static unsigned int msecs_to_hz (u32 msec)
+{
+ u32 hz = CONFIG_SYS_HZ / 1000 * msec;
+
+ if (!hz)
+ hz = 1;
+
+ return hz;
+}
+#endif
+
+/*
+ * copy src to dest, skipping leading and trailing blanks and null
+ * terminate the string
+ * "len" is the size of available memory including the terminating '\0'
+ */
+static void mg_ident_cpy (unsigned char *dst, unsigned char *src,
+ unsigned int len)
+{
+ unsigned char *end, *last;
+
+ last = dst;
+ end = src + len - 1;
+
+ /* reserve space for '\0' */
+ if (len < 2)
+ goto OUT;
+
+ /* skip leading white space */
+ while ((*src) && (src<end) && (*src==' '))
+ ++src;
+
+ /* copy string, omitting trailing white space */
+ while ((*src) && (src<end)) {
+ *dst++ = *src;
+ if (*src++ != ' ')
+ last = dst;
+ }
+OUT:
+ *last = '\0';
+}
+
+static unsigned int mg_wait (u32 expect, u32 msec)
+{
+ u8 status;
+ u32 from, cur, expire, err;
+
+ err = MG_ERR_NONE;
+ reset_timer();
+ from = get_timer(0);
+ expire = msecs_to_hz(msec);
+
+ status = readb(MG_BASE + MG_REG_STATUS);
+ do {
+ cur = get_timer(from);
+ if (status & MG_REG_STATUS_BIT_BUSY) {
+ if (expect == MG_REG_STATUS_BIT_BUSY)
+ break;
+ } else {
+ /* Check the error condition! */
+ if (status & MG_REG_STATUS_BIT_ERROR) {
+ err = readb(MG_BASE + MG_REG_ERROR);
+ mg_dump_status("mg_wait", status, err);
+ break;
+ }
+
+ if (expect == MG_STAT_READY)
+ if (MG_READY_OK(status))
+ break;
+
+ if (expect == MG_REG_STATUS_BIT_DATA_REQ)
+ if (status & MG_REG_STATUS_BIT_DATA_REQ)
+ break;
+ }
+ status = readb(MG_BASE + MG_REG_STATUS);
+ } while (cur < expire);
+
+ if (cur >= expire)
+ err = MG_ERR_TIMEOUT;
+
+ return err;
+}
+
+static int mg_get_disk_id (void)
+{
+ u32 iobuf[(MG_SECTOR_SIZE / sizeof(u32))];
+ hd_driveid_t *iop = (hd_driveid_t *)iobuf;
+ u32 i, err, res;
+ u16 *buff = (u16 *)iobuf;
+
+ writeb(MG_CMD_ID, MG_BASE + MG_REG_COMMAND);
+ err = mg_wait(MG_REG_STATUS_BIT_DATA_REQ, 3000);
+ if (err)
+ return err;
+
+ for(i = 0; i < (MG_SECTOR_SIZE / sizeof(u32)) >> 1; i++)
+ buff[i] = readw(MG_BASE + MG_BUFF_OFFSET + i * 2);
+
+ writeb(MG_CMD_RD_CONF, MG_BASE + MG_REG_COMMAND);
+ err = mg_wait(MG_STAT_READY, 3000);
+ if (err)
+ return err;
+
+ if((iop->field_valid & 1) == 0)
+ return MG_ERR_TRANSLATION;
+
+ mg_ident_cpy((unsigned char*)mg_disk_dev.revision, iop->fw_rev,
+ sizeof(mg_disk_dev.revision));
+ mg_ident_cpy((unsigned char*)mg_disk_dev.vendor, iop->model,
+ sizeof(mg_disk_dev.vendor));
+ mg_ident_cpy((unsigned char*)mg_disk_dev.product, iop->serial_no,
+ sizeof(mg_disk_dev.product));
+#ifdef __LITTLE_ENDIAN
+ /*
+ * firmware revision, model, and serial number have Big Endian Byte
+ * order in Word. Convert all three to little endian.
+ *
+ * See CF+ and CompactFlash Specification Revision 2.0:
+ * 6.2.1.6: Identify Drive, Table 39 for more details
+ */
+
+ strswab(mg_disk_dev.revision);
+ strswab(mg_disk_dev.vendor);
+ strswab(mg_disk_dev.product);
+#endif /* __LITTLE_ENDIAN */
+
+#ifdef __BIG_ENDIAN
+ iop->lba_capacity = (iop->lba_capacity << 16) |
+ (iop->lba_capacity >> 16);
+#endif /* __BIG_ENDIAN */
+
+ if (MG_RES_SEC) {
+ MG_DBG("MG_RES_SEC=%d\n", MG_RES_SEC);
+ iop->cyls = (iop->lba_capacity - MG_RES_SEC) /
+ iop->sectors / iop->heads;
+ res = iop->lba_capacity -
+ iop->cyls * iop->heads * iop->sectors;
+ iop->lba_capacity -= res;
+ printf("mg_disk: %d sectors reserved\n", res);
+ }
+
+ mg_disk_dev.lba = iop->lba_capacity;
+ return MG_ERR_NONE;
+}
+
+static int mg_disk_reset (void)
+{
+ struct mg_drv_data *prv_data = host.drv_data;
+ s32 err;
+ u8 init_status;
+
+ /* hdd rst low */
+ prv_data->mg_hdrst_pin(0);
+ err = mg_wait(MG_REG_STATUS_BIT_BUSY, 300);
+ if(err)
+ return err;
+
+ /* hdd rst high */
+ prv_data->mg_hdrst_pin(1);
+ err = mg_wait(MG_STAT_READY, 3000);
+ if(err)
+ return err;
+
+ /* soft reset on */
+ writeb(MG_REG_CTRL_RESET | MG_REG_CTRL_INTR_DISABLE,
+ MG_BASE + MG_REG_DRV_CTRL);
+ err = mg_wait(MG_REG_STATUS_BIT_BUSY, 3000);
+ if(err)
+ return err;
+
+ /* soft reset off */
+ writeb(MG_REG_CTRL_INTR_DISABLE, MG_BASE + MG_REG_DRV_CTRL);
+ err = mg_wait(MG_STAT_READY, 3000);
+ if(err)
+ return err;
+
+ init_status = readb(MG_BASE + MG_REG_STATUS) & 0xf;
+
+ if (init_status == 0xf)
+ return MG_ERR_INIT_STAT;
+
+ return err;
+}
+
+
+static unsigned int mg_out(unsigned int sect_num,
+ unsigned int sect_cnt,
+ unsigned int cmd)
+{
+ u32 err = MG_ERR_NONE;
+
+ if ((err = mg_wait(MG_STAT_READY, 3000))) {
+ return err;
+ }
+
+ writeb((u8)sect_cnt, MG_BASE + MG_REG_SECT_CNT);
+ writeb((u8)sect_num, MG_BASE + MG_REG_SECT_NUM);
+ writeb((u8)(sect_num >> 8), MG_BASE + MG_REG_CYL_LOW);
+ writeb((u8)(sect_num >> 16), MG_BASE + MG_REG_CYL_HIGH);
+ writeb((u8)((sect_num >> 24) | MG_REG_HEAD_LBA_MODE),
+ MG_BASE + MG_REG_DRV_HEAD);
+ writeb(cmd, MG_BASE + MG_REG_COMMAND);
+ return err;
+}
+
+static unsigned int mg_do_read_sects(void *buff, u32 sect_num, u32 sect_cnt)
+{
+ u32 i, j, err;
+ u8 *buff_ptr = buff;
+
+ err = mg_out(sect_num, sect_cnt, MG_CMD_RD);
+ if (err)
+ return err;
+
+ for (i = 0; i < sect_cnt; i++) {
+ err = mg_wait(MG_REG_STATUS_BIT_DATA_REQ, 3000);
+ if (err)
+ return err;
+
+ /* TODO : u16 unaligned case */
+ for(j = 0; j < MG_SECTOR_SIZE >> 1; j++) {
+ *(u16 *)buff_ptr =
+ readw(MG_BASE + MG_BUFF_OFFSET + (j << 1));
+ buff_ptr += 2;
+ }
+
+ writeb(MG_CMD_RD_CONF, MG_BASE + MG_REG_COMMAND);
+
+ MG_DBG("%u (0x%8.8x) sector read", sect_num + i,
+ (sect_num + i) * MG_SECTOR_SIZE);
+ }
+
+ return err;
+}
+
+unsigned int mg_disk_read_sects(void *buff, u32 sect_num, u32 sect_cnt)
+{
+ u32 quotient, residue, i, err;
+ u8 *buff_ptr = buff;
+
+ quotient = sect_cnt >> 8;
+ residue = sect_cnt % 256;
+
+ for (i = 0; i < quotient; i++) {
+ MG_DBG("sect num : %u buff : 0x%8.8x", sect_num, (u32)buff_ptr);
+ err = mg_do_read_sects(buff_ptr, sect_num, 256);
+ if (err)
+ return err;
+ sect_num += 256;
+ buff_ptr += 256 * MG_SECTOR_SIZE;
+ }
+
+ if (residue) {
+ MG_DBG("sect num : %u buff : %8.8x", sect_num, (u32)buff_ptr);
+ err = mg_do_read_sects(buff_ptr, sect_num, residue);
+ }
+
+ return err;
+}
+
+unsigned long mg_block_read (int dev, unsigned long start,
+ lbaint_t blkcnt, void *buffer)
+{
+ start += MG_RES_SEC;
+ if (! mg_disk_read_sects(buffer, start, blkcnt))
+ return blkcnt;
+ else
+ return 0;
+}
+
+unsigned int mg_disk_read (u32 addr, u8 *buff, u32 len)
+{
+ u8 *sect_buff, *buff_ptr = buff;
+ u32 cur_addr, next_sec_addr, end_addr, cnt, sect_num;
+ u32 err = MG_ERR_NONE;
+
+ /* TODO : sanity chk */
+ cnt = 0;
+ cur_addr = addr;
+ end_addr = addr + len;
+
+ sect_buff = malloc(MG_SECTOR_SIZE);
+
+ if (cur_addr & MG_SECTOR_SIZE_MASK) {
+ next_sec_addr = (cur_addr + MG_SECTOR_SIZE) &
+ ~MG_SECTOR_SIZE_MASK;
+ sect_num = cur_addr >> MG_SECTOR_SIZE_SHIFT;
+ err = mg_disk_read_sects(sect_buff, sect_num, 1);
+ if (err)
+ goto mg_read_exit;
+
+ if (end_addr < next_sec_addr) {
+ memcpy(buff_ptr,
+ sect_buff + (cur_addr & MG_SECTOR_SIZE_MASK),
+ end_addr - cur_addr);
+ MG_DBG("copies %u byte from sector offset 0x%8.8x",
+ end_addr - cur_addr, cur_addr);
+ cur_addr = end_addr;
+ } else {
+ memcpy(buff_ptr,
+ sect_buff + (cur_addr & MG_SECTOR_SIZE_MASK),
+ next_sec_addr - cur_addr);
+ MG_DBG("copies %u byte from sector offset 0x%8.8x",
+ next_sec_addr - cur_addr, cur_addr);
+ buff_ptr += (next_sec_addr - cur_addr);
+ cur_addr = next_sec_addr;
+ }
+ }
+
+ if (cur_addr < end_addr) {
+ sect_num = cur_addr >> MG_SECTOR_SIZE_SHIFT;
+ next_sec_addr = cur_addr + MG_SECTOR_SIZE;
+
+ while (next_sec_addr <= end_addr) {
+ cnt++;
+ next_sec_addr += MG_SECTOR_SIZE;
+ }
+
+ if (cnt)
+ err = mg_disk_read_sects(buff_ptr, sect_num, cnt);
+ if (err)
+ goto mg_read_exit;
+
+ buff_ptr += cnt * MG_SECTOR_SIZE;
+ cur_addr += cnt * MG_SECTOR_SIZE;
+
+ if (cur_addr < end_addr) {
+ sect_num = cur_addr >> MG_SECTOR_SIZE_SHIFT;
+ err = mg_disk_read_sects(sect_buff, sect_num, 1);
+ if (err)
+ goto mg_read_exit;
+ memcpy(buff_ptr, sect_buff, end_addr - cur_addr);
+ MG_DBG("copies %u byte", end_addr - cur_addr);
+ }
+ }
+
+mg_read_exit:
+ free(sect_buff);
+
+ return err;
+}
+
+static int mg_do_write_sects(void *buff, u32 sect_num, u32 sect_cnt)
+{
+ u32 i, j, err;
+ u8 *buff_ptr = buff;
+
+ err = mg_out(sect_num, sect_cnt, MG_CMD_WR);
+ if (err)
+ return err;
+
+ for (i = 0; i < sect_cnt; i++) {
+ err = mg_wait(MG_REG_STATUS_BIT_DATA_REQ, 3000);
+ if (err)
+ return err;
+
+ /* TODO : u16 unaligned case */
+ for(j = 0; j < MG_SECTOR_SIZE >> 1; j++) {
+ writew(*(u16 *)buff_ptr,
+ MG_BASE + MG_BUFF_OFFSET + (j << 1));
+ buff_ptr += 2;
+ }
+
+ writeb(MG_CMD_WR_CONF, MG_BASE + MG_REG_COMMAND);
+
+ MG_DBG("%u (0x%8.8x) sector write",
+ sect_num + i, (sect_num + i) * MG_SECTOR_SIZE);
+ }
+
+ return err;
+}
+
+unsigned int mg_disk_write_sects(void *buff, u32 sect_num, u32 sect_cnt)
+{
+ u32 quotient, residue, i;
+ u32 err = MG_ERR_NONE;
+ u8 *buff_ptr = buff;
+
+ quotient = sect_cnt >> 8;
+ residue = sect_cnt % 256;
+
+ for (i = 0; i < quotient; i++) {
+ MG_DBG("sect num : %u buff : %8.8x", sect_num, (u32)buff_ptr);
+ err = mg_do_write_sects(buff_ptr, sect_num, 256);
+ if (err)
+ return err;
+ sect_num += 256;
+ buff_ptr += 256 * MG_SECTOR_SIZE;
+ }
+
+ if (residue) {
+ MG_DBG("sect num : %u buff : %8.8x", sect_num, (u32)buff_ptr);
+ err = mg_do_write_sects(buff_ptr, sect_num, residue);
+ }
+
+ return err;
+}
+
+unsigned long mg_block_write (int dev, unsigned long start,
+ lbaint_t blkcnt, const void *buffer)
+{
+ start += MG_RES_SEC;
+ if (!mg_disk_write_sects((void *)buffer, start, blkcnt))
+ return blkcnt;
+ else
+ return 0;
+}
+
+unsigned int mg_disk_write(u32 addr, u8 *buff, u32 len)
+{
+ u8 *sect_buff, *buff_ptr = buff;
+ u32 cur_addr, next_sec_addr, end_addr, cnt, sect_num;
+ u32 err = MG_ERR_NONE;
+
+ /* TODO : sanity chk */
+ cnt = 0;
+ cur_addr = addr;
+ end_addr = addr + len;
+
+ sect_buff = malloc(MG_SECTOR_SIZE);
+
+ if (cur_addr & MG_SECTOR_SIZE_MASK) {
+
+ next_sec_addr = (cur_addr + MG_SECTOR_SIZE) &
+ ~MG_SECTOR_SIZE_MASK;
+ sect_num = cur_addr >> MG_SECTOR_SIZE_SHIFT;
+ err = mg_disk_read_sects(sect_buff, sect_num, 1);
+ if (err)
+ goto mg_write_exit;
+
+ if (end_addr < next_sec_addr) {
+ memcpy(sect_buff + (cur_addr & MG_SECTOR_SIZE_MASK),
+ buff_ptr, end_addr - cur_addr);
+ MG_DBG("copies %u byte to sector offset 0x%8.8x",
+ end_addr - cur_addr, cur_addr);
+ cur_addr = end_addr;
+ } else {
+ memcpy(sect_buff + (cur_addr & MG_SECTOR_SIZE_MASK),
+ buff_ptr, next_sec_addr - cur_addr);
+ MG_DBG("copies %u byte to sector offset 0x%8.8x",
+ next_sec_addr - cur_addr, cur_addr);
+ buff_ptr += (next_sec_addr - cur_addr);
+ cur_addr = next_sec_addr;
+ }
+
+ err = mg_disk_write_sects(sect_buff, sect_num, 1);
+ if (err)
+ goto mg_write_exit;
+ }
+
+ if (cur_addr < end_addr) {
+
+ sect_num = cur_addr >> MG_SECTOR_SIZE_SHIFT;
+ next_sec_addr = cur_addr + MG_SECTOR_SIZE;
+
+ while (next_sec_addr <= end_addr) {
+ cnt++;
+ next_sec_addr += MG_SECTOR_SIZE;
+ }
+
+ if (cnt)
+ err = mg_disk_write_sects(buff_ptr, sect_num, cnt);
+ if (err)
+ goto mg_write_exit;
+
+ buff_ptr += cnt * MG_SECTOR_SIZE;
+ cur_addr += cnt * MG_SECTOR_SIZE;
+
+ if (cur_addr < end_addr) {
+ sect_num = cur_addr >> MG_SECTOR_SIZE_SHIFT;
+ err = mg_disk_read_sects(sect_buff, sect_num, 1);
+ if (err)
+ goto mg_write_exit;
+ memcpy(sect_buff, buff_ptr, end_addr - cur_addr);
+ MG_DBG("copies %u byte", end_addr - cur_addr);
+ err = mg_disk_write_sects(sect_buff, sect_num, 1);
+ }
+
+ }
+
+mg_write_exit:
+ free(sect_buff);
+
+ return err;
+}
+
+block_dev_desc_t *mg_disk_get_dev(int dev)
+{
+ return ((block_dev_desc_t *) & mg_disk_dev);
+}
+
+/* must override this function */
+struct mg_drv_data * __attribute__((weak)) mg_get_drv_data (void)
+{
+ puts ("### WARNING ### port mg_get_drv_data function\n");
+ return NULL;
+}
+
+unsigned int mg_disk_init (void)
+{
+ struct mg_drv_data *prv_data;
+ u32 err = MG_ERR_NONE;
+
+ prv_data = mg_get_drv_data();
+ if (! prv_data) {
+ printf("%s:%d fail (no driver_data)\n", __func__, __LINE__);
+ err = MG_ERR_NO_DRV_DATA;
+ return err;
+ }
+
+ ((struct mg_host *)mg_disk_dev.priv)->drv_data = prv_data;
+
+ /* init ctrl pin */
+ if (prv_data->mg_ctrl_pin_init)
+ prv_data->mg_ctrl_pin_init();
+
+ if (! prv_data->mg_hdrst_pin) {
+ err = MG_ERR_CTRL_RST;
+ return err;
+ }
+
+ /* disk reset */
+ err = mg_disk_reset();
+ if (err) {
+ printf("%s:%d fail (err code : %d)\n", __func__, __LINE__, err);
+ return err;
+ }
+
+ /* get disk id */
+ err = mg_get_disk_id();
+ if (err) {
+ printf("%s:%d fail (err code : %d)\n", __func__, __LINE__, err);
+ return err;
+ }
+
+ mg_disk_dev.block_read = mg_block_read;
+ mg_disk_dev.block_write = mg_block_write;
+
+ init_part(&mg_disk_dev);
+
+ dev_print(&mg_disk_dev);
+
+ return err;
+}
+
+#endif /* CONFIG_CMD_MG_DISK */
diff --git a/drivers/block/mg_disk_prv.h b/drivers/block/mg_disk_prv.h
new file mode 100644
index 0000000..a6b7299
--- /dev/null
+++ b/drivers/block/mg_disk_prv.h
@@ -0,0 +1,140 @@
+/*
+ * (C) Copyright 2009 mGine co.
+ * unsik Kim <donari75(a)gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MG_DISK_PRV_H__
+#define __MG_DISK_PRV_H__
+
+#include <mg_disk.h>
+
+/* name for block device */
+#define MG_DISK_NAME "mgd"
+/* name for platform device */
+#define MG_DEV_NAME "mg_disk"
+
+#define MG_DISK_MAJ 240
+#define MG_DISK_MAX_PART 16
+#define MG_SECTOR_SIZE 512
+#define MG_SECTOR_SIZE_MASK (512 - 1)
+#define MG_SECTOR_SIZE_SHIFT (9)
+#define MG_MAX_SECTS 256
+
+/* Register offsets */
+#define MG_BUFF_OFFSET 0x8000
+#define MG_STORAGE_BUFFER_SIZE 0x200
+#define MG_REG_OFFSET 0xC000
+#define MG_REG_FEATURE (MG_REG_OFFSET + 2) /* write case */
+#define MG_REG_ERROR (MG_REG_OFFSET + 2) /* read case */
+#define MG_REG_SECT_CNT (MG_REG_OFFSET + 4)
+#define MG_REG_SECT_NUM (MG_REG_OFFSET + 6)
+#define MG_REG_CYL_LOW (MG_REG_OFFSET + 8)
+#define MG_REG_CYL_HIGH (MG_REG_OFFSET + 0xA)
+#define MG_REG_DRV_HEAD (MG_REG_OFFSET + 0xC)
+#define MG_REG_COMMAND (MG_REG_OFFSET + 0xE) /* write case */
+#define MG_REG_STATUS (MG_REG_OFFSET + 0xE) /* read case */
+#define MG_REG_DRV_CTRL (MG_REG_OFFSET + 0x10)
+#define MG_REG_BURST_CTRL (MG_REG_OFFSET + 0x12)
+
+/* "Drive Select/Head Register" bit values */
+#define MG_REG_HEAD_MUST_BE_ON 0xA0 /* These 2 bits are always on */
+#define MG_REG_HEAD_DRIVE_MASTER (0x00 | MG_REG_HEAD_MUST_BE_ON)
+#define MG_REG_HEAD_DRIVE_SLAVE (0x10 | MG_REG_HEAD_MUST_BE_ON)
+#define MG_REG_HEAD_LBA_MODE (0x40 | MG_REG_HEAD_MUST_BE_ON)
+
+
+/* "Device Control Register" bit values */
+#define MG_REG_CTRL_INTR_ENABLE 0x0
+#define MG_REG_CTRL_INTR_DISABLE (0x1 << 1)
+#define MG_REG_CTRL_RESET (0x1 << 2)
+#define MG_REG_CTRL_INTR_POLA_ACTIVE_HIGH 0x0
+#define MG_REG_CTRL_INTR_POLA_ACTIVE_LOW (0x1 << 4)
+#define MG_REG_CTRL_DPD_POLA_ACTIVE_LOW 0x0
+#define MG_REG_CTRL_DPD_POLA_ACTIVE_HIGH (0x1 << 5)
+#define MG_REG_CTRL_DPD_DISABLE 0x0
+#define MG_REG_CTRL_DPD_ENABLE (0x1 << 6)
+
+/* Status register bit */
+ /* error bit in status register */
+#define MG_REG_STATUS_BIT_ERROR 0x01
+ /* corrected error in status register */
+#define MG_REG_STATUS_BIT_CORRECTED_ERROR 0x04
+ /* data request bit in status register */
+#define MG_REG_STATUS_BIT_DATA_REQ 0x08
+ /* DSC - Drive Seek Complete */
+#define MG_REG_STATUS_BIT_SEEK_DONE 0x10
+ /* DWF - Drive Write Fault */
+#define MG_REG_STATUS_BIT_WRITE_FAULT 0x20
+#define MG_REG_STATUS_BIT_READY 0x40
+#define MG_REG_STATUS_BIT_BUSY 0x80
+
+/* handy status */
+#define MG_STAT_READY (MG_REG_STATUS_BIT_READY | MG_REG_STATUS_BIT_SEEK_DONE)
+#define MG_READY_OK(s) (((s) & (MG_STAT_READY | \
+ (MG_REG_STATUS_BIT_BUSY | \
+ MG_REG_STATUS_BIT_WRITE_FAULT | \
+ MG_REG_STATUS_BIT_ERROR))) == MG_STAT_READY)
+
+/* Error register */
+#define MG_REG_ERR_AMNF 0x01
+#define MG_REG_ERR_ABRT 0x04
+#define MG_REG_ERR_IDNF 0x10
+#define MG_REG_ERR_UNC 0x40
+#define MG_REG_ERR_BBK 0x80
+
+/* error code for others */
+#define MG_ERR_NONE 0
+#define MG_ERR_TIMEOUT 0x100
+#define MG_ERR_INIT_STAT 0x101
+#define MG_ERR_TRANSLATION 0x102
+#define MG_ERR_CTRL_RST 0x103
+#define MG_ERR_NO_DRV_DATA 0x104
+
+#define MG_MAX_ERRORS 16 /* Max read/write errors/sector */
+#define MG_RESET_FREQ 4 /* Reset controller every 4th retry */
+
+/* command */
+#define MG_CMD_RD 0x20
+#define MG_CMD_WR 0x30
+#define MG_CMD_SLEEP 0x99
+#define MG_CMD_WAKEUP 0xC3
+#define MG_CMD_ID 0xEC
+#define MG_CMD_WR_CONF 0x3C
+#define MG_CMD_RD_CONF 0x40
+
+/* main structure for mflash driver */
+struct mg_host {
+ struct mg_drv_data *drv_data;
+ /* for future use */
+};
+
+/*
+ * Debugging macro and defines
+ */
+#undef DO_MG_DEBUG
+#ifdef DO_MG_DEBUG
+# define MG_DBG(fmt, args...) printf("%s:%d "fmt"\n", __func__,
__LINE__,##args)
+#else /* CONFIG_MG_DEBUG */
+# define MG_DBG(fmt, args...) do { } while(0)
+#endif /* CONFIG_MG_DEBUG */
+
+#endif
+
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 8081ee7..602edae 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -84,6 +84,7 @@ fat_register_device(block_dev_desc_t *dev_desc, int part_no)
return -1;
}
#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_MG_DISK) || \
defined(CONFIG_CMD_SATA) || \
defined(CONFIG_CMD_SCSI) || \
defined(CONFIG_CMD_USB) || \
@@ -987,6 +988,7 @@ file_fat_detectfs(void)
return 1;
}
#if defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_MG_DISK) || \
defined(CONFIG_CMD_SATA) || \
defined(CONFIG_CMD_SCSI) || \
defined(CONFIG_CMD_USB) || \
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index d771696..0ee2b58 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -83,5 +83,6 @@
#define CONFIG_CMD_VFD /* VFD support (TRAB) */
#define CONFIG_CMD_XIMG /* Load part of Multi Image */
#define CONFIG_CMD_AT91_SPIMUX /* AT91 MMC/SPI Mux Support */
+#define CONFIG_CMD_MG_DISK /* mGine m(g)flash IO node support */
#endif /* _CONFIG_CMD_ALL_H */
diff --git a/include/environment.h b/include/environment.h
index ea6b4d1..507e832 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -84,6 +84,18 @@
# endif
#endif /* CONFIG_ENV_IS_IN_NAND */
+#if defined(CONFIG_ENV_IS_IN_MG_DISK)
+# ifndef CONFIG_ENV_ADDR
+# error "Need to define CONFIG_ENV_ADDR when using CONFIG_ENV_IS_IN_MG_DISK"
+# endif
+# ifndef CONFIG_ENV_SIZE
+# error "Need to define CONFIG_ENV_SIZE when using CONFIG_ENV_IS_IN_MG_DISK"
+# endif
+# ifdef CONFIG_ENV_IS_EMBEDDED
+# error "CONFIG_ENV_IS_EMBEDDED not supported when using
CONFIG_ENV_IS_IN_MG_DISK"
+# endif
+#endif /* CONFIG_ENV_IS_IN_MG_DISK */
+
#ifdef USE_HOSTCC
# include <stdint.h>
#else
diff --git a/include/mg_disk.h b/include/mg_disk.h
new file mode 100644
index 0000000..bd767a1
--- /dev/null
+++ b/include/mg_disk.h
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2009 mGine co.
+ * unsik Kim <donari75(a)gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef MG_DISK_H_
+#define MG_DISK_H_
+
+#include <asm/types.h>
+
+/* private driver data */
+struct mg_drv_data {
+ /* base address of mflash */
+ u32 base;
+ /* Initialize hard reset, write protect, deep power down pins.
+ * Set these pins to GPIO and output high
+ */
+ void (*mg_ctrl_pin_init) (void);
+ /* Set hard reset pin for given level
+ * level : logical level of hard reset pin (0 or 1)
+ */
+ void (*mg_hdrst_pin) (u8 level);
+};
+
+struct mg_drv_data* mg_get_drv_data (void);
+
+unsigned int mg_disk_init (void);
+unsigned int mg_disk_read (u32 addr, u8 *buff, u32 len);
+unsigned int mg_disk_write(u32 addr, u8 *buff, u32 len);
+unsigned int mg_disk_write_sects(void *buff, u32 sect_num, u32 sect_cnt);
+unsigned int mg_disk_read_sects(void *buff, u32 sect_num, u32 sect_cnt);
+
+#endif /*MG_DISK_H_*/
diff --git a/include/part.h b/include/part.h
index 980fd04..3cdae02 100644
--- a/include/part.h
+++ b/include/part.h
@@ -100,6 +100,7 @@ block_dev_desc_t* scsi_get_dev(int dev);
block_dev_desc_t* usb_stor_get_dev(int dev);
block_dev_desc_t* mmc_get_dev(int dev);
block_dev_desc_t* systemace_get_dev(int dev);
+block_dev_desc_t* mg_disk_get_dev(int dev);
/* disk/part.c */
int get_partition_info (block_dev_desc_t * dev_desc, int part,
disk_partition_t *info);
---
2009/2/2 unsik Kim <donari75(a)gmail.com>:
> Hello?
>
> I fixed and added followings for your requests.
>
> 1. too long line length => fixed
>
> 2. not a linux coding style => fixed
>
> 3. add document (doc/README.mflash)
>
> 4. ARM only dependency and always init problem => fixed
>
> 5. msecs_to_hz function is changed.
> In some ARM platform, CONFIG_SYS_HZ is not 1000 (samsung s3c24xx,
> intel pxa25x, pxa27x)
> and get_timer() just return elapsed tick of OS timer.
> For the compatibility of these, I use #ifdef.
>
> Any comments, advice will be appreciated.
>
> Here is fixed patch.
>
> unsik Kim
>
> 2009/1/28 Wolfgang Denk <wd(a)denx.de>:
>> Dear Kim,
>>
>> In message <57afda040901052341g3b00f741r445c0ce8d33b7b71(a)mail.gmail.com> you wrote:
>>>
>>> I wrote mflash IO mode block device driver for U-Boot.
>>
>> Thanks for your contribution. Here a few comments:
>>
>>> diff --git a/common/Makefile b/common/Makefile
>>> index 93e3963..f93e575 100644
>>> --- a/common/Makefile
>>> +++ b/common/Makefile
>>> @@ -57,6 +57,7 @@ COBJS-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
>>> COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o
>>> COBJS-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o
>>> COBJS-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
>>> +COBJS-$(CONFIG_ENV_IS_IN_MG_DISK) += env_mgdisk.o
>>> COBJS-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
>>>
>>> # command
>>> @@ -138,6 +139,7 @@ endif
>>> COBJS-$(CONFIG_CMD_XIMG) += cmd_ximg.o
>>> COBJS-$(CONFIG_YAFFS2) += cmd_yaffs2.o
>>> COBJS-$(CONFIG_VFD) += cmd_vfd.o
>>> +COBJS-$(CONFIG_CMD_MG_DISK) += cmd_mgdisk.o
>>
>> Please keep such lists sorted.
>>
>> ...
>>> +U_BOOT_CMD(
>>> + mgd, 5, 0, do_mg_disk_cmd,
>>> + "mgd - mgine m[g]flash command\n",
>>> + ": mgine mflash IO mode (disk) command\n"
>>> + "\t- initialize : mgd init\n"
>>> + "\t- random read : mgd read [from] [to] [size]\n"
>>> + "\t\tbelow example read 256 bytes from 0x300000 of mflash\n"
>>> + "\t\tto 0xA0100000 of host memory\n"
>>> + "\t\tex) mgd read 0x300000 0xA0100000 256\n"
>>> + "\t- random write : mgd write [from] [to] [size]\n"
>>> + "\t\tex) mgd write 0xA0100000 0x300000 256\n"
>>> + "\t- sector read : mgd readsec [sector] [to] [counts]\n"
>>> + "\t\tbelow example read 10 sectors starts from 400 sector\n"
>>> + "\t\tto 0xA0100000\n"
>>> + "\t\tex) mgd readsec 400 0xA0100000 10\n"
>>> + "\t- sector write : mgd writesec [from] [sector] [counts]\n"
>>> +);
>>
>> Please avoid using TAB characters here.
>>
>> Also,pleas ebe terse - don;t give examples here. Rather add a
>> README.mflash file to the doc/ directory.
>>
>>> diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
>>> index 85025da..4945aeb 100644
>>> --- a/common/cmd_nvedit.c
>>> +++ b/common/cmd_nvedit.c
>>> @@ -59,8 +59,9 @@ DECLARE_GLOBAL_DATA_PTR;
>>> !defined(CONFIG_ENV_IS_IN_NAND) && \
>>> !defined(CONFIG_ENV_IS_IN_ONENAND) && \
>>> !defined(CONFIG_ENV_IS_IN_SPI_FLASH) && \
>>> + !defined(CONFIG_ENV_IS_IN_MG_DISK) && \
>>> !defined(CONFIG_ENV_IS_NOWHERE)
>>
>> Please keep lists sorted.
>>
>>> -# error Define one of
>>> CONFIG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|SPI_FLASH|NOWHERE}
>>> +# error Define one of
>>> CONFIG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|SPI_FLASH|MG_DISK|NOWHERE}
>>
>> Please keep lists sorted.
>>
>> Also note that your mailer wrapped long lines here, thus corrupting
>> the patch. Please fix your mailer.
>>
>> And please avoid such long lines, too!
>>
>> ...
>>> +void env_relocate_spec(void)
>>> +{
>>> + unsigned int err;
>>> + err = mg_disk_read(CONFIG_ENV_ADDR, (u_char *) env_ptr, CONFIG_ENV_SIZE);
>>> + if (err) {
>>> + puts ("*** Warning - mg_disk_read error, using default environment\n\n");
>>
>> Line too long.
>>
>>
>>> + set_default_env();
>>> + return;
>>> + }
>>> +
>>> + if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc) {
>>> + puts ("*** Warning - CRC error, using default environment\n\n");
>>> + set_default_env();
>>> + }
>>> +}
>>> +
>>> +int saveenv(void)
>>> +{
>>> + unsigned int err;
>>> + env_ptr->crc = crc32(0, env_ptr->data, ENV_SIZE);
>>> + err = mg_disk_write(CONFIG_ENV_ADDR, (u_char *) env_ptr, CONFIG_ENV_SIZE);
>>
>> Line too long.
>>
>>> + if (err)
>>> + puts ("*** Warning - mg_disk_write error\n\n");
>>> + return (int)err;
>>
>> The cast should not be needed here.
>>
>>> diff --git a/disk/part.c b/disk/part.c
>>> index e353cee..c007060 100644
>>> --- a/disk/part.c
>>> +++ b/disk/part.c
>>> @@ -39,7 +39,8 @@
>>> defined(CONFIG_CMD_SCSI) || \
>>> defined(CONFIG_CMD_USB) || \
>>> defined(CONFIG_MMC) || \
>>> - defined(CONFIG_SYSTEMACE) )
>>> + defined(CONFIG_SYSTEMACE) || \
>>> + defined(CONFIG_CMD_MG_DISK))
>>
>> Please keep lists sorted.
>>
>>> @@ -95,7 +99,8 @@ block_dev_desc_t *get_dev(char* ifname, int dev)
>>> defined(CONFIG_CMD_SCSI) || \
>>> defined(CONFIG_CMD_USB) || \
>>> defined(CONFIG_MMC) || \
>>> - defined(CONFIG_SYSTEMACE) )
>>> + defined(CONFIG_SYSTEMACE) || \
>>> + defined(CONFIG_CMD_MG_DISK))
>>
>> Ditto.
>>
>>> @@ -207,7 +212,8 @@ void dev_print (block_dev_desc_t *dev_desc)
>>> defined(CONFIG_CMD_SCSI) || \
>>> defined(CONFIG_CMD_USB) || \
>>> defined(CONFIG_MMC) || \
>>> - defined(CONFIG_SYSTEMACE) )
>>> + defined(CONFIG_SYSTEMACE) || \
>>> + defined(CONFIG_CMD_MG_DISK))
>>
>> Ditto.
>>
>>> diff --git a/disk/part_amiga.c b/disk/part_amiga.c
>>> index 6c3d748..b4c2820 100644
>>> --- a/disk/part_amiga.c
>>> +++ b/disk/part_amiga.c
>>> @@ -30,7 +30,8 @@
>>> defined(CONFIG_CMD_SCSI) || \
>>> defined(CONFIG_CMD_USB) || \
>>> defined(CONFIG_MMC) || \
>>> - defined(CONFIG_SYSTEMACE) ) && defined(CONFIG_AMIGA_PARTITION)
>>> + defined(CONFIG_SYSTEMACE) || \
>>> + defined(CONFIG_CMD_MG_DISK)) && defined(CONFIG_AMIGA_PARTITION)
>>
>> Ditto.
>>
>>> @@ -40,6 +41,8 @@
>>> #define PRINTF(fmt, args...)
>>> #endif
>>>
>>> +#define atoi(x) simple_strtoul(x,NULL,10)
>>
>> Please avoid that.
>>
>>> struct block_header
>>> {
>>> u32 id;
>>> diff --git a/disk/part_dos.c b/disk/part_dos.c
>>> index 4d778ec..30dc39f 100644
>>> --- a/disk/part_dos.c
>>> +++ b/disk/part_dos.c
>>> @@ -40,7 +40,8 @@
>>> defined(CONFIG_CMD_SCSI) || \
>>> defined(CONFIG_CMD_USB) || \
>>> defined(CONFIG_MMC) || \
>>> - defined(CONFIG_SYSTEMACE) ) && defined(CONFIG_DOS_PARTITION)
>>> + defined(CONFIG_SYSTEMACE) || \
>>> + defined(CONFIG_CMD_MG_DISK)) && defined(CONFIG_DOS_PARTITION)
>>
>> more incorrect sort order, even more following below.
>>
>>> diff --git a/drivers/block/mg_disk.c b/drivers/block/mg_disk.c
>>> new file mode 100644
>>> index 0000000..06c9bd8
>>> --- /dev/null
>>> +++ b/drivers/block/mg_disk.c
>>> @@ -0,0 +1,595 @@
>>> +/*
>>> + * (C) Copyright 2009 mGine co.
>>> + * unsik Kim <donari75(a)gmail.com>
>>> + *
>>> + * See file CREDITS for list of people who contributed to this
>>> + * project.
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> + * modify it under the terms of the GNU General Public License as
>>> + * published by the Free Software Foundation; either version 2 of
>>> + * the License, or (at your option) any later version.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>> + * GNU General Public License for more details.
>>> + *
>>> + * You should have received a copy of the GNU General Public License
>>> + * along with this program; if not, write to the Free Software
>>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>>> + * MA 02111-1307 USA
>>> + */
>>> +
>>> +#include <common.h>
>>> +#include <malloc.h>
>>> +#include <part.h>
>>> +#include <ata.h>
>>> +#include "mg_disk_prv.h"
>>> +
>>> +#ifdef CONFIG_CMD_MG_DISK
>>> +
>>> +#undef printk
>>> +#define printk printf
>>
>> Please don't.
>>
>>> +#undef KERN_ERR
>>> +#define KERN_ERR
>>> +#undef KERN_DEBUG
>>> +#define KERN_DEBUG
>>> +#undef KERN_INFO
>>> +#define KERN_INFO
>>
>> Please don't.
>>
>>> +#undef inb
>>> +#undef inw
>>> +#undef outb
>>> +#undef outw
>>> +
>>> +#define inb(a) (*(volatile unsigned char *)(a))
>>> +#define inw(a) (*(volatile unsigned short *)(a))
>>> +#define outb(v, a) (*(volatile unsigned char *)(a) = (v))
>>> +#define outw(v, a) (*(volatile unsigned short *)(a) = (v))
>>
>> A strict NO, NO here. Please never do that.
>>
>> Please do use theproper accessor functions that are needed for the
>> respective architecture. PLain volatile pointer accesses are bound to
>> fail. Never do that.
>>
>> ...
>>> + printk("%s: %s: status=0x%02x { ", name, msg, stat & 0xff);
>>> + if (stat & MG_REG_STATUS_BIT_BUSY) printk("Busy ");
>>> + if (stat & MG_REG_STATUS_BIT_READY) printk("DriveReady ");
>>> + if (stat & MG_REG_STATUS_BIT_WRITE_FAULT) printk("WriteFault ");
>>> + if (stat & MG_REG_STATUS_BIT_SEEK_DONE) printk("SeekComplete ");
>>> + if (stat & MG_REG_STATUS_BIT_DATA_REQ) printk("DataRequest ");
>>> + if (stat & MG_REG_STATUS_BIT_CORRECTED_ERROR) printk("CorrectedError ");
>>> + if (stat & MG_REG_STATUS_BIT_ERROR) printk("Error ");
>>
>> Bad coding style. Please reformat.
>>
>>> + printk("}\n");
>>> + if ((stat & MG_REG_STATUS_BIT_ERROR)) {
>>> + printk("%s: %s: error=0x%02x { ", name, msg, err & 0xff);
>>> + if (err & MG_REG_ERR_BBK) printk("BadSector ");
>>> + if (err & MG_REG_ERR_UNC) printk("UncorrectableError ");
>>> + if (err & MG_REG_ERR_IDNF) printk("SectorIdNotFound ");
>>> + if (err & MG_REG_ERR_ABRT) printk("DriveStatusError ");
>>> + if (err & MG_REG_ERR_AMNF) printk("AddrMarkNotFound ");
>>
>> Ditto.
>>
>>> +static unsigned int msecs_to_hz (u32 msec)
>>> +{
>>> + u32 hz = CONFIG_SYS_HZ / 1000 * msec;
>>> +
>>> + if (!hz)
>>> + hz = 1;
>>> +
>>> + return hz;
>>
>> This makes no sense. CONFIG_SYS_HZ is always 1000. Please consider it
>> a constant.
>>
>> ...
>>> + from = get_timer(0);
>>> + expire = from + msecs_to_hz(msec);
>>
>> I don;t understand y ou logic here. get_timer() is defined to operate
>> in munits of millisconds. What's the msecs_to_hz() stuff gotta do
>> here?
>>
>>> + } while (cur < expire);
>>
>> You are aware of the overflow issues buried here, are you?
>>
>>> + if (!err) {
>>> + if((iop->field_valid & 1) == 0) {
>>> + err = MG_ERR_TRANSLATION;
>>> + } else {
>>> + mg_ident_cpy((unsigned char*)mg_disk_dev.revision, iop->fw_rev,
>>> sizeof(mg_disk_dev.revision));
>>> + mg_ident_cpy((unsigned char*)mg_disk_dev.vendor, iop->model,
>>> sizeof(mg_disk_dev.vendor));
>>> + mg_ident_cpy((unsigned char*)mg_disk_dev.product, iop->serial_no,
>>> sizeof(mg_disk_dev.product));
>>
>> Lines way too long, and wrapped by mailer.
>>
>>> +static int mg_disk_reset (void)
>>> +{
>>> + struct mg_drv_data *prv_data = MG_HOST->drv_data;
>>> + s32 err;
>>> + u8 init_status;
>>> +
>>> + /* hdd rst low */
>>> + prv_data->mg_hdrst_pin(0);
>>> + err = mg_wait(MG_REG_STATUS_BIT_BUSY, 300);
>>> + if(err) return err;
>>
>> Please refoemat according to CodingStyle requirements.
>>
>>> + if ((err = mg_wait(MG_STAT_READY, 3000))) {
>>> + return err;
>>> + }
>>
>> No braces for one-liners, please.
>>
>>> +static unsigned int mg_do_read_sects(void *buff, u32 sect_num, u32 sect_cnt)
>>> +{
>>> + u32 i, j, err;
>>> + u8 *buff_ptr = buff;
>>> +
>>> + if ((err = mg_out(sect_num, sect_cnt, MG_CMD_RD))) {
>>> + return err;
>>> + }
>>
>> Ditto.
>>
>>> + for (i = 0; i < sect_cnt; i++) {
>>> + if ((err = mg_wait(MG_REG_STATUS_BIT_DATA_REQ, 3000))) {
>>> + return err;
>>> + }
>>
>> Ditto. And so on.
>>
>>> + MG_DBG("%u (0x%8.8x) sector read", sect_num + i, (sect_num + i) *
>>> MG_SECTOR_SIZE);
>>
>> Please check all line lengths!
>>
>>> diff --git a/lib_arm/board.c b/lib_arm/board.c
>>> index 2358beb..6a26bd2 100644
>>> --- a/lib_arm/board.c
>>> +++ b/lib_arm/board.c
>>> @@ -48,6 +48,7 @@
>>> #include <serial.h>
>>> #include <nand.h>
>>> #include <onenand_uboot.h>
>>> +#include <mg_disk.h>
>>>
>>> #ifdef CONFIG_DRIVER_SMC91111
>>> #include "../drivers/net/smc91111.h"
>>> @@ -348,6 +349,10 @@ void start_armboot (void)
>>> onenand_init();
>>> #endif
>>>
>>> +#if defined(CONFIG_CMD_MG_DISK)
>>> + mg_disk_init();
>>> +#endif
>>
>> Please don't.
>>
>> First it's wrong to add it for ARM only - what about other
>> architectures that want to use that technology?
>>
>> Second it's wrong to always call the init code. This shall be done
>> only upon first access. See the longish discussion we had for example
>> about how to handle the S-ATA init code - please see the archives.
>>
>> Best regards,
>>
>> Wolfgang Denk
>>
>> --
>> DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
>> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
>> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de
>> What is wanted is not the will to believe, but the will to find out,
>> which is the exact opposite.
>> -- Bertrand Russell, "Skeptical Essays", 1928
>>
>
--
unsik Kim <donari75(a)gmail.com>
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[U-Boot] [cfi-flash] Please pull git://www.denx.de/git/u-boot-cfi-flash.git
by Stefan Roese 11 Feb '09
by Stefan Roese 11 Feb '09
11 Feb '09
The following changes since commit ae5d8f613cec1a6af7bf1fc9c42a3b856f021023:
Heiko Schocher (1):
82xx serial, smc: Coding-Style cleanup serial SMC driver
are available in the git repository at:
git://www.denx.de/git/u-boot-cfi-flash.git master
Heiko Schocher (1):
cfi: make flash_get_info() non static
drivers/mtd/cfi_flash.c | 2 +-
include/flash.h | 3 +++
2 files changed, 4 insertions(+), 1 deletions(-)
2
1
Wolfgang,
The following changes since commit ae5d8f613cec1a6af7bf1fc9c42a3b856f021023:
Heiko Schocher (1):
82xx serial, smc: Coding-Style cleanup serial SMC driver
are available in the git repository at:
git://git.denx.de/u-boot-net.git master
Andy Fleming (1):
tsec: Fix a bug in soft-resetting
Ben Warren (1):
net: removed board-specific CONFIGs from MPC5xxx FEC driver
Mike Frysinger (1):
net/sntp.c: move ifdef into Makefile COBJS-$(...)
Simon Munton (1):
Fix 100Mbs ethernet operation on sh7763 based boards
ksi(a)koi8.net (1):
Fix MPC8260 with ethernet on SCC
cpu/mpc8260/cpu.c | 2 +-
drivers/net/mpc5xxx_fec.c | 28 +++-------------------------
drivers/net/sh_eth.h | 2 +-
drivers/net/tsec.c | 1 +
include/configs/BC3450.h | 5 +++--
include/configs/IceCube.h | 8 +++-----
include/configs/PM520.h | 5 +++--
include/configs/TB5200.h | 5 +++--
include/configs/TOP5200.h | 2 +-
include/configs/TQM5200.h | 5 +++--
include/configs/Total5200.h | 1 +
include/configs/canmb.h | 1 +
include/configs/cm5200.h | 1 +
include/configs/cpci5200.h | 1 +
include/configs/hmi1001.h | 1 +
include/configs/inka4x0.h | 5 +++--
include/configs/jupiter.h | 5 +++--
include/configs/mcc200.h | 7 ++++---
include/configs/mecp5200.h | 5 +++--
include/configs/motionpro.h | 1 +
include/configs/mucmc52.h | 1 +
include/configs/munices.h | 1 +
include/configs/o2dnt.h | 5 +++--
include/configs/pf5200.h | 5 +++--
include/configs/uc101.h | 1 +
include/configs/v38b.h | 1 +
net/Makefile | 2 +-
net/sntp.c | 4 ----
28 files changed, 52 insertions(+), 59 deletions(-)
2
1
This fixes MPC8260 compilation with ethernet on SCC. Probably was a
typo or something...
Signed-off-by: Sergey Kubushyn <ksi(a)koi8.net>
---
diff -purN u-boot.orig/cpu/mpc8260/cpu.c u-boot/cpu/mpc8260/cpu.c
--- u-boot.orig/cpu/mpc8260/cpu.c 2009-02-02 13:39:05.000000000 -0800
+++ u-boot/cpu/mpc8260/cpu.c 2009-02-06 15:29:28.000000000 -0800
@@ -327,7 +327,7 @@ int cpu_eth_init(bd_t *bis)
fec_initialize(bis);
#endif
#if defined(CONFIG_ETHER_ON_SCC)
- mpc82xx_scc_enet_initialize(bd);
+ mpc82xx_scc_enet_initialize(bis);
#endif
return 0;
}
---
******************************************************************
* KSI@home KOI8 Net < > The impossible we do immediately. *
* Las Vegas NV, USA < > Miracles require 24-hour notice. *
******************************************************************
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