December 2009 - U-Boot

[U-Boot] [PATCH v3] TWL4030: make LEDs selectable for twl4030_led_init()
by Grazvydas Ignotas 13 Dec '09

13 Dec '09

Not all boards have both LEDs hooked, so enabling both on boards with single LED will just waste power. Make it possible to choose LEDs by adding argument to twl4030_led_init(). Using this turn on only LEDB for pandora, leave both LEDs on for all other boards, as it was before this patch. Signed-off-by: Grazvydas Ignotas <notasas(a)gmail.com> --- board/logicpd/zoom1/zoom1.c | 2 +- board/logicpd/zoom2/zoom2.c | 2 +- board/overo/overo.c | 2 +- board/pandora/pandora.c | 2 +- board/ti/beagle/beagle.c | 2 +- board/timll/devkit8000/devkit8000.c | 2 +- drivers/misc/twl4030_led.c | 18 +++++++----------- include/twl4030.h | 6 +++++- 8 files changed, 18 insertions(+), 18 deletions(-) diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c index f4d3754..da501a7 100644 --- a/board/logicpd/zoom1/zoom1.c +++ b/board/logicpd/zoom1/zoom1.c @@ -62,7 +62,7 @@ int board_init(void) int misc_init_r(void) { twl4030_power_init(); - twl4030_led_init(); + twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); dieid_num_r(); /* diff --git a/board/logicpd/zoom2/zoom2.c b/board/logicpd/zoom2/zoom2.c index dadbeb6..560470f 100644 --- a/board/logicpd/zoom2/zoom2.c +++ b/board/logicpd/zoom2/zoom2.c @@ -148,7 +148,7 @@ int misc_init_r(void) { zoom2_identify(); twl4030_power_init(); - twl4030_led_init(); + twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); dieid_num_r(); /* diff --git a/board/overo/overo.c b/board/overo/overo.c index d42dc13..f363281 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -67,7 +67,7 @@ int board_init(void) int misc_init_r(void) { twl4030_power_init(); - twl4030_led_init(); + twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); #if defined(CONFIG_CMD_NET) setup_net_chip(); diff --git a/board/pandora/pandora.c b/board/pandora/pandora.c index 460ed12..e84c946 100644 --- a/board/pandora/pandora.c +++ b/board/pandora/pandora.c @@ -66,7 +66,7 @@ int misc_init_r(void) struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE; twl4030_power_init(); - twl4030_led_init(); + twl4030_led_init(TWL4030_LED_LEDEN_LEDBON); /* Configure GPIOs to output */ writel(~(GPIO14 | GPIO15 | GPIO16 | GPIO23), &gpio1_base->oe); diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 32d501e..3b4c9e7 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -107,7 +107,7 @@ int misc_init_r(void) struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE; twl4030_power_init(); - twl4030_led_init(); + twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); /* Configure GPIOs to output */ writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe); diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c index db7d2e2..95afaaa 100644 --- a/board/timll/devkit8000/devkit8000.c +++ b/board/timll/devkit8000/devkit8000.c @@ -76,7 +76,7 @@ int misc_init_r(void) twl4030_power_init(); #ifdef CONFIG_TWL4030_LED - twl4030_led_init(); + twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); #endif #ifdef CONFIG_DRIVER_DM9000 diff --git a/drivers/misc/twl4030_led.c b/drivers/misc/twl4030_led.c index bfdafef..33cea11 100644 --- a/drivers/misc/twl4030_led.c +++ b/drivers/misc/twl4030_led.c @@ -34,19 +34,15 @@ #include <twl4030.h> -#define LEDAON (0x1 << 0) -#define LEDBON (0x1 << 1) -#define LEDAPWM (0x1 << 4) -#define LEDBPWM (0x1 << 5) - -void twl4030_led_init(void) +void twl4030_led_init(unsigned char ledon_mask) { - unsigned char byte; - - /* enable LED */ - byte = LEDBPWM | LEDAPWM | LEDBON | LEDAON; + /* LEDs need to have corresponding PWMs enabled */ + if (ledon_mask & TWL4030_LED_LEDEN_LEDAON) + ledon_mask |= TWL4030_LED_LEDEN_LEDAPWM; + if (ledon_mask & TWL4030_LED_LEDEN_LEDBON) + ledon_mask |= TWL4030_LED_LEDEN_LEDBPWM; - twl4030_i2c_write_u8(TWL4030_CHIP_LED, byte, + twl4030_i2c_write_u8(TWL4030_CHIP_LED, ledon_mask, TWL4030_LED_LEDEN); } diff --git a/include/twl4030.h b/include/twl4030.h index f260ecb..df30d42 100644 --- a/include/twl4030.h +++ b/include/twl4030.h @@ -306,6 +306,10 @@ /* LED */ #define TWL4030_LED_LEDEN 0xEE +#define TWL4030_LED_LEDEN_LEDAON (1 << 0) +#define TWL4030_LED_LEDEN_LEDBON (1 << 1) +#define TWL4030_LED_LEDEN_LEDAPWM (1 << 4) +#define TWL4030_LED_LEDEN_LEDBPWM (1 << 5) /* Keypad */ #define TWL4030_KEYPAD_KEYP_CTRL_REG 0xD2 @@ -396,6 +400,6 @@ void twl4030_power_mmc_init(void); /* * LED */ -void twl4030_led_init(void); +void twl4030_led_init(unsigned char ledon_mask); #endif /* TWL4030_H */ -- 1.6.3.3

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[U-Boot] [PATCH] pandora: don't enable VAUX3, VDAC and VPLL2 regulators
by Grazvydas Ignotas 13 Dec '09

13 Dec '09

These regulators are not needed to start the kernel and only cause "incomplete constraints" warnings from kernel, so don't turn them on to save power. Signed-off-by: Grazvydas Ignotas <notasas(a)gmail.com> --- this patch depends on "TWL4030: make LEDs selectable for twl4030_led_init()" http://lists.denx.de/pipermail/u-boot/2009-December/065285.html board/pandora/pandora.c | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/board/pandora/pandora.c b/board/pandora/pandora.c index e84c946..75e4330 100644 --- a/board/pandora/pandora.c +++ b/board/pandora/pandora.c @@ -65,7 +65,6 @@ int misc_init_r(void) struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE; - twl4030_power_init(); twl4030_led_init(TWL4030_LED_LEDEN_LEDBON); /* Configure GPIOs to output */ -- 1.6.3.3

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[U-Boot] Please pull u-boot-ti/master
by s-paulraj＠ti.com 13 Dec '09

13 Dec '09

The following changes since commit 57bf140ac66f95c9c36c494e4d027551b5477b01: Wolfgang Denk (1): Merge branch 'next-sync' of git://git.denx.de/u-boot-arm into next are available in the git repository at: git://git.denx.de/u-boot-ti.git master Nick Thompson (3): Davinci: Table driven pinmux configuration Davinci: Configurable NAND chip selects Davinci: NAND enable ECC even when not in NAND boot mode Robert P. J. Day (1): Remove superfluous uses of V_PROMPT macro. board/davinci/common/misc.c | 31 ++++++++++++++++++++++++++++++ board/davinci/common/misc.h | 13 ++++++++++++ drivers/mtd/nand/davinci_nand.c | 27 ++++++++++++------------- include/asm-arm/arch-davinci/emif_defs.h | 13 ++++++++--- include/configs/apollon.h | 4 +-- include/configs/davinci_dm355evm.h | 1 + include/configs/davinci_dm355leopard.h | 1 + include/configs/davinci_dm365evm.h | 1 + include/configs/davinci_dm6467evm.h | 1 + include/configs/davinci_dvevm.h | 1 + include/configs/davinci_schmoogie.h | 1 + include/configs/davinci_sffsdr.h | 1 + include/configs/davinci_sonata.h | 1 + include/configs/omap2420h4.h | 8 ++---- include/configs/omap3_beagle.h | 4 +-- include/configs/omap3_evm.h | 4 +-- include/configs/omap3_overo.h | 4 +-- include/configs/omap3_pandora.h | 4 +-- include/configs/omap3_sdp3430.h | 3 +- include/configs/omap3_zoom1.h | 4 +-- 20 files changed, 84 insertions(+), 43 deletions(-)

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by Online-notification 13 Dec '09

13 Dec '09

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by Swan egret 12 Dec '09

12 Dec '09

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[U-Boot] Email ID Owner
by Ruben Clark 12 Dec '09

12 Dec '09

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[U-Boot] MPC8567 - TEXT BASE boot rom question... Half the message was missing.. trying again..
by Bob Winslow 12 Dec '09

12 Dec '09

Hi all, MPC8567 u-boot question for the experts out there... I must be doing something stupid, or I just don't understand how the 8567 boots from rom..., law entries, tables, etc... Our board is using a MPC8567 with a 4 MEGByte boot rom flash (16 bit).... It has just 512MB of DDR2 memory(no ram on the local bus). I can get u-boot to come up to the prompt ok but only with a rom image(u-boot.bin) of 4MEG BYTE size and the settings in the files, see below. I am using the BDI to write the 4meg image to the rom. I guess I don't understand TEXT_BASE very well.. and how it relates to the boot location: >From the manual: 4.4.3.3 Boot ROM Location The MPC8568E defines the default boot ROM address range to be 8 Mbytes at address 0x0_FF80_0000 to 0x0_FFFF_FFFF. However, which peripheral interface handles these boot ROM accesses can be selected at power on. What do I need to change to get a uboot image for the rom of reasonable size(say 512k instead of the 4meg)??? I have tried to change the value of TEXT_BASE to (xFFF8_0000) in the config.mk file(and other entries) but I must not be doing something else right.. Any suggestions/help would be greatly appreciated!! Am I writng the u-boot.bin to the wrong location in the flash when it is 512k? Below is the relevant info from the files I think: Thanks for your help in advance! Bob *********** config.mk file TEXT_BASE = 0xffc00000 ********** from the include/configs/sevis8567.h file /* * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) */ #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ #define CONFIG_SYS_CCSRBAR 0xe0000000 /* relocated CCSRBAR */ #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */ #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_FLASH_BASE 0xfe000000 /* start of FLASH 8M */ #define CONFIG_SYS_LBC_FLASH_BASE CONFIG_SYS_FLASH_BASE /*Chip select 0 - Flash*/ #define CONFIG_SYS_BR0_PRELIM 0xfe001001 #define CONFIG_SYS_OR0_PRELIM 0xfe006ff7 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ I have OR's and BR's for the others also, but should not be relevant to the question so I didnt include. #define CONFIG_SYS_LBC_LCRR 0x00030002 /* LB clock ratio reg */ #define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4 #define CONFIG_SYS_CPLD_BASE 0xD0000000 #define CONFIG_SYS_E1_IF_BASE 0xD1000000 #define CONFIG_SYS_DSP_BASE 0xD2000000 #define CONFIG_SYS_FPGA_BASE 0xD3000000 #define CONFIG_SYS_LBC_CPLD_BASE CONFIG_SYS_CPLD_BASE #define CONFIG_SYS_LBC_E1_IF_BASE CONFIG_SYS_E1_IF_BASE #define CONFIG_SYS_LBC_DSP_BASE CONFIG_SYS_DSP_BASE #define CONFIG_SYS_LBC_FPGA_BASE CONFIG_SYS_FPGA_BASE #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_LEN (~TEXT_BASE + 1)/* Reserved for Monitor */ #define CONFIG_SYS_MALLOC_LEN (384 * 1024) /* Reserved for malloc */ /* * Environment */ #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SECT_SIZE 0x2000 /* 256K(one sector) for env */ #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xD0000) #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_OVERWRITE /* allow user to overwrite serial and ethaddr */ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ **************** from board/sevis/law.c struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), /* LBC window */ SET_LAW(CONFIG_SYS_LBC_CPLD_BASE, LAW_SIZE_16M, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_LBC_E1_IF_BASE, LAW_SIZE_16M, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_LBC_DSP_BASE, LAW_SIZE_16M, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_LBC_FPGA_BASE, LAW_SIZE_16M, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_LBC_FLASH_BASE, LAW_SIZE_16M, LAW_TRGT_IF_LBC), }; int num_law_entries = ARRAY_SIZE(law_table); ****************** from board/sevis/tlb.c (the flash table entries I know must be wrong but the uboot comes up when these are set this way) struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR, MAS3_SX|MAS3_SW|MAS3_SR, 0, 0, 0, BOOKE_PAGESZ_4K, 0), SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024 , CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, MAS3_SX|MAS3_SW|MAS3_SR, 0, 0, 0, BOOKE_PAGESZ_4K, 0), SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024 , CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, MAS3_SX|MAS3_SW|MAS3_SR, 0, 0, 0, BOOKE_PAGESZ_4K, 0), SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024 , CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, MAS3_SX|MAS3_SW|MAS3_SR, 0, 0, 0, BOOKE_PAGESZ_4K, 0), /* TLB 1 Initializations */ /* * TLBe 0: 16M Non-cacheable, guarded * 0xff000000 16M FLASH (upper half) * Out of reset this entry is only 4K. */ SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE + 0x1000000, CONFIG_SYS_FLASH_BASE + 0x1000000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_16M, 1), /* * TLBe 1: 16M Non-cacheable, guarded * 0xfe000000 16M FLASH (lower half) */ SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 1, BOOKE_PAGESZ_16M, 1), /* * TLBe 2: 64M Non-cacheable, guarded * 0xe000_0000 1M CCSRBAR * 0xe200_0000 8M PCI1 IO * 0xe280_0000 8M PCIe IO */ SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 2, BOOKE_PAGESZ_64M, 1), /* * TLB 3+4: 512M DDR, cache disabled (needed for memory test) * 0x00000000 512M DDR System memory * Without SPD EEPROM configured DDR, this must be setup manually. */ SET_TLB_ENTRY (1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, 0, 3, BOOKE_PAGESZ_256M, 1), SET_TLB_ENTRY (1, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, 0, 4, BOOKE_PAGESZ_256M, 1), SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_16M, 1), SET_TLB_ENTRY(1, CONFIG_SYS_E1_IF_BASE, CONFIG_SYS_E1_IF_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 6, BOOKE_PAGESZ_16M, 1), SET_TLB_ENTRY(1, CONFIG_SYS_DSP_BASE, CONFIG_SYS_DSP_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 7, BOOKE_PAGESZ_16M, 1), SET_TLB_ENTRY(1, CONFIG_SYS_FPGA_BASE, CONFIG_SYS_FPGA_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 8, BOOKE_PAGESZ_16M, 1), }; int num_tlb_entries = ARRAY_SIZE(tlb_table);

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[U-Boot] fw_printenv operation and ENVSECTORS
by twebb 11 Dec '09

11 Dec '09

I'm having problems with fw_setenv. The reported error is "End of range reached, aborting". Looking further into fw_env.c, I see that in flash_write_buf(), ENVSECTORS is used although the README says that this value is not used for NOR devices. It appears to be used here. What value is this supposed to represent? Thanks, twebb

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[U-Boot] URGENT!!!
by FEDEX COURIER COMPANY 11 Dec '09

11 Dec '09

FEDEX COURIER SERVICE, 1 Curzon Street London, UK.W1J 5HD Tel: +447024031825 Hours: 24 Hours / 7 Days per week Dear Customer, SHIPMENT CODE: CPEL/OWN/9856 PARCEL #: EG2272 We have been waiting for you to contact us regarding the delivery of your package to you. We assumed that our contact details were given to you by Heineken. The content of your package itself is a Bank Draft worth of 850,000.00 Pounds. The package is registered with us for mailing by Heineken, We are sending you this email because your package is been registered on a Special Order. What you have to do now is to contact our Delivery Department for immediate dispatch of your package to your residential address. Note that as soon as our Delivery Team confirms your information, it will take only two working days (48 hours) for your package to be delivered to you. For your information, the VAT & Shipping charges as well as Insurance fees have been paid by Heineken before your package was registered. Note that the payment that is made on the Insurance, Premium & Clearance Certificates, are to certify that the Bank Draft is not a Drug Affiliated Fund (DAF) neither is it funds to sponsor Terrorism in your country. This will help you avoid any form of query from the Monetary Authority of your country. However, you will have to pay a sum of (£315.00) to the FedEx Delivery Department being full payment for the Security Keeping Fee of the FedEx Company as stated in our privacy terms & condition page. Also be informed that Heineken would have paid for the Security Keeping fee, but we do not accept such payment considering the facts that all items & packages that are registered with us have a time limitation and we cannot accept payment not knowing when you will be picking up the package or even responding to us. So we cannot take the risk to have accepted such payment in case of any possible demurrage. Kindly note that Heineken did not leave us with any further information. We hope that you respond to us as soon as possible because if you fail to respond before the expiry date we may refer the package to the United Kingdom Commission for Welfare as the package do not have a return address. Kindly contact the delivery department (FedEx Delivery Post) with the details given below: FedEx Delivery Post Contact Person: Mr. Thomas Connor Email: info.deliverydept2(a)googlemail.com Phone: +447024031825 kindly complete the below form and send it to the email address given above. This is mandatory to re-confirm your Postal address and telephone numbers. FULL NAMES: TELEPHONE: POSTAL ADDRESS: CITY: STATE: COUNTRY: As soon as your details are received, our delivery team will give you the necessary payment procedure so that you can effect the payment for the Security Keeping Fees and hence the delivery of your package to you takes place immediately. Kindly send all corresponding email messages to Mr. Thomas Connor Yours Faithfully, Mrs. Rebecca Rose. FedEx Online Management Team. All rights reserved. ? 1995-2009 FedEx

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[U-Boot] [PATCH] Fix compile error in .depend not being generated correctly
by Kumar Gala 11 Dec '09

11 Dec '09

make -C drivers/bios_emulator/ make[2]: Entering directory `drivers/bios_emulator' In file included from atibios.c:49: biosemui.h:47:21: error: biosemu.h: No such file or directory In file included from biosemu.c:50: biosemui.h:47:21: error: biosemu.h: No such file or directory In file included from besys.c:51: biosemui.h:47:21: error: biosemu.h: No such file or directory In file included from bios.c:45: biosemui.h:47:21: error: biosemu.h: No such file or directory x86emu/decode.c:40:28: error: x86emu/x86emui.h: No such file or directory x86emu/ops2.c:45:28: error: x86emu/x86emui.h: No such file or directory x86emu/ops.c:76:28: error: x86emu/x86emui.h: No such file or directory x86emu/prim_ops.c:103:28: error: x86emu/x86emui.h: No such file or directory x86emu/sys.c:43:28: error: x86emu/x86emui.h: No such file or directory x86emu/debug.c:42:28: error: x86emu/x86emui.h: No such file or directory Due to lack of proper CPPFLAGS being passed to .depend generation rule Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- drivers/bios_emulator/Makefile | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/bios_emulator/Makefile b/drivers/bios_emulator/Makefile index dd9c102..feba4da 100644 --- a/drivers/bios_emulator/Makefile +++ b/drivers/bios_emulator/Makefile @@ -23,6 +23,7 @@ EXTRA_CFLAGS += -I. -I./include -I$(TOPDIR)/include \ CFLAGS += $(EXTRA_CFLAGS) HOSTCFLAGS += $(EXTRA_CFLAGS) +CPPFLAGS += $(EXTRA_CFLAGS) all: $(LIB) -- 1.6.0.6

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