November 2009 - U-Boot

[U-Boot] [PATCH V4 0/4] add TI DA8xx support:
by Nick Thompson 04 Nov '09

04 Nov '09

Add initial support for DA8xx SoC's and the spectrum digital DA830 EVM board. See: http://www.ti.com http://www.spectrumdigital.com/ DA8xx is similar to DaVinci devices, but has a differing memory map and updated peripherals. It is intended that DaVinci drivers will be modified in some way to support these differences. A side effect of this is that there are some legacy code constructs in this patch set that are required to utilize the DaVinci drivers as they stand now. For example there are some volatiles and memory pointer types defined that are no longer considered acceptable. The new code in this patch set doesn't use these constructs and the remaining artefacts can be removed when the DaVinci drivers stop using them. This patch set is based on code originally from TI. --- Changes from previous patch set: Changes to use C structures and hardware accessors more extensively Remove pin mux changes as these are for davinci no just da8xx Corrected TI copyright messages (one line, no names) Added From attribution where required This patch set depends on "[PATCH V3] Davinci: add a pin multiplexer configuration API" posted on 2009-11-04 Applies to u-boot-ti:

1 0

[U-Boot] [PATCH] crc32: fix recent bug
by Joakim Tjernlund 04 Nov '09

04 Nov '09

patch "crc32: more optimizations" introduced a bug. This fixes it. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund(a)transmode.se> --- Perhaps I should resend as one whole patch with everything instead? lib_generic/crc32.c | 16 ++++++++-------- 1 files changed, 8 insertions(+), 8 deletions(-) diff --git a/lib_generic/crc32.c b/lib_generic/crc32.c index 2837d93..7f5abb1 100644 --- a/lib_generic/crc32.c +++ b/lib_generic/crc32.c @@ -180,7 +180,7 @@ uint32_t ZEXPORT crc32_no_comp(uint32_t crc, const Bytef *buf, uInt len) { const uint32_t *tab = crc_table; const uint32_t *b =(uint32_t *)buf; - size_t save_len; + size_t rem_len; #ifdef DYNAMIC_CRC_TABLE if (crc_table_empty) make_crc_table(); @@ -188,14 +188,14 @@ uint32_t ZEXPORT crc32_no_comp(uint32_t crc, const Bytef *buf, uInt len) crc = __cpu_to_le32(crc); /* Align it */ if(((long)b)&3 && len) { - uint8_t *p = (uint8_t *)b - 1; + uint8_t *p = (uint8_t *)b; do { - DO_CRC(*++p); /* use pre increment for speed */ - } while ((--len) && ((long)b)&3 ); - b = (uint32_t *)p + 1; + DO_CRC(*p++); + } while ((--len) && ((long)p)&3); + b = (uint32_t *)p; } - save_len = len & 3; + rem_len = len & 3; len = len >> 2; for (--b; len; --len) { /* load data 32 bits wide, xor data 32 bits wide. */ @@ -205,10 +205,10 @@ uint32_t ZEXPORT crc32_no_comp(uint32_t crc, const Bytef *buf, uInt len) DO_CRC(0); DO_CRC(0); } - len = save_len; + len = rem_len; /* And the last few bytes */ if (len) { - uint8_t *p = (uint8_t *)(b++) - 1; + uint8_t *p = (uint8_t *)(b + 1) - 1; do { DO_CRC(*++p); /* use pre increment for speed */ } while (--len); -- 1.6.4.4

1 0

[U-Boot] [PATCH] Save environment data to mmc.
by Terry Lv 04 Nov '09

04 Nov '09

This patch is to save environment data to mmc card. Signed-off-by: Terry Lv <r65388(a)freescale.com> --- common/cmd_nvedit.c | 3 +- common/env_mmc.c | 376 +++++++++++++++++++++++++++++++++++++++++++++++++ include/environment.h | 18 +++ 3 files changed, 396 insertions(+), 1 deletions(-) create mode 100644 common/env_mmc.c diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index 9f8d531..9168241 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -60,9 +60,10 @@ DECLARE_GLOBAL_DATA_PTR; !defined(CONFIG_ENV_IS_IN_NVRAM) && \ !defined(CONFIG_ENV_IS_IN_ONENAND) && \ !defined(CONFIG_ENV_IS_IN_SPI_FLASH) && \ + !defined(CONFIG_ENV_IS_IN_MMC) && \ !defined(CONFIG_ENV_IS_NOWHERE) # error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|ONENAND|\ -SPI_FLASH|MG_DISK|NVRAM|NOWHERE} +SPI_FLASH|MG_DISK|NVRAM|MMC|NOWHERE} #endif #define XMK_STR(x) #x diff --git a/common/env_mmc.c b/common/env_mmc.c new file mode 100644 index 0000000..a24d281 --- /dev/null +++ b/common/env_mmc.c @@ -0,0 +1,376 @@ +/* + * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. + + * (C) Copyright 2000-2006 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Andreas Heppel <aheppel(a)sysgo.de> + + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* #define DEBUG */ + +#include <common.h> + +#if defined(CONFIG_ENV_IS_IN_MMC) /* Environment is in MMC Flash */ + +#include <command.h> +#include <environment.h> +#include <linux/stddef.h> +#include <malloc.h> +#include <mmc.h> + +#if defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_MMC) +#define CMD_SAVEENV +#elif defined(CONFIG_ENV_OFFSET_REDUND) +#error Cannot use CONFIG_ENV_OFFSET_REDUND without CONFIG_CMD_ENV & CONFIG_CMD_MMC +#endif + +#if defined(CONFIG_ENV_SIZE_REDUND) && (CONFIG_ENV_SIZE_REDUND < CONFIG_ENV_SIZE) +#error CONFIG_ENV_SIZE_REDUND should not be less then CONFIG_ENV_SIZE +#endif + +#ifdef CONFIG_INFERNO +#error CONFIG_INFERNO not supported yet +#endif + +/* references to names in env_common.c */ +extern uchar default_environment[]; +extern int default_environment_size; + +char *env_name_spec = "MMC"; + +#ifdef ENV_IS_EMBEDDED +extern uchar environment[]; +env_t *env_ptr = (env_t *)(&environment[0]); +#else /* ! ENV_IS_EMBEDDED */ +env_t *env_ptr; +#endif /* ENV_IS_EMBEDDED */ + +/* local functions */ +#if !defined(ENV_IS_EMBEDDED) +static void use_default(void); +#endif + +DECLARE_GLOBAL_DATA_PTR; + +uchar env_get_char_spec(int index) +{ + return *((uchar *)(gd->env_addr + index)); +} + + +/* this is called before nand_init() + * so we can't read Nand to validate env data. + * Mark it OK for now. env_relocate() in env_common.c + * will call our relocate function which will does + * the real validation. + * + * When using a NAND boot image (like sequoia_nand), the environment + * can be embedded or attached to the U-Boot image in NAND flash. This way + * the SPL loads not only the U-Boot image from NAND but also the + * environment. + */ +int env_init(void) +{ +#if defined(CONFIG_IS_EMBEDDED) + size_t total; + int crc1_ok = 0, crc2_ok = 0; + env_t *tmp_env1, *tmp_env2; + + total = CONFIG_ENV_SIZE; + + tmp_env1 = env_ptr; + tmp_env2 = (env_t *)((ulong)env_ptr + CONFIG_ENV_SIZE); + + crc1_ok = (crc32(0, tmp_env1->data, ENV_SIZE) == tmp_env1->crc); + crc2_ok = (crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc); + + if (!crc1_ok && !crc2_ok) + gd->env_valid = 0; + else if (crc1_ok && !crc2_ok) + gd->env_valid = 1; + else if (!crc1_ok && crc2_ok) + gd->env_valid = 2; + else { + /* both ok - check serial */ + if (tmp_env1->flags == 255 && tmp_env2->flags == 0) + gd->env_valid = 2; + else if (tmp_env2->flags == 255 && tmp_env1->flags == 0) + gd->env_valid = 1; + else if (tmp_env1->flags > tmp_env2->flags) + gd->env_valid = 1; + else if (tmp_env2->flags > tmp_env1->flags) + gd->env_valid = 2; + else /* flags are equal - almost impossible */ + gd->env_valid = 1; + } + + if (gd->env_valid == 1) + env_ptr = tmp_env1; + else if (gd->env_valid == 2) + env_ptr = tmp_env2; + +#else /* ENV_IS_EMBEDDED */ + gd->env_addr = (ulong)&default_environment[0]; + gd->env_valid = 1; + +#endif /* ENV_IS_EMBEDDED */ + + return 0; +} + +#ifdef CMD_SAVEENV +/* + * The legacy NAND code saved the environment in the first NAND device i.e., + * nand_dev_desc + 0. This is also the behaviour using the new NAND code. + */ +#ifdef CONFIG_ENV_OFFSET_REDUND +int saveenv(void) +{ + size_t total; + uint blk_start = 0, blk_cnt = 0, n = 0; + struct mmc *mmc = find_mmc_device(0); + + env_ptr->flags++; + total = CONFIG_ENV_SIZE; + + if (!mmc) { + puts("No MMC card found\n"); + return; + } + + if (mmc_init(mmc)) { + puts("MMC init failed\n"); + return 1; + } + + if (gd->env_valid == 1) { + puts("Writing to redundant MMC... "); + blk_start = (CONFIG_ENV_OFFSET_REDUND % 512) ? \ + ((CONFIG_ENV_OFFSET_REDUND / 512) + 1) : (CONFIG_ENV_OFFSET_REDUND / 512); + blk_cnt = (total % 512) ? ((total / 512) + 1) : (total / 512); + n = mmc->block_dev.block_write(0, blk_start , blk_cnt, (u_char *)env_ptr); + } else { + puts("Writing to MMC... "); + blk_start = (CONFIG_ENV_OFFSET % 512) ? \ + ((CONFIG_ENV_OFFSET / 512) + 1) : (CONFIG_ENV_OFFSET / 512); + blk_cnt = (total % 512) ? ((total / 512) + 1) : (total / 512); + n = mmc->block_dev.block_write(0, blk_start , blk_cnt, (u_char *)env_ptr); + } + if ((n != blk_cnt) || (total != CONFIG_ENV_SIZE)) { + puts("failed\n"); + return 1; + } + + puts("done\n"); + gd->env_valid = (gd->env_valid == 2 ? 1 : 2); + return 0; +} +#else /* ! CONFIG_ENV_OFFSET_REDUND */ +int saveenv(void) +{ + size_t total; + uint blk_start = 0, blk_cnt = 0, n = 0; + struct mmc *mmc = find_mmc_device(0); + + if (!mmc) { + puts("No MMC card found\n"); + return; + } + + if (mmc_init(mmc)) { + puts("MMC init failed\n"); + return 1; + } + + puts("Writing to MMC... "); + total = CONFIG_ENV_SIZE; + blk_start = (CONFIG_ENV_OFFSET % 512) ? \ + ((CONFIG_ENV_OFFSET / 512) + 1) : (CONFIG_ENV_OFFSET / 512); + blk_cnt = (total % 512) ? ((total / 512) + 1) : (total / 512); + n = mmc->block_dev.block_write(0, blk_start , blk_cnt, (u_char *)env_ptr); + if ((n != blk_cnt) || (total != CONFIG_ENV_SIZE)) { + puts("failed\n"); + return 1; + } + + puts("done\n"); + return 0; +} +#endif /* CONFIG_ENV_OFFSET_REDUND */ +#endif /* CMD_SAVEENV */ + +#ifdef CONFIG_ENV_OFFSET_REDUND +void env_relocate_spec(void) +{ +#if !defined(ENV_IS_EMBEDDED) + size_t total; + int crc1_ok = 0, crc2_ok = 0; + env_t *tmp_env1 = NULL, *tmp_env2 = NULL; + uint blk_start = 0, blk_cnt = 0, n = 0; + struct mmc *mmc = find_mmc_device(0); + + if (!mmc) { + puts("No MMC card found\n"); + return; + } + + if (mmc_init(mmc)) { + puts("MMC init failed\n"); + goto use_default; + } + + total = CONFIG_ENV_SIZE; + + tmp_env1 = (env_t *)malloc(CONFIG_ENV_SIZE); + if (!tmp_env1) { + puts("Not enough memory!\n"); + goto use_default; + } + memset(tmp_env1, 0, CONFIG_ENV_SIZE); + + tmp_env2 = (env_t *)malloc(CONFIG_ENV_SIZE); + if (!tmp_env2) { + puts("Not enough memory!\n"); + goto use_default; + } + memset(tmp_env2, 0, CONFIG_ENV_SIZE); + + puts("Loading environment from mmc... "); + + blk_start = (CONFIG_ENV_OFFSET % 512) ? \ + ((CONFIG_ENV_OFFSET / 512) + 1) : (CONFIG_ENV_OFFSET / 512); + blk_cnt = (total % 512) ? ((total / 512) + 1) : (total / 512); + + n = mmc->block_dev.block_read(0, blk_start, blk_cnt, (uchar *)tmp_env1); + + if (n != blk_cnt) { + puts("failed\n"); + goto use_default; + } + puts("done\n"); + + puts("Loading redundant environment from mmc... "); + + blk_start = (CONFIG_ENV_OFFSET_REDUND % 512) ? \ + ((CONFIG_ENV_OFFSET_REDUND / 512) + 1) : (CONFIG_ENV_OFFSET_REDUND / 512); + blk_cnt = (total % 512) ? ((total / 512) + 1) : (total / 512); + + n = mmc->block_dev.block_read(0, blk_start, blk_cnt, (uchar *)tmp_env2); + + if (n != blk_cnt) { + puts("failed\n"); + goto use_default; + } + puts("done\n"); + + crc1_ok = (crc32(0, tmp_env1->data, ENV_SIZE) == tmp_env1->crc); + crc2_ok = (crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc); + + if (!crc1_ok && !crc2_ok) + goto use_default; + else if (crc1_ok && !crc2_ok) + gd->env_valid = 1; + else if (!crc1_ok && crc2_ok) + gd->env_valid = 2; + else { + /* both ok - check serial */ + if (tmp_env1->flags == 255 && tmp_env2->flags == 0) + gd->env_valid = 2; + else if (tmp_env2->flags == 255 && tmp_env1->flags == 0) + gd->env_valid = 1; + else if (tmp_env1->flags > tmp_env2->flags) + gd->env_valid = 1; + else if (tmp_env2->flags > tmp_env1->flags) + gd->env_valid = 2; + else /* flags are equal - almost impossible */ + gd->env_valid = 1; + } + + free(env_ptr); + if (gd->env_valid == 1) { + env_ptr = tmp_env1; + free(tmp_env2); + } else { + env_ptr = tmp_env2; + free(tmp_env1); + } + + return; + +use_default: + if (tmp_env1) + free(tmp_env1); + if (tmp_env2) + free(tmp_env2); + return use_default(); + +#endif /* ! ENV_IS_EMBEDDED */ +} +#else /* ! CONFIG_ENV_OFFSET_REDUND */ +/* + * The legacy NAND code saved the environment in the first NAND device i.e., + * nand_dev_desc + 0. This is also the behaviour using the new NAND code. + */ +void env_relocate_spec(void) +{ +#if !defined(ENV_IS_EMBEDDED) + size_t total; + uint blk_start = 0, blk_cnt = 0, n = 0; + struct mmc *mmc = find_mmc_device(0); + + if (!mmc) { + puts("No MMC card found\n"); + return; + } + + if (mmc_init(mmc)) { + puts("MMC init failed\n"); + return; + } + + total = CONFIG_ENV_SIZE; + + blk_start = (CONFIG_ENV_OFFSET % 512) ? \ + ((CONFIG_ENV_OFFSET / 512) + 1) : (CONFIG_ENV_OFFSET / 512); + blk_cnt = (total % 512) ? ((total / 512) + 1) : (total / 512); + + n = mmc->block_dev.block_read(0, blk_start, blk_cnt, (uchar *)env_ptr); + + if ((n != blk_cnt) || (total != CONFIG_ENV_SIZE)) + return use_default(); + + if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc) + return use_default(); +#endif /* ! ENV_IS_EMBEDDED */ +} +#endif /* CONFIG_ENV_OFFSET_REDUND */ + +#if !defined(ENV_IS_EMBEDDED) +static void use_default() +{ + puts ("*** Warning - bad CRC or NAND, using default environment\n\n"); + set_default_env(); +} +#endif + +#endif /* CONFIG_ENV_IS_IN_MMC */ diff --git a/include/environment.h b/include/environment.h index b9924fd..0b72e0b 100644 --- a/include/environment.h +++ b/include/environment.h @@ -94,6 +94,24 @@ # endif #endif /* CONFIG_ENV_IS_IN_MG_DISK */ +#if defined(CONFIG_ENV_IS_IN_MMC) +# ifndef CONFIG_ENV_OFFSET +# error "Need to define CONFIG_ENV_OFFSET when using CONFIG_ENV_IS_IN_MMC" +# endif +# ifndef CONFIG_ENV_ADDR +# define CONFIG_ENV_ADDR (CONFIG_ENV_OFFSET) +# endif +# ifndef CONFIG_ENV_OFFSET +# define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) +# endif +# ifdef CONFIG_ENV_OFFSET_REDUND +# define CONFIG_SYS_REDUNDAND_ENVIRONMENT +# endif +# ifdef CONFIG_ENV_IS_EMBEDDED +# define ENV_IS_EMBEDDED 1 +# endif +#endif /* CONFIG_ENV_IS_IN_MMC */ + /* Embedded env is only supported for some flash types */ #ifdef CONFIG_ENV_IS_EMBEDDED # if !defined(CONFIG_ENV_IS_IN_FLASH) && \ -- 1.6.0.4

2 1

[U-Boot] [PATCH] crc32: more optimizations
by Joakim Tjernlund 04 Nov '09

04 Nov '09

Shave off yet 4 bytes and make if faster for unaligned and/or len & 3 != 0. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund(a)transmode.se> --- Now I am done with crc32 optimizations. Someone should look at porting over crc32_be from linux since CRC32 BE is used by bzip and it could probably benefit from a faster CRC routine. lib_generic/crc32.c | 18 +++++++++--------- 1 files changed, 9 insertions(+), 9 deletions(-) diff --git a/lib_generic/crc32.c b/lib_generic/crc32.c index 737587a..2837d93 100644 --- a/lib_generic/crc32.c +++ b/lib_generic/crc32.c @@ -188,30 +188,30 @@ uint32_t ZEXPORT crc32_no_comp(uint32_t crc, const Bytef *buf, uInt len) crc = __cpu_to_le32(crc); /* Align it */ if(((long)b)&3 && len) { + uint8_t *p = (uint8_t *)b - 1; do { - uint8_t *p = (uint8_t *)b; - DO_CRC(*p++); - b = (void *)p; + DO_CRC(*++p); /* use pre increment for speed */ } while ((--len) && ((long)b)&3 ); + b = (uint32_t *)p + 1; } save_len = len & 3; len = len >> 2; for (--b; len; --len) { /* load data 32 bits wide, xor data 32 bits wide. */ - crc ^= *++b; /* use pre increment below(*++b) for speed */ + crc ^= *++b; /* use pre increment for speed */ DO_CRC(0); DO_CRC(0); DO_CRC(0); DO_CRC(0); } - b++; /* point to next byte(s) */ len = save_len; /* And the last few bytes */ - for (; len; --len) { - uint8_t *p = (uint8_t *)b; - DO_CRC(*p++); - b = (void *)p; + if (len) { + uint8_t *p = (uint8_t *)(b++) - 1; + do { + DO_CRC(*++p); /* use pre increment for speed */ + } while (--len); } return __le32_to_cpu(crc); -- 1.6.4.4

1 0

[U-Boot] [PATCH v2] fsl_pci_init_port end-point initialization is broken
by Kumar Gala 04 Nov '09

04 Nov '09

commit 70ed869e broke fsl pcie end-point initialization. Returning 0 is not correct. The function must return the first free bus number for the next controller. fsl_pci_init() must still be called and a bus allocated even if the controller is an end-point. Signed-off-by: Ed Swarthout <Ed.Swarthout(a)freescale.com> Acked-by: Vivek Mahajan <vivek.mahajan(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- Guys, I want to revert commit 70ed869e and replace it with this. There is no reason to pass in pci_ep we can determine that internally. I will also change the board code to use fsl_is_pci_agent and kill off is_fsl_pci_agent (post november u-boot release). Can one of you test this out. - k drivers/pci/fsl_pci_init.c | 18 +++++++++++++++++- include/asm-ppc/fsl_pci.h | 1 + 2 files changed, 18 insertions(+), 1 deletions(-) diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 87944bf..170cc25 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -1,5 +1,5 @@ /* - * Copyright 2007 Freescale Semiconductor, Inc. + * Copyright 2007-2009 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -42,6 +42,7 @@ DECLARE_GLOBAL_DATA_PTR; #define FSL_PCI_PBFR 0x44 #define FSL_PCIE_CAP_ID 0x4c #define FSL_PCIE_CFG_RDY 0x4b0 +#define FSL_PROG_IF_AGENT 0x1 void pciauto_prescan_setup_bridge(struct pci_controller *hose, pci_dev_t dev, int sub_bus); @@ -412,6 +413,16 @@ void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data) } } +int fsl_is_pci_agent(struct pci_controller *hose) +{ + u8 prog_if; + pci_dev_t dev = PCI_BDF(hose->first_busno, 0, 0); + + pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prog_if); + + return (prog_if == FSL_PROG_IF_AGENT); +} + int fsl_pci_init_port(struct fsl_pci_info *pci_info, struct pci_controller *hose, int busno) { @@ -450,6 +461,11 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info, fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); + if (fsl_is_pci_agent(hose)) { + fsl_pci_config_unlock(hose); + hose->last_busno = hose->first_busno; + } + printf(" PCIE%x on bus %02x - %02x\n", pci_info->pci_num, hose->first_busno, hose->last_busno); diff --git a/include/asm-ppc/fsl_pci.h b/include/asm-ppc/fsl_pci.h index 2790da7..a5f72f5 100644 --- a/include/asm-ppc/fsl_pci.h +++ b/include/asm-ppc/fsl_pci.h @@ -25,6 +25,7 @@ int is_fsl_pci_agent(enum law_trgt_if trgt, u32 host_agent); int is_fsl_pci_cfg(enum law_trgt_if trgt, u32 io_sel); +int fsl_is_pci_agent(struct pci_controller *hose); void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data); void fsl_pci_config_unlock(struct pci_controller *hose); void ft_fsl_pci_setup(void *blob, const char *pci_alias, -- 1.6.0.6

2 1

[U-Boot] [PATCH] crc32: minor cleanups and smaller size.
by Joakim Tjernlund 04 Nov '09

04 Nov '09

Don't optimize for len < 4. This reduces size with 8 bytes too. This crc32 impl is smaller that the orginal if crc32 and crc32_no_comp is impl. two separate functions(like the orginal). That would, however, be a waste of space when both are defined. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund(a)transmode.se> --- lib_generic/crc32.c | 44 +++++++++++++++++++++----------------------- 1 files changed, 21 insertions(+), 23 deletions(-) diff --git a/lib_generic/crc32.c b/lib_generic/crc32.c index 05b1431..737587a 100644 --- a/lib_generic/crc32.c +++ b/lib_generic/crc32.c @@ -14,6 +14,7 @@ #include <stdint.h> #endif #include <asm/byteorder.h> +#include <u-boot/crc.h> #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) #include <watchdog.h> @@ -175,47 +176,44 @@ const uint32_t * ZEXPORT get_crc_table() /* No ones complement version. JFFS2 (and other things ?) * don't use ones compliment in their CRC calculations. */ -uint32_t ZEXPORT crc32_no_comp(uint32_t crc, const Bytef *p, uInt len) +uint32_t ZEXPORT crc32_no_comp(uint32_t crc, const Bytef *buf, uInt len) { const uint32_t *tab = crc_table; - const uint32_t *b =(uint32_t *)p; - + const uint32_t *b =(uint32_t *)buf; + size_t save_len; #ifdef DYNAMIC_CRC_TABLE if (crc_table_empty) make_crc_table(); #endif crc = __cpu_to_le32(crc); /* Align it */ - if(((long)b)&3 && len){ + if(((long)b)&3 && len) { do { uint8_t *p = (uint8_t *)b; DO_CRC(*p++); b = (void *)p; } while ((--len) && ((long)b)&3 ); } - if(len >= 4){ + + save_len = len & 3; + len = len >> 2; + for (--b; len; --len) { /* load data 32 bits wide, xor data 32 bits wide. */ - size_t save_len = len & 3; - len = len >> 2; - --b; /* use pre increment below(*++b) for speed */ - do { - crc ^= *++b; - DO_CRC(0); - DO_CRC(0); - DO_CRC(0); - DO_CRC(0); - } while (--len); - b++; /* point to next byte(s) */ - len = save_len; + crc ^= *++b; /* use pre increment below(*++b) for speed */ + DO_CRC(0); + DO_CRC(0); + DO_CRC(0); + DO_CRC(0); } + b++; /* point to next byte(s) */ + len = save_len; /* And the last few bytes */ - if(len){ - do { - uint8_t *p = (uint8_t *)b; - DO_CRC(*p++); - b = (void *)p; - } while (--len); + for (; len; --len) { + uint8_t *p = (uint8_t *)b; + DO_CRC(*p++); + b = (void *)p; } + return __le32_to_cpu(crc); } #undef DO_CRC -- 1.6.4.4

1 0

[U-Boot] [PATCH] ppc: Update README about the new GOT ptr.
by Joakim Tjernlund 04 Nov '09

04 Nov '09

r14 is no longer used as non volatile GOT ptr. Instead the volatile r12 is used so be sure to do GET_GOT in asm code when you need to access global data. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund(a)transmode.se> --- README | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/README b/README index 744f6bf..bfd9498 100644 --- a/README +++ b/README @@ -3916,7 +3916,9 @@ For PowerPC, the following registers have specific use: R30: GOT pointer R31: frame pointer - (U-Boot also uses R14 as internal GOT pointer.) + (U-Boot also uses R12 as internal GOT pointer. r12 + is a volatile register so r12 needs to be reset when + going back and forth between asm and C) ==> U-Boot will use R2 to hold a pointer to the global data -- 1.6.4.4

1 0

[U-Boot] [PATCH ARM] Move s3c24x0 header files to asm-arm/arch-s3c24x0/
by kevin.morfitt＠fearnside-systems.co.uk 04 Nov '09

04 Nov '09

This patch moves the s3c24x0 header files from include/ to include/asm-arm/arch-s3c24x0/. checkpatch.pl showed 2 errors and 3 warnings. The 2 errors were both due to a non-UTF8 character in David M?ller's name: ERROR: Invalid UTF-8, patch and commit message should be encoded in UTF-8 #489: FILE: include/asm-arm/arch-s3c24x0/s3c2410.h:3: + * David M?ller ELSOFT AG Switzerland. d.mueller(a)elsoft.ch As David's name correctly contains a non-UTF8 character I haven't fixed these errors. The 3 warnings were all because of the use of 'volatile' in s3c24x0.h: WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt #673: FILE: include/asm-arm/arch-s3c24x0/s3c24x0.h:35: +typedef volatile u8 S3C24X0_REG8; +typedef volatile u16 S3C24X0_REG16; +typedef volatile u32 S3C24X0_REG32; I'll fix these errors in another patch. Tested by running MAKEALL for ARM8 targets and ensuring there were no new errors or warnings. Signed-off-by: Kevin Morfitt <kevin.morfitt(a)fearnside-systems.co.uk> --- board/mpl/vcma9/vcma9.c | 2 +- board/mpl/vcma9/vcma9.h | 2 +- board/samsung/smdk2400/smdk2400.c | 2 +- board/samsung/smdk2410/smdk2410.c | 2 +- board/sbc2410x/sbc2410x.c | 2 +- board/trab/cmd_trab.c | 2 +- board/trab/rs485.c | 2 +- board/trab/rs485.h | 2 +- board/trab/trab.c | 2 +- board/trab/trab_fkt.c | 2 +- board/trab/tsc2000.c | 2 +- board/trab/vfd.c | 2 +- cpu/arm920t/s3c24x0/interrupts.c | 4 +- cpu/arm920t/s3c24x0/speed.c | 4 +- cpu/arm920t/s3c24x0/timer.c | 4 +- cpu/arm920t/s3c24x0/usb.c | 4 +- cpu/arm920t/s3c24x0/usb_ohci.c | 4 +- drivers/i2c/s3c24x0_i2c.c | 4 +- drivers/mtd/nand/s3c2410_nand.c | 2 +- drivers/rtc/s3c24x0_rtc.c | 4 +- drivers/serial/serial_s3c24x0.c | 4 +- include/asm-arm/arch-s3c24x0/s3c2400.h | 136 +++++++ include/asm-arm/arch-s3c24x0/s3c2410.h | 146 +++++++ include/asm-arm/arch-s3c24x0/s3c24x0.h | 656 ++++++++++++++++++++++++++++++++ include/s3c2400.h | 136 ------- include/s3c2410.h | 146 ------- include/s3c24x0.h | 656 -------------------------------- 27 files changed, 967 insertions(+), 967 deletions(-) create mode 100644 include/asm-arm/arch-s3c24x0/s3c2400.h create mode 100644 include/asm-arm/arch-s3c24x0/s3c2410.h create mode 100644 include/asm-arm/arch-s3c24x0/s3c24x0.h delete mode 100644 include/s3c2400.h delete mode 100644 include/s3c2410.h delete mode 100644 include/s3c24x0.h diff --git a/board/mpl/vcma9/vcma9.c b/board/mpl/vcma9/vcma9.c index 4d8b579..f3bd288 100644 --- a/board/mpl/vcma9/vcma9.c +++ b/board/mpl/vcma9/vcma9.c @@ -27,7 +27,7 @@ #include <common.h> #include <netdev.h> -#include <s3c2410.h> +#include <asm/arch/s3c2410.h> #include <stdio_dev.h> #include <i2c.h> diff --git a/board/mpl/vcma9/vcma9.h b/board/mpl/vcma9/vcma9.h index f46e0e4..9f32808 100644 --- a/board/mpl/vcma9/vcma9.h +++ b/board/mpl/vcma9/vcma9.h @@ -25,7 +25,7 @@ * Global routines used for VCMA9 *****************************************************************************/ -#include <s3c2410.h> +#include <asm/arch/s3c2410.h> extern int mem_test(unsigned long start, unsigned long ramsize,int mode); diff --git a/board/samsung/smdk2400/smdk2400.c b/board/samsung/smdk2400/smdk2400.c index 42bf008..be0c70a 100644 --- a/board/samsung/smdk2400/smdk2400.c +++ b/board/samsung/smdk2400/smdk2400.c @@ -27,7 +27,7 @@ #include <common.h> #include <netdev.h> -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/board/samsung/smdk2410/smdk2410.c b/board/samsung/smdk2410/smdk2410.c index fde7730..a8cf287 100644 --- a/board/samsung/smdk2410/smdk2410.c +++ b/board/samsung/smdk2410/smdk2410.c @@ -27,7 +27,7 @@ #include <common.h> #include <netdev.h> -#include <s3c2410.h> +#include <asm/arch/s3c2410.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/board/sbc2410x/sbc2410x.c b/board/sbc2410x/sbc2410x.c index 7452c1f..6768c02 100644 --- a/board/sbc2410x/sbc2410x.c +++ b/board/sbc2410x/sbc2410x.c @@ -30,7 +30,7 @@ #include <common.h> #include <netdev.h> -#include <s3c2410.h> +#include <asm/arch/s3c2410.h> #if defined(CONFIG_CMD_NAND) #include <linux/mtd/nand.h> diff --git a/board/trab/cmd_trab.c b/board/trab/cmd_trab.c index 04a3607..a01ffcc 100644 --- a/board/trab/cmd_trab.c +++ b/board/trab/cmd_trab.c @@ -25,7 +25,7 @@ #include <common.h> #include <command.h> -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> #include <rtc.h> /* diff --git a/board/trab/rs485.c b/board/trab/rs485.c index 7d5c0a2..f402c59 100644 --- a/board/trab/rs485.c +++ b/board/trab/rs485.c @@ -22,7 +22,7 @@ */ #include <common.h> -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> #include "rs485.h" static void rs485_setbrg (void); diff --git a/board/trab/rs485.h b/board/trab/rs485.h index 9f0a5b9..4a2d83f 100644 --- a/board/trab/rs485.h +++ b/board/trab/rs485.h @@ -24,7 +24,7 @@ #ifndef _RS485_H_ #define _RS485_H_ -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> int rs485_init (void); int rs485_getc (void); diff --git a/board/trab/trab.c b/board/trab/trab.c index ea782a9..f8836ff 100644 --- a/board/trab/trab.c +++ b/board/trab/trab.c @@ -26,7 +26,7 @@ #include <common.h> #include <netdev.h> #include <malloc.h> -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> #include <command.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/board/trab/trab_fkt.c b/board/trab/trab_fkt.c index dc2a8d7..940e12f 100644 --- a/board/trab/trab_fkt.c +++ b/board/trab/trab_fkt.c @@ -26,7 +26,7 @@ #include <common.h> #include <exports.h> #include <timestamp.h> -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> #include "tsc2000.h" #include "rs485.h" diff --git a/board/trab/tsc2000.c b/board/trab/tsc2000.c index fc501a8..f757202 100644 --- a/board/trab/tsc2000.c +++ b/board/trab/tsc2000.c @@ -26,7 +26,7 @@ */ #include <common.h> -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> #include <asm/io.h> #include <div64.h> #include "tsc2000.h" diff --git a/board/trab/vfd.c b/board/trab/vfd.c index d5ad5bb..8d9a057 100644 --- a/board/trab/vfd.c +++ b/board/trab/vfd.c @@ -37,7 +37,7 @@ #include <stdarg.h> #include <linux/types.h> #include <stdio_dev.h> -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/cpu/arm920t/s3c24x0/interrupts.c b/cpu/arm920t/s3c24x0/interrupts.c index 9148946..3e8422e 100644 --- a/cpu/arm920t/s3c24x0/interrupts.c +++ b/cpu/arm920t/s3c24x0/interrupts.c @@ -32,9 +32,9 @@ #include <common.h> #if defined(CONFIG_S3C2400) -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> #elif defined(CONFIG_S3C2410) -#include <s3c2410.h> +#include <asm/arch/s3c2410.h> #endif #include <asm/proc-armv/ptrace.h> diff --git a/cpu/arm920t/s3c24x0/speed.c b/cpu/arm920t/s3c24x0/speed.c index 136c779..85c73a3 100644 --- a/cpu/arm920t/s3c24x0/speed.c +++ b/cpu/arm920t/s3c24x0/speed.c @@ -35,9 +35,9 @@ #include <asm/io.h> #if defined(CONFIG_S3C2400) -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> #elif defined(CONFIG_S3C2410) -#include <s3c2410.h> +#include <asm/arch/s3c2410.h> #endif #define MPLL 0 diff --git a/cpu/arm920t/s3c24x0/timer.c b/cpu/arm920t/s3c24x0/timer.c index 20cedd4..2667da6 100644 --- a/cpu/arm920t/s3c24x0/timer.c +++ b/cpu/arm920t/s3c24x0/timer.c @@ -37,9 +37,9 @@ #include <asm/io.h> #if defined(CONFIG_S3C2400) -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> #elif defined(CONFIG_S3C2410) -#include <s3c2410.h> +#include <asm/arch/s3c2410.h> #endif int timer_load_val = 0; diff --git a/cpu/arm920t/s3c24x0/usb.c b/cpu/arm920t/s3c24x0/usb.c index b5ba8c4..5e19cda 100644 --- a/cpu/arm920t/s3c24x0/usb.c +++ b/cpu/arm920t/s3c24x0/usb.c @@ -27,9 +27,9 @@ # if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) #if defined(CONFIG_S3C2400) -# include <s3c2400.h> +# include <asm/arch/s3c2400.h> #elif defined(CONFIG_S3C2410) -# include <s3c2410.h> +# include <asm/arch/s3c2410.h> #endif #include <asm/io.h> diff --git a/cpu/arm920t/s3c24x0/usb_ohci.c b/cpu/arm920t/s3c24x0/usb_ohci.c index 7672e4c..4111992 100644 --- a/cpu/arm920t/s3c24x0/usb_ohci.c +++ b/cpu/arm920t/s3c24x0/usb_ohci.c @@ -39,9 +39,9 @@ #ifdef CONFIG_USB_OHCI #if defined(CONFIG_S3C2400) -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> #elif defined(CONFIG_S3C2410) -#include <s3c2410.h> +#include <asm/arch/s3c2410.h> #endif #include <asm/io.h> diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c index 55c6a12..8fecc6e 100644 --- a/drivers/i2c/s3c24x0_i2c.c +++ b/drivers/i2c/s3c24x0_i2c.c @@ -28,9 +28,9 @@ #include <common.h> #if defined(CONFIG_S3C2400) -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> #elif defined(CONFIG_S3C2410) -#include <s3c2410.h> +#include <asm/arch/s3c2410.h> #endif #include <asm/io.h> diff --git a/drivers/mtd/nand/s3c2410_nand.c b/drivers/mtd/nand/s3c2410_nand.c index f2f3e72..9f02dd8 100644 --- a/drivers/mtd/nand/s3c2410_nand.c +++ b/drivers/mtd/nand/s3c2410_nand.c @@ -21,7 +21,7 @@ #include <common.h> #include <nand.h> -#include <s3c2410.h> +#include <asm/arch/s3c2410.h> #include <asm/io.h> #define S3C2410_NFCONF_EN (1<<15) diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c index 1ce34e3..2d78f93 100644 --- a/drivers/rtc/s3c24x0_rtc.c +++ b/drivers/rtc/s3c24x0_rtc.c @@ -31,9 +31,9 @@ #if (defined(CONFIG_CMD_DATE)) #if defined(CONFIG_S3C2400) -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> #elif defined(CONFIG_S3C2410) -#include <s3c2410.h> +#include <asm/arch/s3c2410.h> #endif #include <rtc.h> diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c index c2c72e4..914d07c 100644 --- a/drivers/serial/serial_s3c24x0.c +++ b/drivers/serial/serial_s3c24x0.c @@ -20,9 +20,9 @@ #include <common.h> #if defined(CONFIG_S3C2400) || defined(CONFIG_TRAB) -#include <s3c2400.h> +#include <asm/arch/s3c2400.h> #elif defined(CONFIG_S3C2410) -#include <s3c2410.h> +#include <asm/arch/s3c2410.h> #endif DECLARE_GLOBAL_DATA_PTR; diff --git a/include/asm-arm/arch-s3c24x0/s3c2400.h b/include/asm-arm/arch-s3c24x0/s3c2400.h new file mode 100644 index 0000000..26bd4e4 --- /dev/null +++ b/include/asm-arm/arch-s3c24x0/s3c2400.h @@ -0,0 +1,136 @@ +/* + * (C) Copyright 2003 + * David Müller ELSOFT AG Switzerland. d.mueller(a)elsoft.ch + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/************************************************ + * NAME : s3c2400.h + * Version : 31.3.2003 + * + * Based on S3C2400X User's manual Rev 1.1 + ************************************************/ + +#ifndef __S3C2400_H__ +#define __S3C2400_H__ + +#define S3C24X0_UART_CHANNELS 2 +#define S3C24X0_SPI_CHANNELS 1 +#define PALETTE (0x14A00400) /* SJS */ + +enum s3c24x0_uarts_nr { + S3C24X0_UART0, + S3C24X0_UART1, +}; + +/*S3C2400 device base addresses */ +#define S3C24X0_MEMCTL_BASE 0x14000000 +#define S3C24X0_USB_HOST_BASE 0x14200000 +#define S3C24X0_INTERRUPT_BASE 0x14400000 +#define S3C24X0_DMA_BASE 0x14600000 +#define S3C24X0_CLOCK_POWER_BASE 0x14800000 +#define S3C24X0_LCD_BASE 0x14A00000 +#define S3C24X0_UART_BASE 0x15000000 +#define S3C24X0_TIMER_BASE 0x15100000 +#define S3C24X0_USB_DEVICE_BASE 0x15200140 +#define S3C24X0_WATCHDOG_BASE 0x15300000 +#define S3C24X0_I2C_BASE 0x15400000 +#define S3C24X0_I2S_BASE 0x15508000 +#define S3C24X0_GPIO_BASE 0x15600000 +#define S3C24X0_RTC_BASE 0x15700000 +#define S3C24X0_ADC_BASE 0x15800000 +#define S3C24X0_SPI_BASE 0x15900000 +#define S3C2400_MMC_BASE 0x15A00000 + +/* include common stuff */ +#include <asm/arch/s3c24x0.h> + + +static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void) +{ + return (struct s3c24x0_memctl *)S3C24X0_MEMCTL_BASE; +} +static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void) +{ + return (struct s3c24x0_usb_host *)S3C24X0_USB_HOST_BASE; +} +static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void) +{ + return (struct s3c24x0_interrupt *)S3C24X0_INTERRUPT_BASE; +} +static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void) +{ + return (struct s3c24x0_dmas *)S3C24X0_DMA_BASE; +} +static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void) +{ + return (struct s3c24x0_clock_power *)S3C24X0_CLOCK_POWER_BASE; +} +static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void) +{ + return (struct s3c24x0_lcd *)S3C24X0_LCD_BASE; +} +static inline struct s3c24x0_uart + *s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n) +{ + return (struct s3c24x0_uart *)(S3C24X0_UART_BASE + (n * 0x4000)); +} +static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void) +{ + return (struct s3c24x0_timers *)S3C24X0_TIMER_BASE; +} +static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void) +{ + return (struct s3c24x0_usb_device *)S3C24X0_USB_DEVICE_BASE; +} +static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void) +{ + return (struct s3c24x0_watchdog *)S3C24X0_WATCHDOG_BASE; +} +static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void) +{ + return (struct s3c24x0_i2c *)S3C24X0_I2C_BASE; +} +static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void) +{ + return (struct s3c24x0_i2s *)S3C24X0_I2S_BASE; +} +static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void) +{ + return (struct s3c24x0_gpio *)S3C24X0_GPIO_BASE; +} +static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void) +{ + return (struct s3c24x0_rtc *)S3C24X0_RTC_BASE; +} +static inline struct s3c2400_adc *s3c2400_get_base_adc(void) +{ + return (struct s3c2400_adc *)S3C24X0_ADC_BASE; +} +static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void) +{ + return (struct s3c24x0_spi *)S3C24X0_SPI_BASE; +} +static inline struct s3c2400_mmc *s3c2400_get_base_mmc(void) +{ + return (struct s3c2400_mmc *)S3C2400_MMC_BASE; +} + +#endif /*__S3C2400_H__*/ diff --git a/include/asm-arm/arch-s3c24x0/s3c2410.h b/include/asm-arm/arch-s3c24x0/s3c2410.h new file mode 100644 index 0000000..be2e76e --- /dev/null +++ b/include/asm-arm/arch-s3c24x0/s3c2410.h @@ -0,0 +1,146 @@ +/* + * (C) Copyright 2003 + * David Müller ELSOFT AG Switzerland. d.mueller(a)elsoft.ch + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/************************************************ + * NAME : s3c2410.h + * Version : 31.3.2003 + * + * Based on S3C2410X User's manual Rev 1.1 + ************************************************/ + +#ifndef __S3C2410_H__ +#define __S3C2410_H__ + +#define S3C24X0_UART_CHANNELS 3 +#define S3C24X0_SPI_CHANNELS 2 + +/* S3C2410 only supports 512 Byte HW ECC */ +#define S3C2410_ECCSIZE 512 +#define S3C2410_ECCBYTES 3 + +enum s3c24x0_uarts_nr { + S3C24X0_UART0, + S3C24X0_UART1, + S3C24X0_UART2 +}; + +/* S3C2410 device base addresses */ +#define S3C24X0_MEMCTL_BASE 0x48000000 +#define S3C24X0_USB_HOST_BASE 0x49000000 +#define S3C24X0_INTERRUPT_BASE 0x4A000000 +#define S3C24X0_DMA_BASE 0x4B000000 +#define S3C24X0_CLOCK_POWER_BASE 0x4C000000 +#define S3C24X0_LCD_BASE 0x4D000000 +#define S3C2410_NAND_BASE 0x4E000000 +#define S3C24X0_UART_BASE 0x50000000 +#define S3C24X0_TIMER_BASE 0x51000000 +#define S3C24X0_USB_DEVICE_BASE 0x52000140 +#define S3C24X0_WATCHDOG_BASE 0x53000000 +#define S3C24X0_I2C_BASE 0x54000000 +#define S3C24X0_I2S_BASE 0x55000000 +#define S3C24X0_GPIO_BASE 0x56000000 +#define S3C24X0_RTC_BASE 0x57000000 +#define S3C2410_ADC_BASE 0x58000000 +#define S3C24X0_SPI_BASE 0x59000000 +#define S3C2410_SDI_BASE 0x5A000000 + + +/* include common stuff */ +#include <asm/arch/s3c24x0.h> + + +static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void) +{ + return (struct s3c24x0_memctl *)S3C24X0_MEMCTL_BASE; +} +static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void) +{ + return (struct s3c24x0_usb_host *)S3C24X0_USB_HOST_BASE; +} +static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void) +{ + return (struct s3c24x0_interrupt *)S3C24X0_INTERRUPT_BASE; +} +static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void) +{ + return (struct s3c24x0_dmas *)S3C24X0_DMA_BASE; +} +static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void) +{ + return (struct s3c24x0_clock_power *)S3C24X0_CLOCK_POWER_BASE; +} +static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void) +{ + return (struct s3c24x0_lcd *)S3C24X0_LCD_BASE; +} +static inline struct s3c2410_nand *s3c2410_get_base_nand(void) +{ + return (struct s3c2410_nand *)S3C2410_NAND_BASE; +} +static inline struct s3c24x0_uart + *s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n) +{ + return (struct s3c24x0_uart *)(S3C24X0_UART_BASE + (n * 0x4000)); +} +static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void) +{ + return (struct s3c24x0_timers *)S3C24X0_TIMER_BASE; +} +static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void) +{ + return (struct s3c24x0_usb_device *)S3C24X0_USB_DEVICE_BASE; +} +static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void) +{ + return (struct s3c24x0_watchdog *)S3C24X0_WATCHDOG_BASE; +} +static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void) +{ + return (struct s3c24x0_i2c *)S3C24X0_I2C_BASE; +} +static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void) +{ + return (struct s3c24x0_i2s *)S3C24X0_I2S_BASE; +} +static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void) +{ + return (struct s3c24x0_gpio *)S3C24X0_GPIO_BASE; +} +static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void) +{ + return (struct s3c24x0_rtc *)S3C24X0_RTC_BASE; +} +static inline struct s3c2410_adc *s3c2410_get_base_adc(void) +{ + return (struct s3c2410_adc *)S3C2410_ADC_BASE; +} +static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void) +{ + return (struct s3c24x0_spi *)S3C24X0_SPI_BASE; +} +static inline struct s3c2410_sdi *s3c2410_get_base_sdi(void) +{ + return (struct s3c2410_sdi *)S3C2410_SDI_BASE; +} + +#endif /*__S3C2410_H__*/ diff --git a/include/asm-arm/arch-s3c24x0/s3c24x0.h b/include/asm-arm/arch-s3c24x0/s3c24x0.h new file mode 100644 index 0000000..56a551a --- /dev/null +++ b/include/asm-arm/arch-s3c24x0/s3c24x0.h @@ -0,0 +1,656 @@ +/* + * (C) Copyright 2003 + * David Müller ELSOFT AG Switzerland. d.mueller(a)elsoft.ch + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/************************************************ + * NAME : s3c24x0.h + * Version : 31.3.2003 + * + * common stuff for SAMSUNG S3C24X0 SoC + ************************************************/ + +#ifndef __S3C24X0_H__ +#define __S3C24X0_H__ + +typedef volatile u8 S3C24X0_REG8; +typedef volatile u16 S3C24X0_REG16; +typedef volatile u32 S3C24X0_REG32; + +/* Memory controller (see manual chapter 5) */ +struct s3c24x0_memctl { + S3C24X0_REG32 BWSCON; + S3C24X0_REG32 BANKCON[8]; + S3C24X0_REG32 REFRESH; + S3C24X0_REG32 BANKSIZE; + S3C24X0_REG32 MRSRB6; + S3C24X0_REG32 MRSRB7; +}; + + +/* USB HOST (see manual chapter 12) */ +struct s3c24x0_usb_host { + S3C24X0_REG32 HcRevision; + S3C24X0_REG32 HcControl; + S3C24X0_REG32 HcCommonStatus; + S3C24X0_REG32 HcInterruptStatus; + S3C24X0_REG32 HcInterruptEnable; + S3C24X0_REG32 HcInterruptDisable; + S3C24X0_REG32 HcHCCA; + S3C24X0_REG32 HcPeriodCuttendED; + S3C24X0_REG32 HcControlHeadED; + S3C24X0_REG32 HcControlCurrentED; + S3C24X0_REG32 HcBulkHeadED; + S3C24X0_REG32 HcBuldCurrentED; + S3C24X0_REG32 HcDoneHead; + S3C24X0_REG32 HcRmInterval; + S3C24X0_REG32 HcFmRemaining; + S3C24X0_REG32 HcFmNumber; + S3C24X0_REG32 HcPeriodicStart; + S3C24X0_REG32 HcLSThreshold; + S3C24X0_REG32 HcRhDescriptorA; + S3C24X0_REG32 HcRhDescriptorB; + S3C24X0_REG32 HcRhStatus; + S3C24X0_REG32 HcRhPortStatus1; + S3C24X0_REG32 HcRhPortStatus2; +}; + + +/* INTERRUPT (see manual chapter 14) */ +struct s3c24x0_interrupt { + S3C24X0_REG32 SRCPND; + S3C24X0_REG32 INTMOD; + S3C24X0_REG32 INTMSK; + S3C24X0_REG32 PRIORITY; + S3C24X0_REG32 INTPND; + S3C24X0_REG32 INTOFFSET; +#ifdef CONFIG_S3C2410 + S3C24X0_REG32 SUBSRCPND; + S3C24X0_REG32 INTSUBMSK; +#endif +}; + + +/* DMAS (see manual chapter 8) */ +struct s3c24x0_dma { + S3C24X0_REG32 DISRC; +#ifdef CONFIG_S3C2410 + S3C24X0_REG32 DISRCC; +#endif + S3C24X0_REG32 DIDST; +#ifdef CONFIG_S3C2410 + S3C24X0_REG32 DIDSTC; +#endif + S3C24X0_REG32 DCON; + S3C24X0_REG32 DSTAT; + S3C24X0_REG32 DCSRC; + S3C24X0_REG32 DCDST; + S3C24X0_REG32 DMASKTRIG; +#ifdef CONFIG_S3C2400 + S3C24X0_REG32 res[1]; +#endif +#ifdef CONFIG_S3C2410 + S3C24X0_REG32 res[7]; +#endif +}; + +struct s3c24x0_dmas { + struct s3c24x0_dma dma[4]; +}; + + +/* CLOCK & POWER MANAGEMENT (see S3C2400 manual chapter 6) */ +/* (see S3C2410 manual chapter 7) */ +struct s3c24x0_clock_power { + S3C24X0_REG32 LOCKTIME; + S3C24X0_REG32 MPLLCON; + S3C24X0_REG32 UPLLCON; + S3C24X0_REG32 CLKCON; + S3C24X0_REG32 CLKSLOW; + S3C24X0_REG32 CLKDIVN; +}; + + +/* LCD CONTROLLER (see manual chapter 15) */ +struct s3c24x0_lcd { + S3C24X0_REG32 LCDCON1; + S3C24X0_REG32 LCDCON2; + S3C24X0_REG32 LCDCON3; + S3C24X0_REG32 LCDCON4; + S3C24X0_REG32 LCDCON5; + S3C24X0_REG32 LCDSADDR1; + S3C24X0_REG32 LCDSADDR2; + S3C24X0_REG32 LCDSADDR3; + S3C24X0_REG32 REDLUT; + S3C24X0_REG32 GREENLUT; + S3C24X0_REG32 BLUELUT; + S3C24X0_REG32 res[8]; + S3C24X0_REG32 DITHMODE; + S3C24X0_REG32 TPAL; +#ifdef CONFIG_S3C2410 + S3C24X0_REG32 LCDINTPND; + S3C24X0_REG32 LCDSRCPND; + S3C24X0_REG32 LCDINTMSK; + S3C24X0_REG32 LPCSEL; +#endif +}; + + +/* NAND FLASH (see S3C2410 manual chapter 6) */ +struct s3c2410_nand { + S3C24X0_REG32 NFCONF; + S3C24X0_REG32 NFCMD; + S3C24X0_REG32 NFADDR; + S3C24X0_REG32 NFDATA; + S3C24X0_REG32 NFSTAT; + S3C24X0_REG32 NFECC; +}; + + +/* UART (see manual chapter 11) */ +struct s3c24x0_uart { + S3C24X0_REG32 ULCON; + S3C24X0_REG32 UCON; + S3C24X0_REG32 UFCON; + S3C24X0_REG32 UMCON; + S3C24X0_REG32 UTRSTAT; + S3C24X0_REG32 UERSTAT; + S3C24X0_REG32 UFSTAT; + S3C24X0_REG32 UMSTAT; +#ifdef __BIG_ENDIAN + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 UTXH; + S3C24X0_REG8 res2[3]; + S3C24X0_REG8 URXH; +#else /* Little Endian */ + S3C24X0_REG8 UTXH; + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 URXH; + S3C24X0_REG8 res2[3]; +#endif + S3C24X0_REG32 UBRDIV; +}; + + +/* PWM TIMER (see manual chapter 10) */ +struct s3c24x0_timer { + S3C24X0_REG32 TCNTB; + S3C24X0_REG32 TCMPB; + S3C24X0_REG32 TCNTO; +}; + +struct s3c24x0_timers { + S3C24X0_REG32 TCFG0; + S3C24X0_REG32 TCFG1; + S3C24X0_REG32 TCON; + struct s3c24x0_timer ch[4]; + S3C24X0_REG32 TCNTB4; + S3C24X0_REG32 TCNTO4; +}; + + +/* USB DEVICE (see manual chapter 13) */ +struct s3c24x0_usb_dev_fifos { +#ifdef __BIG_ENDIAN + S3C24X0_REG8 res[3]; + S3C24X0_REG8 EP_FIFO_REG; +#else /* little endian */ + S3C24X0_REG8 EP_FIFO_REG; + S3C24X0_REG8 res[3]; +#endif +}; + +struct s3c24x0_usb_dev_dmas { +#ifdef __BIG_ENDIAN + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 EP_DMA_CON; + S3C24X0_REG8 res2[3]; + S3C24X0_REG8 EP_DMA_UNIT; + S3C24X0_REG8 res3[3]; + S3C24X0_REG8 EP_DMA_FIFO; + S3C24X0_REG8 res4[3]; + S3C24X0_REG8 EP_DMA_TTC_L; + S3C24X0_REG8 res5[3]; + S3C24X0_REG8 EP_DMA_TTC_M; + S3C24X0_REG8 res6[3]; + S3C24X0_REG8 EP_DMA_TTC_H; +#else /* little endian */ + S3C24X0_REG8 EP_DMA_CON; + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 EP_DMA_UNIT; + S3C24X0_REG8 res2[3]; + S3C24X0_REG8 EP_DMA_FIFO; + S3C24X0_REG8 res3[3]; + S3C24X0_REG8 EP_DMA_TTC_L; + S3C24X0_REG8 res4[3]; + S3C24X0_REG8 EP_DMA_TTC_M; + S3C24X0_REG8 res5[3]; + S3C24X0_REG8 EP_DMA_TTC_H; + S3C24X0_REG8 res6[3]; +#endif +}; + +struct s3c24x0_usb_device { +#ifdef __BIG_ENDIAN + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 FUNC_ADDR_REG; + S3C24X0_REG8 res2[3]; + S3C24X0_REG8 PWR_REG; + S3C24X0_REG8 res3[3]; + S3C24X0_REG8 EP_INT_REG; + S3C24X0_REG8 res4[15]; + S3C24X0_REG8 USB_INT_REG; + S3C24X0_REG8 res5[3]; + S3C24X0_REG8 EP_INT_EN_REG; + S3C24X0_REG8 res6[15]; + S3C24X0_REG8 USB_INT_EN_REG; + S3C24X0_REG8 res7[3]; + S3C24X0_REG8 FRAME_NUM1_REG; + S3C24X0_REG8 res8[3]; + S3C24X0_REG8 FRAME_NUM2_REG; + S3C24X0_REG8 res9[3]; + S3C24X0_REG8 INDEX_REG; + S3C24X0_REG8 res10[7]; + S3C24X0_REG8 MAXP_REG; + S3C24X0_REG8 res11[3]; + S3C24X0_REG8 EP0_CSR_IN_CSR1_REG; + S3C24X0_REG8 res12[3]; + S3C24X0_REG8 IN_CSR2_REG; + S3C24X0_REG8 res13[7]; + S3C24X0_REG8 OUT_CSR1_REG; + S3C24X0_REG8 res14[3]; + S3C24X0_REG8 OUT_CSR2_REG; + S3C24X0_REG8 res15[3]; + S3C24X0_REG8 OUT_FIFO_CNT1_REG; + S3C24X0_REG8 res16[3]; + S3C24X0_REG8 OUT_FIFO_CNT2_REG; +#else /* little endian */ + S3C24X0_REG8 FUNC_ADDR_REG; + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 PWR_REG; + S3C24X0_REG8 res2[3]; + S3C24X0_REG8 EP_INT_REG; + S3C24X0_REG8 res3[15]; + S3C24X0_REG8 USB_INT_REG; + S3C24X0_REG8 res4[3]; + S3C24X0_REG8 EP_INT_EN_REG; + S3C24X0_REG8 res5[15]; + S3C24X0_REG8 USB_INT_EN_REG; + S3C24X0_REG8 res6[3]; + S3C24X0_REG8 FRAME_NUM1_REG; + S3C24X0_REG8 res7[3]; + S3C24X0_REG8 FRAME_NUM2_REG; + S3C24X0_REG8 res8[3]; + S3C24X0_REG8 INDEX_REG; + S3C24X0_REG8 res9[7]; + S3C24X0_REG8 MAXP_REG; + S3C24X0_REG8 res10[7]; + S3C24X0_REG8 EP0_CSR_IN_CSR1_REG; + S3C24X0_REG8 res11[3]; + S3C24X0_REG8 IN_CSR2_REG; + S3C24X0_REG8 res12[3]; + S3C24X0_REG8 OUT_CSR1_REG; + S3C24X0_REG8 res13[7]; + S3C24X0_REG8 OUT_CSR2_REG; + S3C24X0_REG8 res14[3]; + S3C24X0_REG8 OUT_FIFO_CNT1_REG; + S3C24X0_REG8 res15[3]; + S3C24X0_REG8 OUT_FIFO_CNT2_REG; + S3C24X0_REG8 res16[3]; +#endif /* __BIG_ENDIAN */ + struct s3c24x0_usb_dev_fifos fifo[5]; + struct s3c24x0_usb_dev_dmas dma[5]; +}; + + +/* WATCH DOG TIMER (see manual chapter 18) */ +struct s3c24x0_watchdog { + S3C24X0_REG32 WTCON; + S3C24X0_REG32 WTDAT; + S3C24X0_REG32 WTCNT; +}; + + +/* IIC (see manual chapter 20) */ +struct s3c24x0_i2c { + S3C24X0_REG32 IICCON; + S3C24X0_REG32 IICSTAT; + S3C24X0_REG32 IICADD; + S3C24X0_REG32 IICDS; +}; + + +/* IIS (see manual chapter 21) */ +struct s3c24x0_i2s { +#ifdef __BIG_ENDIAN + S3C24X0_REG16 res1; + S3C24X0_REG16 IISCON; + S3C24X0_REG16 res2; + S3C24X0_REG16 IISMOD; + S3C24X0_REG16 res3; + S3C24X0_REG16 IISPSR; + S3C24X0_REG16 res4; + S3C24X0_REG16 IISFCON; + S3C24X0_REG16 res5; + S3C24X0_REG16 IISFIFO; +#else /* little endian */ + S3C24X0_REG16 IISCON; + S3C24X0_REG16 res1; + S3C24X0_REG16 IISMOD; + S3C24X0_REG16 res2; + S3C24X0_REG16 IISPSR; + S3C24X0_REG16 res3; + S3C24X0_REG16 IISFCON; + S3C24X0_REG16 res4; + S3C24X0_REG16 IISFIFO; + S3C24X0_REG16 res5; +#endif +}; + + +/* I/O PORT (see manual chapter 9) */ +struct s3c24x0_gpio { +#ifdef CONFIG_S3C2400 + S3C24X0_REG32 PACON; + S3C24X0_REG32 PADAT; + + S3C24X0_REG32 PBCON; + S3C24X0_REG32 PBDAT; + S3C24X0_REG32 PBUP; + + S3C24X0_REG32 PCCON; + S3C24X0_REG32 PCDAT; + S3C24X0_REG32 PCUP; + + S3C24X0_REG32 PDCON; + S3C24X0_REG32 PDDAT; + S3C24X0_REG32 PDUP; + + S3C24X0_REG32 PECON; + S3C24X0_REG32 PEDAT; + S3C24X0_REG32 PEUP; + + S3C24X0_REG32 PFCON; + S3C24X0_REG32 PFDAT; + S3C24X0_REG32 PFUP; + + S3C24X0_REG32 PGCON; + S3C24X0_REG32 PGDAT; + S3C24X0_REG32 PGUP; + + S3C24X0_REG32 OPENCR; + + S3C24X0_REG32 MISCCR; + S3C24X0_REG32 EXTINT; +#endif +#ifdef CONFIG_S3C2410 + S3C24X0_REG32 GPACON; + S3C24X0_REG32 GPADAT; + S3C24X0_REG32 res1[2]; + S3C24X0_REG32 GPBCON; + S3C24X0_REG32 GPBDAT; + S3C24X0_REG32 GPBUP; + S3C24X0_REG32 res2; + S3C24X0_REG32 GPCCON; + S3C24X0_REG32 GPCDAT; + S3C24X0_REG32 GPCUP; + S3C24X0_REG32 res3; + S3C24X0_REG32 GPDCON; + S3C24X0_REG32 GPDDAT; + S3C24X0_REG32 GPDUP; + S3C24X0_REG32 res4; + S3C24X0_REG32 GPECON; + S3C24X0_REG32 GPEDAT; + S3C24X0_REG32 GPEUP; + S3C24X0_REG32 res5; + S3C24X0_REG32 GPFCON; + S3C24X0_REG32 GPFDAT; + S3C24X0_REG32 GPFUP; + S3C24X0_REG32 res6; + S3C24X0_REG32 GPGCON; + S3C24X0_REG32 GPGDAT; + S3C24X0_REG32 GPGUP; + S3C24X0_REG32 res7; + S3C24X0_REG32 GPHCON; + S3C24X0_REG32 GPHDAT; + S3C24X0_REG32 GPHUP; + S3C24X0_REG32 res8; + + S3C24X0_REG32 MISCCR; + S3C24X0_REG32 DCLKCON; + S3C24X0_REG32 EXTINT0; + S3C24X0_REG32 EXTINT1; + S3C24X0_REG32 EXTINT2; + S3C24X0_REG32 EINTFLT0; + S3C24X0_REG32 EINTFLT1; + S3C24X0_REG32 EINTFLT2; + S3C24X0_REG32 EINTFLT3; + S3C24X0_REG32 EINTMASK; + S3C24X0_REG32 EINTPEND; + S3C24X0_REG32 GSTATUS0; + S3C24X0_REG32 GSTATUS1; + S3C24X0_REG32 GSTATUS2; + S3C24X0_REG32 GSTATUS3; + S3C24X0_REG32 GSTATUS4; +#endif +}; + + +/* RTC (see manual chapter 17) */ +struct s3c24x0_rtc { +#ifdef __BIG_ENDIAN + S3C24X0_REG8 res1[67]; + S3C24X0_REG8 RTCCON; + S3C24X0_REG8 res2[3]; + S3C24X0_REG8 TICNT; + S3C24X0_REG8 res3[11]; + S3C24X0_REG8 RTCALM; + S3C24X0_REG8 res4[3]; + S3C24X0_REG8 ALMSEC; + S3C24X0_REG8 res5[3]; + S3C24X0_REG8 ALMMIN; + S3C24X0_REG8 res6[3]; + S3C24X0_REG8 ALMHOUR; + S3C24X0_REG8 res7[3]; + S3C24X0_REG8 ALMDATE; + S3C24X0_REG8 res8[3]; + S3C24X0_REG8 ALMMON; + S3C24X0_REG8 res9[3]; + S3C24X0_REG8 ALMYEAR; + S3C24X0_REG8 res10[3]; + S3C24X0_REG8 RTCRST; + S3C24X0_REG8 res11[3]; + S3C24X0_REG8 BCDSEC; + S3C24X0_REG8 res12[3]; + S3C24X0_REG8 BCDMIN; + S3C24X0_REG8 res13[3]; + S3C24X0_REG8 BCDHOUR; + S3C24X0_REG8 res14[3]; + S3C24X0_REG8 BCDDATE; + S3C24X0_REG8 res15[3]; + S3C24X0_REG8 BCDDAY; + S3C24X0_REG8 res16[3]; + S3C24X0_REG8 BCDMON; + S3C24X0_REG8 res17[3]; + S3C24X0_REG8 BCDYEAR; +#else /* little endian */ + S3C24X0_REG8 res0[64]; + S3C24X0_REG8 RTCCON; + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 TICNT; + S3C24X0_REG8 res2[11]; + S3C24X0_REG8 RTCALM; + S3C24X0_REG8 res3[3]; + S3C24X0_REG8 ALMSEC; + S3C24X0_REG8 res4[3]; + S3C24X0_REG8 ALMMIN; + S3C24X0_REG8 res5[3]; + S3C24X0_REG8 ALMHOUR; + S3C24X0_REG8 res6[3]; + S3C24X0_REG8 ALMDATE; + S3C24X0_REG8 res7[3]; + S3C24X0_REG8 ALMMON; + S3C24X0_REG8 res8[3]; + S3C24X0_REG8 ALMYEAR; + S3C24X0_REG8 res9[3]; + S3C24X0_REG8 RTCRST; + S3C24X0_REG8 res10[3]; + S3C24X0_REG8 BCDSEC; + S3C24X0_REG8 res11[3]; + S3C24X0_REG8 BCDMIN; + S3C24X0_REG8 res12[3]; + S3C24X0_REG8 BCDHOUR; + S3C24X0_REG8 res13[3]; + S3C24X0_REG8 BCDDATE; + S3C24X0_REG8 res14[3]; + S3C24X0_REG8 BCDDAY; + S3C24X0_REG8 res15[3]; + S3C24X0_REG8 BCDMON; + S3C24X0_REG8 res16[3]; + S3C24X0_REG8 BCDYEAR; + S3C24X0_REG8 res17[3]; +#endif +}; + + +/* ADC (see manual chapter 16) */ +struct s3c2400_adc { + S3C24X0_REG32 ADCCON; + S3C24X0_REG32 ADCDAT; +}; + + +/* ADC (see manual chapter 16) */ +struct s3c2410_adc { + S3C24X0_REG32 ADCCON; + S3C24X0_REG32 ADCTSC; + S3C24X0_REG32 ADCDLY; + S3C24X0_REG32 ADCDAT0; + S3C24X0_REG32 ADCDAT1; +}; + + +/* SPI (see manual chapter 22) */ +struct s3c24x0_spi_channel { + S3C24X0_REG8 SPCON; + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 SPSTA; + S3C24X0_REG8 res2[3]; + S3C24X0_REG8 SPPIN; + S3C24X0_REG8 res3[3]; + S3C24X0_REG8 SPPRE; + S3C24X0_REG8 res4[3]; + S3C24X0_REG8 SPTDAT; + S3C24X0_REG8 res5[3]; + S3C24X0_REG8 SPRDAT; + S3C24X0_REG8 res6[3]; + S3C24X0_REG8 res7[16]; +}; + +struct s3c24x0_spi { + struct s3c24x0_spi_channel ch[S3C24X0_SPI_CHANNELS]; +}; + + +/* MMC INTERFACE (see S3C2400 manual chapter 19) */ +struct s3c2400_mmc { +#ifdef __BIG_ENDIAN + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 MMCON; + S3C24X0_REG8 res2[3]; + S3C24X0_REG8 MMCRR; + S3C24X0_REG8 res3[3]; + S3C24X0_REG8 MMFCON; + S3C24X0_REG8 res4[3]; + S3C24X0_REG8 MMSTA; + S3C24X0_REG16 res5; + S3C24X0_REG16 MMFSTA; + S3C24X0_REG8 res6[3]; + S3C24X0_REG8 MMPRE; + S3C24X0_REG16 res7; + S3C24X0_REG16 MMLEN; + S3C24X0_REG8 res8[3]; + S3C24X0_REG8 MMCR7; + S3C24X0_REG32 MMRSP[4]; + S3C24X0_REG8 res9[3]; + S3C24X0_REG8 MMCMD0; + S3C24X0_REG32 MMCMD1; + S3C24X0_REG16 res10; + S3C24X0_REG16 MMCR16; + S3C24X0_REG8 res11[3]; + S3C24X0_REG8 MMDAT; +#else + S3C24X0_REG8 MMCON; + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 MMCRR; + S3C24X0_REG8 res2[3]; + S3C24X0_REG8 MMFCON; + S3C24X0_REG8 res3[3]; + S3C24X0_REG8 MMSTA; + S3C24X0_REG8 res4[3]; + S3C24X0_REG16 MMFSTA; + S3C24X0_REG16 res5; + S3C24X0_REG8 MMPRE; + S3C24X0_REG8 res6[3]; + S3C24X0_REG16 MMLEN; + S3C24X0_REG16 res7; + S3C24X0_REG8 MMCR7; + S3C24X0_REG8 res8[3]; + S3C24X0_REG32 MMRSP[4]; + S3C24X0_REG8 MMCMD0; + S3C24X0_REG8 res9[3]; + S3C24X0_REG32 MMCMD1; + S3C24X0_REG16 MMCR16; + S3C24X0_REG16 res10; + S3C24X0_REG8 MMDAT; + S3C24X0_REG8 res11[3]; +#endif +}; + + +/* SD INTERFACE (see S3C2410 manual chapter 19) */ +struct s3c2410_sdi { + S3C24X0_REG32 SDICON; + S3C24X0_REG32 SDIPRE; + S3C24X0_REG32 SDICARG; + S3C24X0_REG32 SDICCON; + S3C24X0_REG32 SDICSTA; + S3C24X0_REG32 SDIRSP0; + S3C24X0_REG32 SDIRSP1; + S3C24X0_REG32 SDIRSP2; + S3C24X0_REG32 SDIRSP3; + S3C24X0_REG32 SDIDTIMER; + S3C24X0_REG32 SDIBSIZE; + S3C24X0_REG32 SDIDCON; + S3C24X0_REG32 SDIDCNT; + S3C24X0_REG32 SDIDSTA; + S3C24X0_REG32 SDIFSTA; +#ifdef __BIG_ENDIAN + S3C24X0_REG8 res[3]; + S3C24X0_REG8 SDIDAT; +#else + S3C24X0_REG8 SDIDAT; + S3C24X0_REG8 res[3]; +#endif + S3C24X0_REG32 SDIIMSK; +}; + +#endif /*__S3C24X0_H__*/ diff --git a/include/s3c2400.h b/include/s3c2400.h deleted file mode 100644 index 062259d..0000000 --- a/include/s3c2400.h +++ /dev/null @@ -1,136 +0,0 @@ -/* - * (C) Copyright 2003 - * David Müller ELSOFT AG Switzerland. d.mueller(a)elsoft.ch - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************ - * NAME : s3c2400.h - * Version : 31.3.2003 - * - * Based on S3C2400X User's manual Rev 1.1 - ************************************************/ - -#ifndef __S3C2400_H__ -#define __S3C2400_H__ - -#define S3C24X0_UART_CHANNELS 2 -#define S3C24X0_SPI_CHANNELS 1 -#define PALETTE (0x14A00400) /* SJS */ - -enum s3c24x0_uarts_nr { - S3C24X0_UART0, - S3C24X0_UART1, -}; - -/*S3C2400 device base addresses */ -#define S3C24X0_MEMCTL_BASE 0x14000000 -#define S3C24X0_USB_HOST_BASE 0x14200000 -#define S3C24X0_INTERRUPT_BASE 0x14400000 -#define S3C24X0_DMA_BASE 0x14600000 -#define S3C24X0_CLOCK_POWER_BASE 0x14800000 -#define S3C24X0_LCD_BASE 0x14A00000 -#define S3C24X0_UART_BASE 0x15000000 -#define S3C24X0_TIMER_BASE 0x15100000 -#define S3C24X0_USB_DEVICE_BASE 0x15200140 -#define S3C24X0_WATCHDOG_BASE 0x15300000 -#define S3C24X0_I2C_BASE 0x15400000 -#define S3C24X0_I2S_BASE 0x15508000 -#define S3C24X0_GPIO_BASE 0x15600000 -#define S3C24X0_RTC_BASE 0x15700000 -#define S3C24X0_ADC_BASE 0x15800000 -#define S3C24X0_SPI_BASE 0x15900000 -#define S3C2400_MMC_BASE 0x15A00000 - -/* include common stuff */ -#include <s3c24x0.h> - - -static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void) -{ - return (struct s3c24x0_memctl *)S3C24X0_MEMCTL_BASE; -} -static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void) -{ - return (struct s3c24x0_usb_host *)S3C24X0_USB_HOST_BASE; -} -static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void) -{ - return (struct s3c24x0_interrupt *)S3C24X0_INTERRUPT_BASE; -} -static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void) -{ - return (struct s3c24x0_dmas *)S3C24X0_DMA_BASE; -} -static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void) -{ - return (struct s3c24x0_clock_power *)S3C24X0_CLOCK_POWER_BASE; -} -static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void) -{ - return (struct s3c24x0_lcd *)S3C24X0_LCD_BASE; -} -static inline struct s3c24x0_uart - *s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n) -{ - return (struct s3c24x0_uart *)(S3C24X0_UART_BASE + (n * 0x4000)); -} -static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void) -{ - return (struct s3c24x0_timers *)S3C24X0_TIMER_BASE; -} -static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void) -{ - return (struct s3c24x0_usb_device *)S3C24X0_USB_DEVICE_BASE; -} -static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void) -{ - return (struct s3c24x0_watchdog *)S3C24X0_WATCHDOG_BASE; -} -static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void) -{ - return (struct s3c24x0_i2c *)S3C24X0_I2C_BASE; -} -static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void) -{ - return (struct s3c24x0_i2s *)S3C24X0_I2S_BASE; -} -static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void) -{ - return (struct s3c24x0_gpio *)S3C24X0_GPIO_BASE; -} -static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void) -{ - return (struct s3c24x0_rtc *)S3C24X0_RTC_BASE; -} -static inline struct s3c2400_adc *s3c2400_get_base_adc(void) -{ - return (struct s3c2400_adc *)S3C24X0_ADC_BASE; -} -static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void) -{ - return (struct s3c24x0_spi *)S3C24X0_SPI_BASE; -} -static inline struct s3c2400_mmc *s3c2400_get_base_mmc(void) -{ - return (struct s3c2400_mmc *)S3C2400_MMC_BASE; -} - -#endif /*__S3C2400_H__*/ diff --git a/include/s3c2410.h b/include/s3c2410.h deleted file mode 100644 index 03b33b4..0000000 --- a/include/s3c2410.h +++ /dev/null @@ -1,146 +0,0 @@ -/* - * (C) Copyright 2003 - * David Müller ELSOFT AG Switzerland. d.mueller(a)elsoft.ch - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************ - * NAME : s3c2410.h - * Version : 31.3.2003 - * - * Based on S3C2410X User's manual Rev 1.1 - ************************************************/ - -#ifndef __S3C2410_H__ -#define __S3C2410_H__ - -#define S3C24X0_UART_CHANNELS 3 -#define S3C24X0_SPI_CHANNELS 2 - -/* S3C2410 only supports 512 Byte HW ECC */ -#define S3C2410_ECCSIZE 512 -#define S3C2410_ECCBYTES 3 - -enum s3c24x0_uarts_nr { - S3C24X0_UART0, - S3C24X0_UART1, - S3C24X0_UART2 -}; - -/* S3C2410 device base addresses */ -#define S3C24X0_MEMCTL_BASE 0x48000000 -#define S3C24X0_USB_HOST_BASE 0x49000000 -#define S3C24X0_INTERRUPT_BASE 0x4A000000 -#define S3C24X0_DMA_BASE 0x4B000000 -#define S3C24X0_CLOCK_POWER_BASE 0x4C000000 -#define S3C24X0_LCD_BASE 0x4D000000 -#define S3C2410_NAND_BASE 0x4E000000 -#define S3C24X0_UART_BASE 0x50000000 -#define S3C24X0_TIMER_BASE 0x51000000 -#define S3C24X0_USB_DEVICE_BASE 0x52000140 -#define S3C24X0_WATCHDOG_BASE 0x53000000 -#define S3C24X0_I2C_BASE 0x54000000 -#define S3C24X0_I2S_BASE 0x55000000 -#define S3C24X0_GPIO_BASE 0x56000000 -#define S3C24X0_RTC_BASE 0x57000000 -#define S3C2410_ADC_BASE 0x58000000 -#define S3C24X0_SPI_BASE 0x59000000 -#define S3C2410_SDI_BASE 0x5A000000 - - -/* include common stuff */ -#include <s3c24x0.h> - - -static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void) -{ - return (struct s3c24x0_memctl *)S3C24X0_MEMCTL_BASE; -} -static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void) -{ - return (struct s3c24x0_usb_host *)S3C24X0_USB_HOST_BASE; -} -static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void) -{ - return (struct s3c24x0_interrupt *)S3C24X0_INTERRUPT_BASE; -} -static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void) -{ - return (struct s3c24x0_dmas *)S3C24X0_DMA_BASE; -} -static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void) -{ - return (struct s3c24x0_clock_power *)S3C24X0_CLOCK_POWER_BASE; -} -static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void) -{ - return (struct s3c24x0_lcd *)S3C24X0_LCD_BASE; -} -static inline struct s3c2410_nand *s3c2410_get_base_nand(void) -{ - return (struct s3c2410_nand *)S3C2410_NAND_BASE; -} -static inline struct s3c24x0_uart - *s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n) -{ - return (struct s3c24x0_uart *)(S3C24X0_UART_BASE + (n * 0x4000)); -} -static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void) -{ - return (struct s3c24x0_timers *)S3C24X0_TIMER_BASE; -} -static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void) -{ - return (struct s3c24x0_usb_device *)S3C24X0_USB_DEVICE_BASE; -} -static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void) -{ - return (struct s3c24x0_watchdog *)S3C24X0_WATCHDOG_BASE; -} -static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void) -{ - return (struct s3c24x0_i2c *)S3C24X0_I2C_BASE; -} -static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void) -{ - return (struct s3c24x0_i2s *)S3C24X0_I2S_BASE; -} -static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void) -{ - return (struct s3c24x0_gpio *)S3C24X0_GPIO_BASE; -} -static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void) -{ - return (struct s3c24x0_rtc *)S3C24X0_RTC_BASE; -} -static inline struct s3c2410_adc *s3c2410_get_base_adc(void) -{ - return (struct s3c2410_adc *)S3C2410_ADC_BASE; -} -static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void) -{ - return (struct s3c24x0_spi *)S3C24X0_SPI_BASE; -} -static inline struct s3c2410_sdi *s3c2410_get_base_sdi(void) -{ - return (struct s3c2410_sdi *)S3C2410_SDI_BASE; -} - -#endif /*__S3C2410_H__*/ diff --git a/include/s3c24x0.h b/include/s3c24x0.h deleted file mode 100644 index 56a551a..0000000 --- a/include/s3c24x0.h +++ /dev/null @@ -1,656 +0,0 @@ -/* - * (C) Copyright 2003 - * David Müller ELSOFT AG Switzerland. d.mueller(a)elsoft.ch - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************ - * NAME : s3c24x0.h - * Version : 31.3.2003 - * - * common stuff for SAMSUNG S3C24X0 SoC - ************************************************/ - -#ifndef __S3C24X0_H__ -#define __S3C24X0_H__ - -typedef volatile u8 S3C24X0_REG8; -typedef volatile u16 S3C24X0_REG16; -typedef volatile u32 S3C24X0_REG32; - -/* Memory controller (see manual chapter 5) */ -struct s3c24x0_memctl { - S3C24X0_REG32 BWSCON; - S3C24X0_REG32 BANKCON[8]; - S3C24X0_REG32 REFRESH; - S3C24X0_REG32 BANKSIZE; - S3C24X0_REG32 MRSRB6; - S3C24X0_REG32 MRSRB7; -}; - - -/* USB HOST (see manual chapter 12) */ -struct s3c24x0_usb_host { - S3C24X0_REG32 HcRevision; - S3C24X0_REG32 HcControl; - S3C24X0_REG32 HcCommonStatus; - S3C24X0_REG32 HcInterruptStatus; - S3C24X0_REG32 HcInterruptEnable; - S3C24X0_REG32 HcInterruptDisable; - S3C24X0_REG32 HcHCCA; - S3C24X0_REG32 HcPeriodCuttendED; - S3C24X0_REG32 HcControlHeadED; - S3C24X0_REG32 HcControlCurrentED; - S3C24X0_REG32 HcBulkHeadED; - S3C24X0_REG32 HcBuldCurrentED; - S3C24X0_REG32 HcDoneHead; - S3C24X0_REG32 HcRmInterval; - S3C24X0_REG32 HcFmRemaining; - S3C24X0_REG32 HcFmNumber; - S3C24X0_REG32 HcPeriodicStart; - S3C24X0_REG32 HcLSThreshold; - S3C24X0_REG32 HcRhDescriptorA; - S3C24X0_REG32 HcRhDescriptorB; - S3C24X0_REG32 HcRhStatus; - S3C24X0_REG32 HcRhPortStatus1; - S3C24X0_REG32 HcRhPortStatus2; -}; - - -/* INTERRUPT (see manual chapter 14) */ -struct s3c24x0_interrupt { - S3C24X0_REG32 SRCPND; - S3C24X0_REG32 INTMOD; - S3C24X0_REG32 INTMSK; - S3C24X0_REG32 PRIORITY; - S3C24X0_REG32 INTPND; - S3C24X0_REG32 INTOFFSET; -#ifdef CONFIG_S3C2410 - S3C24X0_REG32 SUBSRCPND; - S3C24X0_REG32 INTSUBMSK; -#endif -}; - - -/* DMAS (see manual chapter 8) */ -struct s3c24x0_dma { - S3C24X0_REG32 DISRC; -#ifdef CONFIG_S3C2410 - S3C24X0_REG32 DISRCC; -#endif - S3C24X0_REG32 DIDST; -#ifdef CONFIG_S3C2410 - S3C24X0_REG32 DIDSTC; -#endif - S3C24X0_REG32 DCON; - S3C24X0_REG32 DSTAT; - S3C24X0_REG32 DCSRC; - S3C24X0_REG32 DCDST; - S3C24X0_REG32 DMASKTRIG; -#ifdef CONFIG_S3C2400 - S3C24X0_REG32 res[1]; -#endif -#ifdef CONFIG_S3C2410 - S3C24X0_REG32 res[7]; -#endif -}; - -struct s3c24x0_dmas { - struct s3c24x0_dma dma[4]; -}; - - -/* CLOCK & POWER MANAGEMENT (see S3C2400 manual chapter 6) */ -/* (see S3C2410 manual chapter 7) */ -struct s3c24x0_clock_power { - S3C24X0_REG32 LOCKTIME; - S3C24X0_REG32 MPLLCON; - S3C24X0_REG32 UPLLCON; - S3C24X0_REG32 CLKCON; - S3C24X0_REG32 CLKSLOW; - S3C24X0_REG32 CLKDIVN; -}; - - -/* LCD CONTROLLER (see manual chapter 15) */ -struct s3c24x0_lcd { - S3C24X0_REG32 LCDCON1; - S3C24X0_REG32 LCDCON2; - S3C24X0_REG32 LCDCON3; - S3C24X0_REG32 LCDCON4; - S3C24X0_REG32 LCDCON5; - S3C24X0_REG32 LCDSADDR1; - S3C24X0_REG32 LCDSADDR2; - S3C24X0_REG32 LCDSADDR3; - S3C24X0_REG32 REDLUT; - S3C24X0_REG32 GREENLUT; - S3C24X0_REG32 BLUELUT; - S3C24X0_REG32 res[8]; - S3C24X0_REG32 DITHMODE; - S3C24X0_REG32 TPAL; -#ifdef CONFIG_S3C2410 - S3C24X0_REG32 LCDINTPND; - S3C24X0_REG32 LCDSRCPND; - S3C24X0_REG32 LCDINTMSK; - S3C24X0_REG32 LPCSEL; -#endif -}; - - -/* NAND FLASH (see S3C2410 manual chapter 6) */ -struct s3c2410_nand { - S3C24X0_REG32 NFCONF; - S3C24X0_REG32 NFCMD; - S3C24X0_REG32 NFADDR; - S3C24X0_REG32 NFDATA; - S3C24X0_REG32 NFSTAT; - S3C24X0_REG32 NFECC; -}; - - -/* UART (see manual chapter 11) */ -struct s3c24x0_uart { - S3C24X0_REG32 ULCON; - S3C24X0_REG32 UCON; - S3C24X0_REG32 UFCON; - S3C24X0_REG32 UMCON; - S3C24X0_REG32 UTRSTAT; - S3C24X0_REG32 UERSTAT; - S3C24X0_REG32 UFSTAT; - S3C24X0_REG32 UMSTAT; -#ifdef __BIG_ENDIAN - S3C24X0_REG8 res1[3]; - S3C24X0_REG8 UTXH; - S3C24X0_REG8 res2[3]; - S3C24X0_REG8 URXH; -#else /* Little Endian */ - S3C24X0_REG8 UTXH; - S3C24X0_REG8 res1[3]; - S3C24X0_REG8 URXH; - S3C24X0_REG8 res2[3]; -#endif - S3C24X0_REG32 UBRDIV; -}; - - -/* PWM TIMER (see manual chapter 10) */ -struct s3c24x0_timer { - S3C24X0_REG32 TCNTB; - S3C24X0_REG32 TCMPB; - S3C24X0_REG32 TCNTO; -}; - -struct s3c24x0_timers { - S3C24X0_REG32 TCFG0; - S3C24X0_REG32 TCFG1; - S3C24X0_REG32 TCON; - struct s3c24x0_timer ch[4]; - S3C24X0_REG32 TCNTB4; - S3C24X0_REG32 TCNTO4; -}; - - -/* USB DEVICE (see manual chapter 13) */ -struct s3c24x0_usb_dev_fifos { -#ifdef __BIG_ENDIAN - S3C24X0_REG8 res[3]; - S3C24X0_REG8 EP_FIFO_REG; -#else /* little endian */ - S3C24X0_REG8 EP_FIFO_REG; - S3C24X0_REG8 res[3]; -#endif -}; - -struct s3c24x0_usb_dev_dmas { -#ifdef __BIG_ENDIAN - S3C24X0_REG8 res1[3]; - S3C24X0_REG8 EP_DMA_CON; - S3C24X0_REG8 res2[3]; - S3C24X0_REG8 EP_DMA_UNIT; - S3C24X0_REG8 res3[3]; - S3C24X0_REG8 EP_DMA_FIFO; - S3C24X0_REG8 res4[3]; - S3C24X0_REG8 EP_DMA_TTC_L; - S3C24X0_REG8 res5[3]; - S3C24X0_REG8 EP_DMA_TTC_M; - S3C24X0_REG8 res6[3]; - S3C24X0_REG8 EP_DMA_TTC_H; -#else /* little endian */ - S3C24X0_REG8 EP_DMA_CON; - S3C24X0_REG8 res1[3]; - S3C24X0_REG8 EP_DMA_UNIT; - S3C24X0_REG8 res2[3]; - S3C24X0_REG8 EP_DMA_FIFO; - S3C24X0_REG8 res3[3]; - S3C24X0_REG8 EP_DMA_TTC_L; - S3C24X0_REG8 res4[3]; - S3C24X0_REG8 EP_DMA_TTC_M; - S3C24X0_REG8 res5[3]; - S3C24X0_REG8 EP_DMA_TTC_H; - S3C24X0_REG8 res6[3]; -#endif -}; - -struct s3c24x0_usb_device { -#ifdef __BIG_ENDIAN - S3C24X0_REG8 res1[3]; - S3C24X0_REG8 FUNC_ADDR_REG; - S3C24X0_REG8 res2[3]; - S3C24X0_REG8 PWR_REG; - S3C24X0_REG8 res3[3]; - S3C24X0_REG8 EP_INT_REG; - S3C24X0_REG8 res4[15]; - S3C24X0_REG8 USB_INT_REG; - S3C24X0_REG8 res5[3]; - S3C24X0_REG8 EP_INT_EN_REG; - S3C24X0_REG8 res6[15]; - S3C24X0_REG8 USB_INT_EN_REG; - S3C24X0_REG8 res7[3]; - S3C24X0_REG8 FRAME_NUM1_REG; - S3C24X0_REG8 res8[3]; - S3C24X0_REG8 FRAME_NUM2_REG; - S3C24X0_REG8 res9[3]; - S3C24X0_REG8 INDEX_REG; - S3C24X0_REG8 res10[7]; - S3C24X0_REG8 MAXP_REG; - S3C24X0_REG8 res11[3]; - S3C24X0_REG8 EP0_CSR_IN_CSR1_REG; - S3C24X0_REG8 res12[3]; - S3C24X0_REG8 IN_CSR2_REG; - S3C24X0_REG8 res13[7]; - S3C24X0_REG8 OUT_CSR1_REG; - S3C24X0_REG8 res14[3]; - S3C24X0_REG8 OUT_CSR2_REG; - S3C24X0_REG8 res15[3]; - S3C24X0_REG8 OUT_FIFO_CNT1_REG; - S3C24X0_REG8 res16[3]; - S3C24X0_REG8 OUT_FIFO_CNT2_REG; -#else /* little endian */ - S3C24X0_REG8 FUNC_ADDR_REG; - S3C24X0_REG8 res1[3]; - S3C24X0_REG8 PWR_REG; - S3C24X0_REG8 res2[3]; - S3C24X0_REG8 EP_INT_REG; - S3C24X0_REG8 res3[15]; - S3C24X0_REG8 USB_INT_REG; - S3C24X0_REG8 res4[3]; - S3C24X0_REG8 EP_INT_EN_REG; - S3C24X0_REG8 res5[15]; - S3C24X0_REG8 USB_INT_EN_REG; - S3C24X0_REG8 res6[3]; - S3C24X0_REG8 FRAME_NUM1_REG; - S3C24X0_REG8 res7[3]; - S3C24X0_REG8 FRAME_NUM2_REG; - S3C24X0_REG8 res8[3]; - S3C24X0_REG8 INDEX_REG; - S3C24X0_REG8 res9[7]; - S3C24X0_REG8 MAXP_REG; - S3C24X0_REG8 res10[7]; - S3C24X0_REG8 EP0_CSR_IN_CSR1_REG; - S3C24X0_REG8 res11[3]; - S3C24X0_REG8 IN_CSR2_REG; - S3C24X0_REG8 res12[3]; - S3C24X0_REG8 OUT_CSR1_REG; - S3C24X0_REG8 res13[7]; - S3C24X0_REG8 OUT_CSR2_REG; - S3C24X0_REG8 res14[3]; - S3C24X0_REG8 OUT_FIFO_CNT1_REG; - S3C24X0_REG8 res15[3]; - S3C24X0_REG8 OUT_FIFO_CNT2_REG; - S3C24X0_REG8 res16[3]; -#endif /* __BIG_ENDIAN */ - struct s3c24x0_usb_dev_fifos fifo[5]; - struct s3c24x0_usb_dev_dmas dma[5]; -}; - - -/* WATCH DOG TIMER (see manual chapter 18) */ -struct s3c24x0_watchdog { - S3C24X0_REG32 WTCON; - S3C24X0_REG32 WTDAT; - S3C24X0_REG32 WTCNT; -}; - - -/* IIC (see manual chapter 20) */ -struct s3c24x0_i2c { - S3C24X0_REG32 IICCON; - S3C24X0_REG32 IICSTAT; - S3C24X0_REG32 IICADD; - S3C24X0_REG32 IICDS; -}; - - -/* IIS (see manual chapter 21) */ -struct s3c24x0_i2s { -#ifdef __BIG_ENDIAN - S3C24X0_REG16 res1; - S3C24X0_REG16 IISCON; - S3C24X0_REG16 res2; - S3C24X0_REG16 IISMOD; - S3C24X0_REG16 res3; - S3C24X0_REG16 IISPSR; - S3C24X0_REG16 res4; - S3C24X0_REG16 IISFCON; - S3C24X0_REG16 res5; - S3C24X0_REG16 IISFIFO; -#else /* little endian */ - S3C24X0_REG16 IISCON; - S3C24X0_REG16 res1; - S3C24X0_REG16 IISMOD; - S3C24X0_REG16 res2; - S3C24X0_REG16 IISPSR; - S3C24X0_REG16 res3; - S3C24X0_REG16 IISFCON; - S3C24X0_REG16 res4; - S3C24X0_REG16 IISFIFO; - S3C24X0_REG16 res5; -#endif -}; - - -/* I/O PORT (see manual chapter 9) */ -struct s3c24x0_gpio { -#ifdef CONFIG_S3C2400 - S3C24X0_REG32 PACON; - S3C24X0_REG32 PADAT; - - S3C24X0_REG32 PBCON; - S3C24X0_REG32 PBDAT; - S3C24X0_REG32 PBUP; - - S3C24X0_REG32 PCCON; - S3C24X0_REG32 PCDAT; - S3C24X0_REG32 PCUP; - - S3C24X0_REG32 PDCON; - S3C24X0_REG32 PDDAT; - S3C24X0_REG32 PDUP; - - S3C24X0_REG32 PECON; - S3C24X0_REG32 PEDAT; - S3C24X0_REG32 PEUP; - - S3C24X0_REG32 PFCON; - S3C24X0_REG32 PFDAT; - S3C24X0_REG32 PFUP; - - S3C24X0_REG32 PGCON; - S3C24X0_REG32 PGDAT; - S3C24X0_REG32 PGUP; - - S3C24X0_REG32 OPENCR; - - S3C24X0_REG32 MISCCR; - S3C24X0_REG32 EXTINT; -#endif -#ifdef CONFIG_S3C2410 - S3C24X0_REG32 GPACON; - S3C24X0_REG32 GPADAT; - S3C24X0_REG32 res1[2]; - S3C24X0_REG32 GPBCON; - S3C24X0_REG32 GPBDAT; - S3C24X0_REG32 GPBUP; - S3C24X0_REG32 res2; - S3C24X0_REG32 GPCCON; - S3C24X0_REG32 GPCDAT; - S3C24X0_REG32 GPCUP; - S3C24X0_REG32 res3; - S3C24X0_REG32 GPDCON; - S3C24X0_REG32 GPDDAT; - S3C24X0_REG32 GPDUP; - S3C24X0_REG32 res4; - S3C24X0_REG32 GPECON; - S3C24X0_REG32 GPEDAT; - S3C24X0_REG32 GPEUP; - S3C24X0_REG32 res5; - S3C24X0_REG32 GPFCON; - S3C24X0_REG32 GPFDAT; - S3C24X0_REG32 GPFUP; - S3C24X0_REG32 res6; - S3C24X0_REG32 GPGCON; - S3C24X0_REG32 GPGDAT; - S3C24X0_REG32 GPGUP; - S3C24X0_REG32 res7; - S3C24X0_REG32 GPHCON; - S3C24X0_REG32 GPHDAT; - S3C24X0_REG32 GPHUP; - S3C24X0_REG32 res8; - - S3C24X0_REG32 MISCCR; - S3C24X0_REG32 DCLKCON; - S3C24X0_REG32 EXTINT0; - S3C24X0_REG32 EXTINT1; - S3C24X0_REG32 EXTINT2; - S3C24X0_REG32 EINTFLT0; - S3C24X0_REG32 EINTFLT1; - S3C24X0_REG32 EINTFLT2; - S3C24X0_REG32 EINTFLT3; - S3C24X0_REG32 EINTMASK; - S3C24X0_REG32 EINTPEND; - S3C24X0_REG32 GSTATUS0; - S3C24X0_REG32 GSTATUS1; - S3C24X0_REG32 GSTATUS2; - S3C24X0_REG32 GSTATUS3; - S3C24X0_REG32 GSTATUS4; -#endif -}; - - -/* RTC (see manual chapter 17) */ -struct s3c24x0_rtc { -#ifdef __BIG_ENDIAN - S3C24X0_REG8 res1[67]; - S3C24X0_REG8 RTCCON; - S3C24X0_REG8 res2[3]; - S3C24X0_REG8 TICNT; - S3C24X0_REG8 res3[11]; - S3C24X0_REG8 RTCALM; - S3C24X0_REG8 res4[3]; - S3C24X0_REG8 ALMSEC; - S3C24X0_REG8 res5[3]; - S3C24X0_REG8 ALMMIN; - S3C24X0_REG8 res6[3]; - S3C24X0_REG8 ALMHOUR; - S3C24X0_REG8 res7[3]; - S3C24X0_REG8 ALMDATE; - S3C24X0_REG8 res8[3]; - S3C24X0_REG8 ALMMON; - S3C24X0_REG8 res9[3]; - S3C24X0_REG8 ALMYEAR; - S3C24X0_REG8 res10[3]; - S3C24X0_REG8 RTCRST; - S3C24X0_REG8 res11[3]; - S3C24X0_REG8 BCDSEC; - S3C24X0_REG8 res12[3]; - S3C24X0_REG8 BCDMIN; - S3C24X0_REG8 res13[3]; - S3C24X0_REG8 BCDHOUR; - S3C24X0_REG8 res14[3]; - S3C24X0_REG8 BCDDATE; - S3C24X0_REG8 res15[3]; - S3C24X0_REG8 BCDDAY; - S3C24X0_REG8 res16[3]; - S3C24X0_REG8 BCDMON; - S3C24X0_REG8 res17[3]; - S3C24X0_REG8 BCDYEAR; -#else /* little endian */ - S3C24X0_REG8 res0[64]; - S3C24X0_REG8 RTCCON; - S3C24X0_REG8 res1[3]; - S3C24X0_REG8 TICNT; - S3C24X0_REG8 res2[11]; - S3C24X0_REG8 RTCALM; - S3C24X0_REG8 res3[3]; - S3C24X0_REG8 ALMSEC; - S3C24X0_REG8 res4[3]; - S3C24X0_REG8 ALMMIN; - S3C24X0_REG8 res5[3]; - S3C24X0_REG8 ALMHOUR; - S3C24X0_REG8 res6[3]; - S3C24X0_REG8 ALMDATE; - S3C24X0_REG8 res7[3]; - S3C24X0_REG8 ALMMON; - S3C24X0_REG8 res8[3]; - S3C24X0_REG8 ALMYEAR; - S3C24X0_REG8 res9[3]; - S3C24X0_REG8 RTCRST; - S3C24X0_REG8 res10[3]; - S3C24X0_REG8 BCDSEC; - S3C24X0_REG8 res11[3]; - S3C24X0_REG8 BCDMIN; - S3C24X0_REG8 res12[3]; - S3C24X0_REG8 BCDHOUR; - S3C24X0_REG8 res13[3]; - S3C24X0_REG8 BCDDATE; - S3C24X0_REG8 res14[3]; - S3C24X0_REG8 BCDDAY; - S3C24X0_REG8 res15[3]; - S3C24X0_REG8 BCDMON; - S3C24X0_REG8 res16[3]; - S3C24X0_REG8 BCDYEAR; - S3C24X0_REG8 res17[3]; -#endif -}; - - -/* ADC (see manual chapter 16) */ -struct s3c2400_adc { - S3C24X0_REG32 ADCCON; - S3C24X0_REG32 ADCDAT; -}; - - -/* ADC (see manual chapter 16) */ -struct s3c2410_adc { - S3C24X0_REG32 ADCCON; - S3C24X0_REG32 ADCTSC; - S3C24X0_REG32 ADCDLY; - S3C24X0_REG32 ADCDAT0; - S3C24X0_REG32 ADCDAT1; -}; - - -/* SPI (see manual chapter 22) */ -struct s3c24x0_spi_channel { - S3C24X0_REG8 SPCON; - S3C24X0_REG8 res1[3]; - S3C24X0_REG8 SPSTA; - S3C24X0_REG8 res2[3]; - S3C24X0_REG8 SPPIN; - S3C24X0_REG8 res3[3]; - S3C24X0_REG8 SPPRE; - S3C24X0_REG8 res4[3]; - S3C24X0_REG8 SPTDAT; - S3C24X0_REG8 res5[3]; - S3C24X0_REG8 SPRDAT; - S3C24X0_REG8 res6[3]; - S3C24X0_REG8 res7[16]; -}; - -struct s3c24x0_spi { - struct s3c24x0_spi_channel ch[S3C24X0_SPI_CHANNELS]; -}; - - -/* MMC INTERFACE (see S3C2400 manual chapter 19) */ -struct s3c2400_mmc { -#ifdef __BIG_ENDIAN - S3C24X0_REG8 res1[3]; - S3C24X0_REG8 MMCON; - S3C24X0_REG8 res2[3]; - S3C24X0_REG8 MMCRR; - S3C24X0_REG8 res3[3]; - S3C24X0_REG8 MMFCON; - S3C24X0_REG8 res4[3]; - S3C24X0_REG8 MMSTA; - S3C24X0_REG16 res5; - S3C24X0_REG16 MMFSTA; - S3C24X0_REG8 res6[3]; - S3C24X0_REG8 MMPRE; - S3C24X0_REG16 res7; - S3C24X0_REG16 MMLEN; - S3C24X0_REG8 res8[3]; - S3C24X0_REG8 MMCR7; - S3C24X0_REG32 MMRSP[4]; - S3C24X0_REG8 res9[3]; - S3C24X0_REG8 MMCMD0; - S3C24X0_REG32 MMCMD1; - S3C24X0_REG16 res10; - S3C24X0_REG16 MMCR16; - S3C24X0_REG8 res11[3]; - S3C24X0_REG8 MMDAT; -#else - S3C24X0_REG8 MMCON; - S3C24X0_REG8 res1[3]; - S3C24X0_REG8 MMCRR; - S3C24X0_REG8 res2[3]; - S3C24X0_REG8 MMFCON; - S3C24X0_REG8 res3[3]; - S3C24X0_REG8 MMSTA; - S3C24X0_REG8 res4[3]; - S3C24X0_REG16 MMFSTA; - S3C24X0_REG16 res5; - S3C24X0_REG8 MMPRE; - S3C24X0_REG8 res6[3]; - S3C24X0_REG16 MMLEN; - S3C24X0_REG16 res7; - S3C24X0_REG8 MMCR7; - S3C24X0_REG8 res8[3]; - S3C24X0_REG32 MMRSP[4]; - S3C24X0_REG8 MMCMD0; - S3C24X0_REG8 res9[3]; - S3C24X0_REG32 MMCMD1; - S3C24X0_REG16 MMCR16; - S3C24X0_REG16 res10; - S3C24X0_REG8 MMDAT; - S3C24X0_REG8 res11[3]; -#endif -}; - - -/* SD INTERFACE (see S3C2410 manual chapter 19) */ -struct s3c2410_sdi { - S3C24X0_REG32 SDICON; - S3C24X0_REG32 SDIPRE; - S3C24X0_REG32 SDICARG; - S3C24X0_REG32 SDICCON; - S3C24X0_REG32 SDICSTA; - S3C24X0_REG32 SDIRSP0; - S3C24X0_REG32 SDIRSP1; - S3C24X0_REG32 SDIRSP2; - S3C24X0_REG32 SDIRSP3; - S3C24X0_REG32 SDIDTIMER; - S3C24X0_REG32 SDIBSIZE; - S3C24X0_REG32 SDIDCON; - S3C24X0_REG32 SDIDCNT; - S3C24X0_REG32 SDIDSTA; - S3C24X0_REG32 SDIFSTA; -#ifdef __BIG_ENDIAN - S3C24X0_REG8 res[3]; - S3C24X0_REG8 SDIDAT; -#else - S3C24X0_REG8 SDIDAT; - S3C24X0_REG8 res[3]; -#endif - S3C24X0_REG32 SDIIMSK; -}; - -#endif /*__S3C24X0_H__*/ -- 1.6.0.6

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[U-Boot] u-boot for iMX27 board
by Intur Venkatesulu 04 Nov '09

04 Nov '09

Hi, Please clarify the following regarding u-boot. Will u-boot imx27 Target board, if yes pl send me this link for down loading u-boot Regards, Venkatesulu

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[U-Boot] [PATCH 2/3] [OneNAND] ENV Variable support for Flex-OneNAND
by Amul Kumar Saha 04 Nov '09

04 Nov '09

Define and use CONFIG_ENV_ADDR_FLEX and CONFIG_ENV_SIZE_FLEX for storing environment variables. Signed-off-by: Rohit Hagargundgi <h.rohit(a)samsung.com> Signed-off-by: Amul Kumar Saha <amul.saha(a)samsung.com> --- common/env_onenand.c | 10 ++++++++++ include/configs/apollon.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/common/env_onenand.c b/common/env_onenand.c index dcf09de..23d2caa 100644 --- a/common/env_onenand.c +++ b/common/env_onenand.c @@ -60,11 +60,14 @@ uchar env_get_char_spec(int index) void env_relocate_spec(void) { struct mtd_info *mtd = &onenand_mtd; + struct onenand_chip *this = &onenand_chip; loff_t env_addr; int use_default = 0; size_t retlen; env_addr = CONFIG_ENV_ADDR; + if (FLEXONENAND(this)) + env_addr = CONFIG_ENV_ADDR_FLEX; /* Check OneNAND exist */ if (mtd->writesize) @@ -91,6 +94,7 @@ void env_relocate_spec(void) int saveenv(void) { struct mtd_info *mtd = &onenand_mtd; + struct onenand_chip *this = &onenand_chip; loff_t env_addr = CONFIG_ENV_ADDR; struct erase_info instr = { .callback = NULL, @@ -98,6 +102,12 @@ int saveenv(void) size_t retlen; instr.len = CONFIG_ENV_SIZE; + if (FLEXONENAND(this)) { + env_addr = CONFIG_ENV_ADDR_FLEX; + instr.len = CONFIG_ENV_SIZE_FLEX; + instr.len <<= onenand_mtd.eraseregions[0].numblocks == 1 ? + 1 : 0; + } instr.addr = env_addr; instr.mtd = mtd; if (mtd->erase(mtd, &instr)) { diff --git a/include/configs/apollon.h b/include/configs/apollon.h index 575f60e..ddac5fb 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -76,6 +76,7 @@ * Size of malloc() pool */ #define CONFIG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE_FLEX SZ_256K #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_1M) /* bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -255,6 +256,7 @@ #define CONFIG_SYS_MONITOR_LEN SZ_256K /* U-Boot image size */ #define CONFIG_ENV_IS_IN_ONENAND 1 #define CONFIG_ENV_ADDR 0x00020000 +#define CONFIG_ENV_ADDR_FLEX 0x00040000 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */

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