November 2009 - U-Boot

[U-Boot] [PATCH 1/1] ARM Add New Board GEC2410 v2
by Hui.Tang 05 Nov '09

05 Nov '09

Signed-off-by: Hui.Tang <zetalabs(a)gmail.com> --- total: 0 errors, 0 warnings, 1249 lines checked 0001-ARM-Add-New-Board-GEC2410.patch has no obvious style problems and is ready for submission. MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 7 + board/gec/gec2410/Makefile | 54 ++++++ board/gec/gec2410/README | 85 +++++++++ board/gec/gec2410/config.mk | 34 ++++ board/gec/gec2410/gec2410.c | 313 +++++++++++++++++++++++++++++++++ board/gec/gec2410/gec2410_mem.h | 118 +++++++++++++ board/gec/gec2410/lowlevel_init.S | 93 ++++++++++ board/gec/gec2410/u-boot-nand.lds | 61 +++++++ cpu/arm920t/s3c24x0/timer.c | 3 +- include/configs/gec2410.h | 249 ++++++++++++++++++++++++++ nand_spl/board/gec/gec2410/Makefile | 103 +++++++++++ nand_spl/board/gec/gec2410/config.mk | 40 +++++ nand_spl/board/gec/gec2410/u-boot.lds | 60 +++++++ 15 files changed, 1224 insertions(+), 1 deletions(-) create mode 100644 board/gec/gec2410/Makefile create mode 100644 board/gec/gec2410/README create mode 100644 board/gec/gec2410/config.mk create mode 100644 board/gec/gec2410/gec2410.c create mode 100644 board/gec/gec2410/gec2410_mem.h create mode 100644 board/gec/gec2410/lowlevel_init.S create mode 100644 board/gec/gec2410/u-boot-nand.lds create mode 100644 include/configs/gec2410.h create mode 100644 nand_spl/board/gec/gec2410/Makefile create mode 100644 nand_spl/board/gec/gec2410/config.mk create mode 100644 nand_spl/board/gec/gec2410/u-boot.lds diff --git a/MAINTAINERS b/MAINTAINERS index d70a9d2..6ecba41 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -429,6 +429,10 @@ Timur Tabi <timur(a)freescale.com> MPC8349E-mITX MPC8349 MPC8349E-mITX-GP MPC8349 +Hui Tang <zetalabs(a)gmail.com> + + gec2410 ARM920T + Erik Theisen <etheisen(a)mindspring.com> W7OLMC PPC4xx diff --git a/MAKEALL b/MAKEALL index d63c5c2..fffa58a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -548,6 +548,7 @@ LIST_ARM9=" \ cp926ejs \ cp946es \ cp966 \ + gec2410 \ imx27lite \ lpd7a400 \ mv88f6281gtw_ge \ diff --git a/Makefile b/Makefile index bcb3fe9..2de0b1d 100644 --- a/Makefile +++ b/Makefile @@ -2951,6 +2951,13 @@ davinci_dm365evm_config : unconfig davinci_dm6467evm_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci +gec2410_config : unconfig + @mkdir -p $(obj)include $(obj)board/gec/gec2410 + @mkdir -p $(obj)nand_spl/board/gec/gec2410 + @echo "RAM_TEXT = 0x33e00000" >> $(obj)board/gec/gec2410/config.tmp + @$(MKCONFIG) $(@:_config=) arm arm920t gec2410 gec s3c24x0 + @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk + imx27lite_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27 diff --git a/board/gec/gec2410/Makefile b/board/gec/gec2410/Makefile new file mode 100644 index 0000000..052f600 --- /dev/null +++ b/board/gec/gec2410/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# (C) Copyright 2009 +# Hui Tang <zetalabs(a)gmail.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := gec2410.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/gec/gec2410/README b/board/gec/gec2410/README new file mode 100644 index 0000000..952aae8 --- /dev/null +++ b/board/gec/gec2410/README @@ -0,0 +1,85 @@ +U-Boot for GEC2410 + +------------------------------------------------ +The supported features of the GEC2410 board are: + CPU (Samsung S3C2410 SoC) + SDRAM (64 MB , 2 pcs K4S561632, 32 bit) + NAND FLASH (64MB , 1 pcs K9F1208) + NOR FLASH (only on rev1.1 board, 2MB , 1 pcs SST39VF1601) + ETHERNET (10M , 1 pcs CS8900) + + +------------------------------------------------ +Memory Map from CPU point of view: + +for NAND FLASH boot: + Start Size Access to + ----------------------------------------------------- + 0x00000000 64MB NAND FLASH (first 4K SRAM for stepptingstone) + 0x19000300 CS8900 I/O base + 0x30000000 64MB SDRAM + 0x48000000 128MB Special Function Registers Area + + +for NOR FLASH boot: + Start Size Access to + ----------------------------------------------------- + 0x00000000 2MB NOR FLASH + 0x19000300 CS8900 I/O base + 0x30000000 64MB SDRAM + 0x40000000 4KB BootSRAM + 0x48000000 128MB Special Function Registers Area + + +------------------------------------------------ +Setting the board Jumpers & Switches: + + In order to get the board running with the default configuration the + jumpers need to be set as follows: + + Core board Jumpers: + JP1 close (Set boot mode, close for booting from NAND FLASH, + otherwise from NOR FLASH) + + Main board Jumpers: + J1 close (Set beep, close for enabling beep, or disabling beep) + J18 1-2 (1-2 set RXD2 as UART; 2-3 set RXD2 as IrDA) + J9,J10 2-3 (1-2 set USB HOST 1 to Host mode; + 2-3 set USB HOST 1 to Device mode) + J13 1-2 (1-2 set LCD working power to 5V; + 2-3 set LCD working power to 3.3V) + + Core board Switches: + S1 open (Reset button) + + Main board Switches: + K1~K16 open (4x4 keyboard) + + +------------------------------------------------ +LED & Connector Interfaces: + + Core board LEDs: + D1,D2 I/O port + D3 PWREN pin LED + D4 Core board power + + Main board LEDs: + D1~D4 GPIO + D5,D6 Ethernet + D11 Main board power + + Core board Connector Interfaces: + J1 JTAG (20 pins) + + Main board Connector Interfaces: + RJ1 Ethernet (RJ45) + J2 Audio In + J3 Audio Out + J4 Serial Port 1 + J5 Serial Port 2 + U4 IrDA Port + J7 USB HOST 0 + J9 USB HOST 1 / USB DEVICE + J11 USB DEVICE + J20 GPIO Pins diff --git a/board/gec/gec2410/config.mk b/board/gec/gec2410/config.mk new file mode 100644 index 0000000..f32ee2e --- /dev/null +++ b/board/gec/gec2410/config.mk @@ -0,0 +1,34 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> +# David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> +# +# GuangDong Embedded Software Center GEC2410 board with S3C2410X (ARM920T) cpu +# +# see http://www.gd-emb.com/sales_detail/menu-2410.html for more information on GEC2410 +# + +# +# GEC2410 has 1 bank of 64 MB DRAM +# +# 3000'0000 to 3400'0000 +# +# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000 +# optionally with a ramdisk at 3080'0000 +# +# we load ourself to 33e0'0000 +# +# download area is 3300'c000 +# + +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp + +ifndef CONFIG_NAND_SPL +TEXT_BASE = $(RAM_TEXT) +else +TEXT_BASE = 0 +endif + +LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot-nand.lds + +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/gec/gec2410 diff --git a/board/gec/gec2410/gec2410.c b/board/gec/gec2410/gec2410.c new file mode 100644 index 0000000..1f941ad --- /dev/null +++ b/board/gec/gec2410/gec2410.c @@ -0,0 +1,313 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * (C) Copyright 2002 + * David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> + * + * (C) Copyright 2009 + * Hui Tang, <zetalabs(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <netdev.h> +#include <asm/arch/s3c2410.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define FCLK_SPEED 1 + +#if FCLK_SPEED == 0 /* Fout = 203MHz, Fin = 12MHz for Audio */ +#define M_MDIV 0xC3 +#define M_PDIV 0x4 +#define M_SDIV 0x1 +#elif FCLK_SPEED == 1 /* Fout = 202.8MHz */ +#define M_MDIV 0xA1 +#define M_PDIV 0x3 +#define M_SDIV 0x1 +#endif + +#define USB_CLOCK 1 + +#if USB_CLOCK == 0 +#define U_M_MDIV 0xA1 +#define U_M_PDIV 0x3 +#define U_M_SDIV 0x1 +#elif USB_CLOCK == 1 +#define U_M_MDIV 0x48 +#define U_M_PDIV 0x3 +#define U_M_SDIV 0x2 +#endif + +static inline void delay(unsigned long loops) +{ + __asm__ volatile ("1:\n" + "subs %0, %1, #1\n" + "bne 1b" : "=r" (loops) : "0" (loops)); +} + +/* + * Miscellaneous platform dependent initialisations + */ + +int board_init(void) +{ + struct s3c24x0_clock_power * const clk_power = + s3c24x0_get_base_clock_power(); + struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio(); + + /* to reduce PLL lock time, adjust the LOCKTIME register */ + writel(0xFFFFFF, &clk_power->LOCKTIME); + + /* configure MPLL */ + writel(((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV), &clk_power->MPLLCON); + + /* some delay between MPLL and UPLL */ + delay(4000); + + /* configure UPLL */ + writel(((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV), + &clk_power->UPLLCON); + + /* some delay between MPLL and UPLL */ + delay(8000); + + /* set up the I/O ports */ + /* configure GPA port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPA22 nFCE 1 + * GPA21 nRSTOUT 1 + * GPA20 nFRE 1 + * GPA19 nFWE 1 + * GPA18 ALE 1 + * GPA17 CLE 1 + * GPA16 nGCS5 1 + * GPA15 nGCS4 1 + * GPA14 nGCS3 1 + * GPA13 nGCS2 1 + * GPA12 nGCS1 1 + * GPA11 ADDR26 1 + * GPA10 ADDR25 1 + * GPA9 ADDR24 1 + * GPA8 ADDR23 1 + * GPA7 ADDR22 1 + * GPA6 ADDR21 1 + * GPA5 ADDR20 1 + * GPA4 ADDR19 1 + * GPA3 ADDR18 1 + * GPA2 ADDR17 1 + * GPA1 ADDR16 1 + * GPA0 ADDR0 1 + *====================================*/ + writel(0x007FFFFF, &gpio->GPACON); + + /* configure GPB port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPB10 Input 00 + * GPB9 Output 01 + * GPB8 Input 00 + * GPB7 Output 01 + * GPB6 Input 00 + * GPB5 Output 01 + * GPB4 Output 01 + * GPB3 Output 01 + * GPB2 Output 01 + * GPB1 Output 01 + * GPB0 Output 01 + *====================================*/ + writel(0x00044555, &gpio->GPBCON); + /* disable all pull-up register */ + writel(0x000007FF, &gpio->GPBUP); + + /* configure GPC port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPC15 VD7 10 + * GPC14 VD6 10 + * GPC13 VD5 10 + * GPC12 VD4 10 + * GPC11 VD3 10 + * GPC10 VD2 10 + * GPC9 VD1 10 + * GPC8 VD0 10 + * GPC7 LCDVF2 10 + * GPC6 LCDVF1 10 + * GPC5 LCDVF0 10 + * GPC4 VM 10 + * GPC3 VFRAME 10 + * GPC2 VLINE 10 + * GPC1 VCLK 10 + * GPC0 LEND 10 + *====================================*/ + writel(0xAAAAAAAA, &gpio->GPCCON); + /* disable all pull-up register */ + writel(0x0000FFFF, &gpio->GPCUP); + + /* configure GPD port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPD15 VD23 10 + * GPD14 VD22 10 + * GPD13 VD21 10 + * GPD12 VD20 10 + * GPD11 VD19 10 + * GPD10 VD18 10 + * GPD9 VD17 10 + * GPD8 VD16 10 + * GPD7 VD15 10 + * GPD6 VD14 10 + * GPD5 VD13 10 + * GPD4 VD12 10 + * GPD3 VD11 10 + * GPD2 VD10 10 + * GPD1 VD9 10 + * GPD0 VD8 10 + *====================================*/ + writel(0xAAAAAAAA, &gpio->GPDCON); + /* disable all pull-up register */ + writel(0x0000FFFF, &gpio->GPDUP); + + /* configure GPE port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPE15 IICSDA 10 + * GPE14 IICSCL 10 + * GPE13 SPICLK0 10 + * GPE12 SPIMOSIO 10 + * GPE11 SPIMISOO 10 + * GPE10 SDDAT3 10 + * GPE9 SDDAT2 10 + * GPE8 SDDAT1 10 + * GPE7 SDDAT0 10 + * GPE6 SDCMD 10 + * GPE5 SDCLK 10 + * GPE4 I2SSDO 10 + * GPE3 I2SSDI 10 + * GPE2 CDCLK 10 + * GPE1 I2SSCLK 10 + * GPE0 I2SLRCK 10 + *====================================*/ + writel(0xAAAAAAAA, &gpio->GPECON); + /* disable all pull-up register */ + writel(0x0000FFFF, &gpio->GPEUP); + + /* configure GPF port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPF7 Output 01 + * GPF6 Output 01 + * GPF5 Output 01 + * GPF4 Output 01 + * GPF3 EINT3 10 + * GPF2 EINT2 10 + * GPF1 EINT1 10 + * GPF0 EINT0 10 + *====================================*/ + writel(0x000055AA, &gpio->GPFCON); + /* disable all pull-up register */ + writel(0x000000FF, &gpio->GPFUP); + + /* configure GPG port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPG15 nYPON 11 + * GPG14 YMON 11 + * GPG13 nXPON 11 + * GPG12 XMON 11 + * GPG11 EINT19 10 + * GPG10 Output 01 + * GPG9 Output 01 + * GPG8 Output 01 + * GPG7 SPICLK1 11 + * GPG6 SPIMOSI1 11 + * GPG5 SPIMISO1 11 + * GPG4 LCD_PWREN 11 + * GPG3 EINT11 10 + * GPG2 nSS0 11 + * GPG1 EINT9 10 + * GPG0 EINT8 10 + *====================================*/ + writel(0xFF95FFBA, &gpio->GPGCON); + /* disable all pull-up register */ + writel(0x0000FFFF, &gpio->GPGUP); + + /* configure GPH port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPH10 CLKOUT1 10 + * GPH9 CLKOUT0 10 + * GPH8 UEXTCLK 10 + * GPH7 nCTS1 11 + * GPH6 nRTS1 11 + * GPH5 RXD1 10 + * GPH4 TXD1 10 + * GPH3 RXD0 10 + * GPH2 TXD0 10 + * GPH1 nRTS0 10 + * GPH0 nCTS0 10 + *====================================*/ + writel(0x002AFAAA, &gpio->GPHCON); + /* disable all pull-up register */ + writel(0x000007FF, &gpio->GPHUP); + + /* arch number of GEC2410-Board */ + gd->bd->bi_arch_number = MACH_TYPE_GEC2410; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + + icache_enable(); + dcache_enable(); + + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, + PHYS_SDRAM_1_SIZE); + + return 0; +} + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_CS8900 + rc = cs8900_initialize(0, CONFIG_CS8900_BASE); +#endif + return rc; +} +#endif diff --git a/board/gec/gec2410/gec2410_mem.h b/board/gec/gec2410/gec2410_mem.h new file mode 100644 index 0000000..93f820b --- /dev/null +++ b/board/gec/gec2410/gec2410_mem.h @@ -0,0 +1,118 @@ +/* + * Memory Setup stuff - taken from blob memsetup.S + * + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw(a)its.tudelft.nl) and + * Jan-Derk Bakker (J.D.Bakker(a)its.tudelft.nl) + * + * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S + * + * Copyright (C) 2002 Samsung Electronics SW.LEE <hitchcar(a)sec.samsung.com> + * + * Modified for the Samsung SMDK2410 by + * (C) Copyright 2002 + * David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> + * + * Copyright (C) 2009 Hui Tang <zetalabs(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define BWSCON 0x48000000 + +/* BWSCON */ +#define DW8 (0x0) +#define DW16 (0x1) +#define DW32 (0x2) +#define WAIT (0x1<<2) +#define UBLB (0x1<<3) + +#define B1_BWSCON (DW32) +#define B2_BWSCON (DW16) +#define B3_BWSCON (DW16 + WAIT + UBLB) +#define B4_BWSCON (DW16) +#define B5_BWSCON (DW16) +#define B6_BWSCON (DW32) +#define B7_BWSCON (DW32) + +/* BANK0CON */ +#define B0_Tacs 0x0 /* 0clk */ +#define B0_Tcos 0x0 /* 0clk */ +#define B0_Tacc 0x7 /* 14clk */ +#define B0_Tcoh 0x0 /* 0clk */ +#define B0_Tah 0x0 /* 0clk */ +#define B0_Tacp 0x0 +#define B0_PMC 0x0 /* normal */ + +/* BANK1CON */ +#define B1_Tacs 0x0 /* 0clk */ +#define B1_Tcos 0x0 /* 0clk */ +#define B1_Tacc 0x7 /* 14clk */ +#define B1_Tcoh 0x0 /* 0clk */ +#define B1_Tah 0x0 /* 0clk */ +#define B1_Tacp 0x0 +#define B1_PMC 0x0 + +#define B2_Tacs 0x0 +#define B2_Tcos 0x0 +#define B2_Tacc 0x7 +#define B2_Tcoh 0x0 +#define B2_Tah 0x0 +#define B2_Tacp 0x0 +#define B2_PMC 0x0 + +#define B3_Tacs 0x0 /* 0clk */ +#define B3_Tcos 0x3 /* 4clk */ +#define B3_Tacc 0x7 /* 14clk */ +#define B3_Tcoh 0x1 /* 1clk */ +#define B3_Tah 0x0 /* 0clk */ +#define B3_Tacp 0x3 /* 6clk */ +#define B3_PMC 0x0 /* normal */ + +#define B4_Tacs 0x0 /* 0clk */ +#define B4_Tcos 0x0 /* 0clk */ +#define B4_Tacc 0x7 /* 14clk */ +#define B4_Tcoh 0x0 /* 0clk */ +#define B4_Tah 0x0 /* 0clk */ +#define B4_Tacp 0x0 +#define B4_PMC 0x0 /* normal */ + +#define B5_Tacs 0x0 /* 0clk */ +#define B5_Tcos 0x0 /* 0clk */ +#define B5_Tacc 0x7 /* 14clk */ +#define B5_Tcoh 0x0 /* 0clk */ +#define B5_Tah 0x0 /* 0clk */ +#define B5_Tacp 0x0 +#define B5_PMC 0x0 /* normal */ + +#define B6_MT 0x3 /* SDRAM */ +#define B6_Trcd 0x1 +#define B6_SCAN 0x1 /* 9bit */ + +#define B7_MT 0x3 /* SDRAM */ +#define B7_Trcd 0x1 /* 3clk */ +#define B7_SCAN 0x1 /* 9bit */ + +/* REFRESH parameter */ +#define REFEN 0x1 /* Refresh enable */ +#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ +#define Trp 0x0 /* 2clk */ +#define Trc 0x3 /* 7clk */ +#define Tchr 0x2 /* 3clk */ +#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */ +/**************************************/ diff --git a/board/gec/gec2410/lowlevel_init.S b/board/gec/gec2410/lowlevel_init.S new file mode 100644 index 0000000..215aaad --- /dev/null +++ b/board/gec/gec2410/lowlevel_init.S @@ -0,0 +1,93 @@ +/* + * Memory Setup stuff - taken from blob memsetup.S + * + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw(a)its.tudelft.nl) and + * Jan-Derk Bakker (J.D.Bakker(a)its.tudelft.nl) + * + * Modified for the Samsung SMDK2410 by + * (C) Copyright 2002 + * David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> + * + * Copyright (C) 2009 Hui Tang <zetalabs(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <version.h> +#include "gec2410_mem.h" + +_TEXT_BASE: + .word TEXT_BASE + +.globl lowlevel_init +lowlevel_init: +#if defined(CONFIG_NAND_SPL) || !defined(CONFIG_BOOT_NAND) + /* memory control configuration */ + /* make r0 relative the current location so that it */ + /* reads SMRDATA out of FLASH rather than memory ! */ + ldr r0, =SMRDATA + ldr r1, _TEXT_BASE + sub r0, r0, r1 + ldr r1, =BWSCON /* Bus Width Status Controller */ + add r2, r0, #13*4 +0: + ldr r3, [r0], #4 + str r3, [r1], #4 + cmp r2, r0 + bne 0b +#endif /* CONFIG_NAND_SPL */ + + /* everything is fine now */ + mov pc, lr + +/* dummy function, called by start_code() in cpu/arm920t/start.S */ +.globl coloured_LED_init +coloured_LED_init: + mov pc, lr + +/* dummy function, called by start_code() in cpu/arm920t/start.S */ +.globl red_LED_on +red_LED_on: + mov pc, lr + + .ltorg +/* the literal pools origin */ + +SMRDATA: + .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12) \ + +(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) + .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8) \ + +(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) + .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8) \ + +(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) + .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8) \ + +(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) + .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8) \ + +(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) + .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8) \ + +(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) + .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8) \ + +(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) + .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) + .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) + .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) + .word 0x32 + .word 0x30 + .word 0x30 diff --git a/board/gec/gec2410/u-boot-nand.lds b/board/gec/gec2410/u-boot-nand.lds new file mode 100644 index 0000000..a30ece3 --- /dev/null +++ b/board/gec/gec2410/u-boot-nand.lds @@ -0,0 +1,61 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm920t/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + .mmudata : { *(.mmudata) } + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) . = ALIGN(4); } + _end = .; +} diff --git a/cpu/arm920t/s3c24x0/timer.c b/cpu/arm920t/s3c24x0/timer.c index 20cedd4..d463a03 100644 --- a/cpu/arm920t/s3c24x0/timer.c +++ b/cpu/arm920t/s3c24x0/timer.c @@ -188,7 +188,8 @@ ulong get_tbclk(void) tbclk = timer_load_val * 100; #elif defined(CONFIG_SBC2410X) || \ defined(CONFIG_SMDK2410) || \ - defined(CONFIG_VCMA9) + defined(CONFIG_VCMA9) || \ + defined(CONFIG_GEC2410) tbclk = CONFIG_SYS_HZ; #else # error "tbclk not configured" diff --git a/include/configs/gec2410.h b/include/configs/gec2410.h new file mode 100644 index 0000000..a5c1b73 --- /dev/null +++ b/include/configs/gec2410.h @@ -0,0 +1,249 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * Gary Jennejohn <garyj(a)denx.de> + * David Mueller <d.mueller(a)elsoft.ch> + * + * Configuation settings for the GD-Embedded Software Center GEC2410 board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ +#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */ +#define CONFIG_GEC2410 1 /* on a GEC2410 Board */ + +#define CONFIG_SYS_SDRAM_BASE 0x30000000 + +/* input clock of PLL */ +#define CONFIG_SYS_CLK_FREQ 12000000 /* the GEC2410 has 12MHz input clock */ + +#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000) +#define CONFIG_ENABLE_MMU +#endif + +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG + +#define USE_920T_MMU 1 + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * Hardware drivers + */ +#define CONFIG_NET_MULTI +#define CONFIG_CS8900 /* we have a CS8900 on-board */ +#define CONFIG_CS8900_BASE 0x19000300 +#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ + +/* + * select serial console configuration + */ +#define CONFIG_S3C24X0_SERIAL 1 +#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on GEC2410 */ + +/************************************************************ + * RTC + ************************************************************/ +#define CONFIG_RTC_S3C24X0 1 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_BAUDRATE 115200 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "GEC2410#" /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START \ + CONFIG_SYS_SDRAM_BASE /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END \ + (CONFIG_SYS_SDRAM_BASE + 0x3e00000) /* 62 MB in DRAM */ + +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */ +#define CONFIG_SYS_HZ 1000 + +/* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE 0x40000 /* regular stack 256KB */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ + +#define CONFIG_SYS_FLASH_BASE 0x00000000 +#define CONFIG_SYS_MONITOR_BASE 0x00000000 +#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ + +#define CONFIG_SYS_FLASH_CFI 1 /* Use CFI parameters (needed?) */ +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT + +#define PHYS_FLASH_SIZE 0x00200000 /* 2MB */ +#define CONFIG_ENV_ADDR \ + (CONFIG_SYS_FLASH_BASE + 0x040000) /* addr of environment */ + +/* timeout values are in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT \ + (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT \ + (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ + +#define CONFIG_ENV_SIZE 0x020000 /* Total Size of Environment Parameters */ + +/* + * GEC2410 board specific data + */ +#define CONFIG_IDENT_STRING " for GEC2410" + +/* base address for uboot */ +#define CONFIG_SYS_PHY_UBOOT_BASE (CONFIG_SYS_SDRAM_BASE + 0x03e00000) + +/* total memory available to uboot */ +#define CONFIG_SYS_UBOOT_SIZE (1024 * 1024) + +/* Put environment copies after the end of U-Boot owned RAM */ +#define CONFIG_NAND_ENV_DST (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE) + +#ifdef CONFIG_ENABLE_MMU +#define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000 +#define CONFIG_BOOTCOMMAND "nand read 0xc0008000 0x60000 0x1a0000;" \ + "bootm 0xc0008000" +#else +#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE +#define CONFIG_BOOTCOMMAND "nand read 0x30008000 0x60000 0x1a0000;" \ + "bootm 0x30008000" +#endif + +/* NAND U-Boot load and start address */ +#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_MAPPED_RAM_BASE + 0x03e00000) +#define CONFIG_ENV_OFFSET 0x0040000 /* Offset of Environment Sector */ + +/* NAND configuration */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x4e00000c /* R/W NAND Flash data register */ +#define CONFIG_S3C2410_NAND_HWECC +#define CONFIG_S3C2410_NAND_BBT + +/* NUB load-addr */ +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_PHY_UBOOT_BASE +/* NUB start-addr */ +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST + +/* Offset to RAM U-Boot image */ +#define CONFIG_SYS_NAND_U_BOOT_OFFS (4 * 1024) +/* Size of RAM U-Boot image */ +#define CONFIG_SYS_NAND_U_BOOT_SIZE (252 * 1024) + +/* NAND chip page size */ +#define CONFIG_SYS_NAND_PAGE_SIZE 512 +/* NAND chip block size */ +#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) +/* NAND chip page per block count */ +#define CONFIG_SYS_NAND_PAGE_COUNT 32 +/* Location of the bad-block label */ +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 5 /* Marks the 6th OOB byte */ +/* Extra address cycle for > 32MiB */ +#define CONFIG_SYS_NAND_4_ADDR_CYCLE 1 /* Fourth addr used (>32MB) */ + +/* Size of the block protected by one OOB (Spare Area in Samsung terminology) */ +#define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE +/* Number of ECC bytes per OOB - S3C2410 calculates 4 bytes ECC in 1-bit mode */ +#define CONFIG_SYS_NAND_ECCBYTES 3 +/* Number of ECC-blocks per NAND page */ +#define CONFIG_SYS_NAND_ECCSTEPS \ + (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE) +/* Size of a single OOB region */ +#define CONFIG_SYS_NAND_OOBSIZE 16 +/* Number of ECC bytes per page */ +#define CONFIG_SYS_NAND_ECCTOTAL \ + (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS) +/* ECC byte positions */ +#define CONFIG_SYS_NAND_ECCPOS {0, 1, 2} +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + +/* Boot configuration */ +#define CONFIG_BOOT_NAND +#define CONFIG_NAND +#define CONFIG_NAND_S3C2410 1 + +/* Settings as above boot configuration */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_BOOTARGS "console=ttySAC,115200" + +#endif /* __CONFIG_H */ diff --git a/nand_spl/board/gec/gec2410/Makefile b/nand_spl/board/gec/gec2410/Makefile new file mode 100644 index 0000000..ece460d --- /dev/null +++ b/nand_spl/board/gec/gec2410/Makefile @@ -0,0 +1,103 @@ +# +# (C) Copyright 2006-2007 +# Stefan Roese, DENX Software Engineering, sr(a)denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +CONFIG_NAND_SPL = y +CONFIG_SKIP_RELOCATE_UBOOT = y + +include $(TOPDIR)/config.mk +include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk + +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_NAND_SPL -DCONFIG_SKIP_RELOCATE_UBOOT +CFLAGS += -DCONFIG_NAND_SPL -DCONFIG_SKIP_RELOCATE_UBOOT + +SOBJS = start.o lowlevel_init.o +COBJS = nand_boot.o s3c2410_nand.o + +SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +nandobj := $(OBJTREE)/nand_spl/ + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +all: $(obj).depend $(ALL) + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +$(nandobj)u-boot.lds: $(LDSCRIPT) + $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@ + +# create symbolic links for common files + +# from cpu directory +$(obj)start.S: + @rm -f $@ + @ln -s $(TOPDIR)/cpu/arm920t/start.S $@ + +# from SoC directory + +# from board directory +$(obj)lowlevel_init.S: + @rm -f $@ + @ln -s $(TOPDIR)/board/gec/gec2410/lowlevel_init.S $@ + +# from nand_spl directory +$(obj)nand_boot.c: + @rm -f $@ + @ln -s $(TOPDIR)/nand_spl/nand_boot.c $@ + +# from drivers/mtd/nand directory +$(obj)s3c2410_nand.c: + @rm -f $@ + @ln -s $(TOPDIR)/drivers/mtd/nand/s3c2410_nand.c $@ + +######################################################################### + +$(obj)%.o: $(obj)%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(obj)%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/nand_spl/board/gec/gec2410/config.mk b/nand_spl/board/gec/gec2410/config.mk new file mode 100644 index 0000000..7db7fd1 --- /dev/null +++ b/nand_spl/board/gec/gec2410/config.mk @@ -0,0 +1,40 @@ +# +# (C) Copyright 2006 +# Stefan Roese, DENX Software Engineering, sr(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# +# GEC2410 Study Platform (gec2410) board + +# TEXT_BASE for SPL: +# +# On S3C2410 platforms the SPL is located in SRAM at 0. +# +TEXT_BASE = 0 + +include $(TOPDIR)/board/$(BOARDDIR)/config.mk + +# PAD_TO used to generate a 4kByte binary needed for the combined image +# -> PAD_TO = TEXT_BASE + 4096 +PAD_TO := 0x00001000 + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif diff --git a/nand_spl/board/gec/gec2410/u-boot.lds b/nand_spl/board/gec/gec2410/u-boot.lds new file mode 100644 index 0000000..5871f7e --- /dev/null +++ b/nand_spl/board/gec/gec2410/u-boot.lds @@ -0,0 +1,60 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + start.o (.text) + nand_boot.o (.text) + + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) . = ALIGN(4); } + _end = .; +} -- 1.6.0.4

1 0

[U-Boot] [PATCH] samsung: move DRAM parameters
by "Seunghyeon Rhee (이승현)" 05 Nov '09

05 Nov '09

Move the definitions of DRAM parameters from SoC description (s3c6400.h) to board description (smdk6400.h). DRAM parameters are rather board-specific than SoC specific. According to the current source, one may have to change the definitions in s3c6400.h in addition to creating the new board description whenever he wants to add support for a new board based on s3c6400. I don't think this meets the U-Boot policy of separating SoC description and board description. There will be no observable changes in operation. It's just to make it easier to add support for new boards. Signed-off-by: Seunghyeon Rhee <seunghyeon(a)lpmtec.com> --- include/configs/smdk6400.h | 21 +++++++++++++++++++++ include/s3c6400.h | 21 --------------------- 2 files changed, 21 insertions(+), 21 deletions(-) diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index f6e1221..a2b46fd 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -309,4 +309,25 @@ # error "usb_ohci.c is currently broken with MMU enabled." #endif +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define DMC1_MEM_CFG 0x80010012 /* Chip1, Burst4, Row/Column bit */ +#define DMC1_MEM_CFG2 0xB45 +#define DMC1_CHIP0_CFG 0x150F8 /* 0x4000_0000 ~ 0x43ff_ffff (64MB) */ +#define DMC_DDR_32_CFG 0x0 /* 32bit, DDR */ + +/* Memory Parameters */ +/* DDR Parameters */ +#define DDR_tREFRESH 7800 /* ns */ +#define DDR_tRAS 45 /* ns (min: 45ns)*/ +#define DDR_tRC 68 /* ns (min: 67.5ns)*/ +#define DDR_tRCD 23 /* ns (min: 22.5ns)*/ +#define DDR_tRFC 80 /* ns (min: 80ns)*/ +#define DDR_tRP 23 /* ns (min: 22.5ns)*/ +#define DDR_tRRD 15 /* ns (min: 15ns)*/ +#define DDR_tWR 15 /* ns (min: 15ns)*/ +#define DDR_tXSR 120 /* ns (min: 120ns)*/ +#define DDR_CASL 3 /* CAS Latency 3 */ + #endif /* __CONFIG_H */ diff --git a/include/s3c6400.h b/include/s3c6400.h index e527c08..34d0d15 100644 --- a/include/s3c6400.h +++ b/include/s3c6400.h @@ -814,27 +814,6 @@ #endif -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define DMC1_MEM_CFG 0x80010012 /* Chip1, Burst4, Row/Column bit */ -#define DMC1_MEM_CFG2 0xB45 -#define DMC1_CHIP0_CFG 0x150F8 /* 0x4000_0000 ~ 0x43ff_ffff (64MB) */ -#define DMC_DDR_32_CFG 0x0 /* 32bit, DDR */ - -/* Memory Parameters */ -/* DDR Parameters */ -#define DDR_tREFRESH 7800 /* ns */ -#define DDR_tRAS 45 /* ns (min: 45ns)*/ -#define DDR_tRC 68 /* ns (min: 67.5ns)*/ -#define DDR_tRCD 23 /* ns (min: 22.5ns)*/ -#define DDR_tRFC 80 /* ns (min: 80ns)*/ -#define DDR_tRP 23 /* ns (min: 22.5ns)*/ -#define DDR_tRRD 15 /* ns (min: 15ns)*/ -#define DDR_tWR 15 /* ns (min: 15ns)*/ -#define DDR_tXSR 120 /* ns (min: 120ns)*/ -#define DDR_CASL 3 /* CAS Latency 3 */ - /* * mDDR memory configuration */ -- 1.6.2.5 -- Seunghyeon Rhee, Ph.D. / Director LPM Technology Inc. T +82-70-8255-6007 F +82-2-6442-6462 M +82-10-2790-0657

2 3

[U-Boot] da8xx
by Tom 05 Nov '09

05 Nov '09

The v4 is looking good. No regressions on MAKEALL arm Are there any outstanding issues besides needing lowercase variable names and the pin multiplex dependency ? Tom

2 1

[U-Boot] Does uboot EBS(erase block summary) to reduce JFFS2 scaning time?
by HeLei 05 Nov '09

05 Nov '09

Hi, All Each time JFFS2 initialized, uboot need to scan the whole flash. This is fairly time consuming. So EBS(erase block summary) is used to JFFS2 to reduce mounting time. And I believe this can also be used to UBOOT to reduce booting time. Does UBOOT support this feature? or does any other solution in uboot to reduce JFFS2 scaning time? thanks Leon _________________________________________________________________ MSN十周年庆典，查看MSN注册时间，赢取神秘大奖 http://10.msn.com.cn

3 21

[U-Boot] [PATCH] Save environment data to mmc.
by Terry Lv 05 Nov '09

05 Nov '09

This patch is to save environment data to mmc card. It uses interfaces defined in generic mmc. Signed-off-by: Terry Lv <r65388(a)freescale.com> --- common/cmd_nvedit.c | 3 +- common/env_mmc.c | 359 +++++++++++++++++++++++++++++++++++++++++++++++++ include/environment.h | 18 +++ lib_arm/board.c | 10 +- lib_ppc/board.c | 12 +- 5 files changed, 390 insertions(+), 12 deletions(-) create mode 100644 common/env_mmc.c diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index 9f8d531..9168241 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -60,9 +60,10 @@ DECLARE_GLOBAL_DATA_PTR; !defined(CONFIG_ENV_IS_IN_NVRAM) && \ !defined(CONFIG_ENV_IS_IN_ONENAND) && \ !defined(CONFIG_ENV_IS_IN_SPI_FLASH) && \ + !defined(CONFIG_ENV_IS_IN_MMC) && \ !defined(CONFIG_ENV_IS_NOWHERE) # error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|ONENAND|\ -SPI_FLASH|MG_DISK|NVRAM|NOWHERE} +SPI_FLASH|MG_DISK|NVRAM|MMC|NOWHERE} #endif #define XMK_STR(x) #x diff --git a/common/env_mmc.c b/common/env_mmc.c new file mode 100644 index 0000000..9ef7c40 --- /dev/null +++ b/common/env_mmc.c @@ -0,0 +1,359 @@ +/* + * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. + + * (C) Copyright 2000-2006 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Andreas Heppel <aheppel(a)sysgo.de> + + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* #define DEBUG */ + +#include <common.h> + +#if defined(CONFIG_ENV_IS_IN_MMC) /* Environment is in MMC Flash */ + +#include <command.h> +#include <environment.h> +#include <linux/stddef.h> +#include <malloc.h> +#include <mmc.h> + +#if defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_MMC) +#define CMD_SAVEENV +#elif defined(CONFIG_ENV_OFFSET_REDUND) +#error Cannot use CONFIG_ENV_OFFSET_REDUND without CONFIG_CMD_ENV & CONFIG_CMD_MMC +#endif + +#if defined(CONFIG_ENV_SIZE_REDUND) && (CONFIG_ENV_SIZE_REDUND < CONFIG_ENV_SIZE) +#error CONFIG_ENV_SIZE_REDUND should not be less then CONFIG_ENV_SIZE +#endif + +#ifdef CONFIG_INFERNO +#error CONFIG_INFERNO not supported yet +#endif + +/* references to names in env_common.c */ +extern uchar default_environment[]; +extern int default_environment_size; + +char *env_name_spec = "MMC"; + +#ifdef ENV_IS_EMBEDDED +extern uchar environment[]; +env_t *env_ptr = (env_t *)(&environment[0]); +#else /* ! ENV_IS_EMBEDDED */ +env_t *env_ptr; +#endif /* ENV_IS_EMBEDDED */ + +/* local functions */ +#if !defined(ENV_IS_EMBEDDED) +static void use_default(void); +#endif + +DECLARE_GLOBAL_DATA_PTR; + +uchar env_get_char_spec(int index) +{ + return *((uchar *)(gd->env_addr + index)); +} + +int env_init(void) +{ +#if defined(CONFIG_IS_EMBEDDED) + size_t total; + int crc1_ok = 0, crc2_ok = 0; + env_t *tmp_env1, *tmp_env2; + + total = CONFIG_ENV_SIZE; + + tmp_env1 = env_ptr; + tmp_env2 = (env_t *)((ulong)env_ptr + CONFIG_ENV_SIZE); + + crc1_ok = (crc32(0, tmp_env1->data, ENV_SIZE) == tmp_env1->crc); + crc2_ok = (crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc); + + if (!crc1_ok && !crc2_ok) + gd->env_valid = 0; + else if (crc1_ok && !crc2_ok) + gd->env_valid = 1; + else if (!crc1_ok && crc2_ok) + gd->env_valid = 2; + else { + /* both ok - check serial */ + if (tmp_env1->flags == 255 && tmp_env2->flags == 0) + gd->env_valid = 2; + else if (tmp_env2->flags == 255 && tmp_env1->flags == 0) + gd->env_valid = 1; + else if (tmp_env1->flags > tmp_env2->flags) + gd->env_valid = 1; + else if (tmp_env2->flags > tmp_env1->flags) + gd->env_valid = 2; + else /* flags are equal - almost impossible */ + gd->env_valid = 1; + } + + if (gd->env_valid == 1) + env_ptr = tmp_env1; + else if (gd->env_valid == 2) + env_ptr = tmp_env2; + +#else /* ENV_IS_EMBEDDED */ + gd->env_addr = (ulong)&default_environment[0]; + gd->env_valid = 1; + +#endif /* ENV_IS_EMBEDDED */ + + return 0; +} + +#ifdef CMD_SAVEENV +#ifdef CONFIG_ENV_OFFSET_REDUND +int saveenv(void) +{ + size_t total; + uint blk_start = 0, blk_cnt = 0, n = 0; + struct mmc *mmc = find_mmc_device(0); + + env_ptr->flags++; + total = CONFIG_ENV_SIZE; + + if (!mmc) { + puts("No MMC card found\n"); + return; + } + + if (mmc_init(mmc)) { + puts("MMC init failed\n"); + return 1; + } + + if (gd->env_valid == 1) { + puts("Writing to redundant MMC... "); + blk_start = (CONFIG_ENV_OFFSET_REDUND % 512) ? \ + ((CONFIG_ENV_OFFSET_REDUND / 512) + 1) : (CONFIG_ENV_OFFSET_REDUND / 512); + blk_cnt = (total % 512) ? ((total / 512) + 1) : (total / 512); + n = mmc->block_dev.block_write(0, blk_start , blk_cnt, (u_char *)env_ptr); + } else { + puts("Writing to MMC... "); + blk_start = (CONFIG_ENV_OFFSET % 512) ? \ + ((CONFIG_ENV_OFFSET / 512) + 1) : (CONFIG_ENV_OFFSET / 512); + blk_cnt = (total % 512) ? ((total / 512) + 1) : (total / 512); + n = mmc->block_dev.block_write(0, blk_start , blk_cnt, (u_char *)env_ptr); + } + if ((n != blk_cnt) || (total != CONFIG_ENV_SIZE)) { + puts("failed\n"); + return 1; + } + + puts("done\n"); + gd->env_valid = (gd->env_valid == 2 ? 1 : 2); + return 0; +} + +#else /* ! CONFIG_ENV_OFFSET_REDUND */ + +int saveenv(void) +{ + size_t total; + uint blk_start = 0, blk_cnt = 0, n = 0; + struct mmc *mmc = find_mmc_device(0); + + if (!mmc) { + puts("No MMC card found\n"); + return; + } + + if (mmc_init(mmc)) { + puts("MMC init failed\n"); + return 1; + } + + puts("Writing to MMC... "); + total = CONFIG_ENV_SIZE; + blk_start = (CONFIG_ENV_OFFSET % 512) ? \ + ((CONFIG_ENV_OFFSET / 512) + 1) : (CONFIG_ENV_OFFSET / 512); + blk_cnt = (total % 512) ? ((total / 512) + 1) : (total / 512); + n = mmc->block_dev.block_write(0, blk_start , blk_cnt, (u_char *)env_ptr); + if ((n != blk_cnt) || (total != CONFIG_ENV_SIZE)) { + puts("failed\n"); + return 1; + } + + puts("done\n"); + return 0; +} +#endif /* CONFIG_ENV_OFFSET_REDUND */ +#endif /* CMD_SAVEENV */ + +#ifdef CONFIG_ENV_OFFSET_REDUND +void env_relocate_spec(void) +{ +#if !defined(ENV_IS_EMBEDDED) + size_t total; + int crc1_ok = 0, crc2_ok = 0; + env_t *tmp_env1 = NULL, *tmp_env2 = NULL; + uint blk_start = 0, blk_cnt = 0, n = 0; + struct mmc *mmc = find_mmc_device(0); + + if (!mmc) { + puts("No MMC card found\n"); + return; + } + + if (mmc_init(mmc)) { + puts("MMC init failed\n"); + goto use_default; + } + + total = CONFIG_ENV_SIZE; + + tmp_env1 = (env_t *)malloc(CONFIG_ENV_SIZE); + if (!tmp_env1) { + puts("Not enough memory!\n"); + goto use_default; + } + memset(tmp_env1, 0, CONFIG_ENV_SIZE); + + tmp_env2 = (env_t *)malloc(CONFIG_ENV_SIZE); + if (!tmp_env2) { + puts("Not enough memory!\n"); + goto use_default; + } + memset(tmp_env2, 0, CONFIG_ENV_SIZE); + + puts("Loading environment from mmc... "); + + blk_start = (CONFIG_ENV_OFFSET % 512) ? \ + ((CONFIG_ENV_OFFSET / 512) + 1) : (CONFIG_ENV_OFFSET / 512); + blk_cnt = (total % 512) ? ((total / 512) + 1) : (total / 512); + + n = mmc->block_dev.block_read(0, blk_start, blk_cnt, (uchar *)tmp_env1); + + if (n != blk_cnt) { + puts("failed\n"); + goto use_default; + } + puts("done\n"); + + puts("Loading redundant environment from mmc... "); + + blk_start = (CONFIG_ENV_OFFSET_REDUND % 512) ? \ + ((CONFIG_ENV_OFFSET_REDUND / 512) + 1) : (CONFIG_ENV_OFFSET_REDUND / 512); + blk_cnt = (total % 512) ? ((total / 512) + 1) : (total / 512); + + n = mmc->block_dev.block_read(0, blk_start, blk_cnt, (uchar *)tmp_env2); + + if (n != blk_cnt) { + puts("failed\n"); + goto use_default; + } + puts("done\n"); + + crc1_ok = (crc32(0, tmp_env1->data, ENV_SIZE) == tmp_env1->crc); + crc2_ok = (crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc); + + if (!crc1_ok && !crc2_ok) + goto use_default; + else if (crc1_ok && !crc2_ok) + gd->env_valid = 1; + else if (!crc1_ok && crc2_ok) + gd->env_valid = 2; + else { + /* both ok - check serial */ + if (tmp_env1->flags == 255 && tmp_env2->flags == 0) + gd->env_valid = 2; + else if (tmp_env2->flags == 255 && tmp_env1->flags == 0) + gd->env_valid = 1; + else if (tmp_env1->flags > tmp_env2->flags) + gd->env_valid = 1; + else if (tmp_env2->flags > tmp_env1->flags) + gd->env_valid = 2; + else /* flags are equal - almost impossible */ + gd->env_valid = 1; + } + + free(env_ptr); + if (gd->env_valid == 1) { + env_ptr = tmp_env1; + free(tmp_env2); + } else { + env_ptr = tmp_env2; + free(tmp_env1); + } + + return; + +use_default: + if (tmp_env1) + free(tmp_env1); + if (tmp_env2) + free(tmp_env2); + return use_default(); + +#endif /* ! ENV_IS_EMBEDDED */ +} +#else /* ! CONFIG_ENV_OFFSET_REDUND */ + +void env_relocate_spec(void) +{ +#if !defined(ENV_IS_EMBEDDED) + size_t total; + uint blk_start = 0, blk_cnt = 0, n = 0; + struct mmc *mmc = find_mmc_device(0); + + if (!mmc) { + puts("No MMC card found\n"); + return; + } + + if (mmc_init(mmc)) { + puts("MMC init failed\n"); + return; + } + + total = CONFIG_ENV_SIZE; + + blk_start = (CONFIG_ENV_OFFSET % 512) ? \ + ((CONFIG_ENV_OFFSET / 512) + 1) : (CONFIG_ENV_OFFSET / 512); + blk_cnt = (total % 512) ? ((total / 512) + 1) : (total / 512); + + n = mmc->block_dev.block_read(0, blk_start, blk_cnt, (uchar *)env_ptr); + + if ((n != blk_cnt) || (total != CONFIG_ENV_SIZE)) + return use_default(); + + if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc) + return use_default(); +#endif /* ! ENV_IS_EMBEDDED */ +} +#endif /* CONFIG_ENV_OFFSET_REDUND */ + +#if !defined(ENV_IS_EMBEDDED) +static void use_default() +{ + puts ("*** Warning - bad CRC or MMC, using default environment\n\n"); + set_default_env(); +} +#endif + +#endif /* CONFIG_ENV_IS_IN_MMC */ diff --git a/include/environment.h b/include/environment.h index b9924fd..0b72e0b 100644 --- a/include/environment.h +++ b/include/environment.h @@ -94,6 +94,24 @@ # endif #endif /* CONFIG_ENV_IS_IN_MG_DISK */ +#if defined(CONFIG_ENV_IS_IN_MMC) +# ifndef CONFIG_ENV_OFFSET +# error "Need to define CONFIG_ENV_OFFSET when using CONFIG_ENV_IS_IN_MMC" +# endif +# ifndef CONFIG_ENV_ADDR +# define CONFIG_ENV_ADDR (CONFIG_ENV_OFFSET) +# endif +# ifndef CONFIG_ENV_OFFSET +# define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) +# endif +# ifdef CONFIG_ENV_OFFSET_REDUND +# define CONFIG_SYS_REDUNDAND_ENVIRONMENT +# endif +# ifdef CONFIG_ENV_IS_EMBEDDED +# define ENV_IS_EMBEDDED 1 +# endif +#endif /* CONFIG_ENV_IS_IN_MMC */ + /* Embedded env is only supported for some flash types */ #ifdef CONFIG_ENV_IS_EMBEDDED # if !defined(CONFIG_ENV_IS_IN_FLASH) && \ diff --git a/lib_arm/board.c b/lib_arm/board.c index 5e3d7f6..bece7d7 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -335,6 +335,11 @@ void start_armboot (void) nand_init(); /* go init the NAND */ #endif +#ifdef CONFIG_GENERIC_MMC + puts ("MMC: "); + mmc_initialize (gd->bd); +#endif + #if defined(CONFIG_CMD_ONENAND) onenand_init(); #endif @@ -416,11 +421,6 @@ extern void davinci_eth_set_mac_addr (const u_int8_t *addr); board_late_init (); #endif -#ifdef CONFIG_GENERIC_MMC - puts ("MMC: "); - mmc_initialize (gd->bd); -#endif - #ifdef CONFIG_BITBANGMII bb_miiphy_init(); #endif diff --git a/lib_ppc/board.c b/lib_ppc/board.c index 765f97a..fac5c29 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -776,6 +776,12 @@ void board_init_r (gd_t *id, ulong dest_addr) nand_init(); /* go init the NAND */ #endif +#ifdef CONFIG_GENERIC_MMC + WATCHDOG_RESET (); + puts ("MMC: "); + mmc_initialize (bd); +#endif + /* relocate environment function pointers etc. */ env_relocate (); @@ -932,12 +938,6 @@ void board_init_r (gd_t *id, ulong dest_addr) scsi_init (); #endif -#ifdef CONFIG_GENERIC_MMC - WATCHDOG_RESET (); - puts ("MMC: "); - mmc_initialize (bd); -#endif - #if defined(CONFIG_CMD_DOC) WATCHDOG_RESET (); puts ("DOC: "); -- 1.6.0.4

3 2

[U-Boot] Better I2C support for OMAP
by Tom Rix 05 Nov '09

05 Nov '09

> > Hugo Vincent wrote: > > Hi everyone, > > > > This patch improves I2C support on OMAP3 platforms, including > > supporting the second and third I2C controllers (mainline only > > supports the first controller), and supporting writes where alen=0 > > (i.e. no register address - this was needed for some I2C devices I > > needed to drive from u-boot). > > > > Tested on Gumstix Overo with several I2C devices, on I2C1 and 3. > > > > The multi-bus support is mostly from this patch: > > http://www.beagleboard.org/gitweb/?p=u-boot-arm.git;a=commit;h=52eddcd07c2e… > > > > Best regards, > > Hugo Vincent > > > > Signed-off-by: Hugo Vincent <hugo.vincent(a)gmail.com> > > Does anybody have an up to date version of this patch? Seems we need > it for Beagle Zippy, too. > > Thanks > > Dirk I have cherry picked this change from the above git repo. There was some cleanup. The omap24xx version changes were done. The structure elements were changed from unsigned int to unsigned shorts + pads to make the elements consistent with the writew/readw 's used in the driver. The cmd_i2c changes that did not seem to fit were removed. I have run tested this on beagle and zoom1. Since I don't have a zippy board handy I did not get anything meaningfull when switching to i2c dev 2. The default i2c dev worked as expected. Tom

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[U-Boot] [PATCH v2] ppc/85xx: Fix inclusion of 83xx immap in 85xx builds
by Kumar Gala 05 Nov '09

05 Nov '09

The nand_boot_fsl_elbc.c is shared between 83xx & 85xx however we should not be including the immap_83xx.h when building 85xx. We can just get this all from common.h Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- * Changes suggested by Peter Tyser to just use common.h nand_spl/nand_boot_fsl_elbc.c | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/nand_spl/nand_boot_fsl_elbc.c b/nand_spl/nand_boot_fsl_elbc.c index 7f14a6f..ff47d55 100644 --- a/nand_spl/nand_boot_fsl_elbc.c +++ b/nand_spl/nand_boot_fsl_elbc.c @@ -25,7 +25,6 @@ #include <common.h> #include <asm/io.h> -#include <asm/immap_83xx.h> #include <asm/fsl_lbc.h> #include <linux/mtd/nand.h> -- 1.6.0.6

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[U-Boot] [PATCH 01/12] ppc/85xx: Clean up MPC8536 DS PCI setup code
by Kumar Gala 05 Nov '09

05 Nov '09

From: Mingkai Hu <Mingkai.hu(a)freescale.com> Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Mingkai Hu <Mingkai.hu(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- V3: * use fsl_setup_hose board/freescale/mpc8536ds/mpc8536ds.c | 257 +++++++++------------------------ 1 files changed, 66 insertions(+), 191 deletions(-) diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index da72916..ce40cdb 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -1,5 +1,5 @@ /* - * Copyright 2008 Freescale Semiconductor. + * Copyright 2008-2009 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -189,20 +189,26 @@ static struct pci_controller pcie2_hose; static struct pci_controller pcie3_hose; #endif -int first_free_busno=0; - -void -pci_init_board(void) +#ifdef CONFIG_PCI +void pci_init_board(void) { - volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - uint devdisr = gur->devdisr; - uint sdrs2_io_sel = - (gur->pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >> 27; - uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; - uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16; + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + struct fsl_pci_info pci_info[4]; + u32 devdisr, pordevsr, io_sel, sdrs2_io_sel; + u32 porpllsr, pci_agent, pci_speed, pci_32, pci_arb, pci_clk_sel; + int first_free_busno = 0; + int num = 0; + + int pcie_ep, pcie_configured; - debug(" pci_init_board: devdisr=%x, sdrs2_io_sel=%x, io_sel=%x,\ - host_agent=%x\n", devdisr, sdrs2_io_sel, io_sel, host_agent); + devdisr = in_be32(&gur->devdisr); + pordevsr = in_be32(&gur->pordevsr); + porpllsr = in_be32(&gur->porpllsr); + io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; + sdrs2_io_sel = (pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >> 27; + + debug(" pci_init_board: devdisr=%x, sdrs2_io_sel=%x, io_sel=%x\n", + devdisr, sdrs2_io_sel, io_sel); if (sdrs2_io_sel == 7) printf(" Serdes2 disalbed\n"); @@ -212,228 +218,97 @@ pci_init_board(void) } else if (sdrs2_io_sel == 6) printf(" eTSEC1 is in sgmii mode.\n"); + puts("\n"); #ifdef CONFIG_PCIE3 -{ - volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR; - struct pci_controller *hose = &pcie3_hose; - int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_3, host_agent); - int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel); - struct pci_region *r = hose->regions; + pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel); - if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ - printf ("\n PCIE3 connected to Slot3 as %s (base address %x)", + if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){ + SET_STD_PCIE_INFO(pci_info[num], 3); + pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); + printf (" PCIE3 connected to Slot3 as %s (base address %lx)\n", pcie_ep ? "End Point" : "Root Complex", - (uint)pci); - if (pci->pme_msg_det) { - pci->pme_msg_det = 0xffffffff; - debug (" with errors. Clearing. Now 0x%08x",pci->pme_msg_det); - } - printf ("\n"); - - /* outbound memory */ - pci_set_region(r++, - CONFIG_SYS_PCIE3_MEM_BUS, - CONFIG_SYS_PCIE3_MEM_PHYS, - CONFIG_SYS_PCIE3_MEM_SIZE, - PCI_REGION_MEM); - - /* outbound io */ - pci_set_region(r++, - CONFIG_SYS_PCIE3_IO_BUS, - CONFIG_SYS_PCIE3_IO_PHYS, - CONFIG_SYS_PCIE3_IO_SIZE, - PCI_REGION_IO); - - hose->region_count = r - hose->regions; - - hose->first_busno=first_free_busno; - - fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); - - first_free_busno=hose->last_busno+1; - printf (" PCIE3 on bus %02x - %02x\n", - hose->first_busno,hose->last_busno); + pci_info[num].regs); + first_free_busno = fsl_pci_init_port(&pci_info[num++], + &pcie3_hose, first_free_busno); } else { printf (" PCIE3: disabled\n"); } -} + + puts("\n"); #else - gur->devdisr |= MPC85xx_DEVDISR_PCIE3; /* disable */ + setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE3); /* disable */ #endif #ifdef CONFIG_PCIE1 -{ - volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; - struct pci_controller *hose = &pcie1_hose; - int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent); - int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel); - struct pci_region *r = hose->regions; + pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel); if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ - printf ("\n PCIE1 connected to Slot1 as %s (base address %x)", + SET_STD_PCIE_INFO(pci_info[num], 1); + pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); + printf (" PCIE1 connected to Slot1 as %s (base address %lx)\n", pcie_ep ? "End Point" : "Root Complex", - (uint)pci); - if (pci->pme_msg_det) { - pci->pme_msg_det = 0xffffffff; - debug (" with errors. Clearing. Now 0x%08x",pci->pme_msg_det); - } - printf ("\n"); - - /* outbound memory */ - pci_set_region(r++, - CONFIG_SYS_PCIE1_MEM_BUS, - CONFIG_SYS_PCIE1_MEM_PHYS, - CONFIG_SYS_PCIE1_MEM_SIZE, - PCI_REGION_MEM); - - /* outbound io */ - pci_set_region(r++, - CONFIG_SYS_PCIE1_IO_BUS, - CONFIG_SYS_PCIE1_IO_PHYS, - CONFIG_SYS_PCIE1_IO_SIZE, - PCI_REGION_IO); - -#ifdef CONFIG_SYS_PCIE1_MEM_BUS2 - /* outbound memory */ - pci_set_region(r++, - CONFIG_SYS_PCIE1_MEM_BUS2, - CONFIG_SYS_PCIE1_MEM_PHYS2, - CONFIG_SYS_PCIE1_MEM_SIZE2, - PCI_REGION_MEM); -#endif - hose->region_count = r - hose->regions; - hose->first_busno=first_free_busno; - - fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); - - first_free_busno=hose->last_busno+1; - printf(" PCIE1 on bus %02x - %02x\n", - hose->first_busno,hose->last_busno); - + pci_info[num].regs); + first_free_busno = fsl_pci_init_port(&pci_info[num++], + &pcie1_hose, first_free_busno); } else { printf (" PCIE1: disabled\n"); } -} + + puts("\n"); #else - gur->devdisr |= MPC85xx_DEVDISR_PCIE; /* disable */ + setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */ #endif #ifdef CONFIG_PCIE2 -{ - volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; - struct pci_controller *hose = &pcie2_hose; - int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_2, host_agent); - int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel); - struct pci_region *r = hose->regions; + pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel); - if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ - printf ("\n PCIE2 connected to Slot 2 as %s (base address %x)", + if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){ + SET_STD_PCIE_INFO(pci_info[num], 2); + pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); + printf (" PCIE2 connected to Slot 2 as %s (base address %lx)\n", pcie_ep ? "End Point" : "Root Complex", - (uint)pci); - if (pci->pme_msg_det) { - pci->pme_msg_det = 0xffffffff; - debug (" with errors. Clearing. Now 0x%08x",pci->pme_msg_det); - } - printf ("\n"); - - /* outbound memory */ - pci_set_region(r++, - CONFIG_SYS_PCIE2_MEM_BUS, - CONFIG_SYS_PCIE2_MEM_PHYS, - CONFIG_SYS_PCIE2_MEM_SIZE, - PCI_REGION_MEM); - - /* outbound io */ - pci_set_region(r++, - CONFIG_SYS_PCIE2_IO_BUS, - CONFIG_SYS_PCIE2_IO_PHYS, - CONFIG_SYS_PCIE2_IO_SIZE, - PCI_REGION_IO); - -#ifdef CONFIG_SYS_PCIE2_MEM_BUS2 - /* outbound memory */ - pci_set_region(r++, - CONFIG_SYS_PCIE2_MEM_BUS2, - CONFIG_SYS_PCIE2_MEM_PHYS2, - CONFIG_SYS_PCIE2_MEM_SIZE2, - PCI_REGION_MEM); -#endif - hose->region_count = r - hose->regions; - hose->first_busno=first_free_busno; - - fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); - first_free_busno=hose->last_busno+1; - printf (" PCIE2 on bus %02x - %02x\n", - hose->first_busno,hose->last_busno); - + pci_info[num].regs); + first_free_busno = fsl_pci_init_port(&pci_info[num++], + &pcie2_hose, first_free_busno); } else { printf (" PCIE2: disabled\n"); } -} + + puts("\n"); #else - gur->devdisr |= MPC85xx_DEVDISR_PCIE2; /* disable */ + setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE2); /* disable */ #endif #ifdef CONFIG_PCI1 -{ - volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR; - struct pci_controller *hose = &pci1_hose; - struct pci_region *r = hose->regions; - - uint pci_agent = is_fsl_pci_agent(LAW_TRGT_IF_PCI, host_agent); - uint pci_speed = 66666000; /*get_clock_freq (); PCI PSPEED in [4:5] */ - uint pci_32 = 1; - uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; /* PORDEVSR[14] */ - uint pci_clk_sel = gur->porpllsr & MPC85xx_PORDEVSR_PCI1_SPD; /* PORPLLSR[16] */ + pci_speed = 66666000; + pci_32 = 1; + pci_arb = pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; + pci_clk_sel = porpllsr & MPC85xx_PORDEVSR_PCI1_SPD; if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { - printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %x)\n", + SET_STD_PCI_INFO(pci_info[num], 1); + pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); + printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", (pci_32) ? 32 : 64, (pci_speed == 33333000) ? "33" : (pci_speed == 66666000) ? "66" : "unknown", pci_clk_sel ? "sync" : "async", pci_agent ? "agent" : "host", pci_arb ? "arbiter" : "external-arbiter", - (uint)pci - ); - - /* outbound memory */ - pci_set_region(r++, - CONFIG_SYS_PCI1_MEM_BUS, - CONFIG_SYS_PCI1_MEM_PHYS, - CONFIG_SYS_PCI1_MEM_SIZE, - PCI_REGION_MEM); - - /* outbound io */ - pci_set_region(r++, - CONFIG_SYS_PCI1_IO_BUS, - CONFIG_SYS_PCI1_IO_PHYS, - CONFIG_SYS_PCI1_IO_SIZE, - PCI_REGION_IO); - -#ifdef CONFIG_SYS_PCI1_MEM_BUS2 - /* outbound memory */ - pci_set_region(r++, - CONFIG_SYS_PCI1_MEM_BUS2, - CONFIG_SYS_PCI1_MEM_PHYS2, - CONFIG_SYS_PCI1_MEM_SIZE2, - PCI_REGION_MEM); -#endif - hose->region_count = r - hose->regions; - hose->first_busno=first_free_busno; + pci_info[num].regs); - fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); - first_free_busno=hose->last_busno+1; - printf ("PCI on bus %02x - %02x\n", - hose->first_busno,hose->last_busno); + first_free_busno = fsl_pci_init_port(&pci_info[num++], + &pci1_hose, first_free_busno); } else { printf (" PCI: disabled\n"); } -} + + puts("\n"); #else - gur->devdisr |= MPC85xx_DEVDISR_PCI1; /* disable */ + setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ #endif } +#endif int board_early_init_r(void) { -- 1.6.0.6

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[U-Boot] [PATCH V4 4/4] add TI DA8xx support: Integrate DA830 EVM support into U-Boot
by Nick Thompson 05 Nov '09

05 Nov '09

From: Sekhar Nori <nsekhar(a)ti.com> Integrate DA830 EVM support into U-Boot. Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum Digital EVM board. See http://www.spectrumdigital.com/ Signed-off-by: Nick Thompson <nick.thompson(a)gefanuc.com> --- Applies to u-boot-ti MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + include/common.h | 3 + include/configs/da830evm.h | 243 ++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 254 insertions(+), 0 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index d70a9d2..5ca45a7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -712,6 +712,10 @@ Andrea Scian <andrea.scian(a)dave-tech.it> B2 ARM7TDMI (S3C44B0X) +Nick Thompson <nick.thompson(a)gefanuc.com> + + da830evm ARM926EJS (DA830/OMAP-L137) + Albin Tonnerre <albin.tonnerre(a)free-electrons.com> sbc35_a9g20 ARM926EJS (AT91SAM9G20 SoC) diff --git a/MAKEALL b/MAKEALL index d63c5c2..a61e40c 100755 --- a/MAKEALL +++ b/MAKEALL @@ -548,6 +548,7 @@ LIST_ARM9=" \ cp926ejs \ cp946es \ cp966 \ + da830evm \ imx27lite \ lpd7a400 \ mv88f6281gtw_ge \ diff --git a/Makefile b/Makefile index a69e6d5..bf6081b 100644 --- a/Makefile +++ b/Makefile @@ -2927,6 +2927,9 @@ cp922_XA10_config \ cp1026_config: unconfig @board/armltd/integrator/split_by_variant.sh cp $@ +da830evm_config: unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs da830evm davinci davinci + davinci_dvevm_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs dvevm davinci davinci diff --git a/include/common.h b/include/common.h index 7df9afa..7fb107c 100644 --- a/include/common.h +++ b/include/common.h @@ -107,6 +107,9 @@ typedef volatile unsigned char vu_char; #ifdef CONFIG_BLACKFIN #include <asm/blackfin.h> #endif +#ifdef CONFIG_SOC_DA8XX +#include <asm/arch/hardware.h> +#endif #include <part.h> #include <flash.h> diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h new file mode 100644 index 0000000..38e2ce1 --- /dev/null +++ b/include/configs/da830evm.h @@ -0,0 +1,243 @@ +/* + * Copyright (C) 2008 Texas Instruments, Inc <www.ti.com> + * + * Based on davinci_dvevm.h. Original Copyrights follow: + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * Board + */ + +/* + * SoC Configuration + */ +#define CONFIG_MACH_DAVINCI_DA830_EVM +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ +#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) +#define CONFIG_SYS_OSCIN_FREQ 24000000 +#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE +#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ + +/* + * Memory Info + */ +#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */ +#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ +#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* memtest start addr */ +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) /* 16MB test */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ + +/* + * Serial Driver info + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ +#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ +#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * I2C Configuration + */ +#define CONFIG_HARD_I2C +#define CONFIG_DRIVER_DAVINCI_I2C +#define CONFIG_SYS_I2C_SPEED 25000 /* 100Kbps won't work, H/W bug */ +#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ + +/* + * I2C EEPROM definitions for catalyst 24W256 EEPROM chip + */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 + +/* + * Network & Ethernet Configuration + */ +#ifdef CONFIG_DRIVER_TI_EMAC +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI +#endif + +/* + * Flash & Environment + */ +#ifdef CONFIG_USE_NAND +#undef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ +#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST +#define CONFIG_SYS_NAND_CS 3 +#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE +#define CONFIG_SYS_CLE_MASK 0x10 +#define CONFIG_SYS_ALE_MASK 0x8 +#define CONFIG_SYS_NAND_HW_ECC +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define NAND_MAX_CHIPS 1 +#define DEF_BOOTM "" +#endif + +#ifdef CONFIG_USE_NOR +#define CONFIG_ENV_IS_IN_FLASH +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ +#define CONFIG_SYS_FLASH_SECT_SZ (64 << 10) /* 64KB */ +#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*3) +#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE +#define PHYS_FLASH_SIZE (32 << 20) /* Flash size 32MB */ +#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ) +#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ +#define CONFIG_SYS_FLASH_SPL_ACCESS +#endif + +#ifdef CONFIG_USE_SPIFLASH +#undef CONFIG_ENV_IS_IN_FLASH +#undef CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE (16 << 10) +#define CONFIG_ENV_OFFSET (256 << 10) +#define CONFIG_ENV_SECT_SIZE 4096 +#define CONFIG_SYS_NO_FLASH +#define CONFIG_SPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_DAVINCI_SPI +#define CONFIG_SYS_SPI_BASE DAVINCI_SPI0_BASE +#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) +#define CONFIG_SF_DEFAULT_SPEED 50000000 +#define CONFIG_SYS_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + + +/* + * U-Boot general configuration + */ +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ +#undef CONFIG_MISC_INIT_R +#undef CONFIG_BOOTDELAY +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CONFIG_SYS_PROMPT "DA830-evm > " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_MEMTEST_START + 0x700000) +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/* + * Linux Information + */ +#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100) +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTARGS "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock/2 rw noinitrd ip=dhcp" +#define CONFIG_BOOTCOMMAND "" +#define CONFIG_BOOTDELAY 3 + +/* + * U-Boot commands + */ +#include <config_cmd_default.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_MEMORY +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR +#define CONFIG_CMD_EEPROM + +#ifndef CONFIG_DRIVER_TI_EMAC +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_PING +#endif + +#ifdef CONFIG_USE_NAND +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#define CONFIG_CMD_NAND +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_UBI +#define CONFIG_RBTREE +#endif + +#ifdef CONFIG_USE_SPIFLASH +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_FLASH +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SAVEENV +#endif + +#if !defined(CONFIG_USE_NAND) && \ + !defined(CONFIG_USE_NOR) && \ + !defined(CONFIG_USE_SPIFLASH) +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_SIZE (16 << 10) +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_ENV +#endif + +#ifdef CONFIG_USB_DA8XX +#define CONFIG_CMD_USB /* include support for usb */ +#define CONFIG_CMD_STORAGE /* include support for usb */ +#define CONFIG_CMD_FAT /* include support for FAT/storage*/ +#define CONFIG_DOS_PARTITION /* include support for FAT/storage*/ +#endif + +#endif /* __CONFIG_H */

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[U-Boot] [PATCH V4 3/4] add TI DA8xx support: Add new directory for da830evm board
by Nick Thompson 05 Nov '09

05 Nov '09

From: Sekhar Nori <nsekhar(a)ti.com> Add new directory for da830evm board Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum Digital EVM board. See http://www.spectrumdigital.com/ Provides: Initial boot and configuration. Support for i2c. UART support (console). Signed-off-by: Nick Thompson <nick.thompson(a)gefanuc.com> --- Applies to u-boot-ti board/davinci/da830evm/Makefile | 51 +++++++++++++++ board/davinci/da830evm/config.mk | 43 +++++++++++++ board/davinci/da830evm/da830evm.c | 127 +++++++++++++++++++++++++++++++++++++ 3 files changed, 221 insertions(+), 0 deletions(-) diff --git a/board/davinci/da830evm/Makefile b/board/davinci/da830evm/Makefile new file mode 100644 index 0000000..02636fa --- /dev/null +++ b/board/davinci/da830evm/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := da830evm.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak *~ .depend + +######################################################################### +# This is for $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/davinci/da830evm/config.mk b/board/davinci/da830evm/config.mk new file mode 100644 index 0000000..6da29a9 --- /dev/null +++ b/board/davinci/da830evm/config.mk @@ -0,0 +1,43 @@ +# +# (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/ +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> +# David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# Texas Instruments DA8xx EVM board (ARM925EJS) cpu +# see http://www.ti.com/ for more information on Texas Instruments +# +# DA8xx EVM has 1 bank of 64 MB SDRAM (2 16Meg x16 chips). +# Physical Address: +# C000'0000 to C400'0000 +# +# Linux-Kernel is expected to be at C000'8000, entry C000'8000 +# (mem base + reserved) +# +# we load ourself to C108 '0000 + + +#Provide at least 16MB spacing between us and the Linux Kernel image +TEXT_BASE = 0xC1080000 diff --git a/board/davinci/da830evm/da830evm.c b/board/davinci/da830evm/da830evm.c new file mode 100644 index 0000000..e7c3a4e --- /dev/null +++ b/board/davinci/da830evm/da830evm.c @@ -0,0 +1,127 @@ +/* + * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson(a)gefanuc.com> + * + * Base on code from TI. Original Notices follow: + * + * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/ + * + * Modified for DA8xx EVM. + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * ----------------------------------------------------------------- + * + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/hardware.h> +#include <asm/io.h> +#include "../common/misc.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define PINMUX &DAVINCI_SYSCFG_REGS->pinmux + +#ifdef CONFIG_SPI_FLASH +/* SPI0 pin muxer settings */ +const struct pinmux_config spi0_pins[] = { + { PINMUX[7], 1, 3 }, + { PINMUX[7], 1, 4 }, + { PINMUX[7], 1, 5 }, + { PINMUX[7], 1, 6 }, + { PINMUX[7], 1, 7 } +}; +#endif + +/* UART pin muxer settings */ +const struct pinmux_config uart_pins[] = { + { PINMUX[8], 2, 7 }, + { PINMUX[9], 2, 0 } +}; + +/* I2C pin muxer settings */ +const struct pinmux_config i2c_pins[] = { + { PINMUX[9], 2, 3 }, + { PINMUX[9], 2, 4 } +}; + +int board_init(void) +{ +#ifndef CONFIG_USE_IRQ + /* + * Mask all IRQs by clearing the global enable and setting + * the enable clear for all the 90 interrupts. + */ + + writel(0, &DAVINCI_AINTC_REGS->ger); + + writel(0, &DAVINCI_AINTC_REGS->hier); + + writel(0xffffffff, &DAVINCI_AINTC_REGS->ecr1); + writel(0xffffffff, &DAVINCI_AINTC_REGS->ecr2); + writel(0xffffffff, &DAVINCI_AINTC_REGS->ecr3); +#endif + + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* + * Power on required peripherals + * ARM does not have access by default to PSC0 and PSC1 + * assuming here that the DSP bootloader has set the IOPU + * such that PSC access is available to ARM + */ + lpsc_on(DAVINCI_LPSC_AEMIF); /* NAND, NOR */ + lpsc_on(DAVINCI_LPSC_SPI0); /* Serial Flash */ + lpsc_on(DAVINCI_LPSC_EMAC); /* image download */ + lpsc_on(DAVINCI_LPSC_UART2); /* console */ + lpsc_on(DAVINCI_LPSC_GPIO); + + /* setup the SUSPSRC for ARM to control emulation suspend */ + writel(readl(&DAVINCI_SYSCFG_REGS->suspsrc) & + ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | + DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | + DAVINCI_SYSCFG_SUSPSRC_UART2), + &DAVINCI_SYSCFG_REGS->suspsrc); + +#ifdef CONFIG_SPI_FLASH + if (davinci_configure_pin_mux(spi0_pins, ARRAY_SIZE(spi0_pins)) != 0) + return 1; +#endif + + if (davinci_configure_pin_mux(uart_pins, ARRAY_SIZE(uart_pins)) != 0) + return 1; + + if (davinci_configure_pin_mux(i2c_pins, ARRAY_SIZE(i2c_pins)) != 0) + return 1; + + /* enable the console UART */ + writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | + DAVINCI_UART_PWREMU_MGMT_UTRST), + &DAVINCI_UART2_CTRL_REGS->pwremu_mgmt); + + return(0); +}

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