October 2009 - U-Boot

Re: [U-Boot] [PATCH] mpc512x: fix fixed_sdram() init code.
by m stan 05 Oct '09

05 Oct '09

Thank You for fixing this ... also .. "marx" was in pop3 properties - thanks for catching it. Your powers of observation are very keen ! -Martha -----Original Message----- From: Wolfgang Denk wd(a)denx.de Sent 10/4/2009 4:56:08 PM To: u-boot(a)lists.denx.de Cc: Martha M Stan mmarx(a)silicontkx.com, Wolfgang Denk wd(a)denx.de Subject: [PATCH] mpc512x: fix fixed_sdram() init code. Commit 054197ba and later fixes used an array to initialize some of the MDDRC parameters; however, the use of an array turned out to be a bad idea as it was not possible to correlate structure entries to array indices in readable and reliable way. Now we use a struct instead, which makes this self-explanatory. Signed-off-by: Wolfgang Denk wd(a)denx.de --- board/freescale/mpc5121ads/mpc5121ads.c | 12 +++++----- cpu/mpc512x/fixed_sdram.c | 33 +++++++++++++++++------------- include/asm-ppc/immap_512x.h | 10 +++++++++ include/asm-ppc/mpc512x.h | 3 +- 4 files changed, 37 insertions(+), 21 deletions(-) diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c index 13bd73c..2fa3650 100644 --- a/board/freescale/mpc5121ads/mpc5121ads.c +++ b/board/freescale/mpc5121ads/mpc5121ads.c @@ -169,11 +169,11 @@ phys_size_t initdram(int board_type) * Elpida MDDRC and initialization settings are an alternative * to the Default Micron ones for all but the earliest Rev 4 boards */ -u32 elpida_mddrc_config[4] = { -CONFIG_SYS_MDDRC_TIME_CFG0, -CONFIG_SYS_MDDRC_TIME_CFG1_ELPIDA, -CONFIG_SYS_MDDRC_TIME_CFG2_ELPIDA, -CONFIG_SYS_MDDRC_SYS_CFG_ELPIDA, +ddr512x_config_t elpida_mddrc_config = { +.ddr_sys_config = CONFIG_SYS_MDDRC_SYS_CFG_ELPIDA, +.ddr_time_config0 = CONFIG_SYS_MDDRC_TIME_CFG0, +.ddr_time_config1 = CONFIG_SYS_MDDRC_TIME_CFG1_ELPIDA, +.ddr_time_config2 = CONFIG_SYS_MDDRC_TIME_CFG2_ELPIDA, }; u32 elpida_init_sequence[] = { @@ -229,7 +229,7 @@ phys_size_t initdram(int board_type) if (is_micron()) { msize = fixed_sdram(NULL, NULL, 0); } else { -msize = fixed_sdram(elpida_mddrc_config, +msize = fixed_sdram(&elpida_mddrc_config, elpida_init_sequence, sizeof(elpida_init_sequence)/sizeof(u32)); } diff --git a/cpu/mpc512x/fixed_sdram.c b/cpu/mpc512x/fixed_sdram.c index 673d61e..442b5fc 100644 --- a/cpu/mpc512x/fixed_sdram.c +++ b/cpu/mpc512x/fixed_sdram.c @@ -26,13 +26,13 @@ #include asm/mpc512x.h /* - * MDDRC Config Runtime Settings in order of the 4 MDDRC cfg registers + * MDDRC Config Runtime Settings */ -u32 default_mddrc_config[4] = { -CONFIG_SYS_MDDRC_TIME_CFG0,/* time_config0 */ -CONFIG_SYS_MDDRC_TIME_CFG1,/* time_config1 */ -CONFIG_SYS_MDDRC_TIME_CFG2,/* time_config2 */ -CONFIG_SYS_MDDRC_SYS_CFG,/* sys_config*/ +ddr512x_config_t default_mddrc_config = { +.ddr_sys_config = CONFIG_SYS_MDDRC_SYS_CFG, +.ddr_time_config0 = CONFIG_SYS_MDDRC_TIME_CFG0, +.ddr_time_config1 = CONFIG_SYS_MDDRC_TIME_CFG1, +.ddr_time_config2 = CONFIG_SYS_MDDRC_TIME_CFG2, }; u32 default_init_seq[] = { @@ -74,7 +74,8 @@ u32 default_init_seq[] = { * The board doesn't use memory modules that have serial presence * detect or similar mechanism for discovery of the DRAM settings */ -long int fixed_sdram(u32 *mddrc_config, u32 *dram_init_seq, int seq_sz) +long int fixed_sdram(ddr512x_config_t *mddrc_config, +u32 *dram_init_seq, int seq_sz) { volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024; @@ -83,7 +84,7 @@ long int fixed_sdram(u32 *mddrc_config, u32 *dram_init_seq, int seq_sz) /* take default settings and init sequence if necessary */ if (mddrc_config == NULL) -mddrc_config = default_mddrc_config; +mddrc_config = &default_mddrc_config; if (dram_init_seq == NULL) { dram_init_seq = default_init_seq; seq_sz = sizeof(default_init_seq)/sizeof(u32); @@ -130,18 +131,22 @@ long int fixed_sdram(u32 *mddrc_config, u32 *dram_init_seq, int seq_sz) * put MDDRC in CMD mode and * set the max time between refreshes to 0 during init process */ -out_be32(mddrc.ddr_sys_config, mddrc_config[3] | MDDRC_SYS_CFG_CMD_MASK); -out_be32(mddrc.ddr_time_config0, mddrc_config[0] & MDDRC_REFRESH_ZERO_MASK); -out_be32(mddrc.ddr_time_config1, mddrc_config[1]); -out_be32(mddrc.ddr_time_config2, mddrc_config[2]); +out_be32(mddrc.ddr_sys_config, +mddrc_config-ddr_sys_config | MDDRC_SYS_CFG_CMD_MASK); +out_be32(mddrc.ddr_time_config0, +mddrc_config-ddr_time_config0 & MDDRC_REFRESH_ZERO_MASK); +out_be32(mddrc.ddr_time_config1, +mddrc_config-ddr_time_config1); +out_be32(mddrc.ddr_time_config2, +mddrc_config-ddr_time_config2); /* Initialize DDR with either default or supplied init sequence */ for (i = 0; i seq_sz; i++) out_be32(mddrc.ddr_command, dram_init_seq[i]); /* Start MDDRC */ -out_be32(mddrc.ddr_time_config0, mddrc_config[0]); -out_be32(mddrc.ddr_sys_config, mddrc_config[3]); +out_be32(mddrc.ddr_time_config0, mddrc_config-ddr_time_config0); +out_be32(mddrc.ddr_sys_config, mddrc_config-ddr_sys_config); return msize; } diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h index 79cdd80..bdc6ff2 100644 --- a/include/asm-ppc/immap_512x.h +++ b/include/asm-ppc/immap_512x.h @@ -347,6 +347,16 @@ typedef struct ddr512x { #define MDDRC_REFRESH_ZERO_MASK0x0000FFFF /* + * DDR Memory Controller Configuration settings + */ +typedef struct ddr512x_config { +u32 ddr_sys_config;/* System Configuration Register */ +u32 ddr_time_config0;/* Timing Configuration Register */ +u32 ddr_time_config1;/* Timing Configuration Register */ +u32 ddr_time_config2;/* Timing Configuration Register */ +} ddr512x_config_t; + +/* * DMA/Messaging Unit */ typedef struct dma512x { diff --git a/include/asm-ppc/mpc512x.h b/include/asm-ppc/mpc512x.h index 8ef0d9c..960e229 100644 --- a/include/asm-ppc/mpc512x.h +++ b/include/asm-ppc/mpc512x.h @@ -50,7 +50,8 @@ static inline void sync_law(volatile void *addr) /* * Prototypes */ -extern long int fixed_sdram(u32 *mddrc_config, u32 *dram_init_seq, int seq_sz); +extern long int fixed_sdram(ddr512x_config_t *mddrc_config, +u32 *dram_init_seq, int seq_sz); extern int mpc5121_diu_init(void); extern void ide_set_reset(int idereset); -- 1.6.0.6 ��

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[U-Boot] Pull request - net
by Ben Warren 05 Oct '09

05 Oct '09

Wolfgang, The following changes since commit 311c19ccb5783a1de71fd5042eeadfbe9688f597: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx are available in the git repository at: git://git.denx.de/u-boot-net.git master Ben Warren (2): Convert SMC91111 Ethernet driver to CONFIG_NET_MULTI API Add information about return values of xxx_eth_register() in documentation James Clough (1): net: Fix problem with 405EZ ethernet interrupt Mike Frysinger (2): net: add random_port() prototype document network driver framework Prafulla Wadaskar (2): net: phy: mv88e61xx.c : fixed build warning net: kirkwood_egiga.c: fixed build warning board/altera/ep1c20/ep1c20.c | 12 + board/altera/ep1s10/ep1s10.c | 12 + board/altera/ep1s40/ep1s40.c | 12 + board/armltd/integrator/integrator.c | 13 +- board/armltd/versatile/versatile.c | 12 + board/bf533-ezkit/bf533-ezkit.c | 8 + board/bf533-stamp/bf533-stamp.c | 8 + board/bf538f-ezkit/bf538f-ezkit.c | 8 + board/bf561-ezkit/bf561-ezkit.c | 8 + board/blackstamp/blackstamp.c | 8 + board/cerf250/cerf250.c | 12 + board/cm-bf533/cm-bf533.c | 8 + board/cm-bf561/cm-bf561.c | 8 + board/cradle/cradle.c | 12 + board/delta/delta.c | 12 + board/dnp1110/dnp1110.c | 12 + board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c | 12 + board/gaisler/gr_ep2s60/gr_ep2s60.c | 12 + board/innokom/innokom.c | 12 + board/logodl/logodl.c | 12 + board/lpd7a40x/lpd7a40x.c | 12 + board/ms7722se/ms7722se.c | 12 + board/netstar/eeprom.c | 57 ++-- board/netstar/netstar.c | 12 + board/psyent/pk1c20/pk1c20.c | 12 + board/pxa255_idp/pxa_idp.c | 12 + board/renesas/MigoR/migo_r.c | 12 + board/st/nhk8815/nhk8815.c | 12 + board/voiceblue/eeprom.c | 57 ++-- board/voiceblue/voiceblue.c | 12 + board/xaeniax/xaeniax.c | 12 + board/xm250/xm250.c | 12 + board/xsengine/xsengine.c | 12 + board/zylonite/zylonite.c | 12 + doc/README.drivers.eth | 182 ++++++++ drivers/net/4xx_enet.c | 9 + drivers/net/Makefile | 2 +- drivers/net/kirkwood_egiga.c | 4 +- drivers/net/phy/mv88e61xx.c | 4 +- drivers/net/smc91111.c | 611 +++++++++---------------- drivers/net/smc91111.h | 192 ++++---- examples/standalone/smc91111_eeprom.c | 102 +++-- include/configs/EP1C20.h | 3 +- include/configs/EP1S10.h | 3 +- include/configs/EP1S40.h | 3 +- include/configs/MigoR.h | 3 +- include/configs/PK1C20.h | 3 +- include/configs/bf533-ezkit.h | 8 +- include/configs/bf533-stamp.h | 8 +- include/configs/bf538f-ezkit.h | 3 +- include/configs/bf561-ezkit.h | 3 +- include/configs/blackstamp.h | 7 +- include/configs/cerf250.h | 3 +- include/configs/cm-bf533.h | 3 +- include/configs/cm-bf561.h | 3 +- include/configs/cradle.h | 3 +- include/configs/dnp1110.h | 3 +- include/configs/gr_cpci_ax2000.h | 3 +- include/configs/gr_ep2s60.h | 3 +- include/configs/innokom.h | 3 +- include/configs/integratorcp.h | 3 +- include/configs/logodl.h | 3 +- include/configs/lpd7a400-10.h | 3 +- include/configs/lpd7a404-10.h | 3 +- include/configs/ms7722se.h | 3 +- include/configs/netstar.h | 3 +- include/configs/nhk8815.h | 3 +- include/configs/pxa255_idp.h | 3 +- include/configs/versatile.h | 3 +- include/configs/voiceblue.h | 3 +- include/configs/xaeniax.h | 3 +- include/configs/xm250.h | 3 +- include/configs/xsengine.h | 3 +- include/configs/zylonite.h | 2 +- include/net.h | 3 + include/netdev.h | 1 + 76 files changed, 1048 insertions(+), 642 deletions(-) create mode 100644 doc/README.drivers.eth

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[U-Boot] [PATCH 0/3 v3] New MIIPHYBB implementation with multi-bus support
by Luigi 'Comio' Mantellini 05 Oct '09

05 Oct '09

From: Luigi 'Comio' Mantellini <luigi.mantellini(a)idf-hit.com> This patch rewrites the miiphybb ( Bit-banged MII bus driver ) in order to support an arbitrary number of buses. This feature is useful when your board uses different mii buses for different phys and all (or a part) of these buses are implemented via bit-banging mode. The driver requires that the following macros should be defined into the board configuration file: CONFIG_BITBANGMII - Enable the miiphybb driver CONFIG_BITBANGMII_MULTI - Enable the multi bus support If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs to define the following macros: MII_INIT - Generic cod to enable the MII bus (like gpios setup) MDIO_DECLARE - Declaration needed to access to the MDIO pin MDIO_ACTIVE - Activate the MDIO pin as out pin MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin MDIO_READ - Read the MDIO pin MDIO(v) - Write v on the MDIO pin MDC_DECLARE - Declaration needed to access to the MDC pin MDC(v) - Write v on the MDC pin The previous macros make the driver compatible with the previous version (that didn't support the multi-bus). When the CONFIG_BITBANGMII_MULTI is defined, the board code needs to fill the bbmiibusses[] array with a record for each required bus. The record (struct bbmiibus) has the following fields/callbacks (see miiphy.h for details): char name[] - The symbolic name that must be equal to the MII bus registered name int (*init)() - Initialization function called at startup time (just before the Ethernet initialization) int (*mdio_active)() - Activate the MDIO pin as output int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin int (*set_mdio)() - Write the MDIO pin int (*get_mdio)() - Read the MDIO pin int (*set_mdc)() - Write the MDC pin int (*delay)() - Delay function void *priv - Private data used by board specific code The board code will look like: struct bbmiibus bbmiibusses[] = { { .name = "miibus#1", .init = b1_init, .mdio_active = b1_mdio_active, ... }, { .name = "miibus#2", .init = b2_init, .mdio_active = b2_mdio_active, ... }, ... }; Patch Changelog: v1 -- First (broken) release v2 -- Fix some typos and disable callbacks pointers relacation (if CONFIG_RELOC_FIXUP_WORKS is not defined) v3 -- Do not relocate NULL pointers Luigi 'Comio' Mantellini (3): Bit-banged MII driver with multi-bus support. Add bb_miiphy_init call before any ethernet bring-up code. Update all board to support new bbmiiphy driver (with multibus support) drivers/net/phy/miiphybb.c | 324 +++++++++++++++++++++++++++++------------- include/configs/ISPAN.h | 3 + include/configs/MPC8260ADS.h | 2 + include/configs/MPC8266ADS.h | 3 + include/configs/MPC8560ADS.h | 3 + include/configs/Rattler.h | 3 + include/configs/SBC8540.h | 3 + include/configs/TQM8272.h | 2 + include/configs/VoVPN-GW.h | 3 + include/configs/ZPC1900.h | 3 + include/configs/ep8248.h | 3 + include/configs/ep82xxm.h | 3 + include/configs/gw8260.h | 3 + include/configs/hymod.h | 9 ++ include/configs/muas3001.h | 3 + include/configs/ppmc8260.h | 3 + include/configs/sacsng.h | 3 + include/configs/sbc8260.h | 3 + include/configs/sbc8560.h | 3 + include/miiphy.h | 22 +++ lib_arm/board.c | 3 + lib_avr32/board.c | 3 + lib_blackfin/board.c | 3 + lib_i386/board.c | 3 + lib_m68k/board.c | 3 + lib_mips/board.c | 3 + lib_ppc/board.c | 4 +- lib_sh/board.c | 3 + lib_sparc/board.c | 3 + 29 files changed, 335 insertions(+), 97 deletions(-)

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[U-Boot] Preserving frame buffer memory between uboot and Linux
by Steven Zedeck 05 Oct '09

05 Oct '09

Hi, We have a situation when we want to display an image towards the end of Uboot's execution, before we boot Linux. I have that already. However, my issue is that while Linux boots it mallocs a new frame buffer and reinitializes the LCD controller with a new memory address. At the moment in Uboot the frame buffer is at 0x23F39000. In Linux I see it being mapped to 0x23980000. Is there a way to force Linux to use the already-allocated frame buffer memory so the image doesn't go away? I am running on an Atmel AT91SAM9RL with Uboot 2008.10 and 2.6.28 Linux. Thanks in advance, Steve -- View this message in context: http://www.nabble.com/Preserving-frame-buffer-memory-between-uboot-and-Linu… Sent from the Uboot - Users mailing list archive at Nabble.com.

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[U-Boot] u-Boot itself gets erased on fw_setenv
by Rahanesh 05 Oct '09

05 Oct '09

Hi All, I am using fw_printenv to set few environment variables from Linux. I am able to see all the environment variables using fw_printenv. But when i type the command fw_printenv i get the following message first "*Read error on /dev/mtd1: Success*" then u-boot environment variables are printed. After creating a softlink from fw_setenv to fw_printenv i executed the following command to set boot delay as 8 . On execution of following command *fw_setenv bootdelay 9 *i got the following print messages. *Read error on /dev/mtd1: Success Unlocking flash... Done Erasing old environment... Done Writing environment to /dev/mtd1... Write error on /dev/mtd1: Operation not supported Error: can't write fw_env to flash * What might be the problem here? But after fw-setenv command if i give a fw_printenv command it shows modified boot delay value.. And then when i reboot the system i get boot failed message and uboot does not come up. Thanks Rahanesh

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[U-Boot] [PATCH v1]ppc/P1_P2_RDB: On-chip ROM boot
by Dipen Dudhat 05 Oct '09

05 Oct '09

On Chip BootROM support for P1 and P2 series RDB platforms. This patch is derived from latest On Chip BootROM support on MPC8536DS by Mingkai Hu. Signed-off-by: Dipen Dudhat <dipen.dudhat(a)freescale.com> --- - Applies to http://git.denx.de/u-boot.git MAKEALL | 2 ++ Makefile | 2 ++ board/freescale/p1_p2_rdb/config.mk | 12 ++++++++++++ include/configs/P1_P2_RDB.h | 17 ++++++++++++++++- 4 files changed, 32 insertions(+), 1 deletions(-) diff --git a/MAKEALL b/MAKEALL index de81c93..3daee59 100755 --- a/MAKEALL +++ b/MAKEALL @@ -399,6 +399,8 @@ LIST_85xx=" \ P2010RDB \ P2020RDB \ P2020RDB_NAND \ + P2020RDB_SDCARD \ + P2020RDB_SPIFLASH \ PM854 \ PM856 \ sbc8540 \ diff --git a/Makefile b/Makefile index 652d930..9afb145 100644 --- a/Makefile +++ b/Makefile @@ -2527,6 +2527,8 @@ P1011RDB_config \ P1020RDB_config \ P2010RDB_config \ P2020RDB_NAND_config \ +P2020RDB_SDCARD_config \ +P2020RDB_SPIFLASH_config \ P2020RDB_config: unconfig @$(MKCONFIG) -t $(@:_config=) P1_P2_RDB ppc mpc85xx p1_p2_rdb freescale diff --git a/board/freescale/p1_p2_rdb/config.mk b/board/freescale/p1_p2_rdb/config.mk index 17abcf8..0f7a048 100644 --- a/board/freescale/p1_p2_rdb/config.mk +++ b/board/freescale/p1_p2_rdb/config.mk @@ -31,8 +31,20 @@ LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds endif endif +ifeq ($(CONFIG_MK_SDCARD), y) +TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +RESET_VECTOR_ADDRESS = 0xf8fffffc +endif + +ifeq ($(CONFIG_MK_SPIFLASH), y) +TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +RESET_VECTOR_ADDRESS = 0xf8fffffc +endif + ifndef TEXT_BASE TEXT_BASE = 0xeff80000 endif +ifndef RESET_VECTOR_ADDRESS RESET_VECTOR_ADDRESS = 0xeffffffc +endif diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index aacd4ca..310242e 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -49,6 +49,16 @@ #define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000 #endif +#ifdef CONFIG_MK_SDCARD +#define CONFIG_RAMBOOT_SDCARD 1 +#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#endif + +#ifdef CONFIG_MK_SPIFLASH +#define CONFIG_RAMBOOT_SPIFLASH 1 +#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#endif + /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ @@ -182,7 +192,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ -#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) +#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ + || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_SYS_RAMBOOT #else #undef CONFIG_SYS_RAMBOOT @@ -426,6 +437,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_ENV_IS_IN_NAND 1 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) + #define CONFIG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ + #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) + #define CONFIG_ENV_SIZE 0x2000 #endif #else #define CONFIG_ENV_IS_IN_FLASH 1 -- 1.5.6.3

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[U-Boot] build failure on denx top
by Aggrwal Poonam-B10812 05 Oct '09

05 Oct '09

Hello All, On denx tree master branch , u-boot build is failing for 83xx and 85xx platforms. Build log make[1]: Entering directory `/project/p1020_swe_nobackup/usr/poonam/p20x0/denx/latest/mirrors.u-boot /u-boot/examples/standalone' /opt/freescale/usr/local/gcc-4.3.74-eglibc-2.8.74-dp-2/powerpc-none-linu x-gnuspe/bin/powerpc-none-linux-gnuspe-gcc -g -Os -fPIC -ffixed-r14 -meabi -D__KERNEL__ -DTEXT_BASE=0xFE000000 -I/project/p1020_swe_nobackup/usr/poonam/p20x0/denx/latest/mirrors.u-boo t/u-boot/include -fno-builtin -ffreestanding -nostdinc -isystem /opt/freescale/usr/local/gcc-4.3.74-eglibc-2.8.74-dp-2/powerpc-none-linu x-gnuspe/lib/gcc/powerpc-none-linux-gnuspe/4.3.2/include -pipe -DCONFIG_PPC -D__powerpc__ -DCONFIG_MPC83xx -DCONFIG_E300 -ffixed-r2 -msoft-float -Wall -Wstrict-prototypes -fno-stack-protector -g -Os -fPIC -ffixed-r14 -meabi -D__KERNEL__ -DTEXT_BASE=0xFE000000 -I/project/p1020_swe_nobackup/usr/poonam/p20x0/denx/latest/mirrors.u-boo t/u-boot/include -fno-builtin -ffreestanding -nostdinc -isystem /opt/freescale/usr/local/gcc-4.3.74-eglibc-2.8.74-dp-2/powerpc-none-linu x-gnuspe/lib/gcc/powerpc-none-linux-gnuspe/4.3.2/include -pipe -DCONFIG_PPC -D__powerpc__ -DCONFIG_MPC83xx -DCONFIG_E300 -ffixed-r2 -msoft-float -I.. -Bstatic -T u-boot.lds -n -Ttext 0xFE000000 -o .c powerpc-none-linux-gnuspe-gcc: 0xFE000000: No such file or directory powerpc-none-linux-gnuspe-gcc: no input files make[1]: *** [.c] Error 1 make[1]: Leaving directory `/project/p1020_swe_nobackup/usr/poonam/p20x0/denx/latest/mirrors.u-boot /u-boot/examples/standalone' make: *** [examples/standalone] Error 2 When I remove the following commit, things work fine. From 557555fe0b82940ba7cc69f81d31d6ef4d4933b4 Mon Sep 17 00:00:00 2001 From: Mike Frysinger <vapier(a)gentoo.org <mailto:vapier@gentoo.org> > Date: Fri, 4 Sep 2009 19:54:45 -0400 Subject: [PATCH] standalone: convert to kbuild style Clean up the arch/cpu/board/config checks as well as redundant setting of srec/bin variables by using the kbuild VAR-$(...) style. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> I am facing it for FSL 83xx and 85xx platforms. Is anybody else also seeing this build failure. Regards Poonam

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[U-Boot] Problem with NetConsole
by alex889 05 Oct '09

05 Oct '09

Hi, I'm trying to add the NetConsole to my project. I've set all the related environment variables when i start UBoot and then type "run nc" i see that i receive the data i'm sending from remote PC, but if i call "run nc" from within the UBoot, using run_command("run nc", 1);, i don't receive that data. Am i doing something wrong? Thanks, Alex -- View this message in context: http://www.nabble.com/-U-Boot--Problem-with-NetConsole-tp25738669p25738669.… Sent from the Uboot - Users mailing list archive at Nabble.com.

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[U-Boot] Die id?
by Tuma 05 Oct '09

05 Oct '09

Hi, All! I have a question about serial No. and Die ID. I've found this info: http://www.mail-archive.com/u-boot@lists.denx.de/msg10042.html Can you tell me please what is Die ID? I need some serial No, which could be used as unique ID of device built on OMAP3 processor. Is this possible to realize with Die ID? Thank you. -- Software Developer General Satellite Corp.

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[U-Boot] [PATCH v0 1/2] u-boot-2009.08 NET: Move MDIO regs out of TSEC Space
by Sandeep Gopalpet 05 Oct '09

05 Oct '09

Moved the mdio regs out of the tsec structure,and provided different offsets for tsec base and mdio base so that provision for etsec2.0 can be provided. This patch helps in providing the support for etsec2.0 In etsec2.0, the MDIO register space and the etsec reg space are different Signed-off-by: Sandeep Gopalpet <sandeep.kumar(a)freescale.com> --- drivers/net/tsec.c | 20 ++++++++-------- include/asm-ppc/immap_85xx.h | 10 ++++++++ include/tsec.h | 48 +++++++++++++++++++++++++++++++---------- 3 files changed, 56 insertions(+), 22 deletions(-) diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 5c3d261..2ad033e 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -83,7 +83,7 @@ static struct tsec_info_struct tsec_info[] = { #ifdef CONFIG_MPC85XX_FEC { .regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000), - .miiregs = (tsec_t *)(TSEC_BASE_ADDR), + .miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR), .devname = CONFIG_MPC85XX_FEC_NAME, .phyaddr = FEC_PHY_ADDR, .flags = FEC_FLAGS @@ -136,6 +136,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct *tsec_info) privlist[num_tsecs++] = priv; priv->regs = tsec_info->regs; priv->phyregs = tsec_info->miiregs; + priv->phyregs_sgmii = tsec_info->miiregs_sgmii; priv->phyaddr = tsec_info->phyaddr; priv->flags = tsec_info->flags; @@ -222,7 +223,7 @@ int tsec_init(struct eth_device *dev, bd_t * bd) } /* Writes the given phy's reg with value, using the specified MDIO regs */ -static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr, +static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs, uint addr, uint reg, uint value) { int timeout = 1000000; @@ -245,7 +246,7 @@ static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr, * notvalid bit cleared), and the bus to cease activity (miimind * busy bit cleared), and then returns the value */ -uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum) +uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, uint phyid, uint regnum) { uint value; @@ -290,11 +291,11 @@ static void tsec_configure_serdes(struct tsec_private *priv) { /* Access TBI PHY registers at given TSEC register offset as opposed to the * register offset used for external PHY accesses */ - tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_ANA, + tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_ANA, TBIANA_SETTINGS); - tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_TBICON, + tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_TBICON, TBICON_CLK_SELECT); - tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_CR, + tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_CR, TBICR_SETTINGS); } @@ -306,12 +307,11 @@ static int init_phy(struct eth_device *dev) { struct tsec_private *priv = (struct tsec_private *)dev->priv; struct phy_info *curphy; - volatile tsec_t *phyregs = priv->phyregs; + volatile tsec_mdio_t *phyregs = priv->phyregs; volatile tsec_t *regs = priv->regs; /* Assign a Physical address to the TBI */ regs->tbipa = CONFIG_SYS_TBIPA_VALUE; - phyregs->tbipa = CONFIG_SYS_TBIPA_VALUE; asm("sync"); /* Reset MII (due to new addresses) */ @@ -739,7 +739,7 @@ uint mii_parse_dm9161_scsr(uint mii_reg, struct tsec_private * priv) uint mii_cis8204_fixled(uint mii_reg, struct tsec_private * priv) { uint phyid; - volatile tsec_t *regbase = priv->phyregs; + volatile tsec_mdio_t *regbase = priv->phyregs; int timeout = 1000000; for (phyid = 0; phyid < 4; phyid++) { @@ -1772,7 +1772,7 @@ void phy_run_commands(struct tsec_private *priv, struct phy_cmd *cmd) { int i; uint result; - volatile tsec_t *phyregs = priv->phyregs; + volatile tsec_mdio_t *phyregs = priv->phyregs; phyregs->miimcfg = MIIMCFG_RESET; diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 100dfe1..dc82f49 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1935,4 +1935,14 @@ typedef struct ccsr_gur { #define CONFIG_SYS_MPC85xx_USB_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET) +/* TSEC and MDIO OFFSETS */ +#define CONFIG_SYS_TSEC1_OFFSET (0x24000) +#define TSEC_SIZE (0x01000) + +#define CONFIG_SYS_MDIO1_OFFSET (0x24520) +#define MDIO_OFFSET (0x01000) + +#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) +#define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET) + #endif /*__IMMAP_85xx__*/ diff --git a/include/tsec.h b/include/tsec.h index 0ac3034..342c07e 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -7,7 +7,7 @@ * terms of the GNU Public License, Version 2, incorporated * herein by reference. * - * Copyright 2004, 2007 Freescale Semiconductor, Inc. + * Copyright 2004, 2007, 2009 Freescale Semiconductor, Inc. * (C) Copyright 2003, Motorola, Inc. * maintained by Xianghua Xiao (x.xiao(a)motorola.com) * author Andy Fleming @@ -24,18 +24,34 @@ #define CONFIG_SYS_TSEC1_OFFSET (0x24000) #endif -#define TSEC_SIZE 0x01000 +#ifndef TSEC_SIZE + #define TSEC_SIZE 0x01000 +#endif + +#ifndef CONFIG_SYS_MDIO1_OFFSET + #define CONFIG_SYS_MDIO1_OFFSET (0x24520) +#endif + +#ifndef MDIO_OFFSET + #define MDIO_OFFSET 0x01000 +#endif /* FIXME: Should these be pushed back to 83xx and 85xx config files? */ #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \ || defined(CONFIG_MPC83xx) +#ifndef TSEC_BASE_ADDR #define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) #endif +#ifndef MDIO_BASE_ADDR + #define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET) +#endif +#endif #define STD_TSEC_INFO(num) \ { \ .regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)), \ - .miiregs = (tsec_t *)TSEC_BASE_ADDR, \ + .miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR), \ + .miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR + (num -1)*MDIO_OFFSET ), \ .devname = CONFIG_TSEC##num##_NAME, \ .phyaddr = TSEC##num##_PHY_ADDR, \ .flags = TSEC##num##_FLAGS \ @@ -44,7 +60,8 @@ #define SET_STD_TSEC_INFO(x, num) \ { \ x.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)); \ - x.miiregs = (tsec_t *)TSEC_BASE_ADDR; \ + x.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR); \ + x.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR + (num -1)*MDIO_OFFSET); \ x.devname = CONFIG_TSEC##num##_NAME; \ x.phyaddr = TSEC##num##_PHY_ADDR; \ x.flags = TSEC##num##_FLAGS;\ @@ -461,6 +478,16 @@ typedef struct tsec_hash_regs uint res2[24]; } tsec_hash_t; +typedef struct tsec_mdio +{ + uint miimcfg; /* MII Management: Configuration */ + uint miimcom; /* MII Management: Command */ + uint miimadd; /* MII Management: Address */ + uint miimcon; /* MII Management: Control */ + uint miimstat; /* MII Management: Status */ + uint miimind; /* MII Management: Indicators */ +} tsec_mdio_t; + typedef struct tsec { /* General Control and Status Registers (0x2_n000) */ @@ -526,12 +553,7 @@ typedef struct tsec uint res51c; - uint miimcfg; /* MII Management: Configuration */ - uint miimcom; /* MII Management: Command */ - uint miimadd; /* MII Management: Address */ - uint miimcon; /* MII Management: Control */ - uint miimstat; /* MII Management: Status */ - uint miimind; /* MII Management: Indicators */ + uint resmdio[6]; uint res538; @@ -571,7 +593,8 @@ typedef struct tsec struct tsec_private { volatile tsec_t *regs; - volatile tsec_t *phyregs; + volatile tsec_mdio_t *phyregs; + volatile tsec_mdio_t *phyregs_sgmii; struct phy_info *phyinfo; uint phyaddr; u32 flags; @@ -630,7 +653,8 @@ struct phy_info { struct tsec_info_struct { tsec_t *regs; - tsec_t *miiregs; + tsec_mdio_t *miiregs; + tsec_mdio_t *miiregs_sgmii; char *devname; unsigned int phyaddr; u32 flags; -- 1.5.2.2

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