U-Boot
Threads by month
- ----- 2025 -----
- May
- April
- March
- February
- January
- ----- 2024 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2023 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2022 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2021 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2020 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2019 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2018 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2017 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2016 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2015 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2014 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2013 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2012 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2011 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2010 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2009 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2008 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2007 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2006 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2005 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2004 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2003 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2002 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2001 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
- March
- February
- January
- ----- 2000 -----
- December
- November
- October
- September
- August
- July
- June
- May
- April
October 2009
- 193 participants
- 559 discussions

[U-Boot] [PATCH v2] ppc/85xx: PIO Support for FSL eSDHC Controller Driver
by Dipen Dudhat 05 Oct '09
by Dipen Dudhat 05 Oct '09
05 Oct '09
On some Freescale SoC Internal DMA of eSDHC controller has bug.
So PIO Mode has introduced to do data transfer using CPU.
In PIO mode data transfer performance will be degraded by a large extent.
Note:
In PIO mode multiple block read/write requires delay to complete the transfer.
Signed-off-by: Dipen Dudhat <dipen.dudhat(a)freescale.com>
---
drivers/mmc/fsl_esdhc.c | 87 +++++++++++++++++++++++++++++++++++++++++++++-
include/fsl_esdhc.h | 2 +
2 files changed, 87 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 27e4c48..7db8c0c 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -73,8 +73,10 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
uint xfertyp = 0;
if (data) {
- xfertyp |= XFERTYP_DPSEL | XFERTYP_DMAEN;
-
+ xfertyp |= XFERTYP_DPSEL;
+#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
+ xfertyp |= XFERTYP_DMAEN;
+#endif
if (data->blocks > 1) {
xfertyp |= XFERTYP_MSBSEL;
xfertyp |= XFERTYP_BCEN;
@@ -98,12 +100,88 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
return XFERTYP_CMD(cmd->cmdidx) | xfertyp;
}
+#ifdef CONFIG_SYS_FSL_ESDHC_USE_PIO
+/*
+ * PIO Read/Write Mode reduce the performace as DMA is not used in this mode.
+ */
+static int
+esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
+{
+ struct fsl_esdhc *regs = mmc->priv;
+ uint blocks;
+ char *buffer;
+ uint databuf;
+ uint size;
+ uint irqstat;
+ uint timeout;
+
+ if (data->flags & MMC_DATA_READ) {
+ blocks = data->blocks;
+ buffer = data->dest;
+ while (blocks) {
+ timeout = MAX_TIMEOUT;
+ size = data->blocksize;
+ irqstat = in_be32(®s->irqstat);
+ while (!(in_be32(®s->prsstat) & PRSSTAT_BREN)
+ && --timeout);
+ if (timeout <= 0) {
+ printf("\nData Read Failed in PIO Mode.");
+ return TIMEOUT;
+ }
+ while (size && (!(irqstat & IRQSTAT_TC))) {
+ udelay(100);
+ irqstat = in_be32(®s->irqstat);
+ databuf = in_le32(®s->datport);
+ *((uint *)buffer) = databuf;
+ buffer += 4;
+ size -= 4;
+ }
+ blocks--;
+ }
+ } else {
+ blocks = data->blocks;
+ buffer = data->src;
+ while (blocks) {
+ timeout = MAX_TIMEOUT;
+ size = data->blocksize;
+ irqstat = in_be32(®s->irqstat);
+ while (!(in_be32(®s->prsstat) & PRSSTAT_BWEN)
+ && --timeout);
+ if (timeout <= 0) {
+ printf("\nData Write Failed in PIO Mode.");
+ return TIMEOUT;
+ }
+ while (size && (!(irqstat & IRQSTAT_TC))) {
+ udelay(100);
+ databuf = *((uint *)buffer);
+ buffer += 4;
+ size -= 4;
+ irqstat = in_be32(®s->irqstat);
+ out_le32(®s->datport, databuf);
+ }
+ blocks--;
+ }
+ }
+}
+#endif
+
static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
{
uint wml_value;
int timeout;
struct fsl_esdhc *regs = mmc->priv;
+#ifdef CONFIG_SYS_FSL_ESDHC_USE_PIO
+ if (!(data->flags & MMC_DATA_READ)) {
+ if ((in_be32(®s->prsstat) & PRSSTAT_WPSPL) == 0) {
+ printf("\nThe SD card is locked. "
+ "Can not write to a locked card.\n\n");
+ return TIMEOUT;
+ }
+ out_be32(®s->dsaddr, (u32)data->src);
+ } else
+ out_be32(®s->dsaddr, (u32)data->dest);
+#else
wml_value = data->blocksize/4;
if (data->flags & MMC_DATA_READ) {
@@ -125,6 +203,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
}
out_be32(®s->wml, wml_value);
+#endif
out_be32(®s->blkattr, data->blocks << 16 | data->blocksize);
@@ -217,6 +296,9 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
/* Wait until all of the blocks are transferred */
if (data) {
+#ifdef CONFIG_SYS_FSL_ESDHC_USE_PIO
+ esdhc_pio_read_write(mmc, data);
+#else
do {
irqstat = in_be32(®s->irqstat);
@@ -227,6 +309,7 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
return TIMEOUT;
} while (!(irqstat & IRQSTAT_TC) &&
(in_be32(®s->prsstat) & PRSSTAT_DLA));
+#endif
}
out_be32(®s->irqstat, -1);
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index 89b8304..5948d37 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -86,6 +86,7 @@
#define PRSSTAT_CDPL (0x00040000)
#define PRSSTAT_CINS (0x00010000)
#define PRSSTAT_BREN (0x00000800)
+#define PRSSTAT_BWEN (0x00000400)
#define PRSSTAT_DLA (0x00000004)
#define PRSSTAT_CICHB (0x00000002)
#define PRSSTAT_CIDHB (0x00000001)
@@ -117,6 +118,7 @@
#define XFERTYP_DMAEN 0x00000001
#define CINS_TIMEOUT 1000
+#define MAX_TIMEOUT 100000
#define DSADDR 0x2e004
--
1.5.6.3
4
6
Hello,
at current git all AT91RM9200 based boards have the "Ethernet driver is deprecated" warning.
I have read anywhere, there are plans to join the AT91 and the 9200 driver.
Is there someone work on this or will AT91RM9200 driver ported in soon.
We wanted to publish a new board without the deprecated drivers
Best regards
Jens Scharsig
2
2

[U-Boot] [PATCH] Add information about return values of xxx_eth_register() in documentation
by Ben Warren 05 Oct '09
by Ben Warren 05 Oct '09
05 Oct '09
As discussed on mailing list, <0 indicates failure, >=0 indicates number
of interfaces found.
Also added blurb about private data
Signed-off-by: Ben Warren <biggerbadderben(a)gmail.com>
---
doc/README.drivers.eth | 21 +++++++++++++--------
1 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/doc/README.drivers.eth b/doc/README.drivers.eth
index 7f21909..e06d3ad 100644
--- a/doc/README.drivers.eth
+++ b/doc/README.drivers.eth
@@ -25,9 +25,9 @@ system handling, but ultimately they will call the driver-specific register
function which in turn takes care of initializing that particular instance.
Keep in mind that you should code the driver to avoid storing state in global
-data as someone might want to hook up two of the same devices to one board. If
-the state is maintained as global data, it makes using both of those devices
-impossible.
+data as someone might want to hook up two of the same devices to one board.
+Any such information that is specific to an interface should be stored in a
+private, driver-defined data structure and pointed to by eth->priv (see below).
So the call graph at this stage would look something like:
board_init()
@@ -77,15 +77,20 @@ int ape_register(bd_t *bis, int iobase)
miiphy_register(dev->name, ape_mii_read, ape_mii_write);
#endif
- return 0;
+ return 1;
}
The exact arguments needed to initialize your device are up to you. If you
need to pass more/less arguments, that's fine. You should also add the
-prototype for your new register function to include/netdev.h. You might notice
-that many drivers seem to use xxx_initialize() rather than xxx_register().
-This is the old naming convention and should be avoided as it causes confusion
-with the driver-specific init function.
+prototype for your new register function to include/netdev.h.
+
+The return value for this function should be as follows:
+< 0 - failure (hardware failure, not probe failure)
+>=0 - number of interfaces detected
+
+You might notice that many drivers seem to use xxx_initialize() rather than
+xxx_register(). This is the old naming convention and should be avoided as it
+causes confusion with the driver-specific init function.
Other than locating the MAC address in dedicated hardware storage, you should
not touch the hardware in anyway. That step is handled in the driver-specific
--
1.6.0.4
2
2
Hello,
I use U-Boot for starting Windows CE. At the moment I take the nk.bin File
and start it with the U-Boot patch of Ryan Chen. Now I will compress the
nk.bin file, because in addition to that it takes much less space in the
Flash memory. I have tried it with the unzip command, but it takes too much
time. Can I use another compression tool from u-boot. I think a compressed
linux kernel can be started with bootm. So can I use maybe only the
compression tool of the bootm command? If so, how can I do this?
Thanks,
Andreas
3
5
is there any documentation that covers the NET_MULTI driver stack ? i.e. if
i was a network chip vendor and wanted to write a u-boot driver for my part,
where would i look ? or is it a matter of "the code is the documentation" ?
i can start a small doc that covers the existing stack if that is the case ...
more to keep my sanity so i dont have to keep going through the ethernet stack
to remind myself of how things fit together ;).
-mike
5
22

05 Oct '09
if link up detection code is disabled through config option, it gives build warning.
This patch fixes the same
Signed-off-by: Prafulla Wadaskar <prafulla(a)marvell.com>
---
Changelog:
v2: unwanted commit in v1 patch removed
drivers/net/kirkwood_egiga.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/net/kirkwood_egiga.c b/drivers/net/kirkwood_egiga.c
index 479035d..07a86cd 100644
--- a/drivers/net/kirkwood_egiga.c
+++ b/drivers/net/kirkwood_egiga.c
@@ -400,8 +400,10 @@ static int kwgbe_init(struct eth_device *dev)
{
struct kwgbe_device *dkwgbe = to_dkwgbe(dev);
struct kwgbe_registers *regs = dkwgbe->regs;
+#if (defined (CONFIG_MII) || defined (CONFIG_CMD_MII)) \
+ && defined (CONFIG_SYS_FAULT_ECHO_LINK_DOWN)
int i;
-
+#endif
/* setup RX rings */
kwgbe_init_rx_desc_ring(dkwgbe);
--
1.5.3.3
2
1

05 Oct '09
This patch adds kwbimage configuration file
(used by mkimage utility)
to support u-boot.kwb target on rd6281a platform.
To create Kirkwood boot image to be flashed on NAND,
additional parameter u-boot.kwb need to be passed during make.
Signed-off-by: Prafulla Wadaskar <prafulla(a)marvell.com>
---
board/Marvell/rd6281a/config.mk | 3 +
board/Marvell/rd6281a/kwbimage.cfg | 167 ++++++++++++++++++++++++++++++++++++
2 files changed, 170 insertions(+), 0 deletions(-)
create mode 100644 board/Marvell/rd6281a/kwbimage.cfg
diff --git a/board/Marvell/rd6281a/config.mk b/board/Marvell/rd6281a/config.mk
index a4ea769..2bd9f79 100644
--- a/board/Marvell/rd6281a/config.mk
+++ b/board/Marvell/rd6281a/config.mk
@@ -23,3 +23,6 @@
#
TEXT_BASE = 0x00600000
+
+# Kirkwood Boot Image configuration file
+KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
diff --git a/board/Marvell/rd6281a/kwbimage.cfg b/board/Marvell/rd6281a/kwbimage.cfg
new file mode 100644
index 0000000..0d12dd9
--- /dev/null
+++ b/board/Marvell/rd6281a/kwbimage.cfg
@@ -0,0 +1,167 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Prafulla Wadaskar <prafulla(a)marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM nand
+NAND_ECC_MODE default
+NAND_PAGE_SIZE 0x0800
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+# Configure RGMII-0 interface pad voltage to 1.8V
+DATA 0xFFD100e0 0x1b1b1b9b
+
+#Dram initalization for SINGLE x16 CL=5 @ 400MHz
+DATA 0xFFD01400 0x43000c30 # DDR Configuration register
+# bit13-0: 0xc30 (3120 DDR2 clks refresh rate)
+# bit23-14: zero
+# bit24: 1= enable exit self refresh mode on DDR access
+# bit25: 1 required
+# bit29-26: zero
+# bit31-30: 01
+
+DATA 0xFFD01404 0x37543000 # DDR Controller Control Low
+# bit 4: 0=addr/cmd in smame cycle
+# bit 5: 0=clk is driven during self refresh, we don't care for APX
+# bit 6: 0=use recommended falling edge of clk for addr/cmd
+# bit14: 0=input buffer always powered up
+# bit18: 1=cpu lock transaction enabled
+# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
+# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
+# bit30-28: 3 required
+# bit31: 0=no additional STARTBURST delay
+
+DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1)
+# bit3-0: TRAS lsbs
+# bit7-4: TRCD
+# bit11- 8: TRP
+# bit15-12: TWR
+# bit19-16: TWTR
+# bit20: TRAS msb
+# bit23-21: 0x0
+# bit27-24: TRRD
+# bit31-28: TRTP
+
+DATA 0xFFD0140C 0x00000a33 # DDR Timing (High)
+# bit6-0: TRFC
+# bit8-7: TR2R
+# bit10-9: TR2W
+# bit12-11: TW2W
+# bit31-13: zero required
+
+DATA 0xFFD01410 0x00000099 # DDR Address Control
+# bit1-0: 00, Cs0width=x8
+# bit3-2: 11, Cs0size=1Gb
+# bit5-4: 00, Cs1width=x8
+# bit7-6: 11, Cs1size=1Gb
+# bit9-8: 00, Cs2width=nonexistent
+# bit11-10: 00, Cs2size =nonexistent
+# bit13-12: 00, Cs3width=nonexistent
+# bit15-14: 00, Cs3size =nonexistent
+# bit16: 0, Cs0AddrSel
+# bit17: 0, Cs1AddrSel
+# bit18: 0, Cs2AddrSel
+# bit19: 0, Cs3AddrSel
+# bit31-20: 0 required
+
+DATA 0xFFD01414 0x00000000 # DDR Open Pages Control
+# bit0: 0, OpenPage enabled
+# bit31-1: 0 required
+
+DATA 0xFFD01418 0x00000000 # DDR Operation
+# bit3-0: 0x0, DDR cmd
+# bit31-4: 0 required
+
+DATA 0xFFD0141C 0x00000C52 # DDR Mode
+# bit2-0: 2, BurstLen=2 required
+# bit3: 0, BurstType=0 required
+# bit6-4: 4, CL=5
+# bit7: 0, TestMode=0 normal
+# bit8: 0, DLL reset=0 normal
+# bit11-9: 6, auto-precharge write recovery ????????????
+# bit12: 0, PD must be zero
+# bit31-13: 0 required
+
+DATA 0xFFD01420 0x00000004 # DDR Extended Mode
+# bit0: 0, DDR DLL enabled
+# bit1: 0, DDR drive strenght normal
+# bit2: 1, DDR ODT control lsd (disabled)
+# bit5-3: 000, required
+# bit6: 0, DDR ODT control msb, (disabled)
+# bit9-7: 000, required
+# bit10: 0, differential DQS enabled
+# bit11: 0, required
+# bit12: 0, DDR output buffer enabled
+# bit31-13: 0 required
+
+DATA 0xFFD01424 0x0000F17F # DDR Controller Control High
+# bit2-0: 111, required
+# bit3 : 1 , MBUS Burst Chop disabled
+# bit6-4: 111, required
+# bit7 : 0
+# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz
+# bit9 : 0 , no half clock cycle addition to dataout
+# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals
+# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
+# bit15-12: 1111 required
+# bit31-16: 0 required
+
+DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
+DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
+
+DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0
+DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size
+# bit0: 1, Window enabled
+# bit1: 0, Write Protect disabled
+# bit3-2: 00, CS0 hit selected
+# bit23-4: ones, required
+# bit31-24: 0x0F, Size (i.e. 256MB)
+
+DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb
+DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1
+
+DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled
+DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
+
+DATA 0xFFD01494 0x00120012 # DDR ODT Control (Low)
+# bit3-0: 2, ODT0Rd, MODT[0] asserted during read from DRAM CS1
+# bit7-4: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
+# bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1
+# bit23-20:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
+
+DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
+# bit1-0: 00, ODT0 controlled by ODT Control (low) register above
+# bit3-2: 01, ODT1 active NEVER!
+# bit31-4: zero, required
+
+DATA 0xFFD0149C 0x0000E40F # CPU ODT Control
+DATA 0xFFD01480 0x00000001 # DDR Initialization Control
+#bit0=1, enable DDR init upon this register write
+
+# End of Header extension
+DATA 0x0 0x0
--
1.5.3.3
3
7

[U-Boot] [PATCH][Net] Convert SMC91111 Ethernet driver to CONFIG_NET_MULTI API
by Ben Warren 05 Oct '09
by Ben Warren 05 Oct '09
05 Oct '09
All in-tree boards that use this controller have CONFIG_NET_MULTI
added
Also:
- changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111
- cleaned up line lengths
- modified all boards that override weak function in this driver
- modified all eeprom standalone apps to work with new driver
Signed-off-by: Ben Warren <biggerbadderben(a)gmail.com>
---
board/altera/ep1c20/ep1c20.c | 12 +
board/altera/ep1s10/ep1s10.c | 12 +
board/altera/ep1s40/ep1s40.c | 12 +
board/armltd/integrator/integrator.c | 13 +-
board/armltd/versatile/versatile.c | 12 +
board/bf533-ezkit/bf533-ezkit.c | 12 +
board/bf533-stamp/bf533-stamp.c | 12 +
board/bf538f-ezkit/bf538f-ezkit.c | 12 +
board/bf561-ezkit/bf561-ezkit.c | 12 +
board/blackstamp/blackstamp.c | 12 +
board/cerf250/cerf250.c | 12 +
board/cm-bf533/cm-bf533.c | 12 +
board/cm-bf561/cm-bf561.c | 12 +
board/cradle/cradle.c | 12 +
board/delta/delta.c | 12 +
board/dnp1110/dnp1110.c | 12 +
board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c | 12 +
board/gaisler/gr_ep2s60/gr_ep2s60.c | 12 +
board/innokom/innokom.c | 12 +
board/logodl/logodl.c | 12 +
board/lpd7a40x/lpd7a40x.c | 12 +
board/ms7722se/ms7722se.c | 12 +
board/netstar/eeprom.c | 57 ++--
board/netstar/netstar.c | 12 +
board/psyent/pk1c20/pk1c20.c | 12 +
board/pxa255_idp/pxa_idp.c | 12 +
board/renesas/MigoR/migo_r.c | 12 +
board/st/nhk8815/nhk8815.c | 12 +
board/voiceblue/eeprom.c | 57 ++--
board/voiceblue/voiceblue.c | 12 +
board/xaeniax/xaeniax.c | 12 +
board/xm250/xm250.c | 12 +
board/xsengine/xsengine.c | 12 +
board/zylonite/zylonite.c | 12 +
drivers/net/Makefile | 2 +-
drivers/net/smc91111.c | 491 ++++++++++++-------------
drivers/net/smc91111.h | 192 +++++-----
examples/standalone/smc91111_eeprom.c | 98 +++---
include/configs/EP1C20.h | 3 +-
include/configs/EP1S10.h | 3 +-
include/configs/EP1S40.h | 3 +-
include/configs/MigoR.h | 3 +-
include/configs/PK1C20.h | 3 +-
include/configs/bf533-ezkit.h | 3 +-
include/configs/bf533-stamp.h | 3 +-
include/configs/bf538f-ezkit.h | 3 +-
include/configs/bf561-ezkit.h | 3 +-
include/configs/blackstamp.h | 3 +-
include/configs/cerf250.h | 3 +-
include/configs/cm-bf533.h | 3 +-
include/configs/cm-bf561.h | 3 +-
include/configs/cradle.h | 3 +-
include/configs/dnp1110.h | 3 +-
include/configs/gr_cpci_ax2000.h | 3 +-
include/configs/gr_ep2s60.h | 3 +-
include/configs/innokom.h | 3 +-
include/configs/integratorcp.h | 3 +-
include/configs/logodl.h | 3 +-
include/configs/lpd7a400-10.h | 3 +-
include/configs/lpd7a404-10.h | 3 +-
include/configs/ms7722se.h | 3 +-
include/configs/netstar.h | 3 +-
include/configs/nhk8815.h | 3 +-
include/configs/pxa255_idp.h | 3 +-
include/configs/versatile.h | 3 +-
include/configs/voiceblue.h | 3 +-
include/configs/xaeniax.h | 3 +-
include/configs/xm250.h | 3 +-
include/configs/xsengine.h | 3 +-
include/configs/zylonite.h | 2 +-
include/netdev.h | 1 +
71 files changed, 888 insertions(+), 490 deletions(-)
diff --git a/board/altera/ep1c20/ep1c20.c b/board/altera/ep1c20/ep1c20.c
index c5bfb85..82900f7 100644
--- a/board/altera/ep1c20/ep1c20.c
+++ b/board/altera/ep1c20/ep1c20.c
@@ -22,6 +22,7 @@
*/
#include <common.h>
+#include <netdev.h>
int board_early_init_f (void)
{
@@ -38,3 +39,14 @@ phys_size_t initdram (int board_type)
{
return (0);
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/altera/ep1s10/ep1s10.c b/board/altera/ep1s10/ep1s10.c
index de9bf42..cf886da 100644
--- a/board/altera/ep1s10/ep1s10.c
+++ b/board/altera/ep1s10/ep1s10.c
@@ -22,6 +22,7 @@
*/
#include <common.h>
+#include <netdev.h>
int board_early_init_f (void)
{
@@ -38,3 +39,14 @@ phys_size_t initdram (int board_type)
{
return (0);
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/altera/ep1s40/ep1s40.c b/board/altera/ep1s40/ep1s40.c
index c0eca17..6395de7 100644
--- a/board/altera/ep1s40/ep1s40.c
+++ b/board/altera/ep1s40/ep1s40.c
@@ -22,6 +22,7 @@
*/
#include <common.h>
+#include <netdev.h>
int checkboard (void)
{
@@ -33,3 +34,14 @@ phys_size_t initdram (int board_type)
{
return (0);
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c
index a46deea..518944e 100644
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -34,9 +34,7 @@
*/
#include <common.h>
-#ifdef CONFIG_PCI
#include <netdev.h>
-#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -127,9 +125,16 @@ extern void dram_query(void);
return 0;
}
-#ifdef CONFIG_PCI
+#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
{
- return pci_eth_init(bis);
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+#ifdef CONFIG_PCI
+ rc += pci_eth_init(bis);
+#endif
+ return rc;
}
#endif
diff --git a/board/armltd/versatile/versatile.c b/board/armltd/versatile/versatile.c
index 197bc89..6e836dd 100644
--- a/board/armltd/versatile/versatile.c
+++ b/board/armltd/versatile/versatile.c
@@ -34,6 +34,7 @@
*/
#include <common.h>
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -89,3 +90,14 @@ int dram_init (void)
{
return 0;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/bf533-ezkit/bf533-ezkit.c b/board/bf533-ezkit/bf533-ezkit.c
index d5f0b7c..ff0e15e 100644
--- a/board/bf533-ezkit/bf533-ezkit.c
+++ b/board/bf533-ezkit/bf533-ezkit.c
@@ -26,6 +26,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include "psd4256.h"
#include "flash-defines.h"
@@ -57,3 +58,14 @@ int misc_init_r(void)
return 0;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/bf533-stamp/bf533-stamp.c b/board/bf533-stamp/bf533-stamp.c
index 7108dda..32e7174 100644
--- a/board/bf533-stamp/bf533-stamp.c
+++ b/board/bf533-stamp/bf533-stamp.c
@@ -26,6 +26,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <asm/io.h>
#include "bf533-stamp.h"
@@ -283,3 +284,14 @@ void __led_toggle(led_id_t mask)
}
#endif
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/bf538f-ezkit/bf538f-ezkit.c b/board/bf538f-ezkit/bf538f-ezkit.c
index bbee989..1897405 100644
--- a/board/bf538f-ezkit/bf538f-ezkit.c
+++ b/board/bf538f-ezkit/bf538f-ezkit.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <config.h>
#include <asm/blackfin.h>
@@ -25,3 +26,14 @@ phys_size_t initdram(int board_type)
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/bf561-ezkit/bf561-ezkit.c b/board/bf561-ezkit/bf561-ezkit.c
index 5aede17..24347e2 100644
--- a/board/bf561-ezkit/bf561-ezkit.c
+++ b/board/bf561-ezkit/bf561-ezkit.c
@@ -26,6 +26,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -43,3 +44,14 @@ phys_size_t initdram(int board_type)
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/blackstamp/blackstamp.c b/board/blackstamp/blackstamp.c
index b671899..524c86c 100644
--- a/board/blackstamp/blackstamp.c
+++ b/board/blackstamp/blackstamp.c
@@ -12,6 +12,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -44,3 +45,14 @@ void swap_to(int device_id)
SSYNC();
}
#endif
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/cerf250/cerf250.c b/board/cerf250/cerf250.c
index 307894f..59346bc 100644
--- a/board/cerf250/cerf250.c
+++ b/board/cerf250/cerf250.c
@@ -26,6 +26,7 @@
*/
#include <common.h>
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -71,3 +72,14 @@ int dram_init (void)
return 0;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/cm-bf533/cm-bf533.c b/board/cm-bf533/cm-bf533.c
index 7eb761d..6598e27 100644
--- a/board/cm-bf533/cm-bf533.c
+++ b/board/cm-bf533/cm-bf533.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -23,3 +24,14 @@ phys_size_t initdram(int board_type)
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/cm-bf561/cm-bf561.c b/board/cm-bf561/cm-bf561.c
index 5bce9eb..b204d7c 100644
--- a/board/cm-bf561/cm-bf561.c
+++ b/board/cm-bf561/cm-bf561.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -23,3 +24,14 @@ phys_size_t initdram(int board_type)
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/cradle/cradle.c b/board/cradle/cradle.c
index 6d8d555..21eb655 100644
--- a/board/cradle/cradle.c
+++ b/board/cradle/cradle.c
@@ -27,6 +27,7 @@
#include <asm/arch/pxa-regs.h>
#include <common.h>
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -223,3 +224,14 @@ dram_init (void)
PHYS_SDRAM_3_SIZE +
PHYS_SDRAM_4_SIZE );
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/delta/delta.c b/board/delta/delta.c
index 84ff47e..a294213 100644
--- a/board/delta/delta.c
+++ b/board/delta/delta.c
@@ -22,6 +22,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <i2c.h>
#include <da9030.h>
#include <malloc.h>
@@ -363,3 +364,14 @@ void hw_watchdog_reset(void)
i2c_reg_write(addr, SYS_CONTROL_A, val);
}
#endif
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/dnp1110/dnp1110.c b/board/dnp1110/dnp1110.c
index ab8e7be..c215f5f 100644
--- a/board/dnp1110/dnp1110.c
+++ b/board/dnp1110/dnp1110.c
@@ -23,6 +23,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <SA-1100.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -53,3 +54,14 @@ int dram_init (void)
return (0);
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c
index 105a747..7fe85b8 100644
--- a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c
+++ b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c
@@ -19,6 +19,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <config.h>
#include <asm/leon.h>
@@ -37,3 +38,14 @@ int misc_init_r(void)
{
return 0;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/gaisler/gr_ep2s60/gr_ep2s60.c b/board/gaisler/gr_ep2s60/gr_ep2s60.c
index 2904d32..7241c6d 100644
--- a/board/gaisler/gr_ep2s60/gr_ep2s60.c
+++ b/board/gaisler/gr_ep2s60/gr_ep2s60.c
@@ -19,6 +19,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <config.h>
#include <asm/leon.h>
@@ -37,3 +38,14 @@ int misc_init_r(void)
{
return 0;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/innokom/innokom.c b/board/innokom/innokom.c
index c2b88ae..3412f10 100644
--- a/board/innokom/innokom.c
+++ b/board/innokom/innokom.c
@@ -24,6 +24,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <asm/arch/pxa-regs.h>
#include <asm/mach-types.h>
@@ -182,3 +183,14 @@ void show_boot_progress (int status)
return;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/logodl/logodl.c b/board/logodl/logodl.c
index c57210a..2562ecc 100644
--- a/board/logodl/logodl.c
+++ b/board/logodl/logodl.c
@@ -23,6 +23,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <asm/arch/pxa-regs.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -120,3 +121,14 @@ void show_boot_progress (int status)
return;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/lpd7a40x/lpd7a40x.c b/board/lpd7a40x/lpd7a40x.c
index 7edb65e..437dad0 100644
--- a/board/lpd7a40x/lpd7a40x.c
+++ b/board/lpd7a40x/lpd7a40x.c
@@ -26,6 +26,7 @@
*/
#include <common.h>
+#include <netdev.h>
#if defined(CONFIG_LH7A400)
#include <lh7a400.h>
#elif defined(CONFIG_LH7A404)
@@ -79,3 +80,14 @@ int dram_init (void)
return 0;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/ms7722se/ms7722se.c b/board/ms7722se/ms7722se.c
index 32234d3..4e40b17 100644
--- a/board/ms7722se/ms7722se.c
+++ b/board/ms7722se/ms7722se.c
@@ -24,6 +24,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <asm/io.h>
#include <asm/processor.h>
@@ -57,3 +58,14 @@ void led_set_state(unsigned short value)
{
writew(value & 0xFF, LED_BASE);
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/netstar/eeprom.c b/board/netstar/eeprom.c
index 5806128..1366457 100644
--- a/board/netstar/eeprom.c
+++ b/board/netstar/eeprom.c
@@ -27,43 +27,42 @@
#include <common.h>
#include <exports.h>
#include <timestamp.h>
+#include <net.h>
#include "../drivers/net/smc91111.h"
-#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
-
-static u16 read_eeprom_reg(u16 reg)
+static u16 read_eeprom_reg(struct eth_device *dev, u16 reg)
{
int timeout;
- SMC_SELECT_BANK(2);
- SMC_outw(reg, PTR_REG);
+ SMC_SELECT_BANK(dev, 2);
+ SMC_outw(dev, reg, PTR_REG);
- SMC_SELECT_BANK(1);
- SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD,
+ SMC_SELECT_BANK(dev, 1);
+ SMC_outw(dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD,
CTL_REG);
timeout = 100;
- while((SMC_inw (CTL_REG) & CTL_RELOAD) && --timeout)
+ while((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --timeout)
udelay(100);
if (timeout == 0) {
printf("Timeout Reading EEPROM register %02x\n", reg);
return 0;
}
- return SMC_inw (GP_REG);
+ return SMC_inw (dev, GP_REG);
}
-static int write_eeprom_reg(u16 value, u16 reg)
+static int write_eeprom_reg(struct eth_device *dev, u16 value, u16 reg)
{
int timeout;
- SMC_SELECT_BANK(2);
- SMC_outw(reg, PTR_REG);
+ SMC_SELECT_BANK(dev, 2);
+ SMC_outw(dev, reg, PTR_REG);
- SMC_SELECT_BANK(1);
- SMC_outw(value, GP_REG);
- SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG);
+ SMC_SELECT_BANK(dev, 1);
+ SMC_outw(dev, value, GP_REG);
+ SMC_outw(dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG);
timeout = 100;
- while ((SMC_inw(CTL_REG) & CTL_STORE) && --timeout)
+ while ((SMC_inw(dev, CTL_REG) & CTL_STORE) && --timeout)
udelay (100);
if (timeout == 0) {
printf("Timeout Writing EEPROM register %02x\n", reg);
@@ -73,17 +72,17 @@ static int write_eeprom_reg(u16 value, u16 reg)
return 1;
}
-static int write_data(u16 *buf, int len)
+static int write_data(struct eth_device *dev, u16 *buf, int len)
{
u16 reg = 0x23;
while (len--)
- write_eeprom_reg(*buf++, reg++);
+ write_eeprom_reg(dev, *buf++, reg++);
return 0;
}
-static int verify_macaddr(char *s)
+static int verify_macaddr(struct eth_device *dev, char *s)
{
u16 reg;
int i, err = 0;
@@ -91,7 +90,7 @@ static int verify_macaddr(char *s)
printf("MAC Address: ");
err = i = 0;
for (i = 0; i < 3; i++) {
- reg = read_eeprom_reg(0x20 + i);
+ reg = read_eeprom_reg(dev, 0x20 + i);
printf("%02x:%02x%c", reg & 0xff, reg >> 8, i != 2 ? ':' : '\n');
if (s)
err |= reg != ((u16 *)s)[i];
@@ -100,7 +99,7 @@ static int verify_macaddr(char *s)
return err ? 0 : 1;
}
-static int set_mac(char *s)
+static int set_mac(struct eth_device *dev, char *s)
{
int i;
char *e, eaddr[6];
@@ -112,7 +111,7 @@ static int set_mac(char *s)
}
for (i = 0; i < 3; i++)
- write_eeprom_reg(*(((u16 *)eaddr) + i), 0x20 + i);
+ write_eeprom_reg(dev, *(((u16 *)eaddr) + i), 0x20 + i);
return 0;
}
@@ -150,6 +149,10 @@ int eeprom(int argc, char *argv[])
int i, len, ret;
unsigned char buf[58], *p;
+ struct eth_device dev = {
+ .iobase = CONFIG_SMC91111_BASE
+ };
+
app_startup(argv);
if (get_version() != XF_VERSION) {
printf("Wrong XF_VERSION.\n");
@@ -160,14 +163,14 @@ int eeprom(int argc, char *argv[])
return crcek();
- if ((SMC_inw (BANK_SELECT) & 0xFF00) != 0x3300) {
+ if ((SMC_inw (&dev, BANK_SELECT) & 0xFF00) != 0x3300) {
printf("SMSC91111 not found.\n");
return 2;
}
/* Called without parameters - print MAC address */
if (argc < 2) {
- verify_macaddr(NULL);
+ verify_macaddr(&dev, NULL);
return 0;
}
@@ -201,8 +204,8 @@ int eeprom(int argc, char *argv[])
}
/* First argument (MAC) is mandatory */
- set_mac(argv[1]);
- if (verify_macaddr(argv[1])) {
+ set_mac(&dev, argv[1]);
+ if (verify_macaddr(&dev, argv[1])) {
printf("*** MAC address does not match! ***\n");
return 4;
}
@@ -210,7 +213,7 @@ int eeprom(int argc, char *argv[])
while (len--)
*p++ = 0;
- write_data((u16 *)buf, sizeof(buf) >> 1);
+ write_data(&dev, (u16 *)buf, sizeof(buf) >> 1);
return 0;
}
diff --git a/board/netstar/netstar.c b/board/netstar/netstar.c
index ffd60bf..df1704b 100644
--- a/board/netstar/netstar.c
+++ b/board/netstar/netstar.c
@@ -21,6 +21,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <i2c.h>
#include <flash.h>
#include <nand.h>
@@ -115,3 +116,14 @@ int board_nand_init(struct nand_chip *nand)
return 0;
}
#endif
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/psyent/pk1c20/pk1c20.c b/board/psyent/pk1c20/pk1c20.c
index 95b48bc..0a24866 100644
--- a/board/psyent/pk1c20/pk1c20.c
+++ b/board/psyent/pk1c20/pk1c20.c
@@ -22,6 +22,7 @@
*/
#include <common.h>
+#include <netdev.h>
int board_early_init_f (void)
{
@@ -38,3 +39,14 @@ phys_size_t initdram (int board_type)
{
return (0);
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/pxa255_idp/pxa_idp.c b/board/pxa255_idp/pxa_idp.c
index e9e479c..05e30ec 100644
--- a/board/pxa255_idp/pxa_idp.c
+++ b/board/pxa255_idp/pxa_idp.c
@@ -31,6 +31,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <command.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -133,3 +134,14 @@ U_BOOT_CMD(idpcmd, CONFIG_SYS_MAXARGS, 0, do_idpcmd,
);
#endif
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/renesas/MigoR/migo_r.c b/board/renesas/MigoR/migo_r.c
index 204ca78..c0f26ac 100644
--- a/board/renesas/MigoR/migo_r.c
+++ b/board/renesas/MigoR/migo_r.c
@@ -24,6 +24,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <asm/io.h>
#include <asm/processor.h>
@@ -51,3 +52,14 @@ int dram_init (void)
void led_set_state (unsigned short value)
{
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/st/nhk8815/nhk8815.c b/board/st/nhk8815/nhk8815.c
index 085a5e0..c5b8c19 100644
--- a/board/st/nhk8815/nhk8815.c
+++ b/board/st/nhk8815/nhk8815.c
@@ -26,6 +26,7 @@
*/
#include <common.h>
+#include <netdev.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -77,3 +78,14 @@ int dram_init(void)
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
return 0;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/voiceblue/eeprom.c b/board/voiceblue/eeprom.c
index f01597a..2ae46d1 100644
--- a/board/voiceblue/eeprom.c
+++ b/board/voiceblue/eeprom.c
@@ -27,43 +27,42 @@
#include <common.h>
#include <exports.h>
#include <timestamp.h>
+#include <net.h>
#include "../drivers/net/smc91111.h"
-#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
-
-static u16 read_eeprom_reg(u16 reg)
+static u16 read_eeprom_reg(struct eth_device *dev, u16 reg)
{
int timeout;
- SMC_SELECT_BANK(2);
- SMC_outw(reg, PTR_REG);
+ SMC_SELECT_BANK(dev, 2);
+ SMC_outw(dev, reg, PTR_REG);
- SMC_SELECT_BANK(1);
- SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD,
+ SMC_SELECT_BANK(dev, 1);
+ SMC_outw(dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD,
CTL_REG);
timeout = 100;
- while((SMC_inw (CTL_REG) & CTL_RELOAD) && --timeout)
+ while((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --timeout)
udelay(100);
if (timeout == 0) {
printf("Timeout Reading EEPROM register %02x\n", reg);
return 0;
}
- return SMC_inw (GP_REG);
+ return SMC_inw (dev, GP_REG);
}
-static int write_eeprom_reg(u16 value, u16 reg)
+static int write_eeprom_reg(struct eth_device *dev, u16 value, u16 reg)
{
int timeout;
- SMC_SELECT_BANK(2);
- SMC_outw(reg, PTR_REG);
+ SMC_SELECT_BANK(dev, 2);
+ SMC_outw(dev, reg, PTR_REG);
- SMC_SELECT_BANK(1);
- SMC_outw(value, GP_REG);
- SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG);
+ SMC_SELECT_BANK(dev, 1);
+ SMC_outw(dev, value, GP_REG);
+ SMC_outw(dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG);
timeout = 100;
- while ((SMC_inw(CTL_REG) & CTL_STORE) && --timeout)
+ while ((SMC_inw(dev, CTL_REG) & CTL_STORE) && --timeout)
udelay (100);
if (timeout == 0) {
printf("Timeout Writing EEPROM register %02x\n", reg);
@@ -73,17 +72,17 @@ static int write_eeprom_reg(u16 value, u16 reg)
return 1;
}
-static int write_data(u16 *buf, int len)
+static int write_data(struct eth_device *dev, u16 *buf, int len)
{
u16 reg = 0x23;
while (len--)
- write_eeprom_reg(*buf++, reg++);
+ write_eeprom_reg(dev, *buf++, reg++);
return 0;
}
-static int verify_macaddr(char *s)
+static int verify_macaddr(struct eth_device *dev, char *s)
{
u16 reg;
int i, err = 0;
@@ -91,7 +90,7 @@ static int verify_macaddr(char *s)
printf("MAC Address: ");
err = i = 0;
for (i = 0; i < 3; i++) {
- reg = read_eeprom_reg(0x20 + i);
+ reg = read_eeprom_reg(dev, 0x20 + i);
printf("%02x:%02x%c", reg & 0xff, reg >> 8, i != 2 ? ':' : '\n');
if (s)
err |= reg != ((u16 *)s)[i];
@@ -100,7 +99,7 @@ static int verify_macaddr(char *s)
return err ? 0 : 1;
}
-static int set_mac(char *s)
+static int set_mac(struct eth_device *dev, char *s)
{
int i;
char *e, eaddr[6];
@@ -112,7 +111,7 @@ static int set_mac(char *s)
}
for (i = 0; i < 3; i++)
- write_eeprom_reg(*(((u16 *)eaddr) + i), 0x20 + i);
+ write_eeprom_reg(dev, *(((u16 *)eaddr) + i), 0x20 + i);
return 0;
}
@@ -148,6 +147,10 @@ int eeprom(int argc, char *argv[])
int i, len, ret;
unsigned char buf[58], *p;
+ struct eth_device dev = {
+ .iobase = CONFIG_SMC91111_BASE
+ };
+
app_startup(argv);
if (get_version() != XF_VERSION) {
printf("Wrong XF_VERSION.\n");
@@ -156,14 +159,14 @@ int eeprom(int argc, char *argv[])
return 1;
}
- if ((SMC_inw (BANK_SELECT) & 0xFF00) != 0x3300) {
+ if ((SMC_inw (&dev, BANK_SELECT) & 0xFF00) != 0x3300) {
printf("SMSC91111 not found.\n");
return 2;
}
/* Called without parameters - print MAC address */
if (argc < 2) {
- verify_macaddr(NULL);
+ verify_macaddr(&dev, NULL);
return 0;
}
@@ -197,8 +200,8 @@ int eeprom(int argc, char *argv[])
}
/* First argument (MAC) is mandatory */
- set_mac(argv[1]);
- if (verify_macaddr(argv[1])) {
+ set_mac(&dev, argv[1]);
+ if (verify_macaddr(&dev, argv[1])) {
printf("*** MAC address does not match! ***\n");
return 4;
}
@@ -206,7 +209,7 @@ int eeprom(int argc, char *argv[])
while (len--)
*p++ = 0;
- write_data((u16 *)buf, sizeof(buf) >> 1);
+ write_data(&dev, (u16 *)buf, sizeof(buf) >> 1);
return 0;
}
diff --git a/board/voiceblue/voiceblue.c b/board/voiceblue/voiceblue.c
index 59b3310..5f8af2b 100644
--- a/board/voiceblue/voiceblue.c
+++ b/board/voiceblue/voiceblue.c
@@ -20,6 +20,7 @@
*/
#include <common.h>
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -66,3 +67,14 @@ int board_late_init(void)
return 0;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/xaeniax/xaeniax.c b/board/xaeniax/xaeniax.c
index 9baa457..4c19c4d 100644
--- a/board/xaeniax/xaeniax.c
+++ b/board/xaeniax/xaeniax.c
@@ -29,6 +29,7 @@
*/
#include <common.h>
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -71,3 +72,14 @@ int dram_init (void)
return 0;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/xm250/xm250.c b/board/xm250/xm250.c
index 56b1cd4..246bdde 100644
--- a/board/xm250/xm250.c
+++ b/board/xm250/xm250.c
@@ -27,6 +27,7 @@
#include <asm/arch/pxa-regs.h>
#include <common.h>
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -80,3 +81,14 @@ dram_init (void)
return (0);
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/xsengine/xsengine.c b/board/xsengine/xsengine.c
index 65923e9..4464fd4 100644
--- a/board/xsengine/xsengine.c
+++ b/board/xsengine/xsengine.c
@@ -26,6 +26,7 @@
*/
#include <common.h>
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -61,3 +62,14 @@ int dram_init (void)
return 0;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/board/zylonite/zylonite.c b/board/zylonite/zylonite.c
index 5829170..749a40f 100644
--- a/board/zylonite/zylonite.c
+++ b/board/zylonite/zylonite.c
@@ -26,6 +26,7 @@
*/
#include <common.h>
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -68,3 +69,14 @@ int dram_init (void)
return 0;
}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 34b56d8..2df075c 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -63,7 +63,7 @@ COBJS-$(CONFIG_RTL8139) += rtl8139.o
COBJS-$(CONFIG_RTL8169) += rtl8169.o
COBJS-$(CONFIG_DRIVER_S3C4510_ETH) += s3c4510b_eth.o
COBJS-$(CONFIG_SH_ETHER) += sh_eth.o
-COBJS-$(CONFIG_DRIVER_SMC91111) += smc91111.o
+COBJS-$(CONFIG_SMC91111) += smc91111.o
COBJS-$(CONFIG_SMC911X) += smc911x.o
COBJS-$(CONFIG_TIGON3) += tigon3.o bcm570x_autoneg.o 5701rls.o
COBJS-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o
diff --git a/drivers/net/smc91111.c b/drivers/net/smc91111.c
index b41e4d2..5974c4d 100644
--- a/drivers/net/smc91111.c
+++ b/drivers/net/smc91111.c
@@ -62,6 +62,7 @@
#include <common.h>
#include <command.h>
#include <config.h>
+#include <malloc.h>
#include "smc91111.h"
#include <net.h>
@@ -128,11 +129,10 @@ static const char version[] =
#define LAN91C111_MEMORY_MULTIPLIER (1024*2)
#ifndef CONFIG_SMC91111_BASE
-#define CONFIG_SMC91111_BASE 0x20000300
+#error "SMC91111 Base address must be passed to initialization funciton"
+/* #define CONFIG_SMC91111_BASE 0x20000300 */
#endif
-#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
-
#define SMC_DEV_NAME "SMC91111"
#define SMC_PHY_ADDR 0x0000
#define SMC_ALLOC_MAX_TRY 5
@@ -153,65 +153,26 @@ static const char version[] =
.
.------------------------------------------------------------------ */
-extern int eth_init(bd_t *bd);
-extern void eth_halt(void);
-extern int eth_rx(void);
-extern int eth_send(volatile void *packet, int length);
-
#ifdef SHARED_RESOURCES
extern void swap_to(int device_id);
#endif
/*
- . This is called by register_netdev(). It is responsible for
- . checking the portlist for the SMC9000 series chipset. If it finds
- . one, then it will initialize the device, find the hardware information,
- . and sets up the appropriate device parameters.
- . NOTE: Interrupts are *OFF* when this procedure is called.
- .
- . NB:This shouldn't be static since it is referred to externally.
-*/
-int smc_init(void);
-
-/*
. This is called by unregister_netdev(). It is responsible for
. cleaning up before the driver is finally unregistered and discarded.
*/
void smc_destructor(void);
-/*
- . The kernel calls this function when someone wants to use the device,
- . typically 'ifconfig ethX up'.
-*/
-static int smc_open(bd_t *bd);
-
-
-/*
- . This is called by the kernel in response to 'ifconfig ethX down'. It
- . is responsible for cleaning up everything that the open routine
- . does, and maybe putting the card into a powerdown state.
-*/
-static int smc_close(void);
-
-/*
- . Configures the PHY through the MII Management interface
-*/
#ifndef CONFIG_SMC91111_EXT_PHY
-static void smc_phy_configure(void);
+static void smc_phy_configure(struct eth_device *dev);
#endif /* !CONFIG_SMC91111_EXT_PHY */
-/*
- . This is a separate procedure to handle the receipt of a packet, to
- . leave the interrupt code looking slightly cleaner
-*/
-static int smc_rcv(void);
-
-/* See if a MAC address is defined in the current environment. If so use it. If not
- . print a warning and set the environment and other globals with the default.
- . If an EEPROM is present it really should be consulted.
-*/
-int smc_get_ethaddr(bd_t *bd);
-int get_rom_mac(uchar *v_rom_mac);
+/* See if a MAC address is defined in the current environment. If so use it.
+ * If not, print a warning and set the environment and other globals with the
+ * default. If an EEPROM is present it really should be consulted.
+ */
+static int smc_get_ethaddr(struct eth_device *dev);
+static int get_rom_mac(struct eth_device *dev, uchar *v_rom_mac);
/*
------------------------------------------------------------
@@ -233,65 +194,63 @@ int get_rom_mac(uchar *v_rom_mac);
* packets being corrupt (shifted) on the wire, etc. Switching to the
* inx,outx functions fixed this problem.
*/
-static inline word SMC_inw(dword offset);
-static inline void SMC_outw(word value, dword offset);
-static inline byte SMC_inb(dword offset);
-static inline void SMC_outb(byte value, dword offset);
-static inline void SMC_insw(dword offset, volatile uchar* buf, dword len);
-static inline void SMC_outsw(dword offset, uchar* buf, dword len);
#define barrier() __asm__ __volatile__("": : :"memory")
-static inline word SMC_inw(dword offset)
+static inline word SMC_inw(struct eth_device *dev, dword offset)
{
word v;
- v = *((volatile word*)(SMC_BASE_ADDRESS+offset));
+ v = *((volatile word*)(dev->iobase + offset));
barrier(); *(volatile u32*)(0xc0000000);
return v;
}
-static inline void SMC_outw(word value, dword offset)
+static inline void SMC_outw(struct eth_device *dev, word value, dword offset)
{
- *((volatile word*)(SMC_BASE_ADDRESS+offset)) = value;
+ *((volatile word*)(dev->iobase + offset)) = value;
barrier(); *(volatile u32*)(0xc0000000);
}
-static inline byte SMC_inb(dword offset)
+static inline byte SMC_inb(struct eth_device *dev, dword offset)
{
word _w;
- _w = SMC_inw(offset & ~((dword)1));
+ _w = SMC_inw(dev, offset & ~((dword)1));
return (offset & 1) ? (byte)(_w >> 8) : (byte)(_w);
}
-static inline void SMC_outb(byte value, dword offset)
+static inline void SMC_outb(struct eth_device *dev, byte value, dword offset)
{
word _w;
- _w = SMC_inw(offset & ~((dword)1));
+ _w = SMC_inw(dev, offset & ~((dword)1));
if (offset & 1)
- *((volatile word*)(SMC_BASE_ADDRESS+(offset & ~((dword)1)))) = (value<<8) | (_w & 0x00ff);
+ *((volatile word*)(dev->iobase + (offset & ~((dword)1)))) =
+ (value<<8) | (_w & 0x00ff);
else
- *((volatile word*)(SMC_BASE_ADDRESS+offset)) = value | (_w & 0xff00);
+ *((volatile word*)(dev->iobase + offset)) =
+ value | (_w & 0xff00);
}
-static inline void SMC_insw(dword offset, volatile uchar* buf, dword len)
+static inline void SMC_insw(struct eth_device *dev, dword offset,
+ volatile uchar* buf, dword len)
{
volatile word *p = (volatile word *)buf;
while (len-- > 0) {
- *p++ = SMC_inw(offset);
+ *p++ = SMC_inw(dev, offset);
barrier();
*((volatile u32*)(0xc0000000));
}
}
-static inline void SMC_outsw(dword offset, uchar* buf, dword len)
+static inline void SMC_outsw(struct eth_device *dev, dword offset,
+ uchar* buf, dword len)
{
volatile word *p = (volatile word *)buf;
while (len-- > 0) {
- SMC_outw(*p++, offset);
+ SMC_outw(dev, *p++, offset);
barrier();
*(volatile u32*)(0xc0000000);
}
@@ -339,18 +298,18 @@ void smc_get_macaddr( byte *addr ) {
/***********************************************
* Show available memory *
***********************************************/
-void dump_memory_info(void)
+void dump_memory_info(struct eth_device *dev)
{
word mem_info;
word old_bank;
- old_bank = SMC_inw(BANK_SELECT)&0xF;
+ old_bank = SMC_inw(dev, BANK_SELECT)&0xF;
- SMC_SELECT_BANK(0);
- mem_info = SMC_inw( MIR_REG );
+ SMC_SELECT_BANK(dev, 0);
+ mem_info = SMC_inw( dev, MIR_REG );
PRINTK2("Memory: %4d available\n", (mem_info >> 8)*2048);
- SMC_SELECT_BANK(old_bank);
+ SMC_SELECT_BANK(dev, old_bank);
}
/*
. A rather simple routine to print out a packet for debugging purposes.
@@ -361,35 +320,15 @@ static void print_packet( byte *, int );
#define tx_done(dev) 1
-
-/* this does a soft reset on the device */
-static void smc_reset( void );
-
-/* Enable Interrupts, Receive, and Transmit */
-static void smc_enable( void );
-
-/* this puts the device in an inactive state */
-static void smc_shutdown( void );
-
-/* Routines to Read and Write the PHY Registers across the
- MII Management Interface
-*/
-
-#ifndef CONFIG_SMC91111_EXT_PHY
-static word smc_read_phy_register(byte phyreg);
-static void smc_write_phy_register(byte phyreg, word phydata);
-#endif /* !CONFIG_SMC91111_EXT_PHY */
-
-
-static int poll4int (byte mask, int timeout)
+static int poll4int (struct eth_device *dev, byte mask, int timeout)
{
int tmo = get_timer (0) + timeout * CONFIG_SYS_HZ;
int is_timeout = 0;
- word old_bank = SMC_inw (BSR_REG);
+ word old_bank = SMC_inw (dev, BSR_REG);
PRINTK2 ("Polling...\n");
- SMC_SELECT_BANK (2);
- while ((SMC_inw (SMC91111_INT_REG) & mask) == 0) {
+ SMC_SELECT_BANK (dev, 2);
+ while ((SMC_inw (dev, SMC91111_INT_REG) & mask) == 0) {
if (get_timer (0) >= tmo) {
is_timeout = 1;
break;
@@ -397,7 +336,7 @@ static int poll4int (byte mask, int timeout)
}
/* restore old bank selection */
- SMC_SELECT_BANK (old_bank);
+ SMC_SELECT_BANK (dev, old_bank);
if (is_timeout)
return 1;
@@ -406,12 +345,12 @@ static int poll4int (byte mask, int timeout)
}
/* Only one release command at a time, please */
-static inline void smc_wait_mmu_release_complete (void)
+static inline void smc_wait_mmu_release_complete (struct eth_device *dev)
{
int count = 0;
/* assume bank 2 selected */
- while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
+ while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) {
udelay (1); /* Wait until not busy */
if (++count > 200)
break;
@@ -435,49 +374,50 @@ static inline void smc_wait_mmu_release_complete (void)
. 5. clear all interrupts
.
*/
-static void smc_reset (void)
+static void smc_reset (struct eth_device *dev)
{
PRINTK2 ("%s: smc_reset\n", SMC_DEV_NAME);
/* This resets the registers mostly to defaults, but doesn't
affect EEPROM. That seems unnecessary */
- SMC_SELECT_BANK (0);
- SMC_outw (RCR_SOFTRST, RCR_REG);
+ SMC_SELECT_BANK (dev, 0);
+ SMC_outw (dev, RCR_SOFTRST, RCR_REG);
/* Setup the Configuration Register */
/* This is necessary because the CONFIG_REG is not affected */
/* by a soft reset */
- SMC_SELECT_BANK (1);
+ SMC_SELECT_BANK (dev, 1);
#if defined(CONFIG_SMC91111_EXT_PHY)
- SMC_outw (CONFIG_DEFAULT | CONFIG_EXT_PHY, CONFIG_REG);
+ SMC_outw (dev, CONFIG_DEFAULT | CONFIG_EXT_PHY, CONFIG_REG);
#else
- SMC_outw (CONFIG_DEFAULT, CONFIG_REG);
+ SMC_outw (dev, CONFIG_DEFAULT, CONFIG_REG);
#endif
/* Release from possible power-down state */
/* Configuration register is not affected by Soft Reset */
- SMC_outw (SMC_inw (CONFIG_REG) | CONFIG_EPH_POWER_EN, CONFIG_REG);
+ SMC_outw (dev, SMC_inw (dev, CONFIG_REG) | CONFIG_EPH_POWER_EN,
+ CONFIG_REG);
- SMC_SELECT_BANK (0);
+ SMC_SELECT_BANK (dev, 0);
/* this should pause enough for the chip to be happy */
udelay (10);
/* Disable transmit and receive functionality */
- SMC_outw (RCR_CLEAR, RCR_REG);
- SMC_outw (TCR_CLEAR, TCR_REG);
+ SMC_outw (dev, RCR_CLEAR, RCR_REG);
+ SMC_outw (dev, TCR_CLEAR, TCR_REG);
/* set the control register */
- SMC_SELECT_BANK (1);
- SMC_outw (CTL_DEFAULT, CTL_REG);
+ SMC_SELECT_BANK (dev, 1);
+ SMC_outw (dev, CTL_DEFAULT, CTL_REG);
/* Reset the MMU */
- SMC_SELECT_BANK (2);
- smc_wait_mmu_release_complete ();
- SMC_outw (MC_RESET, MMU_CMD_REG);
- while (SMC_inw (MMU_CMD_REG) & MC_BUSY)
+ SMC_SELECT_BANK (dev, 2);
+ smc_wait_mmu_release_complete (dev);
+ SMC_outw (dev, MC_RESET, MMU_CMD_REG);
+ while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY)
udelay (1); /* Wait until not busy */
/* Note: It doesn't seem that waiting for the MMU busy is needed here,
@@ -485,7 +425,7 @@ static void smc_reset (void)
of issuing another MMU command right after this */
/* Disable all interrupts */
- SMC_outb (0, IM_REG);
+ SMC_outb (dev, 0, IM_REG);
}
/*
@@ -496,13 +436,13 @@ static void smc_reset (void)
. 2. Enable the receiver
. 3. Enable interrupts
*/
-static void smc_enable()
+static void smc_enable(struct eth_device *dev)
{
PRINTK2("%s: smc_enable\n", SMC_DEV_NAME);
- SMC_SELECT_BANK( 0 );
+ SMC_SELECT_BANK( dev, 0 );
/* see the header file for options in TCR/RCR DEFAULT*/
- SMC_outw( TCR_DEFAULT, TCR_REG );
- SMC_outw( RCR_DEFAULT, RCR_REG );
+ SMC_outw( dev, TCR_DEFAULT, TCR_REG );
+ SMC_outw( dev, RCR_DEFAULT, RCR_REG );
/* clear MII_DIS */
/* smc_write_phy_register(PHY_CNTL_REG, 0x0000); */
@@ -522,18 +462,18 @@ static void smc_enable()
. the manual says that it will wake up in response to any I/O requests
. in the register space. Empirical results do not show this working.
*/
-static void smc_shutdown()
+static void smc_shutdown(struct eth_device *dev)
{
PRINTK2(CARDNAME ": smc_shutdown\n");
/* no more interrupts for me */
- SMC_SELECT_BANK( 2 );
- SMC_outb( 0, IM_REG );
+ SMC_SELECT_BANK( dev, 2 );
+ SMC_outb( dev, 0, IM_REG );
/* and tell the card to stay away from that nasty outside world */
- SMC_SELECT_BANK( 0 );
- SMC_outb( RCR_CLEAR, RCR_REG );
- SMC_outb( TCR_CLEAR, TCR_REG );
+ SMC_SELECT_BANK( dev, 0 );
+ SMC_outb( dev, RCR_CLEAR, RCR_REG );
+ SMC_outb( dev, TCR_CLEAR, TCR_REG );
#ifdef SHARED_RESOURCES
swap_to(FLASH);
#endif
@@ -558,10 +498,10 @@ static void smc_shutdown()
. Enable the transmit interrupt, so I know if it failed
. Free the kernel data if I actually sent it.
*/
-static int smc_send_packet (volatile void *packet, int packet_length)
+static int smc_send_packet (struct eth_device *dev, volatile void *packet,
+ int packet_length)
{
byte packet_no;
- unsigned long ioaddr;
byte *buf;
int length;
int numPages;
@@ -572,9 +512,9 @@ static int smc_send_packet (volatile void *packet, int packet_length)
word saved_ptr;
/* save PTR and PNR registers before manipulation */
- SMC_SELECT_BANK (2);
- saved_pnr = SMC_inb( PN_REG );
- saved_ptr = SMC_inw( PTR_REG );
+ SMC_SELECT_BANK (dev, 2);
+ saved_pnr = SMC_inb( dev, PN_REG );
+ saved_ptr = SMC_inw( dev, PTR_REG );
PRINTK3 ("%s: smc_hardware_send_packet\n", SMC_DEV_NAME);
@@ -601,8 +541,8 @@ static int smc_send_packet (volatile void *packet, int packet_length)
}
/* now, try to allocate the memory */
- SMC_SELECT_BANK (2);
- SMC_outw (MC_ALLOC | numPages, MMU_CMD_REG);
+ SMC_SELECT_BANK (dev, 2);
+ SMC_outw (dev, MC_ALLOC | numPages, MMU_CMD_REG);
/* FIXME: the ALLOC_INT bit never gets set *
* so the following will always give a *
@@ -615,10 +555,10 @@ again:
try++;
time_out = MEMORY_WAIT_TIME;
do {
- status = SMC_inb (SMC91111_INT_REG);
+ status = SMC_inb (dev, SMC91111_INT_REG);
if (status & IM_ALLOC_INT) {
/* acknowledge the interrupt */
- SMC_outb (IM_ALLOC_INT, SMC91111_INT_REG);
+ SMC_outb (dev, IM_ALLOC_INT, SMC91111_INT_REG);
break;
}
} while (--time_out);
@@ -635,14 +575,10 @@ again:
PRINTK2 ("%s: memory allocation, try %d succeeded ...\n",
SMC_DEV_NAME, try);
- /* I can send the packet now.. */
-
- ioaddr = SMC_BASE_ADDRESS;
-
buf = (byte *) packet;
/* If I get here, I _know_ there is a packet slot waiting for me */
- packet_no = SMC_inb (AR_REG);
+ packet_no = SMC_inb (dev, AR_REG);
if (packet_no & AR_FAILED) {
/* or isn't there? BAD CHIP! */
printf ("%s: Memory allocation failed. \n", SMC_DEV_NAME);
@@ -651,20 +587,20 @@ again:
/* we have a packet address, so tell the card to use it */
#ifndef CONFIG_XAENIAX
- SMC_outb (packet_no, PN_REG);
+ SMC_outb (dev, packet_no, PN_REG);
#else
/* On Xaeniax board, we can't use SMC_outb here because that way
* the Allocate MMU command will end up written to the command register
* as well, which will lead to a problem.
*/
- SMC_outl (packet_no << 16, 0);
+ SMC_outl (dev, packet_no << 16, 0);
#endif
/* do not write new ptr value if Write data fifo not empty */
while ( saved_ptr & PTR_NOTEMPTY )
printf ("Write data fifo not empty!\n");
/* point to the beginning of the packet */
- SMC_outw (PTR_AUTOINC, PTR_REG);
+ SMC_outw (dev, PTR_AUTOINC, PTR_REG);
PRINTK3 ("%s: Trying to xmit packet of length %x\n",
SMC_DEV_NAME, length);
@@ -677,11 +613,11 @@ again:
/* send the packet length ( +6 for status, length and ctl byte )
and the status word ( set to zeros ) */
#ifdef USE_32_BIT
- SMC_outl ((length + 6) << 16, SMC91111_DATA_REG);
+ SMC_outl (dev, (length + 6) << 16, SMC91111_DATA_REG);
#else
- SMC_outw (0, SMC91111_DATA_REG);
+ SMC_outw (dev, 0, SMC91111_DATA_REG);
/* send the packet length ( +6 for status words, length, and ctl */
- SMC_outw ((length + 6), SMC91111_DATA_REG);
+ SMC_outw (dev, (length + 6), SMC91111_DATA_REG);
#endif
/* send the actual data
@@ -692,10 +628,10 @@ again:
. almost as much time as is saved?
*/
#ifdef USE_32_BIT
- SMC_outsl (SMC91111_DATA_REG, buf, length >> 2);
+ SMC_outsl (dev, SMC91111_DATA_REG, buf, length >> 2);
#ifndef CONFIG_XAENIAX
if (length & 0x2)
- SMC_outw (*((word *) (buf + (length & 0xFFFFFFFC))),
+ SMC_outw (dev, *((word *) (buf + (length & 0xFFFFFFFC))),
SMC91111_DATA_REG);
#else
/* On XANEIAX, we can only use 32-bit writes, so we need to handle
@@ -703,48 +639,48 @@ again:
*/
if ((length & 3) == 3) {
u16 * ptr = (u16*) &buf[length-3];
- SMC_outl((*ptr) | ((0x2000 | buf[length-1]) << 16),
+ SMC_outl(dev, (*ptr) | ((0x2000 | buf[length-1]) << 16),
SMC91111_DATA_REG);
} else if ((length & 2) == 2) {
u16 * ptr = (u16*) &buf[length-2];
- SMC_outl(*ptr, SMC91111_DATA_REG);
+ SMC_outl(dev, *ptr, SMC91111_DATA_REG);
} else if (length & 1) {
- SMC_outl((0x2000 | buf[length-1]), SMC91111_DATA_REG);
+ SMC_outl(dev, (0x2000 | buf[length-1]), SMC91111_DATA_REG);
} else {
- SMC_outl(0, SMC91111_DATA_REG);
+ SMC_outl(dev, 0, SMC91111_DATA_REG);
}
#endif
#else
- SMC_outsw (SMC91111_DATA_REG, buf, (length) >> 1);
+ SMC_outsw (dev, SMC91111_DATA_REG, buf, (length) >> 1);
#endif /* USE_32_BIT */
#ifndef CONFIG_XAENIAX
/* Send the last byte, if there is one. */
if ((length & 1) == 0) {
- SMC_outw (0, SMC91111_DATA_REG);
+ SMC_outw (dev, 0, SMC91111_DATA_REG);
} else {
- SMC_outw (buf[length - 1] | 0x2000, SMC91111_DATA_REG);
+ SMC_outw (dev, buf[length - 1] | 0x2000, SMC91111_DATA_REG);
}
#endif
/* and let the chipset deal with it */
- SMC_outw (MC_ENQUEUE, MMU_CMD_REG);
+ SMC_outw (dev, MC_ENQUEUE, MMU_CMD_REG);
/* poll for TX INT */
- /* if (poll4int (IM_TX_INT, SMC_TX_TIMEOUT)) { */
+ /* if (poll4int (dev, IM_TX_INT, SMC_TX_TIMEOUT)) { */
/* poll for TX_EMPTY INT - autorelease enabled */
- if (poll4int(IM_TX_EMPTY_INT, SMC_TX_TIMEOUT)) {
+ if (poll4int(dev, IM_TX_EMPTY_INT, SMC_TX_TIMEOUT)) {
/* sending failed */
PRINTK2 ("%s: TX timeout, sending failed...\n", SMC_DEV_NAME);
/* release packet */
/* no need to release, MMU does that now */
#ifdef CONFIG_XAENIAX
- SMC_outw (MC_FREEPKT, MMU_CMD_REG);
+ SMC_outw (dev, MC_FREEPKT, MMU_CMD_REG);
#endif
/* wait for MMU getting ready (low) */
- while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
+ while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) {
udelay (10);
}
@@ -754,7 +690,7 @@ again:
return 0;
} else {
/* ack. int */
- SMC_outb (IM_TX_EMPTY_INT, SMC91111_INT_REG);
+ SMC_outb (dev, IM_TX_EMPTY_INT, SMC91111_INT_REG);
/* SMC_outb (IM_TX_INT, SMC91111_INT_REG); */
PRINTK2 ("%s: Sent packet of length %d \n", SMC_DEV_NAME,
length);
@@ -762,11 +698,11 @@ again:
/* release packet */
/* no need to release, MMU does that now */
#ifdef CONFIG_XAENIAX
- SMC_outw (MC_FREEPKT, MMU_CMD_REG);
+ SMC_outw (dev, MC_FREEPKT, MMU_CMD_REG);
#endif
/* wait for MMU getting ready (low) */
- while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
+ while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) {
udelay (10);
}
@@ -777,15 +713,15 @@ again:
/* restore previously saved registers */
#ifndef CONFIG_XAENIAX
- SMC_outb( saved_pnr, PN_REG );
+ SMC_outb( dev, saved_pnr, PN_REG );
#else
/* On Xaeniax board, we can't use SMC_outb here because that way
* the Allocate MMU command will end up written to the command register
* as well, which will lead to a problem.
*/
- SMC_outl(saved_pnr << 16, 0);
+ SMC_outl(dev, saved_pnr << 16, 0);
#endif
- SMC_outw( saved_ptr, PTR_REG );
+ SMC_outw( dev, saved_ptr, PTR_REG );
return length;
}
@@ -813,27 +749,28 @@ void smc_destructor()
* Set up everything, reset the card, etc ..
*
*/
-static int smc_open (bd_t * bd)
+static int smc_open (struct eth_device *dev)
{
int i, err;
PRINTK2 ("%s: smc_open\n", SMC_DEV_NAME);
/* reset the hardware */
- smc_reset ();
- smc_enable ();
+ smc_reset (dev);
+ smc_enable (dev);
/* Configure the PHY */
#ifndef CONFIG_SMC91111_EXT_PHY
- smc_phy_configure ();
+ smc_phy_configure (dev);
#endif
/* conservative setting (10Mbps, HalfDuplex, no AutoNeg.) */
-/* SMC_SELECT_BANK(0); */
-/* SMC_outw(0, RPC_REG); */
- SMC_SELECT_BANK (1);
+/* SMC_SELECT_BANK(dev, 0); */
+/* SMC_outw(dev, 0, RPC_REG); */
+ SMC_SELECT_BANK (dev, 1);
- err = smc_get_ethaddr (bd); /* set smc_mac_addr, and sync it with u-boot globals */
+ /* set smc_mac_addr, and sync it with u-boot globals */
+ err = smc_get_ethaddr (dev);
if (err < 0)
return -1;
#ifdef USE_32_BIT
@@ -842,11 +779,11 @@ static int smc_open (bd_t * bd)
address = smc_mac_addr[i + 1] << 8;
address |= smc_mac_addr[i];
- SMC_outw (address, (ADDR0_REG + i));
+ SMC_outw (dev, address, (ADDR0_REG + i));
}
#else
for (i = 0; i < 6; i++)
- SMC_outb (smc_mac_addr[i], (ADDR0_REG + i));
+ SMC_outb (dev, smc_mac_addr[i], (ADDR0_REG + i));
#endif
return 0;
@@ -864,7 +801,7 @@ static int smc_open (bd_t * bd)
. o otherwise, read in the packet
--------------------------------------------------------------
*/
-static int smc_rcv()
+static int smc_rcv(struct eth_device *dev)
{
int packet_number;
word status;
@@ -876,12 +813,12 @@ static int smc_rcv()
byte saved_pnr;
word saved_ptr;
- SMC_SELECT_BANK(2);
+ SMC_SELECT_BANK(dev, 2);
/* save PTR and PTR registers */
- saved_pnr = SMC_inb( PN_REG );
- saved_ptr = SMC_inw( PTR_REG );
+ saved_pnr = SMC_inb( dev, PN_REG );
+ saved_ptr = SMC_inw( dev, PTR_REG );
- packet_number = SMC_inw( RXFIFO_REG );
+ packet_number = SMC_inw( dev, RXFIFO_REG );
if ( packet_number & RXFIFO_REMPTY ) {
@@ -890,16 +827,16 @@ static int smc_rcv()
PRINTK3("%s: smc_rcv\n", SMC_DEV_NAME);
/* start reading from the start of the packet */
- SMC_outw( PTR_READ | PTR_RCV | PTR_AUTOINC, PTR_REG );
+ SMC_outw( dev, PTR_READ | PTR_RCV | PTR_AUTOINC, PTR_REG );
/* First two words are status and packet_length */
#ifdef USE_32_BIT
- stat_len = SMC_inl(SMC91111_DATA_REG);
+ stat_len = SMC_inl(dev, SMC91111_DATA_REG);
status = stat_len & 0xffff;
packet_length = stat_len >> 16;
#else
- status = SMC_inw( SMC91111_DATA_REG );
- packet_length = SMC_inw( SMC91111_DATA_REG );
+ status = SMC_inw( dev, SMC91111_DATA_REG );
+ packet_length = SMC_inw( dev, SMC91111_DATA_REG );
#endif
packet_length &= 0x07ff; /* mask off top bits */
@@ -923,20 +860,23 @@ static int smc_rcv()
to send the DWORDs or the bytes first, or some
mixture. A mixture might improve already slow PIO
performance */
- SMC_insl( SMC91111_DATA_REG , NetRxPackets[0], packet_length >> 2 );
+ SMC_insl( dev, SMC91111_DATA_REG, NetRxPackets[0],
+ packet_length >> 2 );
/* read the left over bytes */
if (packet_length & 3) {
int i;
- byte *tail = (byte *)(NetRxPackets[0] + (packet_length & ~3));
- dword leftover = SMC_inl(SMC91111_DATA_REG);
+ byte *tail = (byte *)(NetRxPackets[0] +
+ (packet_length & ~3));
+ dword leftover = SMC_inl(dev, SMC91111_DATA_REG);
for (i=0; i<(packet_length & 3); i++)
*tail++ = (byte) (leftover >> (8*i)) & 0xff;
}
#else
PRINTK3(" Reading %d words and %d byte(s) \n",
(packet_length >> 1 ), packet_length & 1 );
- SMC_insw(SMC91111_DATA_REG , NetRxPackets[0], packet_length >> 1);
+ SMC_insw(dev, SMC91111_DATA_REG , NetRxPackets[0],
+ packet_length >> 1);
#endif /* USE_32_BIT */
@@ -950,26 +890,26 @@ static int smc_rcv()
is_error = 1;
}
- while ( SMC_inw( MMU_CMD_REG ) & MC_BUSY )
+ while ( SMC_inw( dev, MMU_CMD_REG ) & MC_BUSY )
udelay(1); /* Wait until not busy */
/* error or good, tell the card to get rid of this packet */
- SMC_outw( MC_RELEASE, MMU_CMD_REG );
+ SMC_outw( dev, MC_RELEASE, MMU_CMD_REG );
- while ( SMC_inw( MMU_CMD_REG ) & MC_BUSY )
+ while ( SMC_inw( dev, MMU_CMD_REG ) & MC_BUSY )
udelay(1); /* Wait until not busy */
/* restore saved registers */
#ifndef CONFIG_XAENIAX
- SMC_outb( saved_pnr, PN_REG );
+ SMC_outb( dev, saved_pnr, PN_REG );
#else
/* On Xaeniax board, we can't use SMC_outb here because that way
* the Allocate MMU command will end up written to the command register
* as well, which will lead to a problem.
*/
- SMC_outl( saved_pnr << 16, 0);
+ SMC_outl( dev, saved_pnr << 16, 0);
#endif
- SMC_outw( saved_ptr, PTR_REG );
+ SMC_outw( dev, saved_ptr, PTR_REG );
if (!is_error) {
/* Pass the packet up to the protocol layers. */
@@ -990,12 +930,12 @@ static int smc_rcv()
. an 'ifconfig ethX down'
.
-----------------------------------------------------*/
-static int smc_close()
+static int smc_close(struct eth_device *dev)
{
PRINTK2("%s: smc_close\n", SMC_DEV_NAME);
/* clear everything */
- smc_shutdown();
+ smc_shutdown(dev);
return 0;
}
@@ -1005,20 +945,20 @@ static int smc_close()
/*------------------------------------------------------------
. Modify a bit in the LAN91C111 register set
.-------------------------------------------------------------*/
-static word smc_modify_regbit(int bank, int ioaddr, int reg,
+static word smc_modify_regbit(struct eth_device *dev, int bank, int ioaddr, int reg,
unsigned int bit, int val)
{
word regval;
- SMC_SELECT_BANK( bank );
+ SMC_SELECT_BANK( dev, bank );
- regval = SMC_inw( reg );
+ regval = SMC_inw( dev, reg );
if (val)
regval |= bit;
else
regval &= ~bit;
- SMC_outw( regval, 0 );
+ SMC_outw( dev, regval, 0 );
return(regval);
}
@@ -1026,10 +966,10 @@ static word smc_modify_regbit(int bank, int ioaddr, int reg,
/*------------------------------------------------------------
. Retrieve a bit in the LAN91C111 register set
.-------------------------------------------------------------*/
-static int smc_get_regbit(int bank, int ioaddr, int reg, unsigned int bit)
+static int smc_get_regbit(struct eth_device *dev, int bank, int ioaddr, int reg, unsigned int bit)
{
- SMC_SELECT_BANK( bank );
- if ( SMC_inw( reg ) & bit)
+ SMC_SELECT_BANK( dev, bank );
+ if ( SMC_inw( dev, reg ) & bit)
return(1);
else
return(0);
@@ -1039,20 +979,20 @@ static int smc_get_regbit(int bank, int ioaddr, int reg, unsigned int bit)
/*------------------------------------------------------------
. Modify a LAN91C111 register (word access only)
.-------------------------------------------------------------*/
-static void smc_modify_reg(int bank, int ioaddr, int reg, word val)
+static void smc_modify_reg(struct eth_device *dev, int bank, int ioaddr, int reg, word val)
{
- SMC_SELECT_BANK( bank );
- SMC_outw( val, reg );
+ SMC_SELECT_BANK( dev, bank );
+ SMC_outw( dev, val, reg );
}
/*------------------------------------------------------------
. Retrieve a LAN91C111 register (word access only)
.-------------------------------------------------------------*/
-static int smc_get_reg(int bank, int ioaddr, int reg)
+static int smc_get_reg(struct eth_device *dev, int bank, int ioaddr, int reg)
{
- SMC_SELECT_BANK( bank );
- return(SMC_inw( reg ));
+ SMC_SELECT_BANK( dev, bank );
+ return(SMC_inw( dev, reg ));
}
#endif /* 0 */
@@ -1105,7 +1045,7 @@ static void smc_dump_mii_stream (byte * bits, int size)
. Reads a register from the MII Management serial interface
.-------------------------------------------------------------*/
#ifndef CONFIG_SMC91111_EXT_PHY
-static word smc_read_phy_register (byte phyreg)
+static word smc_read_phy_register (struct eth_device *dev, byte phyreg)
{
int oldBank;
int i;
@@ -1168,13 +1108,13 @@ static word smc_read_phy_register (byte phyreg)
bits[clk_idx++] = 0;
/* Save the current bank */
- oldBank = SMC_inw (BANK_SELECT);
+ oldBank = SMC_inw (dev, BANK_SELECT);
/* Select bank 3 */
- SMC_SELECT_BANK (3);
+ SMC_SELECT_BANK (dev, 3);
/* Get the current MII register value */
- mii_reg = SMC_inw (MII_REG);
+ mii_reg = SMC_inw (dev, MII_REG);
/* Turn off all MII Interface bits */
mii_reg &= ~(MII_MDOE | MII_MCLK | MII_MDI | MII_MDO);
@@ -1182,23 +1122,23 @@ static word smc_read_phy_register (byte phyreg)
/* Clock all 64 cycles */
for (i = 0; i < sizeof bits; ++i) {
/* Clock Low - output data */
- SMC_outw (mii_reg | bits[i], MII_REG);
+ SMC_outw (dev, mii_reg | bits[i], MII_REG);
udelay (SMC_PHY_CLOCK_DELAY);
/* Clock Hi - input data */
- SMC_outw (mii_reg | bits[i] | MII_MCLK, MII_REG);
+ SMC_outw (dev, mii_reg | bits[i] | MII_MCLK, MII_REG);
udelay (SMC_PHY_CLOCK_DELAY);
- bits[i] |= SMC_inw (MII_REG) & MII_MDI;
+ bits[i] |= SMC_inw (dev, MII_REG) & MII_MDI;
}
/* Return to idle state */
/* Set clock to low, data to low, and output tristated */
- SMC_outw (mii_reg, MII_REG);
+ SMC_outw (dev, mii_reg, MII_REG);
udelay (SMC_PHY_CLOCK_DELAY);
/* Restore original bank select */
- SMC_SELECT_BANK (oldBank);
+ SMC_SELECT_BANK (dev, oldBank);
/* Recover input data */
phydata = 0;
@@ -1222,7 +1162,8 @@ static word smc_read_phy_register (byte phyreg)
/*------------------------------------------------------------
. Writes a register to the MII Management serial interface
.-------------------------------------------------------------*/
-static void smc_write_phy_register (byte phyreg, word phydata)
+static void smc_write_phy_register (struct eth_device *dev, byte phyreg,
+ word phydata)
{
int oldBank;
int i;
@@ -1288,13 +1229,13 @@ static void smc_write_phy_register (byte phyreg, word phydata)
bits[clk_idx++] = 0;
/* Save the current bank */
- oldBank = SMC_inw (BANK_SELECT);
+ oldBank = SMC_inw (dev, BANK_SELECT);
/* Select bank 3 */
- SMC_SELECT_BANK (3);
+ SMC_SELECT_BANK (dev, 3);
/* Get the current MII register value */
- mii_reg = SMC_inw (MII_REG);
+ mii_reg = SMC_inw (dev, MII_REG);
/* Turn off all MII Interface bits */
mii_reg &= ~(MII_MDOE | MII_MCLK | MII_MDI | MII_MDO);
@@ -1302,23 +1243,23 @@ static void smc_write_phy_register (byte phyreg, word phydata)
/* Clock all cycles */
for (i = 0; i < sizeof bits; ++i) {
/* Clock Low - output data */
- SMC_outw (mii_reg | bits[i], MII_REG);
+ SMC_outw (dev, mii_reg | bits[i], MII_REG);
udelay (SMC_PHY_CLOCK_DELAY);
/* Clock Hi - input data */
- SMC_outw (mii_reg | bits[i] | MII_MCLK, MII_REG);
+ SMC_outw (dev, mii_reg | bits[i] | MII_MCLK, MII_REG);
udelay (SMC_PHY_CLOCK_DELAY);
- bits[i] |= SMC_inw (MII_REG) & MII_MDI;
+ bits[i] |= SMC_inw (dev, MII_REG) & MII_MDI;
}
/* Return to idle state */
/* Set clock to low, data to low, and output tristated */
- SMC_outw (mii_reg, MII_REG);
+ SMC_outw (dev, mii_reg, MII_REG);
udelay (SMC_PHY_CLOCK_DELAY);
/* Restore original bank select */
- SMC_SELECT_BANK (oldBank);
+ SMC_SELECT_BANK (dev, oldBank);
#if (SMC_DEBUG > 2 )
printf ("smc_write_phy_register(): phyaddr=%x,phyreg=%x,phydata=%x\n",
@@ -1345,7 +1286,7 @@ static void smc_wait_ms(unsigned int ms)
. smc_phy_fixed() if the user has requested a certain config.
.-------------------------------------------------------------*/
#ifndef CONFIG_SMC91111_EXT_PHY
-static void smc_phy_configure ()
+static void smc_phy_configure (struct eth_device *dev)
{
int timeout;
byte phyaddr;
@@ -1361,12 +1302,12 @@ static void smc_phy_configure ()
phyaddr = SMC_PHY_ADDR;
/* Reset the PHY, setting all other bits to zero */
- smc_write_phy_register (PHY_CNTL_REG, PHY_CNTL_RST);
+ smc_write_phy_register (dev, PHY_CNTL_REG, PHY_CNTL_RST);
/* Wait for the reset to complete, or time out */
timeout = 6; /* Wait up to 3 seconds */
while (timeout--) {
- if (!(smc_read_phy_register (PHY_CNTL_REG)
+ if (!(smc_read_phy_register (dev, PHY_CNTL_REG)
& PHY_CNTL_RST)) {
/* reset complete */
break;
@@ -1385,14 +1326,14 @@ static void smc_phy_configure ()
/* Enable PHY Interrupts (for register 18) */
/* Interrupts listed here are disabled */
- smc_write_phy_register (PHY_MASK_REG, 0xffff);
+ smc_write_phy_register (dev, PHY_MASK_REG, 0xffff);
/* Configure the Receive/Phy Control register */
- SMC_SELECT_BANK (0);
- SMC_outw (RPC_DEFAULT, RPC_REG);
+ SMC_SELECT_BANK (dev, 0);
+ SMC_outw (dev, RPC_DEFAULT, RPC_REG);
/* Copy our capabilities from PHY_STAT_REG to PHY_AD_REG */
- my_phy_caps = smc_read_phy_register (PHY_STAT_REG);
+ my_phy_caps = smc_read_phy_register (dev, PHY_STAT_REG);
my_ad_caps = PHY_AD_CSMA; /* I am CSMA capable */
if (my_phy_caps & PHY_STAT_CAP_T4)
@@ -1411,18 +1352,18 @@ static void smc_phy_configure ()
my_ad_caps |= PHY_AD_10_HDX;
/* Update our Auto-Neg Advertisement Register */
- smc_write_phy_register (PHY_AD_REG, my_ad_caps);
+ smc_write_phy_register (dev, PHY_AD_REG, my_ad_caps);
/* Read the register back. Without this, it appears that when */
/* auto-negotiation is restarted, sometimes it isn't ready and */
/* the link does not come up. */
- smc_read_phy_register(PHY_AD_REG);
+ smc_read_phy_register(dev, PHY_AD_REG);
PRINTK2 ("%s: phy caps=%x\n", SMC_DEV_NAME, my_phy_caps);
PRINTK2 ("%s: phy advertised caps=%x\n", SMC_DEV_NAME, my_ad_caps);
/* Restart auto-negotiation process in order to advertise my caps */
- smc_write_phy_register (PHY_CNTL_REG,
+ smc_write_phy_register (dev, PHY_CNTL_REG,
PHY_CNTL_ANEG_EN | PHY_CNTL_ANEG_RST);
/* Wait for the auto-negotiation to complete. This may take from */
@@ -1431,7 +1372,7 @@ static void smc_phy_configure ()
timeout = CONFIG_SMC_AUTONEG_TIMEOUT * 2;
while (timeout--) {
- status = smc_read_phy_register (PHY_STAT_REG);
+ status = smc_read_phy_register (dev, PHY_STAT_REG);
if (status & PHY_STAT_ANEG_ACK) {
/* auto-negotiate complete */
break;
@@ -1447,7 +1388,7 @@ static void smc_phy_configure ()
/* Restart auto-negotiation */
printf ("%s: PHY restarting auto-negotiation\n",
SMC_DEV_NAME);
- smc_write_phy_register (PHY_CNTL_REG,
+ smc_write_phy_register (dev, PHY_CNTL_REG,
PHY_CNTL_ANEG_EN |
PHY_CNTL_ANEG_RST |
PHY_CNTL_SPEED |
@@ -1467,7 +1408,7 @@ static void smc_phy_configure ()
}
/* Re-Configure the Receive/Phy Control register */
- SMC_outw (RPC_DEFAULT, RPC_REG);
+ SMC_outw (dev, RPC_DEFAULT, RPC_REG);
smc_phy_configure_exit: ;
@@ -1512,36 +1453,45 @@ static void print_packet( byte * buf, int length )
}
#endif
-int eth_init(bd_t *bd) {
+static int smc91111_init(struct eth_device *dev, bd_t *bd) {
#ifdef SHARED_RESOURCES
swap_to(ETHERNET);
#endif
- return (smc_open(bd));
+ return (smc_open(dev));
}
-void eth_halt() {
- smc_close();
+static void smc91111_halt(struct eth_device *dev) {
+ smc_close(dev);
}
-int eth_rx() {
- return smc_rcv();
+static int smc91111_rx(struct eth_device *dev) {
+ return smc_rcv(dev);
}
-int eth_send(volatile void *packet, int length) {
- return smc_send_packet(packet, length);
+static int smc91111_send(struct eth_device *dev, volatile void *packet,
+ int length) {
+ return smc_send_packet(dev, packet, length);
}
-int smc_get_ethaddr (bd_t * bd)
+static int smc_get_ethaddr (struct eth_device *dev)
{
uchar v_mac[6];
+ char env_parm_name[10]; /* Long enough for ethxxaddr */
+ u8 dev_num = ((struct smc91111_priv *)(dev->priv))->dev_num;
+
+ if (dev_num == 0)
+ strncpy(env_parm_name, "ethaddr", 7);
+ else
+ sprintf(env_parm_name, "eth%huaddr", dev_num);
+
- if (!eth_getenv_enetaddr("ethaddr", v_mac)) {
+ if (!eth_getenv_enetaddr(env_parm_name, v_mac)) {
/* get ROM mac value if any */
- if (!get_rom_mac(v_mac)) {
- printf("\n*** ERROR: ethaddr is NOT set !!\n");
+ if (!get_rom_mac(dev, v_mac)) {
+ printf("\n*** ERROR: %s is NOT set !!\n", env_parm_name);
return -1;
}
- eth_setenv_enetaddr("ethaddr", v_mac);
+ eth_setenv_enetaddr(env_parm_name, v_mac);
}
smc_set_mac_addr(v_mac); /* use old function to update smc default */
@@ -1549,7 +1499,7 @@ int smc_get_ethaddr (bd_t * bd)
return 0;
}
-int get_rom_mac (uchar *v_rom_mac)
+static int get_rom_mac (struct eth_device *dev, uchar *v_rom_mac)
{
#ifdef HARDCODE_MAC /* used for testing or to supress run time warnings */
char hw_mac_addr[] = { 0x02, 0x80, 0xad, 0x20, 0x31, 0xb8 };
@@ -1560,13 +1510,36 @@ int get_rom_mac (uchar *v_rom_mac)
int i;
int valid_mac = 0;
- SMC_SELECT_BANK (1);
+ SMC_SELECT_BANK (dev, 1);
for (i=0; i<6; i++)
{
- v_rom_mac[i] = SMC_inb ((ADDR0_REG + i));
+ v_rom_mac[i] = SMC_inb (dev, (ADDR0_REG + i));
valid_mac |= v_rom_mac[i];
}
return (valid_mac ? 1 : 0);
#endif
+
+}
+
+int smc91111_initialize(u8 dev_num, int base_addr)
+{
+ struct smc91111_priv *priv = malloc(sizeof(struct smc91111_priv));
+ if (!priv)
+ return 0;
+ struct eth_device *dev = malloc(sizeof(struct eth_device));
+ if (!dev)
+ return 0;
+ priv->dev_num = dev_num;
+ dev->priv = priv;
+ dev->iobase = base_addr;
+
+ dev->init = smc91111_init;
+ dev->halt = smc91111_halt;
+ dev->send = smc91111_send;
+ dev->recv = smc91111_rx;
+ sprintf(dev->name, "%s-%hu", SMC_DEV_NAME, dev_num);
+
+ eth_register(dev);
+ return 0;
}
diff --git a/drivers/net/smc91111.h b/drivers/net/smc91111.h
index 967addd..bb45241 100644
--- a/drivers/net/smc91111.h
+++ b/drivers/net/smc91111.h
@@ -58,6 +58,10 @@ typedef unsigned char byte;
typedef unsigned short word;
typedef unsigned long int dword;
+struct smc91111_priv{
+ u8 dev_num;
+};
+
/*
. DEBUGGING LEVELS
.
@@ -77,32 +81,32 @@ typedef unsigned long int dword;
#ifdef CONFIG_PXA250
#ifdef CONFIG_XSENGINE
-#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))))
-#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r<<1))))
-#define SMC_inb(p) ({ \
- unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (p<<1)); \
+#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r<<1))))
+#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r<<1))))
+#define SMC_inb(a,p) ({ \
+ unsigned int __p = (unsigned int)((a)->iobase + (p<<1)); \
unsigned int __v = *(volatile unsigned short *)((__p) & ~2); \
if (__p & 2) __v >>= 8; \
else __v &= 0xff; \
__v; })
#elif defined(CONFIG_XAENIAX)
-#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))))
-#define SMC_inw(z) ({ \
- unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (z)); \
+#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r))))
+#define SMC_inw(a,z) ({ \
+ unsigned int __p = (unsigned int)((a)->iobase + (z)); \
unsigned int __v = *(volatile unsigned int *)((__p) & ~3); \
if (__p & 3) __v >>= 16; \
else __v &= 0xffff; \
__v; })
-#define SMC_inb(p) ({ \
- unsigned int ___v = SMC_inw((p) & ~1); \
+#define SMC_inb(a,p) ({ \
+ unsigned int ___v = SMC_inw((a),(p) & ~1); \
if (p & 1) ___v >>= 8; \
else ___v &= 0xff; \
___v; })
#else
-#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))))
-#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))))
-#define SMC_inb(p) ({ \
- unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (p)); \
+#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r))))
+#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r))))
+#define SMC_inb(a,p) ({ \
+ unsigned int __p = (unsigned int)((a)->iobase + (p)); \
unsigned int __v = *(volatile unsigned short *)((__p) & ~1); \
if (__p & 1) __v >>= 8; \
else __v &= 0xff; \
@@ -110,69 +114,69 @@ typedef unsigned long int dword;
#endif
#ifdef CONFIG_XSENGINE
-#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))) = d)
-#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r<<1))) = d)
+#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r<<1))) = d)
+#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r<<1))) = d)
#elif defined (CONFIG_XAENIAX)
-#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d)
-#define SMC_outw(d,p) ({ \
- dword __dwo = SMC_inl((p) & ~3); \
+#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d)
+#define SMC_outw(a,d,p) ({ \
+ dword __dwo = SMC_inl((a),(p) & ~3); \
dword __dwn = (word)(d); \
__dwo &= ((p) & 3) ? 0x0000ffff : 0xffff0000; \
__dwo |= ((p) & 3) ? __dwn << 16 : __dwn; \
- SMC_outl(__dwo, (p) & ~3); \
+ SMC_outl((a), __dwo, (p) & ~3); \
})
#else
-#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d)
-#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d)
+#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d)
+#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d)
#endif
-#define SMC_outb(d,r) ({ word __d = (byte)(d); \
- word __w = SMC_inw((r)&~1); \
+#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \
+ word __w = SMC_inw((a),(r)&~1); \
__w &= ((r)&1) ? 0x00FF : 0xFF00; \
__w |= ((r)&1) ? __d<<8 : __d; \
- SMC_outw(__w,(r)&~1); \
+ SMC_outw((a),__w,(r)&~1); \
})
-#define SMC_outsl(r,b,l) ({ int __i; \
+#define SMC_outsl(a,r,b,l) ({ int __i; \
dword *__b2; \
__b2 = (dword *) b; \
for (__i = 0; __i < l; __i++) { \
- SMC_outl( *(__b2 + __i), r); \
+ SMC_outl((a), *(__b2 + __i), r); \
} \
})
-#define SMC_outsw(r,b,l) ({ int __i; \
+#define SMC_outsw(a,r,b,l) ({ int __i; \
word *__b2; \
__b2 = (word *) b; \
for (__i = 0; __i < l; __i++) { \
- SMC_outw( *(__b2 + __i), r); \
+ SMC_outw((a), *(__b2 + __i), r); \
} \
})
-#define SMC_insl(r,b,l) ({ int __i ; \
+#define SMC_insl(a,r,b,l) ({ int __i ; \
dword *__b2; \
__b2 = (dword *) b; \
for (__i = 0; __i < l; __i++) { \
- *(__b2 + __i) = SMC_inl(r); \
- SMC_inl(0); \
+ *(__b2 + __i) = SMC_inl((a),(r)); \
+ SMC_inl((a),0); \
}; \
})
-#define SMC_insw(r,b,l) ({ int __i ; \
+#define SMC_insw(a,r,b,l) ({ int __i ; \
word *__b2; \
__b2 = (word *) b; \
for (__i = 0; __i < l; __i++) { \
- *(__b2 + __i) = SMC_inw(r); \
- SMC_inw(0); \
+ *(__b2 + __i) = SMC_inw((a),(r)); \
+ SMC_inw((a),0); \
}; \
})
-#define SMC_insb(r,b,l) ({ int __i ; \
+#define SMC_insb(a,r,b,l) ({ int __i ; \
byte *__b2; \
__b2 = (byte *) b; \
for (__i = 0; __i < l; __i++) { \
- *(__b2 + __i) = SMC_inb(r); \
- SMC_inb(0); \
+ *(__b2 + __i) = SMC_inb((a),(r)); \
+ SMC_inb((a),0); \
}; \
})
@@ -187,61 +191,61 @@ typedef unsigned long int dword;
((0x00FF0000UL & _x) >> 8) | \
(_x >> 24)); })
-#define SMC_inl(r) (SMC_LEON_SWAP32((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0)))))
-#define SMC_inl_nosw(r) ((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))))
-#define SMC_inw(r) (SMC_LEON_SWAP16((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0)))))
-#define SMC_inw_nosw(r) ((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))))
-#define SMC_inb(p) ({ \
- word ___v = SMC_inw((p) & ~1); \
+#define SMC_inl(a,r) (SMC_LEON_SWAP32((*(volatile dword *)((a)->iobase+((r)<<0)))))
+#define SMC_inl_nosw(a,r) ((*(volatile dword *)((a)->iobase+((r)<<0))))
+#define SMC_inw(a,r) (SMC_LEON_SWAP16((*(volatile word *)((a)->iobase+((r)<<0)))))
+#define SMC_inw_nosw(a,r) ((*(volatile word *)((a)->iobase+((r)<<0))))
+#define SMC_inb(a,p) ({ \
+ word ___v = SMC_inw((a),(p) & ~1); \
if ((p) & 1) ___v >>= 8; \
else ___v &= 0xff; \
___v; })
-#define SMC_outl(d,r) (*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))=SMC_LEON_SWAP32(d))
-#define SMC_outl_nosw(d,r) (*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))=(d))
-#define SMC_outw(d,r) (*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))=SMC_LEON_SWAP16(d))
-#define SMC_outw_nosw(d,r) (*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))=(d))
-#define SMC_outb(d,r) do{ word __d = (byte)(d); \
- word __w = SMC_inw((r)&~1); \
+#define SMC_outl(a,d,r) (*(volatile dword *)((a)->iobase+((r)<<0))=SMC_LEON_SWAP32(d))
+#define SMC_outl_nosw(a,d,r) (*(volatile dword *)((a)->iobase+((r)<<0))=(d))
+#define SMC_outw(a,d,r) (*(volatile word *)((a)->iobase+((r)<<0))=SMC_LEON_SWAP16(d))
+#define SMC_outw_nosw(a,d,r) (*(volatile word *)((a)->iobase+((r)<<0))=(d))
+#define SMC_outb(a,d,r) do{ word __d = (byte)(d); \
+ word __w = SMC_inw((a),(r)&~1); \
__w &= ((r)&1) ? 0x00FF : 0xFF00; \
__w |= ((r)&1) ? __d<<8 : __d; \
- SMC_outw(__w,(r)&~1); \
+ SMC_outw((a),__w,(r)&~1); \
}while(0)
-#define SMC_outsl(r,b,l) do{ int __i; \
+#define SMC_outsl(a,r,b,l) do{ int __i; \
dword *__b2; \
__b2 = (dword *) b; \
for (__i = 0; __i < l; __i++) { \
- SMC_outl_nosw( *(__b2 + __i), r); \
+ SMC_outl_nosw((a), *(__b2 + __i), r); \
} \
}while(0)
-#define SMC_outsw(r,b,l) do{ int __i; \
+#define SMC_outsw(a,r,b,l) do{ int __i; \
word *__b2; \
__b2 = (word *) b; \
for (__i = 0; __i < l; __i++) { \
- SMC_outw_nosw( *(__b2 + __i), r); \
+ SMC_outw_nosw((a), *(__b2 + __i), r); \
} \
}while(0)
-#define SMC_insl(r,b,l) do{ int __i ; \
+#define SMC_insl(a,r,b,l) do{ int __i ; \
dword *__b2; \
__b2 = (dword *) b; \
for (__i = 0; __i < l; __i++) { \
- *(__b2 + __i) = SMC_inl_nosw(r); \
+ *(__b2 + __i) = SMC_inl_nosw((a),(r)); \
}; \
}while(0)
-#define SMC_insw(r,b,l) do{ int __i ; \
+#define SMC_insw(a,r,b,l) do{ int __i ; \
word *__b2; \
__b2 = (word *) b; \
for (__i = 0; __i < l; __i++) { \
- *(__b2 + __i) = SMC_inw_nosw(r); \
+ *(__b2 + __i) = SMC_inw_nosw((a),(r)); \
}; \
}while(0)
-#define SMC_insb(r,b,l) do{ int __i ; \
+#define SMC_insb(a,r,b,l) do{ int __i ; \
byte *__b2; \
__b2 = (byte *) b; \
for (__i = 0; __i < l; __i++) { \
- *(__b2 + __i) = SMC_inb(r); \
+ *(__b2 + __i) = SMC_inb((a),(r)); \
}; \
}while(0)
@@ -253,48 +257,48 @@ typedef unsigned long int dword;
*/
#ifdef CONFIG_ADNPESC1
-#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))))
+#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1))))
#elif CONFIG_BLACKFIN
-#define SMC_inw(r) ({ word __v = (*((volatile word *)(SMC_BASE_ADDRESS+(r)))); SSYNC(); __v;})
+#define SMC_inw(a,r) ({ word __v = (*((volatile word *)((a)->iobase+(r)))); SSYNC(); __v;})
#else
-#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))))
+#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r))))
#endif
-#define SMC_inb(r) (((r)&1) ? SMC_inw((r)&~1)>>8 : SMC_inw(r)&0xFF)
+#define SMC_inb(a,r) (((r)&1) ? SMC_inw((a),(r)&~1)>>8 : SMC_inw((a),(r)&0xFF))
#ifdef CONFIG_ADNPESC1
-#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))) = d)
+#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+((r)<<1))) = d)
#elif CONFIG_BLACKFIN
-#define SMC_outw(d,r) {(*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d); SSYNC();}
+#define SMC_outw(a,d,r) {(*((volatile word *)((a)->iobase+(r))) = d); SSYNC();}
#else
-#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d)
+#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d)
#endif
-#define SMC_outb(d,r) ({ word __d = (byte)(d); \
- word __w = SMC_inw((r)&~1); \
+#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \
+ word __w = SMC_inw((a),(r)&~1); \
__w &= ((r)&1) ? 0x00FF : 0xFF00; \
__w |= ((r)&1) ? __d<<8 : __d; \
- SMC_outw(__w,(r)&~1); \
+ SMC_outw((a),__w,(r)&~1); \
})
#if 0
-#define SMC_outsw(r,b,l) outsw(SMC_BASE_ADDRESS+(r), (b), (l))
+#define SMC_outsw(a,r,b,l) outsw((a)->iobase+(r), (b), (l))
#else
-#define SMC_outsw(r,b,l) ({ int __i; \
+#define SMC_outsw(a,r,b,l) ({ int __i; \
word *__b2; \
__b2 = (word *) b; \
for (__i = 0; __i < l; __i++) { \
- SMC_outw( *(__b2 + __i), r); \
+ SMC_outw((a), *(__b2 + __i), r); \
} \
})
#endif
#if 0
-#define SMC_insw(r,b,l) insw(SMC_BASE_ADDRESS+(r), (b), (l))
+#define SMC_insw(a,r,b,l) insw((a)->iobase+(r), (b), (l))
#else
-#define SMC_insw(r,b,l) ({ int __i ; \
+#define SMC_insw(a,r,b,l) ({ int __i ; \
word *__b2; \
__b2 = (word *) b; \
for (__i = 0; __i < l; __i++) { \
- *(__b2 + __i) = SMC_inw(r); \
- SMC_inw(0); \
+ *(__b2 + __i) = SMC_inw((a),(r)); \
+ SMC_inw((a),0); \
}; \
})
#endif
@@ -304,30 +308,30 @@ typedef unsigned long int dword;
#if defined(CONFIG_SMC_USE_32_BIT)
#ifdef CONFIG_XSENGINE
-#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))))
+#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r<<1))))
#else
-#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))))
+#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r))))
#endif
-#define SMC_insl(r,b,l) ({ int __i ; \
+#define SMC_insl(a,r,b,l) ({ int __i ; \
dword *__b2; \
__b2 = (dword *) b; \
for (__i = 0; __i < l; __i++) { \
- *(__b2 + __i) = SMC_inl(r); \
- SMC_inl(0); \
+ *(__b2 + __i) = SMC_inl((a),(r)); \
+ SMC_inl((a),0); \
}; \
})
#ifdef CONFIG_XSENGINE
-#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))) = d)
+#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r<<1))) = d)
#else
-#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d)
+#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d)
#endif
-#define SMC_outsl(r,b,l) ({ int __i; \
+#define SMC_outsl(a,r,b,l) ({ int __i; \
dword *__b2; \
__b2 = (dword *) b; \
for (__i = 0; __i < l; __i++) { \
- SMC_outl( *(__b2 + __i), r); \
+ SMC_outl((a), *(__b2 + __i), r); \
} \
})
@@ -752,25 +756,25 @@ enum {
/* select a register bank, 0 to 3 */
-#define SMC_SELECT_BANK(x) { SMC_outw( x, BANK_SELECT ); }
+#define SMC_SELECT_BANK(a,x) { SMC_outw((a), (x), BANK_SELECT ); }
/* this enables an interrupt in the interrupt mask register */
-#define SMC_ENABLE_INT(x) {\
+#define SMC_ENABLE_INT(a,x) {\
unsigned char mask;\
- SMC_SELECT_BANK(2);\
- mask = SMC_inb( IM_REG );\
+ SMC_SELECT_BANK((a),2);\
+ mask = SMC_inb((a), IM_REG );\
mask |= (x);\
- SMC_outb( mask, IM_REG ); \
+ SMC_outb( (a), mask, IM_REG ); \
}
/* this disables an interrupt from the interrupt mask register */
-#define SMC_DISABLE_INT(x) {\
+#define SMC_DISABLE_INT(a,x) {\
unsigned char mask;\
SMC_SELECT_BANK(2);\
- mask = SMC_inb( IM_REG );\
+ mask = SMC_inb( (a), IM_REG );\
mask &= ~(x);\
- SMC_outb( mask, IM_REG ); \
+ SMC_outb( (a), mask, IM_REG ); \
}
/*----------------------------------------------------------------------
diff --git a/examples/standalone/smc91111_eeprom.c b/examples/standalone/smc91111_eeprom.c
index 39e5306..a38cc4d 100644
--- a/examples/standalone/smc91111_eeprom.c
+++ b/examples/standalone/smc91111_eeprom.c
@@ -42,19 +42,23 @@
#define MAC 0x2
#define UNKNOWN 0x4
-void dump_reg (void);
-void dump_eeprom (void);
-int write_eeprom_reg (int, int);
-void copy_from_eeprom (void);
-void print_MAC (void);
-int read_eeprom_reg (int);
-void print_macaddr (void);
+void dump_reg (struct eth_device *dev);
+void dump_eeprom (struct eth_device *dev);
+int write_eeprom_reg (struct eth_device *dev, int value, int reg);
+void copy_from_eeprom (struct eth_device *dev);
+void print_MAC (struct eth_device *dev);
+int read_eeprom_reg (struct eth_device *dev, int reg);
+void print_macaddr (struct eth_device *dev);
int smc91111_eeprom (int argc, char *argv[])
{
int c, i, j, done, line, reg, value, start, what;
char input[50];
+ struct eth_device dev = {
+ .iobase = CONFIG_SMC91111_BASE
+ };
+
/* Print the ABI version */
app_startup (argv);
if (XF_VERSION != (int) get_version ()) {
@@ -67,7 +71,7 @@ int smc91111_eeprom (int argc, char *argv[])
SMC91111_EEPROM_INIT();
- if ((SMC_inw (BANK_SELECT) & 0xFF00) != 0x3300) {
+ if ((SMC_inw (&dev, BANK_SELECT) & 0xFF00) != 0x3300) {
printf ("Can't find SMSC91111\n");
return (0);
}
@@ -211,12 +215,12 @@ int smc91111_eeprom (int argc, char *argv[])
switch (what) {
case 1:
printf ("Writing EEPROM register %02x with %04x\n", reg, value);
- write_eeprom_reg (value, reg);
+ write_eeprom_reg (&dev, value, reg);
break;
case 2:
printf ("Writing MAC register bank %i, reg %02x with %04x\n", reg >> 4, reg & 0xE, value);
- SMC_SELECT_BANK (reg >> 4);
- SMC_outw (value, reg & 0xE);
+ SMC_SELECT_BANK (&dev, reg >> 4);
+ SMC_outw (&dev, value, reg & 0xE);
break;
default:
printf ("Wrong\n");
@@ -224,16 +228,16 @@ int smc91111_eeprom (int argc, char *argv[])
}
break;
case ('D'):
- dump_eeprom ();
+ dump_eeprom (&dev);
break;
case ('M'):
- dump_reg ();
+ dump_reg (&dev);
break;
case ('C'):
- copy_from_eeprom ();
+ copy_from_eeprom (&dev);
break;
case ('P'):
- print_macaddr ();
+ print_macaddr (&dev);
break;
default:
break;
@@ -244,15 +248,15 @@ int smc91111_eeprom (int argc, char *argv[])
return (0);
}
-void copy_from_eeprom (void)
+void copy_from_eeprom (struct eth_device *dev)
{
int i;
- SMC_SELECT_BANK (1);
- SMC_outw ((SMC_inw (CTL_REG) & !CTL_EEPROM_SELECT) | CTL_RELOAD,
- CTL_REG);
+ SMC_SELECT_BANK (dev, 1);
+ SMC_outw (dev, (SMC_inw (dev, CTL_REG) & !CTL_EEPROM_SELECT) |
+ CTL_RELOAD, CTL_REG);
i = 100;
- while ((SMC_inw (CTL_REG) & CTL_RELOAD) && --i)
+ while ((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --i)
udelay (100);
if (i == 0) {
printf ("Timeout Refreshing EEPROM registers\n");
@@ -262,21 +266,21 @@ void copy_from_eeprom (void)
}
-void print_macaddr (void)
+void print_macaddr (struct eth_device *dev)
{
int i, j, k, mac[6];
printf ("Current MAC Address in SMSC91111 ");
- SMC_SELECT_BANK (1);
+ SMC_SELECT_BANK (dev, 1);
for (i = 0; i < 5; i++) {
- printf ("%02x:", SMC_inb (ADDR0_REG + i));
+ printf ("%02x:", SMC_inb (dev, ADDR0_REG + i));
}
- printf ("%02x\n", SMC_inb (ADDR0_REG + 5));
+ printf ("%02x\n", SMC_inb (dev, ADDR0_REG + 5));
i = 0;
for (j = 0x20; j < 0x23; j++) {
- k = read_eeprom_reg (j);
+ k = read_eeprom_reg (dev, j);
mac[i] = k & 0xFF;
i++;
mac[i] = k >> 8;
@@ -289,7 +293,7 @@ void print_macaddr (void)
printf ("%02x\n", mac[5]);
}
-void dump_eeprom (void)
+void dump_eeprom (struct eth_device *dev)
{
int j, k;
@@ -307,7 +311,8 @@ void dump_eeprom (void)
if ((k == 2) || (k == 3))
printf (" ");
for (j = 0; j < 0x20; j += 4) {
- printf ("%02x:%04x ", j + k, read_eeprom_reg (j + k));
+ printf ("%02x:%04x ", j + k,
+ read_eeprom_reg (dev, j + k));
}
printf ("\n");
}
@@ -315,46 +320,47 @@ void dump_eeprom (void)
for (j = 0x20; j < 0x40; j++) {
if ((j & 0x07) == 0)
printf ("\n");
- printf ("%02x:%04x ", j, read_eeprom_reg (j));
+ printf ("%02x:%04x ", j, read_eeprom_reg (dev, j));
}
printf ("\n");
}
-int read_eeprom_reg (int reg)
+int read_eeprom_reg (struct eth_device *dev, int reg)
{
int timeout;
- SMC_SELECT_BANK (2);
- SMC_outw (reg, PTR_REG);
+ SMC_SELECT_BANK (dev, 2);
+ SMC_outw (dev, reg, PTR_REG);
- SMC_SELECT_BANK (1);
- SMC_outw (SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD,
- CTL_REG);
+ SMC_SELECT_BANK (dev, 1);
+ SMC_outw (dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT |
+ CTL_RELOAD, CTL_REG);
timeout = 100;
- while ((SMC_inw (CTL_REG) & CTL_RELOAD) && --timeout)
+ while ((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --timeout)
udelay (100);
if (timeout == 0) {
printf ("Timeout Reading EEPROM register %02x\n", reg);
return 0;
}
- return SMC_inw (GP_REG);
+ return SMC_inw (dev, GP_REG);
}
-int write_eeprom_reg (int value, int reg)
+int write_eeprom_reg (struct eth_device *dev, int value, int reg)
{
int timeout;
- SMC_SELECT_BANK (2);
- SMC_outw (reg, PTR_REG);
+ SMC_SELECT_BANK (dev, 2);
+ SMC_outw (dev, reg, PTR_REG);
- SMC_SELECT_BANK (1);
- SMC_outw (value, GP_REG);
- SMC_outw (SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG);
+ SMC_SELECT_BANK (dev, 1);
+ SMC_outw (dev, value, GP_REG);
+ SMC_outw (dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT |
+ CTL_STORE, CTL_REG);
timeout = 100;
- while ((SMC_inw (CTL_REG) & CTL_STORE) && --timeout)
+ while ((SMC_inw (dev, CTL_REG) & CTL_STORE) && --timeout)
udelay (100);
if (timeout == 0) {
printf ("Timeout Writing EEPROM register %02x\n", reg);
@@ -365,7 +371,7 @@ int write_eeprom_reg (int value, int reg)
}
-void dump_reg (void)
+void dump_reg (struct eth_device *dev)
{
int i, j;
@@ -377,8 +383,8 @@ void dump_reg (void)
for (i = 0; i < 0xF; i += 2) {
printf ("%02x ", i);
for (j = 0; j < 4; j++) {
- SMC_SELECT_BANK (j);
- printf ("%04x ", SMC_inw (i));
+ SMC_SELECT_BANK (dev, j);
+ printf ("%04x ", SMC_inw (dev, i));
}
printf ("\n");
}
diff --git a/include/configs/EP1C20.h b/include/configs/EP1C20.h
index 8941e4d..61d8e20 100644
--- a/include/configs/EP1C20.h
+++ b/include/configs/EP1C20.h
@@ -151,7 +151,8 @@
* cache bypass so there's no need to monkey with inx/outx macros.
*----------------------------------------------------------------------*/
#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
-#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 /* Using SMC91c111 */
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
diff --git a/include/configs/EP1S10.h b/include/configs/EP1S10.h
index 53bd0d8..41e64e6 100644
--- a/include/configs/EP1S10.h
+++ b/include/configs/EP1S10.h
@@ -145,7 +145,8 @@
* cache bypass so there's no need to monkey with inx/outx macros.
*----------------------------------------------------------------------*/
#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
-#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 /* Using SMC91c111 */
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
diff --git a/include/configs/EP1S40.h b/include/configs/EP1S40.h
index 9e9a8a4..5b332e4 100644
--- a/include/configs/EP1S40.h
+++ b/include/configs/EP1S40.h
@@ -145,7 +145,8 @@
* cache bypass so there's no need to monkey with inx/outx macros.
*----------------------------------------------------------------------*/
#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
-#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 /* Using SMC91c111 */
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h
index 3853574..6083892 100644
--- a/include/configs/MigoR.h
+++ b/include/configs/MigoR.h
@@ -50,7 +50,8 @@
#undef CONFIG_SHOW_BOOT_PROGRESS
/* SMC9111 */
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE (0xB0000000)
/* MEMORY */
diff --git a/include/configs/PK1C20.h b/include/configs/PK1C20.h
index 522349f..cf6f7a9 100644
--- a/include/configs/PK1C20.h
+++ b/include/configs/PK1C20.h
@@ -151,7 +151,8 @@
* cache bypass so there's no need to monkey with inx/outx macros.
*----------------------------------------------------------------------*/
#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
-#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 /* Using SMC91c111 */
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
diff --git a/include/configs/bf533-ezkit.h b/include/configs/bf533-ezkit.h
index f896cb0..8f23f1d 100644
--- a/include/configs/bf533-ezkit.h
+++ b/include/configs/bf533-ezkit.h
@@ -65,7 +65,8 @@
* Network Settings
*/
#define ADI_CMDS_NETWORK 1
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x20310300
#define SMC91111_EEPROM_INIT() \
do { \
diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h
index 4be2a5c..4693f00 100644
--- a/include/configs/bf533-stamp.h
+++ b/include/configs/bf533-stamp.h
@@ -60,7 +60,8 @@
* Network Settings
*/
#define ADI_CMDS_NETWORK 1
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x20300300
#define SMC91111_EEPROM_INIT() \
do { \
diff --git a/include/configs/bf538f-ezkit.h b/include/configs/bf538f-ezkit.h
index 535687f..c4d899d 100644
--- a/include/configs/bf538f-ezkit.h
+++ b/include/configs/bf538f-ezkit.h
@@ -60,7 +60,8 @@
* Network Settings
*/
#define ADI_CMDS_NETWORK 1
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x20310300
#define CONFIG_HOSTNAME bf538f-ezkit
/* Uncomment next line to use fixed MAC address */
diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h
index 4779a97..a1fa80b 100644
--- a/include/configs/bf561-ezkit.h
+++ b/include/configs/bf561-ezkit.h
@@ -60,7 +60,8 @@
* Network Settings
*/
#define ADI_CMDS_NETWORK 1
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x2C010300
#define CONFIG_SMC_USE_32_BIT 1
#define CONFIG_HOSTNAME bf561-ezkit
diff --git a/include/configs/blackstamp.h b/include/configs/blackstamp.h
index 887f3fb..6c9b3e0 100644
--- a/include/configs/blackstamp.h
+++ b/include/configs/blackstamp.h
@@ -30,7 +30,8 @@
/*
* Board settings
*/
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x20300300
/* FLASH/ETHERNET uses the same address range
diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h
index b924758..477b94a 100644
--- a/include/configs/cerf250.h
+++ b/include/configs/cerf250.h
@@ -53,7 +53,8 @@
/*
* Hardware drivers
*/
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE 0x04000300
#define CONFIG_SMC_USE_32_BIT
diff --git a/include/configs/cm-bf533.h b/include/configs/cm-bf533.h
index ea548e9..06eb288 100644
--- a/include/configs/cm-bf533.h
+++ b/include/configs/cm-bf533.h
@@ -60,7 +60,8 @@
* Network Settings
*/
#define ADI_CMDS_NETWORK 1
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x20200300
#define CONFIG_HOSTNAME cm-bf533
/* Uncomment next line to use fixed MAC address */
diff --git a/include/configs/cm-bf561.h b/include/configs/cm-bf561.h
index 1153f11..dd747c8 100644
--- a/include/configs/cm-bf561.h
+++ b/include/configs/cm-bf561.h
@@ -61,7 +61,8 @@
*/
#define ADI_CMDS_NETWORK 1
/* The next 2 lines are for use with DEV-BF5xx */
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x28000300
/* The next 3 lines are for use with EXT-BF5xx-USB-ETH2 */
/* #define CONFIG_DRIVER_SMC911X 1 */
diff --git a/include/configs/cradle.h b/include/configs/cradle.h
index b150c22..200b61e 100644
--- a/include/configs/cradle.h
+++ b/include/configs/cradle.h
@@ -49,7 +49,8 @@
/*
* Hardware drivers
*/
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE 0x10000300
#define CONFIG_SMC91111_EXT_PHY
#define CONFIG_SMC_USE_32_BIT
diff --git a/include/configs/dnp1110.h b/include/configs/dnp1110.h
index b6cfc67..e48e20f 100644
--- a/include/configs/dnp1110.h
+++ b/include/configs/dnp1110.h
@@ -54,7 +54,8 @@
/*
* Hardware drivers
*/
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE 0x20000300
diff --git a/include/configs/gr_cpci_ax2000.h b/include/configs/gr_cpci_ax2000.h
index bbe635b..d188439 100644
--- a/include/configs/gr_cpci_ax2000.h
+++ b/include/configs/gr_cpci_ax2000.h
@@ -292,7 +292,8 @@
/*
* Ethernet configuration uses on board SMC91C111
*/
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
diff --git a/include/configs/gr_ep2s60.h b/include/configs/gr_ep2s60.h
index 7b0a08f..3a568ff 100644
--- a/include/configs/gr_ep2s60.h
+++ b/include/configs/gr_ep2s60.h
@@ -267,7 +267,8 @@
#ifndef USE_GRETH
/* USE SMC91C111 MAC */
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
diff --git a/include/configs/innokom.h b/include/configs/innokom.h
index ed03ad3..9cb0d42 100644
--- a/include/configs/innokom.h
+++ b/include/configs/innokom.h
@@ -157,7 +157,8 @@
/*
* SMSC91C111 Network Card
*/
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x14000000 /* chip select 5 */
#undef CONFIG_SMC_USE_32_BIT /* 16 bit bus access */
#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h
index e38d569..caafc93 100644
--- a/include/configs/integratorcp.h
+++ b/include/configs/integratorcp.h
@@ -53,7 +53,8 @@
/*
* Hardware drivers
*/
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC_USE_32_BIT
#define CONFIG_SMC91111_BASE 0xC8000000
#undef CONFIG_SMC91111_EXT_PHY
diff --git a/include/configs/logodl.h b/include/configs/logodl.h
index 5b903f0..0535ee1 100644
--- a/include/configs/logodl.h
+++ b/include/configs/logodl.h
@@ -133,7 +133,8 @@
* SMSC91C111 Network Card
*/
#if 0
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x10000000 /* chip select 4 */
#undef CONFIG_SMC_USE_32_BIT /* 16 bit bus access */
#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
diff --git a/include/configs/lpd7a400-10.h b/include/configs/lpd7a400-10.h
index 6145c37..5f57c3a 100644
--- a/include/configs/lpd7a400-10.h
+++ b/include/configs/lpd7a400-10.h
@@ -72,7 +72,8 @@
* Default IO base of chip is 0x300, Card Engine has this address lines
* (LAN chip) tied to Vcc, so we just care about the chip select
*/
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE (0x70000000)
#undef CONFIG_SMC_USE_32_BIT
#define CONFIG_SMC_USE_IOFUNCS
diff --git a/include/configs/lpd7a404-10.h b/include/configs/lpd7a404-10.h
index ce23f3d..9074e28 100644
--- a/include/configs/lpd7a404-10.h
+++ b/include/configs/lpd7a404-10.h
@@ -72,7 +72,8 @@
* Default IO base of chip is 0x300, Card Engine has this address lines
* (LAN chip) tied to Vcc, so we just care about the chip select
*/
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE (0x70000000)
#undef CONFIG_SMC_USE_32_BIT
#define CONFIG_SMC_USE_IOFUNCS
diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h
index 6755af3..0251428 100644
--- a/include/configs/ms7722se.h
+++ b/include/configs/ms7722se.h
@@ -48,7 +48,8 @@
#undef CONFIG_SHOW_BOOT_PROGRESS
/* SMC9111 */
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE (0xB8000000)
/* MEMORY */
diff --git a/include/configs/netstar.h b/include/configs/netstar.h
index f0b4207..7bddf24 100644
--- a/include/configs/netstar.h
+++ b/include/configs/netstar.h
@@ -93,7 +93,8 @@
#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */
#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE 0x04000300
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
diff --git a/include/configs/nhk8815.h b/include/configs/nhk8815.h
index 3e2e09f..bf0c7bc 100644
--- a/include/configs/nhk8815.h
+++ b/include/configs/nhk8815.h
@@ -116,7 +116,8 @@
#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
#define __mem_isa(a) ((a) + PCI_MEMORY_VADDR)
-#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111*/
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 /* Using SMC91c111*/
#define CONFIG_SMC91111_BASE 0x34000300
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
#define CONFIG_SMC_USE_32_BIT
diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h
index 2cae8ca..6c1defc 100644
--- a/include/configs/pxa255_idp.h
+++ b/include/configs/pxa255_idp.h
@@ -87,7 +87,8 @@
/*
* Hardware drivers
*/
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE (PXA_CS5_PHYS + IDP_CS5_ETH_OFFSET + 0x300)
#define CONFIG_SMC_USE_32_BIT 1
/* #define CONFIG_SMC_USE_IOFUNCS */
diff --git a/include/configs/versatile.h b/include/configs/versatile.h
index a9b70cc..4273b84 100644
--- a/include/configs/versatile.h
+++ b/include/configs/versatile.h
@@ -82,7 +82,8 @@
* Hardware drivers
*/
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC_USE_32_BIT
#define CONFIG_SMC91111_BASE 0x10010000
#undef CONFIG_SMC91111_EXT_PHY
diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h
index c9c3132..0dde65d 100644
--- a/include/configs/voiceblue.h
+++ b/include/configs/voiceblue.h
@@ -94,7 +94,8 @@
/*
* Hardware drivers
*/
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE 0x08000300
#define CONFIG_HARD_I2C
diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h
index 83883f6..1329f0f 100644
--- a/include/configs/xaeniax.h
+++ b/include/configs/xaeniax.h
@@ -196,7 +196,8 @@
/*
* SMSC91C111 Network Card
*/
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x10000300 /* chip select 3 */
#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
diff --git a/include/configs/xm250.h b/include/configs/xm250.h
index f18701a..cd56ce7 100644
--- a/include/configs/xm250.h
+++ b/include/configs/xm250.h
@@ -50,7 +50,8 @@
/*
* Hardware drivers
*/
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE 0x04000300
#undef CONFIG_SMC91111_EXT_PHY
#define CONFIG_SMC_USE_32_BIT
diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h
index 2697cca..f68461b 100644
--- a/include/configs/xsengine.h
+++ b/include/configs/xsengine.h
@@ -94,7 +94,8 @@
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
/* Hardware drivers */
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE 0x04000300
#define CONFIG_SMC_USE_32_BIT 1
diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h
index 86b6ea1..36c341e 100644
--- a/include/configs/zylonite.h
+++ b/include/configs/zylonite.h
@@ -62,7 +62,7 @@
#undef TURN_ON_ETHERNET
#ifdef TURN_ON_ETHERNET
-# define CONFIG_DRIVER_SMC91111 1
+# define CONFIG_SMC91111 1
# define CONFIG_SMC91111_BASE 0x14000300
# define CONFIG_SMC91111_EXT_PHY
# define CONFIG_SMC_USE_32_BIT
diff --git a/include/netdev.h b/include/netdev.h
index 3e66586..4636b57 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -73,6 +73,7 @@ int rtl8169_initialize(bd_t *bis);
int scc_initialize(bd_t *bis);
int skge_initialize(bd_t *bis);
int smc911x_initialize(u8 dev_num, int base_addr);
+int smc91111_initialize(u8 dev_num, int base_addr);
int tsi108_eth_initialize(bd_t *bis);
int uec_initialize(int index);
int uec_standard_init(bd_t *bis);
--
1.5.6.3
4
18

[U-Boot] [help] is there anything wrong with my previously sent A320 patches?
by Po-Yu Chuang 05 Oct '09
by Po-Yu Chuang 05 Oct '09
05 Oct '09
Dear Jean-Christophe PLAGNIOL-VILLARD and Wolfgang Denk,
I sent the following patches two weeks ago and got no reply.
Maybe you did not receive the mails?
I wonder if there was something wrong with my mail server or if I
messed up something.
[U-Boot] [PATCH v6 1/2 resend] arm: A320: driver for FTRTC010 real time clock
http://lists.denx.de/pipermail/u-boot/2009-September/059753.html
[U-Boot] [PATCH v6 2/2 resend] arm: A320: Add support for Faraday A320
evaluation board
http://lists.denx.de/pipermail/u-boot/2009-September/059755.html
Please let me know if there is anything wrong.
Thank you.
best regards,
Po-Yu Chuang
2
3
I will be merging the arm/next branch to arm/master next weekend.
Interested people should check their patches and boards are up to date
in arm/next.
Tom
1
0