October 2009 - U-Boot

[U-Boot] [PATCH 0/3 v4] New MIIPHYBB implementation with multi-bus support
by Luigi 'Comio' Mantellini 10 Oct '09

10 Oct '09

This patch rewrites the miiphybb ( Bit-banged MII bus driver ) in order to support an arbitrary number of mii buses. This feature is useful when your board uses different mii buses for different phys and all (or a part) of these buses are implemented via bit-banging mode. The driver requires that the following macros should be defined into the board configuration file: CONFIG_BITBANGMII - Enable the miiphybb driver CONFIG_BITBANGMII_MULTI - Enable the multi bus support If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs to define at least the following macros: MII_INIT - Generic code to enable the MII bus (optional) MDIO_DECLARE - Declaration needed to access to the MDIO pin (optional) MDIO_ACTIVE - Activate the MDIO pin as out pin MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin MDIO_READ - Read the MDIO pin MDIO(v) - Write v on the MDIO pin MDC_DECLARE - Declaration needed to access to the MDC pin (optional) MDC(v) - Write v on the MDC pin The previous macros make the driver compatible with the previous version (that didn't support the multi-bus). When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill the bb_miiphy_buses[] array with a record for each required bus and declare the bb_miiphy_buses_num variable with the number of mii buses. The record (struct bb_miiphy_bus) has the following fields/callbacks (see miiphy.h for details): char name[] - The symbolic name that must be equal to the MII bus registered name int (*init)() - Initialization function called at startup time (just before the Ethernet initialization) int (*mdio_active)() - Activate the MDIO pin as output int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin int (*set_mdio)() - Write the MDIO pin int (*get_mdio)() - Read the MDIO pin int (*set_mdc)() - Write the MDC pin int (*delay)() - Delay function void *priv - Private data used by board specific code The board code will look like: struct bb_miiphy_bus bb_miiphy_buses[] = { { .name = "miibus#1", .init = b1_init, .mdio_active = b1_mdio_active, ... }, { .name = "miibus#2", .init = b2_init, .mdio_active = b2_mdio_active, ... }, ... }; int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) / sizeof(bb_miiphy_buses[0]); Patch Changelog: v1 -- First (broken) release v2 -- Fix some typos and disable callbacks pointers relacation (if CONFIG_RELOC_FIXUP_WORKS is not defined) v3 -- Do not relocate NULL pointers v4 -- Code Cleanup. Luigi 'Comio' Mantellini (3): New Bit-banged MII driver (MIIPHYBB) implementation with multi-bus support. Add bb_miiphy_init call before any ethernet bring-up code. Update all board to support new bbmiiphy driver (with multibus support) drivers/net/phy/miiphybb.c | 346 +++++++++++++++++++++++++++++------------- include/configs/ISPAN.h | 4 + include/configs/MPC8260ADS.h | 3 + include/configs/MPC8266ADS.h | 4 + include/configs/MPC8560ADS.h | 4 + include/configs/Rattler.h | 4 + include/configs/SBC8540.h | 4 + include/configs/TQM8272.h | 3 + include/configs/VoVPN-GW.h | 4 + include/configs/ZPC1900.h | 4 + include/configs/ep8248.h | 4 + include/configs/ep82xxm.h | 4 + include/configs/gw8260.h | 4 + include/configs/hymod.h | 12 ++ include/configs/muas3001.h | 4 + include/configs/ppmc8260.h | 4 + include/configs/sacsng.h | 4 + include/configs/sbc8260.h | 4 + include/configs/sbc8560.h | 4 + include/miiphy.h | 25 +++- lib_arm/board.c | 7 + lib_avr32/board.c | 7 + lib_blackfin/board.c | 7 + lib_i386/board.c | 9 +- lib_m68k/board.c | 7 + lib_mips/board.c | 7 + lib_ppc/board.c | 7 + lib_sh/board.c | 7 + lib_sparc/board.c | 7 + 29 files changed, 408 insertions(+), 106 deletions(-)

2 5

[U-Boot] [PATCH V3 2/3] lib_generic memset: fill one word at a time if possible
by Alessandro Rubini 10 Oct '09

10 Oct '09

From: Alessandro Rubini <rubini(a)unipv.it> If the destination is aligned, fill ulong values until possible. Then fill remaining part by bytes. Signed-off-by: Alessandro Rubini <rubini(a)unipv.it> Acked-by: Andrea Gallo <andrea.gallo(a)stericsson.com> --- lib_generic/string.c | 22 +++++++++++++++++++--- 1 files changed, 19 insertions(+), 3 deletions(-) diff --git a/lib_generic/string.c b/lib_generic/string.c index 9bee79b..1575c63 100644 --- a/lib_generic/string.c +++ b/lib_generic/string.c @@ -403,10 +403,26 @@ char *strswab(const char *s) */ void * memset(void * s,int c,size_t count) { - char *xs = (char *) s; - + unsigned long *sl = (unsigned long *) s; + unsigned long cl = 0; + char *s8; + int i; + + /* do it one word at a time (32 bits or 64 bits) while possible */ + if ( ((count | (ulong)s) & (sizeof(*sl) - 1)) == 0) { + for (i=0; i<sizeof(*sl); ++i) { + cl <<= 8; + cl |= c & 0xff; + } + while (count >= sizeof(*sl)) { + *sl++ = cl; + count -= sizeof(*sl); + } + } + /* fill 8 bits at a time */ + s8 = (char *)sl; while (count--) - *xs++ = c; + *s8++ = c; return s; } -- 1.5.6.5

2 1

[U-Boot] AT91 SD/MMC Patches
by Dan Christensen 10 Oct '09

10 Oct '09

Hello. I'm attempting to use the AT91 SD/MMC patches with my AT91SAM9G45-EK-ES devkit to boot a Linux kernel off of an SD card. Starting with 2009.08, I've applied: http://lists.denx.de/pipermail/u-boot/2009-August/059456.html http://lists.denx.de/pipermail/u-boot/2009-September/060053.html http://lists.denx.de/pipermail/u-boot/2009-September/060243.html Then I added: #ifdef CONFIG_ATMEL_MCI int cpu_mmc_init(bd_t *bis) { atmel_mci_init(bis); } #endif to the end of cpu/arm926ejs/at91/cpu.c per the patch at: http://lists.denx.de/pipermail/u-boot/2009-August/059457.html and things seem to be showing up on boot. "MMC: ATMEL MCI: 0" In an effort to enable the SD card functionality I added the following to include/configs/at91sam9m10g45ek.h: /* SD Card */ #define CONFIG_CMD_EXT2 1 #define CONFIG_CMD_MMC 1 #define CONFIG_MMC 1 #define CONFIG_GENERIC_MMC 1 #define CONFIG_ATMEL_MCI 1 However, once I 'mmc init' and try 'ext2ls mmc 0' all I get is: ** Bad partition - mmc 0:1 ** After adding some debugging information it seemed as though get_partition_info was failing, and print_part failed with: ## Unknown partition table Per a suggestion from the IRC channel, I verified that I have an MBR on the SD card, instead of just a VBR. Thanks, Dan

1 1

[U-Boot] [PATCH] mpc83xx: cosmetic comment update relating to SPD EEPROM
by Paul Gortmaker 09 Oct '09

09 Oct '09

commit 6d0f6bcf337c5261c08fabe12982178c2c489d76 did the big rename of CFG_ macros to CONFIG_SYS macros. But it missed a couple of instances within comments. Signed-off-by: Paul Gortmaker <paul.gortmaker(a)windriver.com> --- include/configs/sbc8349.h | 2 +- include/configs/vme8349.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index bf7cf82..4dea27d 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -304,7 +304,7 @@ #define CONFIG_SYS_I2C1_OFFSET 0x3000 #define CONFIG_SYS_I2C2_OFFSET 0x3100 #define CONFIG_SYS_I2C_OFFSET CONFIG_SYS_I2C2_OFFSET -/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SPD_BUS_NUM... */ +/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */ /* TSEC */ #define CONFIG_SYS_TSEC1_OFFSET 0x24000 diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index d0690fe..f9db73b 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -224,7 +224,7 @@ #define CONFIG_SYS_I2C1_OFFSET 0x3000 #define CONFIG_SYS_I2C2_OFFSET 0x3100 #define CONFIG_SYS_I2C_OFFSET CONFIG_SYS_I2C1_OFFSET -/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SPD_BUS_NUM... */ +/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */ #define CONFIG_SYS_I2C_8574_ADDR2 0x20 /* I2C1, PCF8574 */ -- 1.6.5.rc1

2 1

[U-Boot] problem detecting CFI
by wpa＠fastmail.fm 09 Oct '09

09 Oct '09

I have a working u-boot 2008.10 on a mips 32 board and am trying to port it over to u-boot 2009.06. So I used buildroot 2009.08 to build the tool chain for my mips32 board as well as u-boot2009.06. I also copied the previous u-boot initialization code to initialize timer, serial port, ram and etc from u-boot 2008.10 to 2009.06. Right now the problem is the new u-boot 2009.06 does not detect cfi of the flash. I am pretty sure u-boot is running from SDRAM when the problem happens because the address is in the range of SDRAM. Please let me know if you have any suggestion - I am running out of ideas. I am attaching the printout from both the working u-boot 2008.10 and u-boot 2009.06 below. Thanks a lot. U-Boot 2009.06 (Sep 30 2009 - 18:41:26) Reset Cause: Hardware Reset DRAM: 64 MB Top of RAM usable for U-Boot at: 98000000 Reserving 139k for U-Boot at: 97fdc000 Reserving 4352k for malloc() at: 97b9c000 Reserving 36 Bytes for Board Info at: 97b9bfdc Reserving 36 Bytes for Global Data at: 97b9bfb8 Reserving 128k for boot params() at: 97b7bfb8 Stack Pointer at: 97b7bf98 Now running in RAM - U-Boot at: 97fdc000 flash detect cfi not found flash detect cfi not found U-Boot 2008.10 (Sep 30 2009 - 11:37:03) Reset Cause: Hardware Reset DRAM: 64 MB Top of RAM usable for U-Boot at: 98000000 Reserving 736k for U-Boot at: 97f44000 Reserving 4352k for malloc() at: 97b04000 Reserving 44 Bytes for Board Info at: 97b03fd4 Reserving 36 Bytes for Global Data at: 97b03fb0 Reserving 128k for boot params() at: 97ae3fb0 Stack Pointer at: 97ae3f98 Now running in RAM - U-Boot at: 97f44000 flash detect cfi fwc addr b0000000 cmd f0 f0 8bit x 8 bit fwc addr b0000000 cmd ff ff 8bit x 8 bit fwc addr b0000055 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr b0000010 is= 4f 51 fwc addr b0000555 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr b0000010 is= 4f 51 fwc addr b0000000 cmd f0 f0f0 16bit x 8 bit fwc addr b0000000 cmd ff ffff 16bit x 8 bit fwc addr b00000aa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr b0000020 is= 5151 5151 is= cmd 52(R) addr b0000022 is= 5252 5252 is= cmd 59(Y) addr b0000024 is= 5959 5959 device interface is 2 found port 2 chip 1 port 16 bits chip 8 bits

2 3

[U-Boot] [PATCH v2 3/3] ppc/p1_p1_RDB: DDR Relocation support for NAND/SD/eSPI Boot
by Dipen Dudhat 09 Oct '09

09 Oct '09

This patch adds support to boot from NAND/eSDHC/eSPI using DDR on P1 & P2 RDB platforms. Specifically this support needed when L2 Cache size is less than 512K. For this one define "CONFIG_L2_RELOC" has added in platform config file. Signed-off-by: Dipen Dudhat <dipen.dudhat(a)freescale.com> --- - Applies to http://git.denx.de/u-boot.git board/freescale/p1_p2_rdb/config.mk | 8 +++ board/freescale/p1_p2_rdb/ddr.c | 3 + board/freescale/p1_p2_rdb/tlb.c | 9 +++- include/configs/P1_P2_RDB.h | 27 +++++++++++ nand_spl/board/freescale/p1_p2_rdb/nand_boot.c | 59 ++++++++++++++++++++++++ 5 files changed, 105 insertions(+), 1 deletions(-) diff --git a/board/freescale/p1_p2_rdb/config.mk b/board/freescale/p1_p2_rdb/config.mk index 0f7a048..e76b59c 100644 --- a/board/freescale/p1_p2_rdb/config.mk +++ b/board/freescale/p1_p2_rdb/config.mk @@ -33,12 +33,20 @@ endif ifeq ($(CONFIG_MK_SDCARD), y) TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +ifdef CONFIG_L2_RELOC RESET_VECTOR_ADDRESS = 0xf8fffffc +else +RESET_VECTOR_ADDRESS = 0x1107F000 +endif endif ifeq ($(CONFIG_MK_SPIFLASH), y) TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +ifdef CONFIG_L2_RELOC RESET_VECTOR_ADDRESS = 0xf8fffffc +else +RESET_VECTOR_ADDRESS = 0x1107F000 +endif endif ifndef TEXT_BASE diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c index 37c4b0a..884ff3f 100644 --- a/board/freescale/p1_p2_rdb/ddr.c +++ b/board/freescale/p1_p2_rdb/ddr.c @@ -246,6 +246,9 @@ phys_size_t initdram(int board_type) { phys_size_t dram_size = 0; +#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_L2_RELOC) + return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; +#endif dram_size = fixed_sdram(); set_ddr_laws(0, dram_size, LAW_TRGT_IF_DDR_1); diff --git a/board/freescale/p1_p2_rdb/tlb.c b/board/freescale/p1_p2_rdb/tlb.c index 0009913..c250e3e 100644 --- a/board/freescale/p1_p2_rdb/tlb.c +++ b/board/freescale/p1_p2_rdb/tlb.c @@ -78,7 +78,8 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 6, BOOKE_PAGESZ_1M, 1), -#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR) +#if defined(CONFIG_SYS_RAMBOOT) +#if defined(CONFIG_SYS_INIT_L2_ADDR) /* *I*G - L2SRAM */ SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, @@ -87,6 +88,12 @@ struct fsl_e_tlb_entry tlb_table[] = { CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 8, BOOKE_PAGESZ_256K, 1), +#else + /* *I*G - DDR */ + SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 7, BOOKE_PAGESZ_1G, 1) +#endif #endif }; diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 310242e..e8cf902 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -43,20 +43,35 @@ #define CONFIG_P2020 #endif +/* Remove this define to Boot using DDR instead of L2 SRAM */ +#define CONFIG_L2_RELOC + #ifdef CONFIG_MK_NAND #define CONFIG_NAND_U_BOOT 1 #define CONFIG_RAMBOOT_NAND 1 +#ifdef CONFIG_L2_RELOC #define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000 +#else +#define CONFIG_RAMBOOT_TEXT_BASE 0x01001000 +#endif #endif #ifdef CONFIG_MK_SDCARD #define CONFIG_RAMBOOT_SDCARD 1 +#ifdef CONFIG_L2_RELOC #define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#else +#define CONFIG_RAMBOOT_TEXT_BASE 0x11000000 +#endif #endif #ifdef CONFIG_MK_SPIFLASH #define CONFIG_RAMBOOT_SPIFLASH 1 +#ifdef CONFIG_L2_RELOC #define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#else +#define CONFIG_RAMBOOT_TEXT_BASE 0x11000000 +#endif #endif /* High Level Configuration Options */ @@ -101,6 +116,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Config the L2 Cache as L2 SRAM */ +#ifdef CONFIG_L2_RELOC #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_INIT_L2_ADDR_PHYS 0xff8f80000ull @@ -109,6 +125,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #endif #define CONFIG_SYS_L2_SIZE (512 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#endif /* * Base addresses -- Note these are effective addresses where the @@ -233,6 +250,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) /* NAND boot: 4K NAND loader config */ +#ifdef CONFIG_L2_RELOC #define CONFIG_SYS_NAND_SPL_SIZE 0x1000 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000) #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR) @@ -240,6 +258,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_NAND_U_BOOT_OFFS (0) #define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000) #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) +#else +#define CONFIG_SYS_NAND_SPL_SIZE 0x1000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) + CONFIG_SYS_NAND_SPL_SIZE) +#define CONFIG_SYS_NAND_U_BOOT_DST (0x01000000 - CONFIG_SYS_NAND_SPL_SIZE) +#define CONFIG_SYS_NAND_U_BOOT_START 0x01000000 +#define CONFIG_SYS_NAND_U_BOOT_OFFS (0) +#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000 +#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000) +#endif /* NAND flash config */ #define CONFIG_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE_PHYS \ diff --git a/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c b/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c index bd513b8..23a92b4 100644 --- a/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c +++ b/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c @@ -39,6 +39,60 @@ DECLARE_GLOBAL_DATA_PTR; +#if !defined(CONFIG_L2_RELOC) +#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F +#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202 +#define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 +#define CONFIG_SYS_DDR_CONTROL 0x43000000 /* Type = DDR2*/ +#define CONFIG_SYS_DDR_CONTROL_2 0x24401000 + +#define CONFIG_SYS_DDR_TIMING_3_667 0x00030000 +#define CONFIG_SYS_DDR_TIMING_0_667 0x55770802 +#define CONFIG_SYS_DDR_TIMING_1_667 0x5f599543 +#define CONFIG_SYS_DDR_TIMING_2_667 0x0fa074d1 +#define CONFIG_SYS_DDR_CLK_CTRL_667 0x02800000 +#define CONFIG_SYS_DDR_MODE_1_667 0x00040852 +#define CONFIG_SYS_DDR_MODE_2_667 0x00000000 +#define CONFIG_SYS_DDR_INTERVAL_667 0x0a280100 + +#define udelay(x) {int i, j; for (i = 0; i < x; i++) for (j = 0; j < 10000; j++); } + +void initsdram(void) +{ + + volatile ccsr_ddr_t *ddr= (ccsr_ddr_t *)CONFIG_SYS_MPC85xx_DDR_ADDR; + int d_init, dbw; + volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); + unsigned int ddr_size; + sys_info_t sysinfo; + phys_size_t dram_size = 0; + + set_next_law(0,LAW_SIZE_1G , LAW_TRGT_IF_DDR_1); + + ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS; + ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG; + ddr->cs0_config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2; + + ddr->timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_667; + ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0_667; + ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1_667; + ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_667; + ddr->sdram_mode = CONFIG_SYS_DDR_MODE_1_667; + ddr->sdram_mode_2 = CONFIG_SYS_DDR_MODE_2_667; + ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL_667; + ddr->sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CTRL_667; + ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL; + ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL_2; + + asm("sync;isync"); + + udelay(500); + + ddr->sdram_cfg |= 0x80000000; + +} +#endif + void board_init_f(ulong bootflag) { uint plat_ratio, bus_clk, sys_clk; @@ -69,6 +123,11 @@ void board_init_f(ulong bootflag) puts("\nNAND boot... "); +#ifndef CONFIG_L2_RELOC + /* board specific DDR initialization */ + initsdram(); +#endif + /* copy code to DDR and jump to it - this should not return */ /* NOTE - code has to be copied out of NAND buffer before * other blocks can be read. -- 1.5.6.3

3 4

[U-Boot] OneNAND operations.
by Tuma 09 Oct '09

09 Oct '09

Hello, All! My next question is about OneNAND U-Boot operations. I use U-Boot 2009.08.rc2. There is "onenand" command: onenand read[.oob] addr off size read/write 'size' bytes starting at offset 'off' to/from memory address 'addr', skipping bad blocks. Can someone explain me how should I use it please? I try: onenand read 0x80000000 0x00240000 1000 0x80000000 - is the address where data will be put? "off" (I use 0x00240000 becouse I want to read OMAP3's environments) size is 0x1000 - just for example. And I get: OneNAND read: offset 0x240000, size 0x1000 0 bytes read: OK What is wrong? And what is [.oob]? Thank you! -- Software Developer General Satellite Corp.

2 1

[U-Boot] [PATCH 0/8] ARM Nomadik: video and keypad for nhk8815 (and RFC inside)
by Alessandro Rubini 09 Oct '09

09 Oct '09

This adds support for display and keypad on the Nomadik evaluation kit. I tried to split the changes as best as I can. First the amba-lcd is added as a generic driver, although it receives pre-computed register values, as it misses the code to assemble register bits from higher-level parameters. I think it acceptable for a boot loader, although it could be better. Then, I add the "STMicro Port Extender 2401" as a separete driver. It's an i2c-driven port extender found on the evaluation kit; I coded it in order for other boards to use the code if needed. common/lcd.c is a ifdef hell, and I had a hard time adding 32bpp support. Howerver, it was not something I could submit, because it was even worse with ifdef than now, so I turned to 16bpp. 16bpp wasn't working either, so I tried to fix it. This is definitely suboptimal, and I need help in making it right. Fortunately only the mimc200 uses 16bpp so any issues should be easy to fix. The mimc200 uses CONFIG_ATMEL_LCD, actually, so it falls on different ifdefs than me. May I tell that I'd better remove ATMEL_LCD from common/lcd.c and push specifics in a separate file? Is that task worth endorsing? I think once atmel is out of the way, the other specific clases (pxa and little ore) should be easy, so lcd.c can finally be made more maintainable. Will we do that? BTW: I know the name "make 16bpp work" is not suitable for upstream, but since I expect at least a V2 series to be needed, I'd better avoid renaming it at this point. Similarly, there are no comments within each patch, I'll split this explanation in proper places for V2. Alessandro Rubini (8): video: add amba-clcd prime-cell include/nomadik.h: add physical address for cldc drivers/misc: add stmpe2401 port extender and keypad controller nhk8815.h: define we need stmpe lcd: make 16bpp work nhk8815: added keypad nhk8815: start lower in RAM, so the 800x480 frame buffer fits nhk8815: added lcd support board/st/nhk8815/Makefile | 6 +- board/st/nhk8815/config.mk | 7 +- board/st/nhk8815/keypad.c | 100 +++++++++++++++++++++++++ board/st/nhk8815/lcd.c | 89 ++++++++++++++++++++++ board/st/nhk8815/nhk8815.c | 9 ++ common/lcd.c | 26 +++++-- drivers/misc/Makefile | 1 + drivers/misc/stmpe2401.c | 176 ++++++++++++++++++++++++++++++++++++++++++++ drivers/video/Makefile | 1 + drivers/video/amba.c | 86 +++++++++++++++++++++ include/amba_clcd.h | 85 +++++++++++++++++++++ include/configs/nhk8815.h | 20 +++++- include/nomadik.h | 1 + include/stmpe2401.h | 66 ++++++++++++++++ 14 files changed, 660 insertions(+), 13 deletions(-) create mode 100644 board/st/nhk8815/keypad.c create mode 100644 board/st/nhk8815/lcd.c create mode 100644 drivers/misc/stmpe2401.c create mode 100644 drivers/video/amba.c create mode 100644 include/amba_clcd.h create mode 100644 include/stmpe2401.h

1 8

[U-Boot] AT91 pending patches
by Eric Bénard 09 Oct '09

09 Oct '09

Hi Tom, may you please comment on the following patches : http://article.gmane.org/gmane.comp.boot-loaders.u-boot/67400 http://article.gmane.org/gmane.comp.boot-loaders.u-boot/65674 Many thanks Eric

3 4

[U-Boot] [PATCH V3 3/3] lcd: remove '#if 0' 32-bit scroll, now memcpy does it
by Alessandro Rubini 09 Oct '09

09 Oct '09

Actually, we should use memmove here, as areas overlap, but memmove is not yet optimized. From: Alessandro Rubini <rubini(a)unipv.it> Signed-off-by: Alessandro Rubini <rubini(a)unipv.it> Acked-by: Andrea Gallo <andrea.gallo(a)stericsson.com> --- common/lcd.c | 21 --------------------- 1 files changed, 0 insertions(+), 21 deletions(-) diff --git a/common/lcd.c b/common/lcd.c index dc8fea6..4e31618 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -99,32 +99,11 @@ static int lcd_getfgcolor (void); static void console_scrollup (void) { -#if 1 /* Copy up rows ignoring the first one */ memcpy (CONSOLE_ROW_FIRST, CONSOLE_ROW_SECOND, CONSOLE_SCROLL_SIZE); /* Clear the last one */ memset (CONSOLE_ROW_LAST, COLOR_MASK(lcd_color_bg), CONSOLE_ROW_SIZE); -#else - /* - * Poor attempt to optimize speed by moving "long"s. - * But the code is ugly, and not a bit faster :-( - */ - ulong *t = (ulong *)CONSOLE_ROW_FIRST; - ulong *s = (ulong *)CONSOLE_ROW_SECOND; - ulong l = CONSOLE_SCROLL_SIZE / sizeof(ulong); - uchar c = lcd_color_bg & 0xFF; - ulong val= (c<<24) | (c<<16) | (c<<8) | c; - - while (l--) - *t++ = *s++; - - t = (ulong *)CONSOLE_ROW_LAST; - l = CONSOLE_ROW_SIZE / sizeof(ulong); - - while (l-- > 0) - *t++ = val; -#endif } /*----------------------------------------------------------------------*/ -- 1.5.6.5

1 0