October 2009 - U-Boot

[U-Boot] MPC8541 SPI through CPM
by Alemao 27 Oct '09

27 Oct '09

Hi all, Im trying to use SPI through CPM in my MPC8541 board. I haven't see support for this combination even in the newest U-Boot. So I followed MPC8555E Reference Manual, but I'm having some problems: - I can see the clock and chip select (using a osciloscope) but data out (MOSI) is always zero. - If I use chip select from CPM (SPISEL, dedicated pin), instead a simple GPIO, I got a "Multiple Master Error", as if it was reading the pin. Any help is welcome, thanks! -- Alemao

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[U-Boot] MAC address setting
by J.H.Kim 27 Oct '09

27 Oct '09

Hi, everyone I'm using AT91SAM9260 board. I'm now loading the kernel with serial cable. But it is too slow. So, I'm going to use tftp. When ftpbootm, u-boot told me to specify ethernet address. How I can find ethernet mac address? Thanks in advance. Best Regards, J.Hwan Kim

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[U-Boot] [PATCH] sheevaplug: correct SDRAM address control register value
by Mark Asselstine 27 Oct '09

27 Oct '09

The SheevaPlug DevKit is shipped with 4x8 by 1Gb DDR devices in two banks for a total of 512MB of RAM. Based on this configuration the existing values for SDRAM address control register are incorrect and result in random kernel oops as memory is incorrectly accessed (while for example extracting a large tarball such as a rootfs). Based on the hardware configuration along with the supporting documentation from Marvell these are the correct values, as well this change mimics values previously used in Marvell's own u-boot git tree for the SheevaPlug. Other variants of the hardware such as the PogoPlug and TonidoPlug may have different memory configurations but to properly support those additional board directories should be maintained or a better system to support other kwb*.cfg is needed. Tested on SheevaPlug DevKit. Signed-off-by: Mark Asselstine <mark.asselstine(a)windriver.com> --- board/Marvell/sheevaplug/kwbimage.cfg | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/board/Marvell/sheevaplug/kwbimage.cfg b/board/Marvell/sheevaplug/kwbimage.cfg index 6c47d62..61be8c2 100644 --- a/board/Marvell/sheevaplug/kwbimage.cfg +++ b/board/Marvell/sheevaplug/kwbimage.cfg @@ -74,11 +74,11 @@ DATA 0xFFD0140C 0x00000a33 # DDR Timing (High) # bit12-11: TW2W # bit31-13: zero required -DATA 0xFFD01410 0x00000099 # DDR Address Control -# bit1-0: 01, Cs0width=x16 -# bit3-2: 10, Cs0size=512Mb -# bit5-4: 01, Cs1width=x16 -# bit7-6: 10, Cs1size=512Mb +DATA 0xFFD01410 0x000000cc # DDR Address Control +# bit1-0: 00, Cs0width=reserved +# bit3-2: 11, Cs0size=1Gb +# bit5-4: 00, Cs1width=reserved +# bit7-6: 11, Cs1size=1Gb # bit9-8: 00, Cs2width=nonexistent # bit11-10: 00, Cs2size =nonexistent # bit13-12: 00, Cs3width=nonexistent -- 1.5.5.1

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Re: [U-Boot] How to enable 2 FCC Ports while booting using CONFIG_NET_MULTI
by Gurumurthy Gowdar 27 Oct '09

27 Oct '09

Dear Sir, i want only one ethernet port active at a time. so to acheive this how to use CONFIG_NET_MULTI. i have enabled one ethernet port at present i.e. FCC2. how to enable two ports so that when i ping or give network command its should ping depending upon selected port. With Regards, Gurumurthy On Tue, 27 Oct 2009 14:09:51 +0530 wrote >Dear "Gurumurthy Gowdar", In message you wrote: > > > please let me know how to enable two Ethernet Ports in > U-boot for MPC8280 at booting time. After booting i should be able to > ping the two ports i.e. FCC1 and FCC2 only by connecting the ethernet > cable to the repective port (FCC1 & FCC2. You don't. You don;t do this at all. U-Boot does not enable any peripherals "at booting time". This is a design principle, see http://www.denx.de/wiki/view/U-Boot/DesignPrinciples#2_Keep_it_Fast Ethernet ininitlization is only done when U-Boot attempts to perform a network command, and then only that single interface gets initialized which U-Boot is going to use. > currently i have enabled one port FCC2 as ethact port, can i change > this depending by which port i want to ping. Yes, you can toggle between several ports. But keep in mind that only one of them will be active at any time, if any at all. > i came to know about CONFIG_NET_MULTI whether this will be the > solution for using two ports at a time. You cannot use two ports at the same time, only one or the other. But it is possible to switch at runtime (either automatically when a download fails or manually by setting the "ethact" environment variable accordingly). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de If it went on at this rate, in several billion years he'd be rich beyond his wildest dreams! - Terry Pratchett, _Soul Music_

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[U-Boot] How to enable 2 FCC Ports while booting using CONFIG_NET_MULTI
by Gurumurthy Gowdar 27 Oct '09

27 Oct '09

Dear All, please let me know how to enable two Ethernet Ports in U-boot for MPC8280 at booting time. After booting i should be able to ping the two ports i.e. FCC1 and FCC2 only by connecting the ethernet cable to the repective port (FCC1 & FCC2. currently i have enabled one port FCC2 as ethact port, can i change this depending by which port i want to ping. i came to know about CONFIG_NET_MULTI whether this will be the solution for using two ports at a time. With Thanks and Regards, Gurumurthy

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[U-Boot] [PATCH] MPC85xx crashes on SPE instruction (misalignment?), workaround tested to work
by Leon Woestenberg 27 Oct '09

27 Oct '09

Hello, my MPC85xx U-Boot crashed on the last instruction: openembedded/tmp/cross/ppce500v2/bin/powerpc-angstrom-linux-gnuspe-objdump -M e500x2 -S u-boot | less int parse_stream_outer(struct in_str *inp, int flag) { effa4784: 94 21 ff 38 stwu r1,-200(r1) effa4788: 7c 08 02 a6 mflr r0 effa478c: 42 9f 00 05 bcl- 20,4*cr7+so,effa4790 <parse_stream_outer+0xc> effa4790: 7d 80 00 26 mfcr r12 effa4794: 13 c1 b3 21 evstdd r30,176(r1) ...which is a SPE instruction, although -mno-spe was used. tmp/cross/ppce500v2/bin/powerpc-angstrom-linux-gnuspe-gcc --version powerpc-angstrom-linux-gnuspe-gcc (GCC) 4.3.3 Seems to be a known issue (since 2008-04?!) Googled some, turns out this patch/workaround works for me on MPC8536DS. Signed-off-by: Leon Woestenberg <leon(a)sidebranch.com> Index: git/cpu/mpc85xx/config.mk =================================================================== --- git.orig/cpu/mpc85xx/config.mk 2009-10-23 13:15:11.000000000 +0200 +++ git/cpu/mpc85xx/config.mk 2009-10-23 13:17:27.000000000 +0200 @@ -24,6 +24,11 @@ PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -ffixed-r2 -Wa,-me500 -msoft-float -mno-string + +# -mspe=yes is needed to have -mno-spe accepted by a buggy GCC; +# see "[PATCH,rs6000] make -mno-spe work as expected" on +# http://gcc.gnu.org/ml/gcc-patches/2008-04/msg00311.html +PLATFORM_CPPFLAGS +=$(call cc-option,-mspe=yes) PLATFORM_CPPFLAGS +=$(call cc-option,-mno-spe) # Use default linker script. Board port can override in board/*/config.mk Regards, -- Leon

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[U-Boot] [PATCH] ppc/85xx: Fix building NAND_SPL out of tree
by Kumar Gala 27 Oct '09

27 Oct '09

We need to source files to exist in the O=<FOO> nand_spl dir when we build out of tree. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- nand_spl/board/freescale/mpc8536ds/Makefile | 6 ++++++ nand_spl/board/freescale/p1_p2_rdb/Makefile | 6 ++++++ 2 files changed, 12 insertions(+), 0 deletions(-) diff --git a/nand_spl/board/freescale/mpc8536ds/Makefile b/nand_spl/board/freescale/mpc8536ds/Makefile index 1d5e319..7ed9d61 100644 --- a/nand_spl/board/freescale/mpc8536ds/Makefile +++ b/nand_spl/board/freescale/mpc8536ds/Makefile @@ -111,6 +111,12 @@ $(obj)tlb_table.c: @rm -f $(obj)tlb_table.c ln -sf $(SRCTREE)/board/$(BOARDDIR)/tlb.c $(obj)tlb_table.c +ifneq ($(OBJTREE), $(SRCTREE)) +$(obj)nand_boot.c: + @rm -f $(obj)nand_boot.c + ln -s $(SRCTREE)/nand_spl/board/$(BOARDDIR)/nand_boot.c $(obj)nand_boot.c +endif + ######################################################################### $(obj)%.o: $(obj)%.S diff --git a/nand_spl/board/freescale/p1_p2_rdb/Makefile b/nand_spl/board/freescale/p1_p2_rdb/Makefile index 1d5e319..7ed9d61 100644 --- a/nand_spl/board/freescale/p1_p2_rdb/Makefile +++ b/nand_spl/board/freescale/p1_p2_rdb/Makefile @@ -111,6 +111,12 @@ $(obj)tlb_table.c: @rm -f $(obj)tlb_table.c ln -sf $(SRCTREE)/board/$(BOARDDIR)/tlb.c $(obj)tlb_table.c +ifneq ($(OBJTREE), $(SRCTREE)) +$(obj)nand_boot.c: + @rm -f $(obj)nand_boot.c + ln -s $(SRCTREE)/nand_spl/board/$(BOARDDIR)/nand_boot.c $(obj)nand_boot.c +endif + ######################################################################### $(obj)%.o: $(obj)%.S -- 1.6.0.6

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[U-Boot] [PATCH] ppc/85xx: Make L2 support more robust
by Kumar Gala 27 Oct '09

27 Oct '09

From: Dave Liu <daveliu(a)freescale.com> According the user manual, we need loop-check the L2 enable bit set. Signed-off-by: Dave Liu <daveliu(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- cpu/mpc85xx/cpu_init.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index 5336934..0041a60 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -360,8 +360,11 @@ int cpu_init_r(void) /* enable the cache */ mtspr(SPRN_L2CSR0, CONFIG_SYS_INIT_L2CSR0); - if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E) + if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E) { + while (!(mfspr(SPRN_L2CSR0) & L2CSR0_L2E)) + ; printf("%d KB enabled\n", (l2cfg0 & 0x3fff) * 64); + } #else puts("disabled\n"); #endif -- 1.6.0.6

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[U-Boot] P1020RDB_NAND build issues
by Wolfgang Denk 27 Oct '09

27 Oct '09

Dear Kumar, the P1020RDB_NAND is not build clean. For local (in-tree) builds I get: Configuring for P1_P2_RDB board... nand_boot.c: In function 'board_init_f': nand_boot.c:44: warning: 'sys_clk' may be used uninitialized in this function and for out-of-tree builds I get even this: Configuring for P1_P2_RDB board... make[1]: *** No rule to make target `/work/wd/tmp-ppc/nand_spl/board/freescale/p1_p2_rdb/.depend', needed by `all'. Stop. make: *** [nand_spl] Error 2 make: *** Waiting for unfinished jobs.... ppc_6xx-size: '/work/wd/tmp-ppc/u-boot': No such file Please fix. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Conceptual integrity in turn dictates that the design must proceed from one mind, or from a very small number of agreeing resonant minds. - Frederick Brooks Jr., "The Mythical Man Month"

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[U-Boot] A question about "Initialize GOT pointer"
by XR SU 27 Oct '09

27 Oct '09

hi,all: here is a question, who can tell me? thanks. in uboot file : cpu/mips/start.S /* Initialize GOT pointer. */ bal 1f nop .word _GLOBAL_OFFSET_TABLE_ 1: move gp, ra lw t1, 0(ra) move gp, t1 I do't know why code "move gp, ra" needed? what happened if we remove these code? ___________________________________________________________ 好玩贺卡等你发，邮箱贺卡全新上线！ http://card.mail.cn.yahoo.com/

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