January 2009 - U-Boot

[U-Boot] [PATCH 1/3 v2] MIPS: Add VCT board series support (Part 1/3)
by Stefan Roese 06 Jan '09

06 Jan '09

This patch adds support for the Micronas VCT board series. Currently the following platforms are supported: vct_premium vct_premium_small vct_premium_onenand vct_premium_onenand_small vct_platinum vct_platinum_small vct_platinum_onenand vct_platinum_onenand_small vct_platinumavc vct_platinumavc_small vct_platinumavc_onenand vct_platinumavc_onenand_small One speciality of the VCT board is that it can't access NOR FLASH memory-mapped. It has to use special access functions for this. Signed-off-by: Stefan Roese <sr(a)denx.de> --- v2: - Fixed issues in u-boot.lds mentioned by Andrew Dyer board/micronas/vct/Makefile | 56 +++++ board/micronas/vct/config.mk | 31 +++ board/micronas/vct/ebi.c | 48 +++++ board/micronas/vct/ebi_nor_flash.c | 131 ++++++++++++ board/micronas/vct/ebi_onenand.c | 168 +++++++++++++++ board/micronas/vct/ebi_smc911x.c | 94 +++++++++ board/micronas/vct/gpio.c | 88 ++++++++ board/micronas/vct/smc_eeprom.c | 394 ++++++++++++++++++++++++++++++++++++ board/micronas/vct/top.c | 289 ++++++++++++++++++++++++++ board/micronas/vct/u-boot.lds | 71 +++++++ board/micronas/vct/vct.c | 117 +++++++++++ 11 files changed, 1487 insertions(+), 0 deletions(-) create mode 100644 board/micronas/vct/Makefile create mode 100644 board/micronas/vct/config.mk create mode 100644 board/micronas/vct/ebi.c create mode 100644 board/micronas/vct/ebi_nor_flash.c create mode 100644 board/micronas/vct/ebi_onenand.c create mode 100644 board/micronas/vct/ebi_smc911x.c create mode 100644 board/micronas/vct/gpio.c create mode 100644 board/micronas/vct/smc_eeprom.c create mode 100644 board/micronas/vct/top.c create mode 100644 board/micronas/vct/u-boot.lds create mode 100644 board/micronas/vct/vct.c diff --git a/board/micronas/vct/Makefile b/board/micronas/vct/Makefile new file mode 100644 index 0000000..2f8ece6 --- /dev/null +++ b/board/micronas/vct/Makefile @@ -0,0 +1,56 @@ +# +# (C) Copyright 2008 Stefan Roese <sr(a)denx.de>, DENX Software Engineering +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o +COBJS-y += ebi.o +COBJS-$(CONFIG_VCT_NOR) += ebi_nor_flash.o +COBJS-$(CONFIG_VCT_ONENAND) += ebi_onenand.o +COBJS-$(CONFIG_DRIVER_SMC911X) += ebi_smc911x.o smc_eeprom.o +COBJS-y += gpio.o +COBJS-y += top.o + +COBJS := $(sort $(COBJS-y)) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/micronas/vct/config.mk b/board/micronas/vct/config.mk new file mode 100644 index 0000000..2a71dad --- /dev/null +++ b/board/micronas/vct/config.mk @@ -0,0 +1,31 @@ +# +# (C) Copyright 2008 Stefan Roese <sr(a)denx.de>, DENX Software Engineering +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# vct_xxx boards with MIPS 4Kc CPU core +# + +sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp + +ifndef TEXT_BASE +TEXT_BASE = 0x87000000 +endif diff --git a/board/micronas/vct/ebi.c b/board/micronas/vct/ebi.c new file mode 100644 index 0000000..8e93f69 --- /dev/null +++ b/board/micronas/vct/ebi.c @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2008 Stefan Roese <sr(a)denx.de>, DENX Software Engineering + * + * Copyright (C) 2006 Micronas GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include "vct.h" + +int ebi_initialize(void) +{ +#if defined(CONFIG_VCT_NOR) + if (ebi_init_nor_flash()) + return -1; +#endif + +#if defined(CONFIG_VCT_ONENAND) + if (ebi_init_onenand()) + return -1; +#endif + +#if defined(CONFIG_DRIVER_SMC911X) + if (ebi_init_smc911x()) + return -1; +#endif + + reg_write(EBI_CTRL_SIG_ACTLV(EBI_BASE), 0x00004100); + + ebi_wait(); + + return 0; +} diff --git a/board/micronas/vct/ebi_nor_flash.c b/board/micronas/vct/ebi_nor_flash.c new file mode 100644 index 0000000..ae87643 --- /dev/null +++ b/board/micronas/vct/ebi_nor_flash.c @@ -0,0 +1,131 @@ +/* + * (C) Copyright 2008 Stefan Roese <sr(a)denx.de>, DENX Software Engineering + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include "vct.h" + +static u32 ebi_read(u32 addr) +{ + addr &= ~0xFC000000; + + reg_write(EBI_CPU_IO_ACCS(EBI_BASE), EXT_DEVICE_CHANNEL_2 | addr); + ebi_wait(); + + return reg_read(EBI_IO_ACCS_DATA(EBI_BASE)); +} + +static int ebi_write_u16(u32 addr, u32 data, int fetchIO) +{ + u32 val = (data << 16); + + addr &= ~0xFC000000; + + ebi_wait(); + + reg_write(EBI_IO_ACCS_DATA(EBI_BASE), val); + reg_write(EBI_CPU_IO_ACCS(EBI_BASE), + EXT_DEVICE_CHANNEL_2 | EBI_CPU_WRITE | addr); + ebi_wait(); + + if (fetchIO) { + u32 counter = 0; + while (!(reg_read(EBI_SIG_LEVEL(EBI_BASE)) & EXT_CPU_IORDY_SL)) { + if (counter++ > 0xFFFFFF) + return 1; + } + } + + return 0; +} + +static u16 ebi_read_u16(u32 addr) +{ + return ((ebi_read(addr) >> 16) & 0xFFFF); +} + +static u8 ebi_read_u8(u32 addr) +{ + u32 val = ebi_read(addr) >> 16; + + if (addr & 0x1) + return val & 0xff; + else + return (val >> 8) & 0xff; +} + +/* + * EBI initialization for NOR FLASH access + */ +int ebi_init_nor_flash(void) +{ + reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x83000); + + reg_write(EBI_DEV2_CONFIG1(EBI_BASE), 0x400002); + reg_write(EBI_DEV2_CONFIG2(EBI_BASE), 0x50); + + reg_write(EBI_DEV2_TIM1_RD1(EBI_BASE), 0x409113); + reg_write(EBI_DEV2_TIM1_RD2(EBI_BASE), 0xFF01000); + reg_write(EBI_DEV2_TIM1_WR1(EBI_BASE), 0x04003113); + reg_write(EBI_DEV2_TIM1_WR2(EBI_BASE), 0x3FC12011); + reg_write(EBI_DEV2_TIM_EXT(EBI_BASE), 0xFFF00000); + + return 0; +} + +/* + * Accessor functions replacing the "weak" functions in + * drivers/mtd/cfi_flash.c + */ +void flash_write8(u8 value, void *addr) +{ + ebi_write_u16((u32)addr, value, 0); +} + +void flash_write16(u16 value, void *addr) +{ + ebi_write_u16((u32)addr, value, 0); +} + +u8 flash_read8(void *addr) +{ + return ebi_read_u8((u32)addr); +} + +u16 flash_read16(void *addr) +{ + return ebi_read_u16((u32)addr); +} + +u32 flash_read32(void *addr) +{ + return ((u32)ebi_read_u16((u32)addr) << 16) | + ebi_read_u16((u32)addr + 2); +} + +void *board_flash_read_memcpy(void *dest, const void *src, size_t count) +{ + u16 *tmp = (u16 *)dest, *s = (u16 *)src; + int i; + + for (i = 0; i < count; i += 2) + *tmp++ = flash_read16(s++); + + return dest; +} diff --git a/board/micronas/vct/ebi_onenand.c b/board/micronas/vct/ebi_onenand.c new file mode 100644 index 0000000..5da59b5 --- /dev/null +++ b/board/micronas/vct/ebi_onenand.c @@ -0,0 +1,168 @@ +/* + * (C) Copyright 2008 Stefan Roese <sr(a)denx.de>, DENX Software Engineering + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/onenand.h> +#include "vct.h" + +static u16 ebi_nand_read_word(void __iomem *addr) +{ + reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_2 | (u32)addr)); + ebi_wait(); + + return reg_read(EBI_IO_ACCS_DATA(EBI_BASE)) >> 16; +} + +static void ebi_nand_write_word(u16 data, void __iomem * addr) +{ + ebi_wait(); + reg_write(EBI_IO_ACCS_DATA(EBI_BASE), (data << 16)); + reg_write(EBI_CPU_IO_ACCS(EBI_BASE), + EXT_DEVICE_CHANNEL_2 | EBI_CPU_WRITE | (u32)addr); + ebi_wait(); +} + +/* + * EBI initialization for OneNAND FLASH access + */ +int ebi_init_onenand(void) +{ + reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x83000); + + reg_write(EBI_DEV2_CONFIG1(EBI_BASE), 0x00403002); + reg_write(EBI_DEV2_CONFIG2(EBI_BASE), 0x50); + + reg_write(EBI_DEV3_CONFIG1(EBI_BASE), 0x00403002); + reg_write(EBI_DEV3_CONFIG2(EBI_BASE), 0x0); /* byte/word ordering */ + + reg_write(EBI_DEV2_TIM1_RD1(EBI_BASE), 0x00504000); + reg_write(EBI_DEV2_TIM1_RD2(EBI_BASE), 0x00001000); + reg_write(EBI_DEV2_TIM1_WR1(EBI_BASE), 0x12002223); + reg_write(EBI_DEV2_TIM1_WR2(EBI_BASE), 0x3FC02220); + reg_write(EBI_DEV3_TIM1_RD1(EBI_BASE), 0x00504000); + reg_write(EBI_DEV3_TIM1_RD2(EBI_BASE), 0x00001000); + reg_write(EBI_DEV3_TIM1_WR1(EBI_BASE), 0x05001000); + reg_write(EBI_DEV3_TIM1_WR2(EBI_BASE), 0x00010200); + + reg_write(EBI_DEV2_TIM_EXT(EBI_BASE), 0xFFF00000); + reg_write(EBI_DEV2_EXT_ACC(EBI_BASE), 0x0FFFFFFF); + + reg_write(EBI_DEV3_TIM_EXT(EBI_BASE), 0xFFF00000); + reg_write(EBI_DEV3_EXT_ACC(EBI_BASE), 0x0FFFFFFF); + + /* prepare DMA configuration for EBI */ + reg_write(EBI_DEV3_FIFO_CONFIG(EBI_BASE), 0x0101ff00); + + /* READ only no byte order change, TAG 1 used */ + reg_write(EBI_DEV3_DMA_CONFIG2(EBI_BASE), 0x00000004); + + reg_write(EBI_TAG1_SYS_ID(EBI_BASE), 0x0); /* SCC DMA channel 0 */ + reg_write(EBI_TAG2_SYS_ID(EBI_BASE), 0x1); + reg_write(EBI_TAG3_SYS_ID(EBI_BASE), 0x2); + reg_write(EBI_TAG4_SYS_ID(EBI_BASE), 0x3); + + return 0; +} + +static void *memcpy_16_from_onenand(void *dst, const void *src, unsigned int len) +{ + void *ret = dst; + u16 *d = dst; + u16 *s = (u16 *)src; + + len >>= 1; + while (len-- > 0) + *d++ = ebi_nand_read_word(s++); + + return ret; +} + +static void *memcpy_16_to_onenand(void *dst, const void *src, unsigned int len) +{ + void *ret = dst; + u16 *d = dst; + u16 *s = (u16 *)src; + + len >>= 1; + while (len-- > 0) + ebi_nand_write_word(*s++, d++); + + return ret; +} + +static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) +{ + struct onenand_chip *this = mtd->priv; + + if (ONENAND_CURRENT_BUFFERRAM(this)) { + if (area == ONENAND_DATARAM) + return mtd->writesize; + if (area == ONENAND_SPARERAM) + return mtd->oobsize; + } + + return 0; +} + +static int ebi_read_bufferram(struct mtd_info *mtd, loff_t addr, int area, + unsigned char *buffer, int offset, + size_t count) +{ + struct onenand_chip *this = mtd->priv; + void __iomem *bufferram; + + bufferram = this->base + area; + bufferram += onenand_bufferram_offset(mtd, area); + + memcpy_16_from_onenand(buffer, bufferram + offset, count); + + return 0; +} + +static int ebi_write_bufferram(struct mtd_info *mtd, loff_t addr, int area, + const unsigned char *buffer, int offset, + size_t count) +{ + struct onenand_chip *this = mtd->priv; + void __iomem *bufferram; + + bufferram = this->base + area; + bufferram += onenand_bufferram_offset(mtd, area); + + memcpy_16_to_onenand(bufferram + offset, buffer, count); + + return 0; +} + +void onenand_board_init(struct mtd_info *mtd) +{ + struct onenand_chip *chip = mtd->priv; + + /* + * Insert board specific OneNAND access functions + */ + chip->read_word = ebi_nand_read_word; + chip->write_word = ebi_nand_write_word; + + chip->read_bufferram = ebi_read_bufferram; + chip->read_spareram = ebi_read_bufferram; + chip->write_bufferram = ebi_write_bufferram; +} diff --git a/board/micronas/vct/ebi_smc911x.c b/board/micronas/vct/ebi_smc911x.c new file mode 100644 index 0000000..e1b67a0 --- /dev/null +++ b/board/micronas/vct/ebi_smc911x.c @@ -0,0 +1,94 @@ +/* + * (C) Copyright 2008 Stefan Roese <sr(a)denx.de>, DENX Software Engineering + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include "vct.h" + +/* + * EBI initialization for SMC911x access + */ +int ebi_init_smc911x(void) +{ + reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x00003020); + reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F); + + reg_write(EBI_DEV1_TIM1_RD1(EBI_BASE), 0x00501100); + reg_write(EBI_DEV1_TIM1_RD2(EBI_BASE), 0x0FF02111); + + reg_write(EBI_DEV1_TIM_EXT(EBI_BASE), 0xFFF00000); + reg_write(EBI_DEV1_EXT_ACC(EBI_BASE), 0x0FFFFFFF); + + reg_write(EBI_DEV1_TIM1_WR1(EBI_BASE), 0x05001100); + reg_write(EBI_DEV1_TIM1_WR2(EBI_BASE), 0x3FC21110); + + return 0; +} + +/* + * Accessor functions replacing the "weak" functions in + * drivers/net/smc911x.c + */ +u32 smc911x_reg_read(u32 addr) +{ + volatile u32 data; + + reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F); + ebi_wait(); + reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_1 | addr)); + ebi_wait(); + data = reg_read(EBI_IO_ACCS_DATA(EBI_BASE)); + + return (data); +} + +void smc911x_reg_write(u32 addr, u32 data) +{ + reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F); + ebi_wait(); + reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); + reg_write(EBI_CPU_IO_ACCS(EBI_BASE), + EXT_DEVICE_CHANNEL_1 | EBI_CPU_WRITE | addr); + ebi_wait(); +} + +void pkt_data_push(u32 addr, u32 data) +{ + reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004A); + ebi_wait(); + reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); + reg_write(EBI_CPU_IO_ACCS(EBI_BASE), + EXT_DEVICE_CHANNEL_1 | EBI_CPU_WRITE | addr); + ebi_wait(); + + return; +} + +u32 pkt_data_pull(u32 addr) +{ + volatile u32 data; + + reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004A); + ebi_wait(); + reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_1 | addr)); + ebi_wait(); + data = reg_read(EBI_IO_ACCS_DATA(EBI_BASE)); + + return data; +} diff --git a/board/micronas/vct/gpio.c b/board/micronas/vct/gpio.c new file mode 100644 index 0000000..2c113be --- /dev/null +++ b/board/micronas/vct/gpio.c @@ -0,0 +1,88 @@ +/* + * (C) Copyright 2008 Stefan Roese <sr(a)denx.de>, DENX Software Engineering + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include "vct.h" + +/* + * Find out to which of the 2 gpio modules the pin specified in the + * argument belongs: + * GPIO_MODULE yields 0 for pins 0 to 31, + * 1 for pins 32 to 63 + */ +#define GPIO_MODULE(pin) ((pin) >> 5) + +/* + * Bit position within a 32-bit peripheral register (where every + * bit is one bitslice) + */ +#define MASK(pin) (1 << ((pin) & 0x1F)) +#define BASE_ADDR(mod) module_base[mod] + +/* + * Lookup table for transforming gpio module number 0 to 2 to + * address offsets + */ +static u32 module_base[] = { + GPIO1_BASE, + GPIO2_BASE +}; + +static void clrsetbits(u32 addr, u32 and_mask, u32 or_mask) +{ + reg_write(addr, (reg_read(addr) & ~and_mask) | or_mask); +} + +int vct_gpio_dir(int pin, int dir) +{ + u32 gpio_base; + + gpio_base = BASE_ADDR(GPIO_MODULE(pin)); + + if (dir == 0) + clrsetbits(GPIO_SWPORTA_DDR(gpio_base), MASK(pin), 0); + else + clrsetbits(GPIO_SWPORTA_DDR(gpio_base), 0, MASK(pin)); + + return 0; +} + +void vct_gpio_set(int pin, int val) +{ + u32 gpio_base; + + gpio_base = BASE_ADDR(GPIO_MODULE(pin)); + + if (val == 0) + clrsetbits(GPIO_SWPORTA_DR(gpio_base), MASK(pin), 0); + else + clrsetbits(GPIO_SWPORTA_DR(gpio_base), 0, MASK(pin)); +} + +int vct_gpio_get(int pin) +{ + u32 gpio_base; + u32 value; + + gpio_base = BASE_ADDR(GPIO_MODULE(pin)); + value = reg_read(GPIO_EXT_PORTA(gpio_base)); + + return ((value & MASK(pin)) ? 1 : 0); +} diff --git a/board/micronas/vct/smc_eeprom.c b/board/micronas/vct/smc_eeprom.c new file mode 100644 index 0000000..2bc7ad4 --- /dev/null +++ b/board/micronas/vct/smc_eeprom.c @@ -0,0 +1,394 @@ +/* + * (C) Copyright 2008 Stefan Roese <sr(a)denx.de>, DENX Software Engineering + * + * Copyright 2005, Seagate Technology LLC + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#undef DEBUG + +#include <common.h> +#include <command.h> +#include <config.h> +#include <net.h> + +#include "vct.h" + +#define SMSC9118_BASE CONFIG_DRIVER_SMC911X_BASE +#define BYTE_TEST (SMSC9118_BASE + 0x64) +#define GPIO_CFG (SMSC9118_BASE + 0x88) +#define MAC_CSR_CMD (SMSC9118_BASE + 0xA4) +#define MAC_CSR_CMD_CSR_BUSY (0x80000000) +#define MAC_CSR_CMD_RNW (0x40000000) +#define MAC_RD_CMD(reg) ((reg & 0x000000FF) | \ + (MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_RNW)) +#define MAC_WR_CMD(reg) ((reg & 0x000000FF) | \ + (MAC_CSR_CMD_CSR_BUSY)) +#define MAC_CSR_DATA (SMSC9118_BASE + 0xA8) +#define E2P_CMD (SMSC9118_BASE + 0xB0) +#define E2P_CMD_EPC_BUSY_ (0x80000000UL) /* Self Clearing */ +#define E2P_CMD_EPC_CMD_ (0x70000000UL) /* R/W */ +#define E2P_CMD_EPC_CMD_READ_ (0x00000000UL) /* R/W */ +#define E2P_CMD_EPC_CMD_EWDS_ (0x10000000UL) /* R/W */ +#define E2P_CMD_EPC_CMD_EWEN_ (0x20000000UL) /* R/W */ +#define E2P_CMD_EPC_CMD_WRITE_ (0x30000000UL) /* R/W */ +#define E2P_CMD_EPC_CMD_WRAL_ (0x40000000UL) /* R/W */ +#define E2P_CMD_EPC_CMD_ERASE_ (0x50000000UL) /* R/W */ +#define E2P_CMD_EPC_CMD_ERAL_ (0x60000000UL) /* R/W */ +#define E2P_CMD_EPC_CMD_RELOAD_ (0x70000000UL) /* R/W */ +#define E2P_CMD_EPC_TIMEOUT_ (0x00000200UL) /* R */ +#define E2P_CMD_MAC_ADDR_LOADED_ (0x00000100UL) /* RO */ +#define E2P_CMD_EPC_ADDR_ (0x000000FFUL) /* R/W */ +#define E2P_DATA (SMSC9118_BASE + 0xB4) + +#define MAC_ADDRH (0x2) +#define MAC_ADDRL (0x3) + +#define MAC_TIMEOUT 200 + +#define HIBYTE(word) ((u8)(((u16)(word)) >> 8)) +#define LOBYTE(word) ((u8)(((u16)(word)) & 0x00FFU)) +#define HIWORD(dword) ((u16)(((u32)(dword)) >> 16)) +#define LOWORD(dword) ((u16)(((u32)(dword)) & 0x0000FFFFUL)) + +static int mac_busy(int req_to) +{ + int timeout = req_to; + + while (timeout--) { + if (!(smc911x_reg_read(MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)) + goto done; + } + return 1; /* Timeout */ + +done: + return 0; /* No timeout */ +} + +static ulong get_mac_reg(int reg) +{ + ulong reg_val = 0xffffffff; + + if (smc911x_reg_read(MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY) { + printf("get_mac_reg: previous command not complete\n"); + goto done; + } + + smc911x_reg_write(MAC_CSR_CMD, MAC_RD_CMD(reg)); + udelay(10000); + + if (mac_busy(MAC_TIMEOUT) == 1) { + printf("get_mac_reg: timeout waiting for response from MAC\n"); + goto done; + } + + reg_val = smc911x_reg_read(MAC_CSR_DATA); + +done: + return (reg_val); +} + +static ulong eeprom_enable_access(void) +{ + ulong gpio; + + gpio = smc911x_reg_read(GPIO_CFG); + debug("%s: gpio= 0x%08lx ---> 0x%08lx\n", __func__, gpio, + (gpio & 0xFF0FFFFFUL)); + + smc911x_reg_write(GPIO_CFG, (gpio & 0xFF0FFFFFUL)); + return gpio; +} + +static void eeprom_disable_access(ulong gpio) +{ + debug("%s: gpio= 0x%08lx\n", __func__, gpio); + smc911x_reg_write(GPIO_CFG, gpio); +} + +static int eeprom_is_mac_address_loaded(void) +{ + int ret; + + ret = smc911x_reg_read(MAC_CSR_CMD) & E2P_CMD_MAC_ADDR_LOADED_; + debug("%s: ret = %x\n", __func__, ret); + + return ret; +} + +static int eeprom_read_location(unchar address, u8 *data) +{ + ulong timeout = 100000; + ulong temp = 0; + + if ((temp = smc911x_reg_read(E2P_CMD)) & E2P_CMD_EPC_BUSY_) { + printf("%s: Busy at start, E2P_CMD=0x%08lX\n", __func__, temp); + return 0; + } + + smc911x_reg_write(E2P_CMD, + (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_ | + ((ulong) address))); + + while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) { + udelay(10); + timeout--; + } + + if (timeout == 0) { + printf("Timeout\n"); + return 0; + } + (*data) = (unchar) (smc911x_reg_read(E2P_DATA)); + debug("%s: ret = %x\n", __func__, (*data)); + + return 1; +} + +static int eeprom_enable_erase_and_write(void) +{ + ulong timeout = 100000; + + if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) { + printf("%s: Busy at start\n", __func__); + return 0; + } + smc911x_reg_write(E2P_CMD, (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_)); + + while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) { + udelay(10); + timeout--; + } + + if (timeout == 0) { + printf("Timeout[1]\n"); + return 0; + } + + return 1; +} + +static int eeprom_disable_erase_and_write(void) +{ + ulong timeout = 100000; + + if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) { + printf("%s: Busy at start\n", __func__); + return 0; + } + smc911x_reg_write(E2P_CMD, (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWDS_)); + + while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) { + udelay(10); + timeout--; + } + + if (timeout == 0) { + printf("Timeout[2]\n"); + return 0; + } + + return 1; +} + +static int eeprom_write_location(unchar address, unchar data) +{ + ulong timeout = 100000; + + debug("%s: address: %x data = %x\n", __func__, address, data); + + if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) { + printf("%s: Busy at start\n", __func__); + return 0; + } + + smc911x_reg_write(E2P_DATA, ((ulong) data)); + smc911x_reg_write(E2P_CMD, + (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_ | + ((ulong) address))); + + while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) { + udelay(10); + timeout--; + } + + if (timeout == 0) { + printf("Timeout[3]\n"); + return 0; + } + + return 1; +} + +static int eeprom_erase_all(void) +{ + ulong timeout = 100000; + + if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) { + printf("%s: Busy at start\n", __func__); + return 0; + } + + smc911x_reg_write(E2P_CMD, (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_ERAL_)); + + while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) { + udelay(10); + timeout--; + } + + if (timeout == 0) { + printf("Timeout[4]\n"); + return 0; + } + + return 1; +} + +static int eeprom_reload(void) +{ + ulong timeout = 100000; + + if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) { + printf("%s: Busy at start\n", __func__); + return -1; + } + smc911x_reg_write(E2P_CMD, + (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_RELOAD_)); + + while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_)) { + udelay(10); + timeout--; + } + + if (timeout == 0) + return 0; + + return 1; +} + +static int eeprom_save_mac_address(ulong dwHi16, ulong dwLo32) +{ + int result = 0; + + debug("%s: dwHI: 0x%08lx dwLO: %08lx, \n", __func__, dwHi16, dwLo32); + + if (!eeprom_enable_erase_and_write()) + goto DONE; + if (!eeprom_erase_all()) + goto DONE; + if (!eeprom_write_location(0, 0xA5)) + goto DONE; + if (!eeprom_write_location(1, LOBYTE(LOWORD(dwLo32)))) + goto DONE; + if (!eeprom_write_location(2, HIBYTE(LOWORD(dwLo32)))) + goto DONE; + if (!eeprom_write_location(3, LOBYTE(HIWORD(dwLo32)))) + goto DONE; + if (!eeprom_write_location(4, HIBYTE(HIWORD(dwLo32)))) + goto DONE; + if (!eeprom_write_location(5, LOBYTE(LOWORD(dwHi16)))) + goto DONE; + if (!eeprom_write_location(6, HIBYTE(LOWORD(dwHi16)))) + goto DONE; + if (!eeprom_disable_erase_and_write()) + goto DONE; + + result = 1; + +DONE: + return result; +} + +static int do_eeprom_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + unchar data = 0, index = 0; + ulong gpio_old_val; + + gpio_old_val = eeprom_enable_access(); + + printf("EEPROM content: \n"); + for (index = 0; index < 8; index++) { + if (eeprom_read_location(index, &data)) + printf("%02x ", data); + else + printf("FAILED"); + } + + eeprom_disable_access(gpio_old_val); + printf("\n"); + + return 0; +} + +static int do_eeprom_erase_all(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + eeprom_erase_all(); + + return 0; +} + +static int do_eeprom_save_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + ulong hi16, lo32; + unchar ethaddr[6], i; + ulong gpio; + char *tmp, *end; + + tmp = argv[1]; + for (i = 0; i < 6; i++) { + ethaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0; + if (tmp) + tmp = (*end) ? end + 1 : end; + } + + hi16 = (ethaddr[5] << 8) | (ethaddr[4]); + lo32 = (ethaddr[3] << 24) | (ethaddr[2] << 16) | + (ethaddr[1] << 8) | (ethaddr[0]); + + gpio = eeprom_enable_access(); + + eeprom_save_mac_address(hi16, lo32); + + eeprom_reload(); + + /* Check new values */ + if (eeprom_is_mac_address_loaded()) { + ulong mac_hi16, mac_lo32; + + mac_hi16 = get_mac_reg(MAC_ADDRH); + mac_lo32 = get_mac_reg(MAC_ADDRL); + printf("New MAC address: %lx, %lx\n", mac_hi16, mac_lo32); + } else { + printf("Address is not reloaded \n"); + } + eeprom_disable_access(gpio); + + return 0; +} + +U_BOOT_CMD(smcee, 1, 0, do_eeprom_erase_all, + "smcee - Erase content of SMC EEPROM\n",); + +U_BOOT_CMD(smced, 1, 0, do_eeprom_dump, + "smced - Dump content of SMC EEPROM\n",); + +U_BOOT_CMD(smcew, 2, 0, do_eeprom_save_mac, + "smcew - Write MAC address to SMC EEPROM\n", + "aa:bb:cc:dd:ee:ff new mac address\n"); diff --git a/board/micronas/vct/top.c b/board/micronas/vct/top.c new file mode 100644 index 0000000..0923954 --- /dev/null +++ b/board/micronas/vct/top.c @@ -0,0 +1,289 @@ +/* + * (C) Copyright 2008 Stefan Roese <sr(a)denx.de>, DENX Software Engineering + * + * Copyright (C) 2006 Micronas GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include "vct.h" + +typedef union _TOP_PINMUX_t +{ + u32 reg; + struct { + u32 res : 24; /* reserved */ + u32 drive : 2; /* Driver strength */ + u32 slew : 1; /* Slew rate */ + u32 strig : 1; /* Schmitt trigger input*/ + u32 pu_pd : 2; /* Pull up/ pull down */ + u32 funsel : 2; /* Pin function */ + } Bits; +} TOP_PINMUX_t; + +#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM) + +static TOP_PINMUX_t top_read_pin(int pin) +{ + TOP_PINMUX_t reg; + + switch (pin) { + case 2: + case 3: + case 6: + case 9: + reg.reg = 0xdeadbeef; + break; + case 4: + reg.reg = reg_read(FWSRAM_TOP_SCL_CFG(FWSRAM_BASE)); + break; + case 5: + reg.reg = reg_read(FWSRAM_TOP_SDA_CFG(FWSRAM_BASE)); + break; + case 7: + reg.reg = reg_read(FWSRAM_TOP_TDO_CFG(FWSRAM_BASE)); + break; + case 8: + reg.reg = reg_read(FWSRAM_TOP_GPIO2_0_CFG(FWSRAM_BASE)); + break; + case 10: + case 11: + case 12: + case 13: + case 14: + case 15: + case 16: + reg.reg = reg_read(FWSRAM_BASE + FWSRAM_TOP_GPIO2_1_CFG_OFFS + + ((pin - 10) * 4)); + break; + default: + reg.reg = reg_read(TOP_BASE + (pin * 4)); + break; + } + + return reg; +} + +static void top_write_pin(int pin, TOP_PINMUX_t reg) +{ + + switch (pin) { + case 4: + reg_write(FWSRAM_TOP_SCL_CFG(FWSRAM_BASE), reg.reg); + break; + case 5: + reg_write(FWSRAM_TOP_SDA_CFG(FWSRAM_BASE), reg.reg); + break; + case 7: + reg_write(FWSRAM_TOP_TDO_CFG(FWSRAM_BASE), reg.reg); + break; + case 8: + reg_write(FWSRAM_TOP_GPIO2_0_CFG(FWSRAM_BASE), reg.reg); + break; + case 10: + case 11: + case 12: + case 13: + case 14: + case 15: + case 16: + reg_write(FWSRAM_BASE + FWSRAM_TOP_GPIO2_1_CFG_OFFS + + ((pin - 10) * 4), reg.reg); + break; + default: + reg_write(TOP_BASE + (pin * 4), reg.reg); + break; + } +} + +int top_set_pin(int pin, int func) +{ + TOP_PINMUX_t reg; + + /* check global range */ + if ((pin < 0) || (pin > 170) || (func < 0) || (func > 3)) + return -1; /* pin number or function out of valid range */ + + /* check undefined values; */ + if ((pin == 2) || (pin == 3) || (pin == 6) || (pin == 9)) + return -1; /* pin number out of valid range */ + + reg = top_read_pin(pin); + reg.Bits.funsel = func; + top_write_pin(pin, reg); + + return 0; +} + +#endif + +#if defined(CONFIG_VCT_PLATINUMAVC) + +int top_set_pin(int pin, int func) +{ + TOP_PINMUX_t reg; + + /* check global range */ + if ((pin < 0) || (pin > 158)) + return -1; /* pin number or function out of valid range */ + + reg.reg = reg_read(TOP_BASE + (pin * 4)); + reg.Bits.funsel = func; + reg_write(TOP_BASE + (pin * 4), reg.reg); + + return 0; +} + +#endif + +void vct_pin_mux_initialize(void) +{ +#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM) + top_set_pin(34, 01); /* EBI_CS0 */ + top_set_pin(33, 01); /* EBI_CS1 */ + top_set_pin(32, 01); /* EBI_CS2 */ + top_set_pin(100, 02); /* EBI_CS3 */ + top_set_pin(101, 02); /* EBI_CS4 */ + top_set_pin(102, 02); /* EBI_CS5 */ + top_set_pin(103, 02); /* EBI_CS6 */ + top_set_pin(104, 02); /* EBI_CS7 top_set_pin(104,03); EBI_GENIO3 */ + top_set_pin(35, 01); /* EBI_ALE */ + top_set_pin(36, 01); /* EBI_ADDR15 */ + top_set_pin(37, 01); /* EBI_ADDR14 top_set_pin(78,03); EBI_ADDR14 */ + top_set_pin(38, 01); /* EBI_ADDR13 */ + top_set_pin(39, 01); /* EBI_ADDR12 */ + top_set_pin(40, 01); /* EBI_ADDR11 */ + top_set_pin(41, 01); /* EBI_ADDR10 */ + top_set_pin(42, 01); /* EBI_ADDR9 */ + top_set_pin(43, 01); /* EBI_ADDR8 */ + top_set_pin(44, 01); /* EBI_ADDR7 */ + top_set_pin(45, 01); /* EBI_ADDR6 */ + top_set_pin(46, 01); /* EBI_ADDR5 */ + top_set_pin(47, 01); /* EBI_ADDR4 */ + top_set_pin(48, 01); /* EBI_ADDR3 */ + top_set_pin(49, 01); /* EBI_ADDR2 */ + top_set_pin(50, 01); /* EBI_ADDR1 */ + top_set_pin(51, 01); /* EBI_ADDR0 */ + top_set_pin(52, 01); /* EBI_DIR */ + top_set_pin(53, 01); /* EBI_DAT15 top_set_pin(81,01); EBI_DAT15 */ + top_set_pin(54, 01); /* EBI_DAT14 top_set_pin(82,01); EBI_DAT14 */ + top_set_pin(55, 01); /* EBI_DAT13 top_set_pin(83,01); EBI_DAT13 */ + top_set_pin(56, 01); /* EBI_DAT12 top_set_pin(84,01); EBI_DAT12 */ + top_set_pin(57, 01); /* EBI_DAT11 top_set_pin(85,01); EBI_DAT11 */ + top_set_pin(58, 01); /* EBI_DAT10 top_set_pin(86,01); EBI_DAT10 */ + top_set_pin(59, 01); /* EBI_DAT9 top_set_pin(87,01); EBI_DAT9 */ + top_set_pin(60, 01); /* EBI_DAT8 top_set_pin(88,01); EBI_DAT8 */ + top_set_pin(61, 01); /* EBI_DAT7 */ + top_set_pin(62, 01); /* EBI_DAT6 */ + top_set_pin(63, 01); /* EBI_DAT5 */ + top_set_pin(64, 01); /* EBI_DAT4 */ + top_set_pin(65, 01); /* EBI_DAT3 */ + top_set_pin(66, 01); /* EBI_DAT2 */ + top_set_pin(67, 01); /* EBI_DAT1 */ + top_set_pin(68, 01); /* EBI_DAT0 */ + top_set_pin(69, 01); /* EBI_IORD */ + top_set_pin(70, 01); /* EBI_IOWR */ + top_set_pin(71, 01); /* EBI_WE */ + top_set_pin(72, 01); /* EBI_OE */ + top_set_pin(73, 01); /* EBI_IORDY */ + top_set_pin(95, 02); /* EBI_EBI_DMACK*/ + top_set_pin(112, 02); /* EBI_IRQ0 */ + top_set_pin(111, 02); /* EBI_IRQ1 top_set_pin(111,03); EBI_DMARQ */ + top_set_pin(107, 02); /* EBI_IRQ2 */ + top_set_pin(108, 02); /* EBI_IRQ3 */ + top_set_pin(30, 01); /* EBI_GENIO1 top_set_pin(99,03); EBI_GENIO1 */ + top_set_pin(31, 01); /* EBI_GENIO2 top_set_pin(98,03); EBI_GENIO2 */ + top_set_pin(105, 02); /* EBI_GENIO3 top_set_pin(104,03); EBI_GENIO3 */ + top_set_pin(106, 02); /* EBI_GENIO4 top_set_pin(144,02); EBI_GENIO4 */ + top_set_pin(109, 02); /* EBI_GENIO5 top_set_pin(142,02); EBI_GENIO5 */ + top_set_pin(110, 02); /* EBI_BURST_CLK */ +#endif + +#if defined(CONFIG_VCT_PLATINUMAVC) + top_set_pin(19, 01); /* EBI_CS0 */ + top_set_pin(18, 01); /* EBI_CS1 */ + top_set_pin(17, 01); /* EBI_CS2 */ + top_set_pin(92, 02); /* EBI_CS3 */ + top_set_pin(93, 02); /* EBI_CS4 */ + top_set_pin(95, 02); /* EBI_CS6 */ + top_set_pin(96, 02); /* EBI_CS7 top_set_pin(104,03); EBI_GENIO3 */ + top_set_pin(20, 01); /* EBI_ALE */ + top_set_pin(21, 01); /* EBI_ADDR15 */ + top_set_pin(22, 01); /* EBI_ADDR14 top_set_pin(78,03); EBI_ADDR14 */ + top_set_pin(23, 01); /* EBI_ADDR13 */ + top_set_pin(24, 01); /* EBI_ADDR12 */ + top_set_pin(25, 01); /* EBI_ADDR11 */ + top_set_pin(26, 01); /* EBI_ADDR10 */ + top_set_pin(27, 01); /* EBI_ADDR9 */ + top_set_pin(28, 01); /* EBI_ADDR8 */ + top_set_pin(29, 01); /* EBI_ADDR7 */ + top_set_pin(30, 01); /* EBI_ADDR6 */ + top_set_pin(31, 01); /* EBI_ADDR5 */ + top_set_pin(32, 01); /* EBI_ADDR4 */ + top_set_pin(33, 01); /* EBI_ADDR3 */ + top_set_pin(34, 01); /* EBI_ADDR2 */ + top_set_pin(35, 01); /* EBI_ADDR1 */ + top_set_pin(36, 01); /* EBI_ADDR0 */ + top_set_pin(37, 01); /* EBI_DIR */ + top_set_pin(38, 01); /* EBI_DAT15 top_set_pin(81,01); EBI_DAT15 */ + top_set_pin(39, 01); /* EBI_DAT14 top_set_pin(82,01); EBI_DAT14 */ + top_set_pin(40, 01); /* EBI_DAT13 top_set_pin(83,01); EBI_DAT13 */ + top_set_pin(41, 01); /* EBI_DAT12 top_set_pin(84,01); EBI_DAT12 */ + top_set_pin(42, 01); /* EBI_DAT11 top_set_pin(85,01); EBI_DAT11 */ + top_set_pin(43, 01); /* EBI_DAT10 top_set_pin(86,01); EBI_DAT10 */ + top_set_pin(44, 01); /* EBI_DAT9 top_set_pin(87,01); EBI_DAT9 */ + top_set_pin(45, 01); /* EBI_DAT8 top_set_pin(88,01); EBI_DAT8 */ + top_set_pin(46, 01); /* EBI_DAT7 */ + top_set_pin(47, 01); /* EBI_DAT6 */ + top_set_pin(48, 01); /* EBI_DAT5 */ + top_set_pin(49, 01); /* EBI_DAT4 */ + top_set_pin(50, 01); /* EBI_DAT3 */ + top_set_pin(51, 01); /* EBI_DAT2 */ + top_set_pin(52, 01); /* EBI_DAT1 */ + top_set_pin(53, 01); /* EBI_DAT0 */ + top_set_pin(54, 01); /* EBI_IORD */ + top_set_pin(55, 01); /* EBI_IOWR */ + top_set_pin(56, 01); /* EBI_WE */ + top_set_pin(57, 01); /* EBI_OE */ + top_set_pin(58, 01); /* EBI_IORDY */ + top_set_pin(87, 02); /* EBI_EBI_DMACK*/ + top_set_pin(106, 02); /* EBI_IRQ0 */ + top_set_pin(105, 02); /* EBI_IRQ1 top_set_pin(111,03); EBI_DMARQ */ + top_set_pin(101, 02); /* EBI_IRQ2 */ + top_set_pin(102, 02); /* EBI_IRQ3 */ + top_set_pin(15, 01); /* EBI_GENIO1 top_set_pin(99,03); EBI_GENIO1 */ + top_set_pin(16, 01); /* EBI_GENIO2 top_set_pin(98,03); EBI_GENIO2 */ + top_set_pin(99, 02); /* EBI_GENIO3 top_set_pin(104,03); EBI_GENIO3 */ + top_set_pin(100, 02); /* EBI_GENIO4 top_set_pin(144,02); EBI_GENIO4 */ + top_set_pin(103, 02); /* EBI_GENIO5 top_set_pin(142,02); EBI_GENIO5 */ + top_set_pin(104, 02); /* EBI_BURST_CLK */ +#endif + + /* I2C: Configure I2C-2 as GPIO to enable soft-i2c */ + top_set_pin(0, 2); /* SCL2 on GPIO 11 */ + top_set_pin(1, 2); /* SDA2 on GPIO 10 */ + + /* UART pins */ +#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM) + top_set_pin(141, 1); + top_set_pin(143, 1); +#endif +#if defined(CONFIG_VCT_PLATINUMAVC) + top_set_pin(107, 1); + top_set_pin(109, 1); +#endif +} diff --git a/board/micronas/vct/u-boot.lds b/board/micronas/vct/u-boot.lds new file mode 100644 index 0000000..da9e605 --- /dev/null +++ b/board/micronas/vct/u-boot.lds @@ -0,0 +1,71 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk Engineering, <wd(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradlittlemips") +OUTPUT_ARCH(mips) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = .; + _gp = ALIGN(16) + 0x7ff0; + + .got : { + __got_start = .; + *(.got) + __got_end = .; + } + + . = ALIGN(4); + .sdata : { *(.sdata) } + + . = ALIGN(4); + .u_boot_cmd : { + __u_boot_cmd_start = .; + *(.u_boot_cmd) + __u_boot_cmd_end = .; + } + + . = ALIGN(4); + uboot_end_data = .; + num_got_entries = (__got_end - __got_start) >> 2; + + . = ALIGN(4); + .sbss (NOLOAD) : { *(.sbss) } + . = ALIGN(4); + .bss (NOLOAD) : { *(.bss) } + uboot_end = .; +} diff --git a/board/micronas/vct/vct.c b/board/micronas/vct/vct.c new file mode 100644 index 0000000..61af14a --- /dev/null +++ b/board/micronas/vct/vct.c @@ -0,0 +1,117 @@ +/* + * (C) Copyright 2008 Stefan Roese <sr(a)denx.de>, DENX Software Engineering + * + * Copyright (C) 2006 Micronas GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <asm/mipsregs.h> +#include "vct.h" + +#if defined(CONFIG_VCT_PREMIUM) +#define BOARD_NAME "PremiumD" +#elif defined(CONFIG_VCT_PLATINUM) +#define BOARD_NAME "PlatinumD" +#elif defined(CONFIG_VCT_PLATINUMAVC) +#define BOARD_NAME "PlatinumAVC" +#else +#error "vct: No board variant defined!" +#endif + +#if defined(CONFIG_VCT_ONENAND) +#define BOARD_NAME_ADD " OneNAND" +#else +#define BOARD_NAME_ADD " NOR" +#endif + +int board_early_init_f(void) +{ + /* + * First initialize the PIN mulitplexing + */ + vct_pin_mux_initialize(); + + /* + * Init the EBI very early so that FLASH can be accessed + */ + ebi_initialize(); + + return 0; +} + +void _machine_restart(void) +{ + reg_write(DCGU_EN_WDT_RESET(DCGU_BASE), DCGU_MAGIC_WDT); + reg_write(WDT_TORR(WDT_BASE), 0x00); + reg_write(WDT_CR(WDT_BASE), 0x1D); + + /* + * Now wait for the watchdog to trigger the reset + */ + udelay(1000000); +} + +/* + * SDRAM is already configured by the bootstrap code, only return the + * auto-detected size here + */ +phys_size_t initdram(int board_type) +{ + return get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_MBYTES_SDRAM << 20); +} + +int checkboard(void) +{ + u32 config0 = read_c0_prid(); + char *s = getenv("serial#"); + + if ((config0 & 0xff0000) == PRID_COMP_LEGACY + && (config0 & 0xff00) == PRID_IMP_LX4280) { + puts("Board: MDED \n"); + printf("CPU: LX4280 id: 0x%02x, rev: 0x%02x\n", + (config0 >> 8) & 0xFF, config0 & 0xFF); + } else if ((config0 & 0xff0000) == PRID_COMP_MIPS + && (config0 & 0xff00) == PRID_IMP_VGC) { + u32 jedec_id = *((u32 *) 0xBEBC71A0); + if ((((jedec_id) >> 12) & 0xFF) == 0x40) { + puts("Board: VGCA \n"); + } else if ((((jedec_id) >> 12) & 0xFF) == 0x48 + || (((jedec_id) >> 12) & 0xFF) == 0x49) { + puts("Board: VGCB \n"); + } + printf("CPU: MIPS 4K id: 0x%02x, rev: 0x%02x\n", + (config0 >> 8) & 0xFF, config0 & 0xFF); + } else if (config0 == 0x19378) { + printf("CPU: MIPS 24K id: 0x%02x, rev: 0x%02x\n", + (config0 >> 8) & 0xFF, config0 & 0xFF); + } else { + printf("Unsupported cpu %d, proc_id=0x%x\n", config0 >> 24, + config0); + } + + printf("Board: Micronas VCT " BOARD_NAME BOARD_NAME_ADD); + if (s != NULL) { + puts(", serial# "); + puts(s); + } + putc('\n'); + + return 0; +} -- 1.6.1

1 0

[U-Boot] Bug in nand_default_bbt?
by Nishanth Menon 05 Jan '09

05 Jan '09

Hi Scott, A gentle question on drivers/mtd/nand/nand_bbt.c:largepage_flashbased in Micron devices, the bb marker is the first word. for a x8 device is 1 byte and x16 device it is 2 bytes. .len = 2 makes sense for an x16 device in the above variable, however the marker does a false postive detection for x8 devices. I can over ride this by using nand_chip->badblock_pattern in my board file, but from an mtd layer perspective, does it make sense to fix this for a generic usage? Regards, Nishanth Menon

2 1

[U-Boot] Support for new flash in u-boot
by mak visp 05 Jan '09

05 Jan '09

Hello, I have a custom board, in which I am using Spansion Flash Memory (WS256N series). I have two Flash memory chips interleaved to form a 32 bit wide Data Bus. How can I add the support for my flash device in u-boot? -- Thanks Mak

1 0

[U-Boot] Is it possible to use 2GB or DDR on MPC834x?
by Valeriy Glushkov 05 Jan '09

05 Jan '09

Hi Guys! On my mpc8347 based board I can access 1GB of DDR with mapping 4 of 256MB ranges via IBAT\DBAT registers. But with the 2 GB of DDR it's impossible to map them with BATs (there are only 8 BATs in the e300 core and the rest 4 of them are already used). All the mpc83xx examples in the U-boot tree seem to use <=1GB of SDRAM, so they use BATs to map them. Any suggestions are highly appreciated. Best regards, Valeriy Glushkov

2 3

[U-Boot] U-boot1.1.6 calloc problem
by John Smith 05 Jan '09

05 Jan '09

Hey all, U-boot1.1.6,whitch I ported to my board S3C44B0 ,it worked very well for few days, but something was wrong today. What I got from serial: ------------------------------------------------------------------------ U-boot1.1.6 DRAM: 8M Flash : 2M ----------------------------------------------------------------------- after tracing functions by using "printf" command,I found the problem was "devlist=NULL". then I went deep,found the function "NewHandle" ,whitch is related to Create empty List. It returned "NULL" ,and the problem is command "calloc". any help is appreciated. regards , John

2 1

[U-Boot] Copy environment variables to another board
by Giuseppe Modugno 05 Jan '09

05 Jan '09

I'm sorry if my question was already asked, but I didn't find an answer in the manual/FAQs/mailing list archive. I have a board running U-Boot/Linux. U-Boot program, two U-Boot environments, Linux kernel and root filesystem for Linux are stored in a NOR Flash. I finished my developing process and now I want to copy the entire U- Boot environment to a new board. Of course, I don't want to manually copy all the variables in the environment. Is there a simple way to dump the full environment in a file and copy it in the new board? Thanks for your help.

4 9

[U-Boot] U-boot hangs on boot time
by John Smith 05 Jan '09

05 Jan '09

Hey all, my u-boot-1.1.1 hangs while booting, as follow is the message got from the serial: ------------------------------------------------------ U-Boot 1.1.6 (Jan 5 2009 - 18:37:55) DRAM: 8MB Flash: 2MB ------------------------------------------------------ after some tests by tracing the sequences of the funtions, I found that the u-boot hangs while comming to this funtion: device_register (&dev), which is a subfuntion of drv_system_init (); and I look into device_register(&dev): int device_register (device_t * dev) { ListInsertItem (devlist, dev, LIST_END); return 0; } as follow are two invoid funtions copy from the devices.c. int ListInsertItem (list_t list, void *ptrToItem, int itemPosition) { return ListInsertItems (list, ptrToItem, itemPosition, 1); } int ListInsertItems (list_t list, void *ptrToItems, int firstItemPosition, int numItemsToInsert) { int numItems = (*list)->numItems; if (firstItemPosition == numItems + 1) firstItemPosition = LIST_END; else if (firstItemPosition > numItems) return 0; if ((*list)->numItems >= (*list)->listSize) { if (!ExpandListSpace (list, -numItemsToInsert)) return 0; } if (firstItemPosition == LIST_START) { if (numItems == 0) { /* special case for empty list */ firstItemPosition = LIST_END; } else { firstItemPosition = 1; } } if (firstItemPosition == LIST_END) { /* add at the end of the list */ if (ptrToItems) memcpy (ITEMPTR (list, numItems), ptrToItems, (*list)->itemSize * numItemsToInsert); else memset (ITEMPTR (list, numItems), 0, (*list)->itemSize * numItemsToInsert); (*list)->numItems += numItemsToInsert; } else { /* move part of list up to make room for new item */ memmove (ITEMPTR (list, firstItemPosition - 1 + numItemsToInsert), ITEMPTR (list, firstItemPosition - 1), (numItems + 1 - firstItemPosition) * (*list)->itemSize); if (ptrToItems) memmove (ITEMPTR (list, firstItemPosition - 1), ptrToItems, (*list)->itemSize * numItemsToInsert); else memset (ITEMPTR (list, firstItemPosition - 1), 0, (*list)->itemSize * numItemsToInsert); (*list)->numItems += numItemsToInsert; } return 1; } Most strange thing is sometimes it runs very well. My board is S3C44B0... Any help is appreciated. John

2 1

[U-Boot] [PATCH 1/4] microblaze: Rename ml401 to microblaze-generic
by monstr＠monstr.eu 05 Jan '09

05 Jan '09

From: Michal Simek <monstr(a)monstr.eu> Signed-off-by: Michal Simek <monstr(a)monstr.eu> --- MAINTAINERS | 2 +- MAKEALL | 6 +- Makefile | 5 +- board/xilinx/microblaze-generic/Makefile | 50 ++++ board/xilinx/microblaze-generic/config.mk | 32 +++ .../xilinx/microblaze-generic/microblaze-generic.c | 69 +++++ board/xilinx/microblaze-generic/u-boot.lds | 68 +++++ board/xilinx/microblaze-generic/xparameters.h | 69 +++++ board/xilinx/ml401/Makefile | 50 ---- board/xilinx/ml401/config.mk | 32 --- board/xilinx/ml401/ml401.c | 69 ----- board/xilinx/ml401/u-boot.lds | 68 ----- board/xilinx/ml401/xparameters.h | 69 ----- include/configs/microblaze-generic.h | 280 +++++++++++++++++++ include/configs/ml401.h | 281 -------------------- 15 files changed, 574 insertions(+), 576 deletions(-) create mode 100644 board/xilinx/microblaze-generic/Makefile create mode 100644 board/xilinx/microblaze-generic/config.mk create mode 100644 board/xilinx/microblaze-generic/microblaze-generic.c create mode 100644 board/xilinx/microblaze-generic/u-boot.lds create mode 100644 board/xilinx/microblaze-generic/xparameters.h delete mode 100644 board/xilinx/ml401/Makefile delete mode 100644 board/xilinx/ml401/config.mk delete mode 100644 board/xilinx/ml401/ml401.c delete mode 100644 board/xilinx/ml401/u-boot.lds delete mode 100644 board/xilinx/ml401/xparameters.h create mode 100644 include/configs/microblaze-generic.h delete mode 100644 include/configs/ml401.h diff --git a/MAINTAINERS b/MAINTAINERS index 60def0c..dfe54a7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -707,7 +707,7 @@ Yasushi Shoji <yashi(a)atmark-techno.com> Michal Simek <monstr(a)monstr.eu> - ML401 MicroBlaze + microblaze-generic MicroBlaze ######################################################################### # Coldfire Systems: # diff --git a/MAKEALL b/MAKEALL index 5ce3f31..f6271a2 100755 --- a/MAKEALL +++ b/MAKEALL @@ -697,9 +697,9 @@ LIST_nios2=" \ ## MicroBlaze Systems ######################################################################### -LIST_microblaze=" \ - ml401 \ - suzaku \ +LIST_microblaze=" \ + microblaze-generic \ + suzaku \ " ######################################################################### diff --git a/Makefile b/Makefile index c532e5b..1432e6d 100644 --- a/Makefile +++ b/Makefile @@ -3149,10 +3149,9 @@ PCI5441_config : unconfig ## Microblaze #======================================================================== -ml401_config: unconfig +microblaze-generic_config: unconfig @mkdir -p $(obj)include - @echo "#define CONFIG_ML401 1" > $(obj)include/config.h - @$(MKCONFIG) -a $(@:_config=) microblaze microblaze ml401 xilinx + @$(MKCONFIG) -a $(@:_config=) microblaze microblaze microblaze-generic xilinx suzaku_config: unconfig @mkdir -p $(obj)include diff --git a/board/xilinx/microblaze-generic/Makefile b/board/xilinx/microblaze-generic/Makefile new file mode 100644 index 0000000..10b47b2 --- /dev/null +++ b/board/xilinx/microblaze-generic/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS = $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/xilinx/microblaze-generic/config.mk b/board/xilinx/microblaze-generic/config.mk new file mode 100644 index 0000000..c75daaf --- /dev/null +++ b/board/xilinx/microblaze-generic/config.mk @@ -0,0 +1,32 @@ +# +# (C) Copyright 2007 Michal Simek +# +# Michal SIMEK <monstr(a)monstr.eu> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# CAUTION: This file is automatically generated by libgen. +# Version: Xilinx EDK 6.3 EDK_Gmm.12.3 +# + +TEXT_BASE = 0x29000000 + +PLATFORM_CPPFLAGS += -mno-xl-soft-mul +PLATFORM_CPPFLAGS += -mno-xl-soft-div +PLATFORM_CPPFLAGS += -mxl-barrel-shift diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c new file mode 100644 index 0000000..f388b77 --- /dev/null +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -0,0 +1,69 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK <monstr(a)monstr.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* This is a board specific file. It's OK to include board specific + * header files */ + +#include <common.h> +#include <config.h> +#include <asm/microblaze_intc.h> +#include <asm/asm.h> + +void do_reset (void) +{ +#ifdef CONFIG_SYS_GPIO_0 + *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = + ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR))); +#endif +#ifdef CONFIG_SYS_RESET_ADDRESS + puts ("Reseting board\n"); + asm ("bra r0"); +#endif +} + +int gpio_init (void) +{ +#ifdef CONFIG_SYS_GPIO_0 + *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0xFFFFFFFF; +#endif + return 0; +} + +#ifdef CONFIG_SYS_FSL_2 +void fsl_isr2 (void *arg) { + volatile int num; + *((unsigned int *)(CONFIG_SYS_GPIO_0_ADDR + 0x4)) = + ++(*((unsigned int *)(CONFIG_SYS_GPIO_0_ADDR + 0x4))); + GET (num, 2); + NGET (num, 2); + puts("*"); +} + +void fsl_init2 (void) { + puts("fsl_init2\n"); + install_interrupt_handler (FSL_INTR_2,\ + fsl_isr2,\ + NULL); +} +#endif diff --git a/board/xilinx/microblaze-generic/u-boot.lds b/board/xilinx/microblaze-generic/u-boot.lds new file mode 100644 index 0000000..b38f648 --- /dev/null +++ b/board/xilinx/microblaze-generic/u-boot.lds @@ -0,0 +1,68 @@ +/* + * (C) Copyright 2004 Atmark Techno, Inc. + * + * Yasushi SHOJI <yashi(a)atmark-techno.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(microblaze) +ENTRY(_start) + +SECTIONS +{ + .text ALIGN(0x4): + { + __text_start = .; + cpu/microblaze/start.o (.text) + *(.text) + __text_end = .; + } + + .rodata ALIGN(0x4): + { + __rodata_start = .; + *(.rodata) + __rodata_end = .; + } + + .data ALIGN(0x4): + { + __data_start = .; + *(.data) + __data_end = .; + } + + .u_boot_cmd ALIGN(0x4): + { + . = .; + __u_boot_cmd_start = .; + *(.u_boot_cmd) + __u_boot_cmd_end = .; + } + + .bss ALIGN(0x4): + { + __bss_start = .; + *(.bss) + . = ALIGN(4); + __bss_end = .; + } + __end = . ; +} diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h new file mode 100644 index 0000000..d805061 --- /dev/null +++ b/board/xilinx/microblaze-generic/xparameters.h @@ -0,0 +1,69 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK <monstr(a)monstr.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * CAUTION: This file is automatically generated by libgen. + * Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 + */ + +/* System Clock Frequency */ +#define XILINX_CLOCK_FREQ 100000000 + +/* Microblaze is microblaze_0 */ +#define XILINX_USE_MSR_INSTR 1 +#define XILINX_FSL_NUMBER 3 + +/* Interrupt controller is opb_intc_0 */ +#define XILINX_INTC_BASEADDR 0x41200000 +#define XILINX_INTC_NUM_INTR_INPUTS 6 + +/* Timer pheriphery is opb_timer_1 */ +#define XILINX_TIMER_BASEADDR 0x41c00000 +#define XILINX_TIMER_IRQ 0 + +/* Uart pheriphery is RS232_Uart */ +#define XILINX_UARTLITE_BASEADDR 0x40600000 +#define XILINX_UARTLITE_BAUDRATE 115200 + +/* IIC pheriphery is IIC_EEPROM */ +#define XILINX_IIC_0_BASEADDR 0x40800000 +#define XILINX_IIC_0_FREQ 100000 +#define XILINX_IIC_0_BIT 0 + +/* GPIO is LEDs_4Bit*/ +#define XILINX_GPIO_BASEADDR 0x40000000 + +/* Flash Memory is FLASH_2Mx32 */ +#define XILINX_FLASH_START 0x2c000000 +#define XILINX_FLASH_SIZE 0x00800000 + +/* Main Memory is DDR_SDRAM_64Mx32 */ +#define XILINX_RAM_START 0x28000000 +#define XILINX_RAM_SIZE 0x04000000 + +/* Sysace Controller is SysACE_CompactFlash */ +#define XILINX_SYSACE_BASEADDR 0x41800000 +#define XILINX_SYSACE_HIGHADDR 0x4180ffff +#define XILINX_SYSACE_MEM_WIDTH 16 + +/* Ethernet controller is Ethernet_MAC */ +#define XILINX_EMACLITE_BASEADDR 0x40C00000 diff --git a/board/xilinx/ml401/Makefile b/board/xilinx/ml401/Makefile deleted file mode 100644 index 10b47b2..0000000 --- a/board/xilinx/ml401/Makefile +++ /dev/null @@ -1,50 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).a - -COBJS = $(BOARD).o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $^ - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/xilinx/ml401/config.mk b/board/xilinx/ml401/config.mk deleted file mode 100644 index c75daaf..0000000 --- a/board/xilinx/ml401/config.mk +++ /dev/null @@ -1,32 +0,0 @@ -# -# (C) Copyright 2007 Michal Simek -# -# Michal SIMEK <monstr(a)monstr.eu> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -# CAUTION: This file is automatically generated by libgen. -# Version: Xilinx EDK 6.3 EDK_Gmm.12.3 -# - -TEXT_BASE = 0x29000000 - -PLATFORM_CPPFLAGS += -mno-xl-soft-mul -PLATFORM_CPPFLAGS += -mno-xl-soft-div -PLATFORM_CPPFLAGS += -mxl-barrel-shift diff --git a/board/xilinx/ml401/ml401.c b/board/xilinx/ml401/ml401.c deleted file mode 100644 index f388b77..0000000 --- a/board/xilinx/ml401/ml401.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK <monstr(a)monstr.eu> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* This is a board specific file. It's OK to include board specific - * header files */ - -#include <common.h> -#include <config.h> -#include <asm/microblaze_intc.h> -#include <asm/asm.h> - -void do_reset (void) -{ -#ifdef CONFIG_SYS_GPIO_0 - *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = - ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR))); -#endif -#ifdef CONFIG_SYS_RESET_ADDRESS - puts ("Reseting board\n"); - asm ("bra r0"); -#endif -} - -int gpio_init (void) -{ -#ifdef CONFIG_SYS_GPIO_0 - *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0xFFFFFFFF; -#endif - return 0; -} - -#ifdef CONFIG_SYS_FSL_2 -void fsl_isr2 (void *arg) { - volatile int num; - *((unsigned int *)(CONFIG_SYS_GPIO_0_ADDR + 0x4)) = - ++(*((unsigned int *)(CONFIG_SYS_GPIO_0_ADDR + 0x4))); - GET (num, 2); - NGET (num, 2); - puts("*"); -} - -void fsl_init2 (void) { - puts("fsl_init2\n"); - install_interrupt_handler (FSL_INTR_2,\ - fsl_isr2,\ - NULL); -} -#endif diff --git a/board/xilinx/ml401/u-boot.lds b/board/xilinx/ml401/u-boot.lds deleted file mode 100644 index b38f648..0000000 --- a/board/xilinx/ml401/u-boot.lds +++ /dev/null @@ -1,68 +0,0 @@ -/* - * (C) Copyright 2004 Atmark Techno, Inc. - * - * Yasushi SHOJI <yashi(a)atmark-techno.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(microblaze) -ENTRY(_start) - -SECTIONS -{ - .text ALIGN(0x4): - { - __text_start = .; - cpu/microblaze/start.o (.text) - *(.text) - __text_end = .; - } - - .rodata ALIGN(0x4): - { - __rodata_start = .; - *(.rodata) - __rodata_end = .; - } - - .data ALIGN(0x4): - { - __data_start = .; - *(.data) - __data_end = .; - } - - .u_boot_cmd ALIGN(0x4): - { - . = .; - __u_boot_cmd_start = .; - *(.u_boot_cmd) - __u_boot_cmd_end = .; - } - - .bss ALIGN(0x4): - { - __bss_start = .; - *(.bss) - . = ALIGN(4); - __bss_end = .; - } - __end = . ; -} diff --git a/board/xilinx/ml401/xparameters.h b/board/xilinx/ml401/xparameters.h deleted file mode 100644 index d805061..0000000 --- a/board/xilinx/ml401/xparameters.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK <monstr(a)monstr.eu> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * CAUTION: This file is automatically generated by libgen. - * Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 - */ - -/* System Clock Frequency */ -#define XILINX_CLOCK_FREQ 100000000 - -/* Microblaze is microblaze_0 */ -#define XILINX_USE_MSR_INSTR 1 -#define XILINX_FSL_NUMBER 3 - -/* Interrupt controller is opb_intc_0 */ -#define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 6 - -/* Timer pheriphery is opb_timer_1 */ -#define XILINX_TIMER_BASEADDR 0x41c00000 -#define XILINX_TIMER_IRQ 0 - -/* Uart pheriphery is RS232_Uart */ -#define XILINX_UARTLITE_BASEADDR 0x40600000 -#define XILINX_UARTLITE_BAUDRATE 115200 - -/* IIC pheriphery is IIC_EEPROM */ -#define XILINX_IIC_0_BASEADDR 0x40800000 -#define XILINX_IIC_0_FREQ 100000 -#define XILINX_IIC_0_BIT 0 - -/* GPIO is LEDs_4Bit*/ -#define XILINX_GPIO_BASEADDR 0x40000000 - -/* Flash Memory is FLASH_2Mx32 */ -#define XILINX_FLASH_START 0x2c000000 -#define XILINX_FLASH_SIZE 0x00800000 - -/* Main Memory is DDR_SDRAM_64Mx32 */ -#define XILINX_RAM_START 0x28000000 -#define XILINX_RAM_SIZE 0x04000000 - -/* Sysace Controller is SysACE_CompactFlash */ -#define XILINX_SYSACE_BASEADDR 0x41800000 -#define XILINX_SYSACE_HIGHADDR 0x4180ffff -#define XILINX_SYSACE_MEM_WIDTH 16 - -/* Ethernet controller is Ethernet_MAC */ -#define XILINX_EMACLITE_BASEADDR 0x40C00000 diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h new file mode 100644 index 0000000..ed4bf6d --- /dev/null +++ b/include/configs/microblaze-generic.h @@ -0,0 +1,280 @@ +/* + * (C) Copyright 2007-2008 Michal Simek + * + * Michal SIMEK <monstr(a)monstr.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "../board/xilinx/microblaze-generic/xparameters.h" + +#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ +#define MICROBLAZE_V5 1 + +/* uart */ +#ifdef XILINX_UARTLITE_BASEADDR +#define CONFIG_XILINX_UARTLITE +#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR +#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE +#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } +#elif XILINX_UART16550_BASEADDR +#define CONFIG_SYS_NS16550 1 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) +#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ +#define CONFIG_BAUDRATE 115200 + +/* The following table includes the supported baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} +#else +#error Undefined uart +#endif + +/* setting reset address */ +/*#define CONFIG_SYS_RESET_ADDRESS TEXT_BASE*/ + +/* ethernet */ +#ifdef XILINX_EMAC_BASEADDR +#define CONFIG_XILINX_EMAC 1 +#define CONFIG_SYS_ENET +#else +#ifdef XILINX_EMACLITE_BASEADDR +#define CONFIG_XILINX_EMACLITE 1 +#define CONFIG_SYS_ENET +#endif +#endif +#undef ET_DEBUG + +/* gpio */ +#ifdef XILINX_GPIO_BASEADDR +#define CONFIG_SYS_GPIO_0 1 +#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR +#endif + +/* interrupt controller */ +#ifdef XILINX_INTC_BASEADDR +#define CONFIG_SYS_INTC_0 1 +#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR +#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS +#endif + +/* timer */ +#ifdef XILINX_TIMER_BASEADDR +#if (XILINX_TIMER_IRQ != -1) +#define CONFIG_SYS_TIMER_0 1 +#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR +#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ +#define FREQUENCE XILINX_CLOCK_FREQ +#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +#endif +#else +#ifdef XILINX_CLOCK_FREQ +#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ +#else +#error BAD CLOCK FREQ +#endif +#endif +/* FSL */ +/* #define CONFIG_SYS_FSL_2 */ +/* #define FSL_INTR_2 1 */ + +/* + * memory layout - Example + * TEXT_BASE = 0x1200_0000; + * CONFIG_SYS_SRAM_BASE = 0x1000_0000; + * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; + * + * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 + * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000 + * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000 + * + * 0x1000_0000 CONFIG_SYS_SDRAM_BASE + * FREE + * 0x1200_0000 TEXT_BASE + * U-BOOT code + * 0x1202_0000 + * FREE + * + * STACK + * 0x13F7_F000 CONFIG_SYS_MALLOC_BASE + * MALLOC_AREA 256kB Alloc + * 0x11FB_F000 CONFIG_SYS_MONITOR_BASE + * MONITOR_CODE 256kB Env + * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET + * GLOBAL_DATA 4kB bd, gd + * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE + */ + +/* ddr sdram - main memory */ +#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START +#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) + +/* global pointer */ +#define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */ +/* start of global data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) + +/* monitor code */ +#define SIZE 0x40000 +#define CONFIG_SYS_MONITOR_LEN SIZE +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_MALLOC_LEN SIZE +#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) + +/* stack */ +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MONITOR_BASE + +/*#define RAMENV */ +#define FLASH + +#ifdef FLASH + #define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START + #define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE + #define CONFIG_SYS_FLASH_CFI 1 + #define CONFIG_FLASH_CFI_DRIVER 1 + #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */ + #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ + #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ + #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ + + #ifdef RAMENV + #define CONFIG_ENV_IS_NOWHERE 1 + #define CONFIG_ENV_SIZE 0x1000 + #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) + + #else /* !RAMENV */ + #define CONFIG_ENV_IS_IN_FLASH 1 + #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */ + #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) + #define CONFIG_ENV_SIZE 0x40000 + #endif /* !RAMBOOT */ +#else /* !FLASH */ + /* ENV in RAM */ + #define CONFIG_SYS_NO_FLASH 1 + #define CONFIG_ENV_IS_NOWHERE 1 + #define CONFIG_ENV_SIZE 0x1000 + #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) + #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ +#endif /* !FLASH */ + +/* system ace */ +#ifdef XILINX_SYSACE_BASEADDR + #define CONFIG_SYSTEMACE + /* #define DEBUG_SYSTEMACE */ + #define SYSTEMACE_CONFIG_FPGA + #define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR + #define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH + #define CONFIG_DOS_PARTITION +#endif + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_MFSL + +#ifndef CONFIG_SYS_ENET + #undef CONFIG_CMD_NET +#else + #define CONFIG_CMD_PING +#endif + +#if defined(CONFIG_SYSTEMACE) + #define CONFIG_CMD_EXT2 + #define CONFIG_CMD_FAT +#endif + +#if defined(FLASH) + #define CONFIG_CMD_ECHO + #define CONFIG_CMD_FLASH + #define CONFIG_CMD_IMLS + #define CONFIG_CMD_JFFS2 + + #if !defined(RAMENV) + #define CONFIG_CMD_ENV + #define CONFIG_CMD_SAVES + #endif +#else + #undef CONFIG_CMD_FLASH +#endif + +#if defined(CONFIG_CMD_JFFS2) +/* JFFS2 partitions */ +#define CONFIG_JFFS2_CMDLINE /* mtdparts command line support */ +#define MTDIDS_DEFAULT "nor0=ml401-0" + +/* default mtd partition table */ +#define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\ + "256k(env),3m(kernel),1m(romfs),"\ + "1m(cramfs),-(jffs2)" +#endif + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_PROMPT "U-Boot-mONStR> " +#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ +#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */ + +#define CONFIG_BOOTDELAY 30 +#define CONFIG_BOOTARGS "root=romfs" +#define CONFIG_HOSTNAME "ml401" +#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" +#define CONFIG_IPADDR 192.168.0.3 +#define CONFIG_SERVERIP 192.168.0.5 +#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_ETHADDR 00:E0:0C:00:00:FD + +/* architecture dependent code */ +#define CONFIG_SYS_USR_EXCEP /* user exception */ +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" + +#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ + "nor0=ml401-0\0"\ + "mtdparts=mtdparts=ml401-0:"\ + "256k(u-boot),256k(env),3m(kernel),"\ + "1m(romfs),1m(cramfs),-(jffs2)\0" + +#define CONFIG_CMDLINE_EDITING + +#endif /* __CONFIG_H */ diff --git a/include/configs/ml401.h b/include/configs/ml401.h deleted file mode 100644 index c802dcb..0000000 --- a/include/configs/ml401.h +++ /dev/null @@ -1,281 +0,0 @@ -/* - * (C) Copyright 2007-2008 Michal Simek - * - * Michal SIMEK <monstr(a)monstr.eu> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "../board/xilinx/ml401/xparameters.h" - -#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ -#define MICROBLAZE_V5 1 -#define CONFIG_ML401 1 /* ML401 Board */ - -/* uart */ -#ifdef XILINX_UARTLITE_BASEADDR -#define CONFIG_XILINX_UARTLITE -#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR -#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE -#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#elif XILINX_UART16550_BASEADDR -#define CONFIG_SYS_NS16550 1 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) -#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ -#define CONFIG_BAUDRATE 115200 - -/* The following table includes the supported baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} -#else -#error Undefined uart -#endif - -/* setting reset address */ -/*#define CONFIG_SYS_RESET_ADDRESS TEXT_BASE*/ - -/* ethernet */ -#ifdef XILINX_EMAC_BASEADDR -#define CONFIG_XILINX_EMAC 1 -#define CONFIG_SYS_ENET -#else -#ifdef XILINX_EMACLITE_BASEADDR -#define CONFIG_XILINX_EMACLITE 1 -#define CONFIG_SYS_ENET -#endif -#endif -#undef ET_DEBUG - -/* gpio */ -#ifdef XILINX_GPIO_BASEADDR -#define CONFIG_SYS_GPIO_0 1 -#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR -#endif - -/* interrupt controller */ -#ifdef XILINX_INTC_BASEADDR -#define CONFIG_SYS_INTC_0 1 -#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR -#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS -#endif - -/* timer */ -#ifdef XILINX_TIMER_BASEADDR -#if (XILINX_TIMER_IRQ != -1) -#define CONFIG_SYS_TIMER_0 1 -#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR -#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ -#define FREQUENCE XILINX_CLOCK_FREQ -#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) -#endif -#else -#ifdef XILINX_CLOCK_FREQ -#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ -#else -#error BAD CLOCK FREQ -#endif -#endif -/* FSL */ -/* #define CONFIG_SYS_FSL_2 */ -/* #define FSL_INTR_2 1 */ - -/* - * memory layout - Example - * TEXT_BASE = 0x1200_0000; - * CONFIG_SYS_SRAM_BASE = 0x1000_0000; - * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; - * - * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 - * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000 - * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000 - * - * 0x1000_0000 CONFIG_SYS_SDRAM_BASE - * FREE - * 0x1200_0000 TEXT_BASE - * U-BOOT code - * 0x1202_0000 - * FREE - * - * STACK - * 0x13F7_F000 CONFIG_SYS_MALLOC_BASE - * MALLOC_AREA 256kB Alloc - * 0x11FB_F000 CONFIG_SYS_MONITOR_BASE - * MONITOR_CODE 256kB Env - * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd - * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - */ - -/* ddr sdram - main memory */ -#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START -#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) - -/* global pointer */ -#define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */ -/* start of global data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) - -/* monitor code */ -#define SIZE 0x40000 -#define CONFIG_SYS_MONITOR_LEN SIZE -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MALLOC_LEN SIZE -#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) - -/* stack */ -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MONITOR_BASE - -/*#define RAMENV */ -#define FLASH - -#ifdef FLASH - #define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START - #define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE - #define CONFIG_SYS_FLASH_CFI 1 - #define CONFIG_FLASH_CFI_DRIVER 1 - #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */ - #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ - #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ - #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ - - #ifdef RAMENV - #define CONFIG_ENV_IS_NOWHERE 1 - #define CONFIG_ENV_SIZE 0x1000 - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - - #else /* !RAMENV */ - #define CONFIG_ENV_IS_IN_FLASH 1 - #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */ - #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) - #define CONFIG_ENV_SIZE 0x40000 - #endif /* !RAMBOOT */ -#else /* !FLASH */ - /* ENV in RAM */ - #define CONFIG_SYS_NO_FLASH 1 - #define CONFIG_ENV_IS_NOWHERE 1 - #define CONFIG_ENV_SIZE 0x1000 - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ -#endif /* !FLASH */ - -/* system ace */ -#ifdef XILINX_SYSACE_BASEADDR - #define CONFIG_SYSTEMACE - /* #define DEBUG_SYSTEMACE */ - #define SYSTEMACE_CONFIG_FPGA - #define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR - #define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH - #define CONFIG_DOS_PARTITION -#endif - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_MFSL - -#ifndef CONFIG_SYS_ENET - #undef CONFIG_CMD_NET -#else - #define CONFIG_CMD_PING -#endif - -#if defined(CONFIG_SYSTEMACE) - #define CONFIG_CMD_EXT2 - #define CONFIG_CMD_FAT -#endif - -#if defined(FLASH) - #define CONFIG_CMD_ECHO - #define CONFIG_CMD_FLASH - #define CONFIG_CMD_IMLS - #define CONFIG_CMD_JFFS2 - - #if !defined(RAMENV) - #define CONFIG_CMD_ENV - #define CONFIG_CMD_SAVES - #endif -#else - #undef CONFIG_CMD_FLASH -#endif - -#if defined(CONFIG_CMD_JFFS2) -/* JFFS2 partitions */ -#define CONFIG_JFFS2_CMDLINE /* mtdparts command line support */ -#define MTDIDS_DEFAULT "nor0=ml401-0" - -/* default mtd partition table */ -#define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\ - "256k(env),3m(kernel),1m(romfs),"\ - "1m(cramfs),-(jffs2)" -#endif - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_PROMPT "U-Boot-mONStR> " -#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ -#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */ - -#define CONFIG_BOOTDELAY 30 -#define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "ml401" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" -#define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 -#define CONFIG_ETHADDR 00:E0:0C:00:00:FD - -/* architecture dependent code */ -#define CONFIG_SYS_USR_EXCEP /* user exception */ -#define CONFIG_SYS_HZ 1000 - -#define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" - -#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ - "nor0=ml401-0\0"\ - "mtdparts=mtdparts=ml401-0:"\ - "256k(u-boot),256k(env),3m(kernel),"\ - "1m(romfs),1m(cramfs),-(jffs2)\0" - -#define CONFIG_CMDLINE_EDITING - -#endif /* __CONFIG_H */ -- 1.5.5.1

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[U-Boot] Problem of porting uClinux
by zhaozhoujun520 05 Jan '09

05 Jan '09

I am trying to port uClinux2.4 to my board [S3C44B0],but got a problem whitch I have no idea. imagerom.bin was downloaded to 0xc100000 [RAM] and kenel can be run successfully by using command go 0xc100000. Then I use mkimage -A arm -O linux -C gzip -a 0xc008000 -e 0xc008040 -d image.rom.gz uImage kermit showed : (when I reset board after downloaded uImage to 0x20000 ) ... ... Verifying Checksum .....ok Uncompressing Kenel Image ...Ok ##Loading Ramdisk Image at 000f0000.... Bad Magic Number >>

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[U-Boot] [PATCH] usb_storage: do not reset SanDisk Corporation U3 Cruzer Micro USB thumb drive
by Mike Frysinger 04 Jan '09

04 Jan '09

From: Bryan Wu <Bryan.Wu(a)analog.com> The SanDisk Corporation U3 Cruzer Micro 1/4GB Flash Drive 000016244373FFB4 does not like to be reset, so check for it. Signed-off-by: Bryan Wu <bryan.wu(a)analog.com> Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- common/usb_storage.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/common/usb_storage.c b/common/usb_storage.c index 94f659f..236caf6 100644 --- a/common/usb_storage.c +++ b/common/usb_storage.c @@ -1166,6 +1166,11 @@ int usb_stor_get_info(struct usb_device *dev,struct us_data *ss,block_dev_desc_t /* SanDisk Corporation Cruzer Micro 20044318410546613953 */ (dev->descriptor.idVendor == 0x0781 && dev->descriptor.idProduct == 0x5151) + || + /* SanDisk Corporation U3 Cruzer Micro 1/4GB + * Flash Drive 000016244373FFB4 */ + (dev->descriptor.idVendor == 0x0781 && + dev->descriptor.idProduct == 0x5406) ) USB_STOR_PRINTF("usb_stor_get_info: skipping RESET..\n"); else -- 1.6.0.6

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