January 2009 - U-Boot

[U-Boot] Pull request: u-boot-fdt.git
by Jerry Van Baren 18 Jan '09

18 Jan '09

Dear Wolfgang, Please pull u-boot-fdt.git to pick up a bugfix for 2009-01. Thanks, gvb The following changes since commit fadad1573fb16c90025f08a2861d6047d093cba7: Mike Frysinger (1): ncb: use socklen_t are available in the git repository at: git://git.denx.de/u-boot-fdt.git master Peter Korsgaard (1): fdt_resize(): fix actualsize calculations with unaligned blobs common/fdt_support.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

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[U-Boot] [PATCH] build system: treat all Darwin's alike
by Mike Frysinger 18 Jan '09

18 Jan '09

The x86 based version of Darwin behaves the same quirky way as the powerpc Darwin, so only check HOSTOS when setting up Darwin workarounds. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- config.mk | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/config.mk b/config.mk index d770f09..b1254e9 100644 --- a/config.mk +++ b/config.mk @@ -46,7 +46,7 @@ PLATFORM_LDFLAGS = ######################################################################### -ifeq ($(HOSTOS)-$(HOSTARCH),darwin-ppc) +ifeq ($(HOSTOS),darwin) HOSTCC = cc else HOSTCC = gcc @@ -181,7 +181,7 @@ endif # # So far, this is used only by tools/gdb/Makefile. -ifeq ($(HOSTOS)-$(HOSTARCH),darwin-ppc) +ifeq ($(HOSTOS),darwin) BFD_ROOT_DIR = /usr/local/tools else ifeq ($(HOSTARCH),$(ARCH)) -- 1.6.1

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[U-Boot] AVR32 and AT91 common drivers Maintaining
by Jean-Christophe PLAGNIOL-VILLARD 17 Jan '09

17 Jan '09

Hi all, AVR32 & AT91 share a lot of IP as networking for example (macb) so it will the same in the u-boot drivers In consequence these common drivers will need ack from Haavard and I. Best Regards, J.

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[U-Boot] Any outstanding FDT patches?
by Jerry Van Baren 17 Jan '09

17 Jan '09

Hi all, I picked up Peter Korsgaard's patch "[U-Boot] [PATCH] fdt_resize(): fix actualsize calculations with unaligned blobs". Are there any other FDT patches that should go into the 2009-01 release that I've overlooked? Thanks, gvb

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[U-Boot] [PATCH] fdt_resize(): fix actualsize calculations with unaligned blobs
by Peter Korsgaard 17 Jan '09

17 Jan '09

The code in fdt_resize() to extend the fdt size to end on a page boundary is wrong for fdt's not located at an address aligned on a page boundary. What's even worse, the code would make actualsize shrink rather than grow if (blob & 0xfff) was bigger than the amount of padding added by ALIGN(), causing fdt_add_mem_rsv to fail. Fix it by aligning end address (blob + size) to a page boundary instead. For aligned fdt's this is equivalent to what we had before. Signed-off-by: Peter Korsgaard <jacmet(a)sunsite.dk> --- This was already discussed back in October: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/48912 But the commit (f242a08871) only fixed part of the problem. common/fdt_support.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/common/fdt_support.c b/common/fdt_support.c index 5a83bca..a79bc08 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -610,7 +610,7 @@ int fdt_resize(void *blob) fdt_size_dt_strings(blob) + sizeof(struct fdt_reserve_entry); /* Make it so the fdt ends on a page boundary */ - actualsize = ALIGN(actualsize, 0x1000); + actualsize = ALIGN(actualsize + ((uint)blob & 0xfff), 0x1000); actualsize = actualsize - ((uint)blob & 0xfff); /* Change the fdt header to reflect the correct size */ -- 1.5.6.5

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[U-Boot] [USB EHCI V2 PATCH 2/2] USB ehci ixp4xx support
by Michael Trimarchi 17 Jan '09

17 Jan '09

Add USB ehci ixp4xx host controller. Test on ixdp465 board. Signed-off-by: Michael Trimarchi <trimarchimichael(a)yahoo.it> --- drivers/usb/Makefile | 1 + drivers/usb/usb_ehci_ixp.c | 49 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/usb_ehci_ixp.c diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile index 26189b6..0f94963 100644 --- a/drivers/usb/Makefile +++ b/drivers/usb/Makefile @@ -36,6 +36,7 @@ COBJS-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o COBJS-$(CONFIG_USB_SL811HS) += sl811_usb.o COBJS-$(CONFIG_USB_EHCI_FSL) += usb_ehci_fsl.o COBJS-$(CONFIG_USB_EHCI_PCI) += usb_ehci_pci.o +COBJS-$(CONFIG_USB_EHCI_IXP4XX) += usb_ehci_ixp.o # device ifdef CONFIG_USB_DEVICE diff --git a/drivers/usb/usb_ehci_ixp.c b/drivers/usb/usb_ehci_ixp.c new file mode 100644 index 0000000..25c18c1 --- /dev/null +++ b/drivers/usb/usb_ehci_ixp.c @@ -0,0 +1,49 @@ +/* + * (C) Copyright 2008, Michael Trimarchi <trimarchimichael(a)yahoo.it> + * + * Author: Michael Trimarchi <trimarchimichael(a)yahoo.it> + * This code is based on ehci freescale driver + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <usb.h> +#include "usb_ehci.h" +#include "usb_ehci_core.h" +/* + * Create the appropriate control structures to manage + * a new EHCI host controller. + */ +int ehci_hcd_init(void) +{ + hccr = (struct ehci_hccr *)(0xcd000100); + hcor = (struct ehci_hcor *)((uint32_t) hccr + + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + + printf("IXP4XX init hccr %x and hcor %x hc_length %d\n", + (uint32_t)hccr, (uint32_t)hcor, + (uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + return 0; +} + +/* + * Destroy the appropriate control structures corresponding + * the the EHCI host controller. + */ +int ehci_hcd_stop(void) +{ + return 0; +} -- 1.5.6.5

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[U-Boot] Resubmitting plus update.
by Thomas Delbeke 17 Jan '09

17 Jan '09

Message: 2 Date: Thu, 15 Jan 2009 22:29:37 +0000 From: "Thomas Delbeke" <toom2079(a)gmail.com> Subject: [U-Boot] Winphlash To: u-boot(a)lists.denx.de Message-ID: <799cc56a0901151429j3c58d3aydca1c12caca93c58(a)mail.gmail.com> Content-Type: text/plain; charset="iso-8859-1" Hi there, I am new here. Just wanted to ask you: is there a precompiled u-boot version available that I can flash with a tool like for instance Winphlash, that will work. I am a medium experienced ubuntu hobbyist and I tried to install it from there. I tried to follow the cook book from your website. I git cloned your rep and did the config make install thing. Then I tried crossmake, but the given package wasn't installed (I forgot the name) and the build of it failed. I could obviously use another java-crosscompiler from the ubuntu rep (found trough synaptic). I just prefer the Windows way, as I now the Winphlash thing works and I don't want to find out that I have to reflash my BIOS with a live FREEDOS disk because my system is now inoperable. Thanks for reliefing me from my ignorance, Thomas Update: Also see: http://ubuntuforums.org/showthread.php?p=6564773#post6564773 *u-boot* ------------------------------ Hi there, did anyone install this yet or has an alternative. I would like it because I need to install more RAM into my Acer. According to Acer's specs this is possible, but the Phoenix BIOS is not allowing for that. Also a friend of mine wants to downgrade his Toshiba to XP (see bug #314498 - it is about wine, but it is not the fault of wine as I checked the Toshiba forum and many people have the problem; there is some gdb output, but I suspect it is garbage), but the Vista BIOS does not allow for itself to be replaced. (This thing I can possibly fix with a live XP USB stick - or FreeDos, but I could not find the mount point, go figure ...) I tried to install it from ubuntu but got stopped for now, as I could not get the package for crossmake compiled correctly (I forgot the name). I can off course go for another java cross compiler from synaptic, but before I actually install the BIOS, I would like some feedback here if possible. Is there a precompiled version ready to flash under windows (xp or vista)? Sorry if this thread already exists, but I cannot search for it due to bug #318115: Database Error Database error The Ubuntu Forums database has encountered a problem. Please try the following: * Load the page again by clicking the Refresh button in your web browser. * Open the ubuntuforums.org home page, then try to open another page. * Click the Back button to try another link. The ubuntuforums.org forum technical staff have been notified of the error, though you may contact them if the problem persists. We apologise for any inconvenience. [image: TDFlanders is online now] [image: Report Post]<http://ubuntuforums.org/report.php?p=6564773> [image: Edit/Delete Message]<http://ubuntuforums.org/editpost.php?do=editpost&p=6564773> Thanks, Thomas

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[U-Boot] Trouble booting up my AT91RM9200DK
by V-ris Jaijongrak 17 Jan '09

17 Jan '09

Dear sir, My new kernel refuses to boot up complaining about invalid machine id. (providing that my old kernel (2.6.16) works fine, while new ones (2.6.27 or 2.6.28) refuse to boot up. I have tried looking up and bdinfo shows the correct information ( 0x00000106) but it reads r1 as (r1 = 0x21edd930). Right now I am using u-boot-2008.10. Any help on this would be very appreciate, since I cannot find any useful information for this. Best Regards,

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[U-Boot] [PATCH] move README.nios_CONFIG_SYS_NIOS_CPU to doc
by Jean-Christophe PLAGNIOL-VILLARD 17 Jan '09

17 Jan '09

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> --- .../README.nios_CONFIG_SYS_NIOS_CPU | 0 1 files changed, 0 insertions(+), 0 deletions(-) rename README.nios_CONFIG_SYS_NIOS_CPU => doc/README.nios_CONFIG_SYS_NIOS_CPU (100%) diff --git a/README.nios_CONFIG_SYS_NIOS_CPU b/doc/README.nios_CONFIG_SYS_NIOS_CPU similarity index 100% rename from README.nios_CONFIG_SYS_NIOS_CPU rename to doc/README.nios_CONFIG_SYS_NIOS_CPU -- 1.5.6.5

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[U-Boot] [PATCH] NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS
by Wolfgang Grandegger 16 Jan '09

16 Jan '09

This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg(a)grandegger.com> --- doc/README.nand | 2 +- drivers/mtd/nand/nand_base.c | 2 +- drivers/mtd/nand_legacy/nand_legacy.c | 2 +- include/configs/ASH405.h | 1 - include/configs/CATcenter.h | 1 - include/configs/CMS700.h | 1 - include/configs/DU440.h | 1 - include/configs/G2000.h | 1 - include/configs/HH405.h | 1 - include/configs/HUB405.h | 1 - include/configs/IDS8247.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/MPC8313ERDB.h | 1 - include/configs/MPC8315ERDB.h | 1 - include/configs/MPC8360ERDK.h | 1 - include/configs/MPC837XEMDS.h | 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/NC650.h | 1 - include/configs/NETPHONE.h | 1 - include/configs/NETTA.h | 1 - include/configs/NETTA2.h | 1 - include/configs/NETVIA.h | 1 - include/configs/PLU405.h | 1 - include/configs/PMC440.h | 1 - include/configs/PPChameleonEVB.h | 2 -- include/configs/SXNI855T.h | 1 - include/configs/TQM8272.h | 1 - include/configs/TQM85xx.h | 1 - include/configs/VCMA9.h | 1 - include/configs/VOH405.h | 1 - include/configs/WUH405.h | 1 - include/configs/acadia.h | 1 - include/configs/afeb9260.h | 1 - include/configs/alpr.h | 1 - include/configs/at91cap9adk.h | 1 - include/configs/at91rm9200dk.h | 1 - include/configs/at91sam9260ek.h | 1 - include/configs/at91sam9261ek.h | 1 - include/configs/at91sam9263ek.h | 1 - include/configs/at91sam9rlek.h | 1 - include/configs/bamboo.h | 1 - include/configs/bf537-stamp.h | 1 - include/configs/canyonlands.h | 1 - include/configs/csb637.h | 1 - include/configs/davinci_dvevm.h | 1 - include/configs/davinci_schmoogie.h | 1 - include/configs/davinci_sffsdr.h | 1 - include/configs/davinci_sonata.h | 1 - include/configs/delta.h | 1 - include/configs/kilauea.h | 1 - include/configs/netstar.h | 1 - include/configs/omap2420h4.h | 1 - include/configs/pdnb3.h | 1 - include/configs/quad100hd.h | 1 - include/configs/sbc2410x.h | 1 - include/configs/sc3.h | 1 - include/configs/sequoia.h | 1 - include/configs/smdk6400.h | 1 - include/configs/socrates.h | 1 - include/configs/stxxtc.h | 1 - include/configs/zylonite.h | 1 - include/linux/mtd/bbm.h | 8 ++++---- include/linux/mtd/nand.h | 9 --------- include/linux/mtd/nand_legacy.h | 5 +++++ 66 files changed, 12 insertions(+), 77 deletions(-) Index: u-boot-nand/doc/README.nand =================================================================== --- u-boot-nand.orig/doc/README.nand +++ u-boot-nand/doc/README.nand @@ -172,7 +172,7 @@ More Definitions: #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 - #define NAND_MAX_CHIPS 1 + #define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_DAVINCI_BROKEN_ECC Versions of U-Boot <= 1.3.3 and Montavista Linux kernels Index: u-boot-nand/drivers/mtd/nand/nand_base.c =================================================================== --- u-boot-nand.orig/drivers/mtd/nand/nand_base.c +++ u-boot-nand/drivers/mtd/nand/nand_base.c @@ -2144,7 +2144,7 @@ int nand_erase_nand(struct mtd_info *mtd { int page, len, status, pages_per_block, ret, chipnr; struct nand_chip *chip = mtd->priv; - int rewrite_bbt[NAND_MAX_CHIPS]={0}; + int rewrite_bbt[CONFIG_SYS_NAND_MAX_CHIPS]={0}; unsigned int bbt_masked_page = 0xffffffff; MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n", Index: u-boot-nand/drivers/mtd/nand_legacy/nand_legacy.c =================================================================== --- u-boot-nand.orig/drivers/mtd/nand_legacy/nand_legacy.c +++ u-boot-nand/drivers/mtd/nand_legacy/nand_legacy.c @@ -457,7 +457,7 @@ static void NanD_ScanChips(struct nand_c { int floor, chip; int numchips[NAND_MAX_FLOORS]; - int maxchips = NAND_MAX_CHIPS; + int maxchips = CONFIG_SYS_NAND_MAX_CHIPS; int ret = 1; nand->numchips = 0; Index: u-boot-nand/include/configs/ASH405.h =================================================================== --- u-boot-nand.orig/include/configs/ASH405.h +++ u-boot-nand/include/configs/ASH405.h @@ -150,7 +150,6 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 Index: u-boot-nand/include/configs/CATcenter.h =================================================================== --- u-boot-nand.orig/include/configs/CATcenter.h +++ u-boot-nand/include/configs/CATcenter.h @@ -219,7 +219,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */ #define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ Index: u-boot-nand/include/configs/CMS700.h =================================================================== --- u-boot-nand.orig/include/configs/CMS700.h +++ u-boot-nand/include/configs/CMS700.h @@ -157,7 +157,6 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 Index: u-boot-nand/include/configs/DU440.h =================================================================== --- u-boot-nand.orig/include/configs/DU440.h +++ u-boot-nand/include/configs/DU440.h @@ -411,7 +411,6 @@ int du440_phy_addr(int devnum); * NAND FLASH */ #define CONFIG_SYS_MAX_NAND_DEVICE 2 -#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND0_ADDR + CONFIG_SYS_NAND0_CS, \ CONFIG_SYS_NAND1_ADDR + CONFIG_SYS_NAND1_CS} Index: u-boot-nand/include/configs/G2000.h =================================================================== --- u-boot-nand.orig/include/configs/G2000.h +++ u-boot-nand/include/configs/G2000.h @@ -205,7 +205,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */ #define CONFIG_SYS_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ Index: u-boot-nand/include/configs/HH405.h =================================================================== --- u-boot-nand.orig/include/configs/HH405.h +++ u-boot-nand/include/configs/HH405.h @@ -209,7 +209,6 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 Index: u-boot-nand/include/configs/HUB405.h =================================================================== --- u-boot-nand.orig/include/configs/HUB405.h +++ u-boot-nand/include/configs/HUB405.h @@ -149,7 +149,6 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 Index: u-boot-nand/include/configs/IDS8247.h =================================================================== --- u-boot-nand.orig/include/configs/IDS8247.h +++ u-boot-nand/include/configs/IDS8247.h @@ -275,7 +275,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define NAND_DISABLE_CE(nand) do \ { \ Index: u-boot-nand/include/configs/M5329EVB.h =================================================================== --- u-boot-nand.orig/include/configs/M5329EVB.h +++ u-boot-nand/include/configs/M5329EVB.h @@ -215,7 +215,6 @@ # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE # define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -# define NAND_MAX_CHIPS 1 # define NAND_ALLOW_ERASE_ALL 1 # define CONFIG_JFFS2_NAND 1 # define CONFIG_JFFS2_DEV "nand0" Index: u-boot-nand/include/configs/M5373EVB.h =================================================================== --- u-boot-nand.orig/include/configs/M5373EVB.h +++ u-boot-nand/include/configs/M5373EVB.h @@ -215,7 +215,6 @@ # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE # define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -# define NAND_MAX_CHIPS 1 # define NAND_ALLOW_ERASE_ALL 1 # define CONFIG_JFFS2_NAND 1 # define CONFIG_JFFS2_DEV "nand0" Index: u-boot-nand/include/configs/MPC8313ERDB.h =================================================================== --- u-boot-nand.orig/include/configs/MPC8313ERDB.h +++ u-boot-nand/include/configs/MPC8313ERDB.h @@ -232,7 +232,6 @@ #endif #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_ELBC 1 Index: u-boot-nand/include/configs/MPC8315ERDB.h =================================================================== --- u-boot-nand.orig/include/configs/MPC8315ERDB.h +++ u-boot-nand/include/configs/MPC8315ERDB.h @@ -223,7 +223,6 @@ */ #define CONFIG_SYS_NAND_BASE 0xE0600000 /* 0xE0600000 */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_SYS_BR1_PRELIM ( CONFIG_SYS_NAND_BASE \ Index: u-boot-nand/include/configs/MPC8360ERDK.h =================================================================== --- u-boot-nand.orig/include/configs/MPC8360ERDK.h +++ u-boot-nand/include/configs/MPC8360ERDK.h @@ -211,7 +211,6 @@ #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_UPM 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE Index: u-boot-nand/include/configs/MPC837XEMDS.h =================================================================== --- u-boot-nand.orig/include/configs/MPC837XEMDS.h +++ u-boot-nand/include/configs/MPC837XEMDS.h @@ -271,7 +271,6 @@ #define CONFIG_CMD_NAND 1 #define CONFIG_MTD_NAND_VERIFY_WRITE 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_NAND_FSL_ELBC 1 #define CONFIG_SYS_NAND_BASE 0xE0600000 /* 0xE0600000 */ Index: u-boot-nand/include/configs/MPC8536DS.h =================================================================== --- u-boot-nand.orig/include/configs/MPC8536DS.h +++ u-boot-nand/include/configs/MPC8536DS.h @@ -248,7 +248,6 @@ extern unsigned long get_board_ddr_clk(u CONFIG_SYS_NAND_BASE + 0x80000, \ CONFIG_SYS_NAND_BASE + 0xC0000} #define CONFIG_SYS_MAX_NAND_DEVICE 4 -#define NAND_MAX_CHIPS 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_ELBC 1 Index: u-boot-nand/include/configs/MPC8572DS.h =================================================================== --- u-boot-nand.orig/include/configs/MPC8572DS.h +++ u-boot-nand/include/configs/MPC8572DS.h @@ -267,7 +267,6 @@ extern unsigned long get_board_ddr_clk(u CONFIG_SYS_NAND_BASE + 0x80000,\ CONFIG_SYS_NAND_BASE + 0xC0000} #define CONFIG_SYS_MAX_NAND_DEVICE 4 -#define NAND_MAX_CHIPS 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_ELBC 1 Index: u-boot-nand/include/configs/NC650.h =================================================================== --- u-boot-nand.orig/include/configs/NC650.h +++ u-boot-nand/include/configs/NC650.h @@ -250,7 +250,6 @@ * NAND flash support */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 /*----------------------------------------------------------------------- * SYPCR - System Protection Control 11-9 Index: u-boot-nand/include/configs/NETPHONE.h =================================================================== --- u-boot-nand.orig/include/configs/NETPHONE.h +++ u-boot-nand/include/configs/NETPHONE.h @@ -514,7 +514,6 @@ #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 /* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */ #define NAND_DISABLE_CE(nand) \ Index: u-boot-nand/include/configs/NETTA.h =================================================================== --- u-boot-nand.orig/include/configs/NETTA.h +++ u-boot-nand/include/configs/NETTA.h @@ -633,7 +633,6 @@ #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 /* ALE = PD3, CLE = PD4, CE = PD5, F_RY_BY = PC13 */ #define NAND_DISABLE_CE(nand) \ Index: u-boot-nand/include/configs/NETTA2.h =================================================================== --- u-boot-nand.orig/include/configs/NETTA2.h +++ u-boot-nand/include/configs/NETTA2.h @@ -515,7 +515,6 @@ #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 /* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */ #define NAND_DISABLE_CE(nand) \ Index: u-boot-nand/include/configs/NETVIA.h =================================================================== --- u-boot-nand.orig/include/configs/NETVIA.h +++ u-boot-nand/include/configs/NETVIA.h @@ -411,7 +411,6 @@ #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define NAND_DISABLE_CE(nand) \ do { \ Index: u-boot-nand/include/configs/PLU405.h =================================================================== --- u-boot-nand.orig/include/configs/PLU405.h +++ u-boot-nand/include/configs/PLU405.h @@ -173,7 +173,6 @@ * NAND-FLASH stuff */ #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 Index: u-boot-nand/include/configs/PMC440.h =================================================================== --- u-boot-nand.orig/include/configs/PMC440.h +++ u-boot-nand/include/configs/PMC440.h @@ -505,7 +505,6 @@ * NAND FLASH *----------------------------------------------------------------------*/ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ #define CONFIG_SYS_NAND_QUIET_TEST 1 Index: u-boot-nand/include/configs/PPChameleonEVB.h =================================================================== --- u-boot-nand.orig/include/configs/PPChameleonEVB.h +++ u-boot-nand/include/configs/PPChameleonEVB.h @@ -224,8 +224,6 @@ #define NAND_BIG_DELAY_US 25 #define CONFIG_SYS_MAX_NAND_DEVICE 2 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 - #define CONFIG_SYS_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */ #define CONFIG_SYS_NAND0_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */ #define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ Index: u-boot-nand/include/configs/SXNI855T.h =================================================================== --- u-boot-nand.orig/include/configs/SXNI855T.h +++ u-boot-nand/include/configs/SXNI855T.h @@ -206,7 +206,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 /* DFBUSY is available on Port C, bit 12; 0 if busy */ #define NAND_WAIT_READY(nand) \ Index: u-boot-nand/include/configs/TQM8272.h =================================================================== --- u-boot-nand.orig/include/configs/TQM8272.h +++ u-boot-nand/include/configs/TQM8272.h @@ -424,7 +424,6 @@ #define CONFIG_SYS_NAND3_BASE (CONFIG_SYS_NAND2_BASE + CONFIG_SYS_NAND_CS_DIST) #define CONFIG_SYS_MAX_NAND_DEVICE 4 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE, \ CONFIG_SYS_NAND1_BASE, \ Index: u-boot-nand/include/configs/TQM85xx.h =================================================================== --- u-boot-nand.orig/include/configs/TQM85xx.h +++ u-boot-nand/include/configs/TQM85xx.h @@ -363,7 +363,6 @@ #define CONFIG_SYS_NAND3_BASE (CONFIG_SYS_NAND2_BASE + CONFIG_SYS_NAND_CS_DIST) #define CONFIG_SYS_MAX_NAND_DEVICE 2 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #if (CONFIG_SYS_MAX_NAND_DEVICE == 1) #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE } Index: u-boot-nand/include/configs/VCMA9.h =================================================================== --- u-boot-nand.orig/include/configs/VCMA9.h +++ u-boot-nand/include/configs/VCMA9.h @@ -264,7 +264,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define NAND_WAIT_READY(nand) NF_WaitRB() Index: u-boot-nand/include/configs/VOH405.h =================================================================== --- u-boot-nand.orig/include/configs/VOH405.h +++ u-boot-nand/include/configs/VOH405.h @@ -159,7 +159,6 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 Index: u-boot-nand/include/configs/WUH405.h =================================================================== --- u-boot-nand.orig/include/configs/WUH405.h +++ u-boot-nand/include/configs/WUH405.h @@ -147,7 +147,6 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 Index: u-boot-nand/include/configs/acadia.h =================================================================== --- u-boot-nand.orig/include/configs/acadia.h +++ u-boot-nand/include/configs/acadia.h @@ -262,7 +262,6 @@ * NAND FLASH *----------------------------------------------------------------------*/ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ Index: u-boot-nand/include/configs/afeb9260.h =================================================================== --- u-boot-nand.orig/include/configs/afeb9260.h +++ u-boot-nand/include/configs/afeb9260.h @@ -97,7 +97,6 @@ #define DATAFLASH_TCHS (0x1 << 24) /* NAND flash */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 Index: u-boot-nand/include/configs/alpr.h =================================================================== --- u-boot-nand.orig/include/configs/alpr.h +++ u-boot-nand/include/configs/alpr.h @@ -335,7 +335,6 @@ * NAND-FLASH stuff *-----------------------------------------------------------------------*/ #define CONFIG_SYS_MAX_NAND_DEVICE 4 -#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE #define CONFIG_SYS_NAND_BASE 0xF0000000 /* NAND FLASH Base Address */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE + 0, CONFIG_SYS_NAND_BASE + 2, \ CONFIG_SYS_NAND_BASE + 4, CONFIG_SYS_NAND_BASE + 6 } Index: u-boot-nand/include/configs/at91cap9adk.h =================================================================== --- u-boot-nand.orig/include/configs/at91cap9adk.h +++ u-boot-nand/include/configs/at91cap9adk.h @@ -118,7 +118,6 @@ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* NAND flash */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 Index: u-boot-nand/include/configs/at91rm9200dk.h =================================================================== --- u-boot-nand.orig/include/configs/at91rm9200dk.h +++ u-boot-nand/include/configs/at91rm9200dk.h @@ -129,7 +129,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ Index: u-boot-nand/include/configs/at91sam9260ek.h =================================================================== --- u-boot-nand.orig/include/configs/at91sam9260ek.h +++ u-boot-nand/include/configs/at91sam9260ek.h @@ -100,7 +100,6 @@ #define DATAFLASH_TCHS (0x1 << 24) /* NAND flash */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 Index: u-boot-nand/include/configs/at91sam9261ek.h =================================================================== --- u-boot-nand.orig/include/configs/at91sam9261ek.h +++ u-boot-nand/include/configs/at91sam9261ek.h @@ -111,7 +111,6 @@ #define DATAFLASH_TCHS (0x1 << 24) /* NAND flash */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 Index: u-boot-nand/include/configs/at91sam9263ek.h =================================================================== --- u-boot-nand.orig/include/configs/at91sam9263ek.h +++ u-boot-nand/include/configs/at91sam9263ek.h @@ -123,7 +123,6 @@ #endif /* NAND flash */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 Index: u-boot-nand/include/configs/at91sam9rlek.h =================================================================== --- u-boot-nand.orig/include/configs/at91sam9rlek.h +++ u-boot-nand/include/configs/at91sam9rlek.h @@ -104,7 +104,6 @@ #define CONFIG_SYS_NO_FLASH 1 /* NAND flash */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 Index: u-boot-nand/include/configs/bamboo.h =================================================================== --- u-boot-nand.orig/include/configs/bamboo.h +++ u-boot-nand/include/configs/bamboo.h @@ -197,7 +197,6 @@ * NAND FLASH *----------------------------------------------------------------------*/ #define CONFIG_SYS_MAX_NAND_DEVICE 2 -#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_ADDR + 2 } #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ Index: u-boot-nand/include/configs/bf537-stamp.h =================================================================== --- u-boot-nand.orig/include/configs/bf537-stamp.h +++ u-boot-nand/include/configs/bf537-stamp.h @@ -278,7 +278,6 @@ #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define BFIN_NAND_READY PF3 #define NAND_WAIT_READY(nand) \ Index: u-boot-nand/include/configs/canyonlands.h =================================================================== --- u-boot-nand.orig/include/configs/canyonlands.h +++ u-boot-nand/include/configs/canyonlands.h @@ -234,7 +234,6 @@ * NAND-FLASH related *----------------------------------------------------------------------*/ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ Index: u-boot-nand/include/configs/csb637.h =================================================================== --- u-boot-nand.orig/include/configs/csb637.h +++ u-boot-nand/include/configs/csb637.h @@ -131,7 +131,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ Index: u-boot-nand/include/configs/davinci_dvevm.h =================================================================== --- u-boot-nand.orig/include/configs/davinci_dvevm.h +++ u-boot-nand/include/configs/davinci_dvevm.h @@ -127,7 +127,6 @@ #define CONFIG_SYS_NAND_BASE 0x02000000 #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ #define DEF_BOOTM "" #elif defined(CONFIG_SYS_USE_NOR) Index: u-boot-nand/include/configs/davinci_schmoogie.h =================================================================== --- u-boot-nand.orig/include/configs/davinci_schmoogie.h +++ u-boot-nand/include/configs/davinci_schmoogie.h @@ -89,7 +89,6 @@ #define CONFIG_SYS_NAND_BASE 0x02000000 #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ /*=====================*/ /* Board related stuff */ Index: u-boot-nand/include/configs/davinci_sffsdr.h =================================================================== --- u-boot-nand.orig/include/configs/davinci_sffsdr.h +++ u-boot-nand/include/configs/davinci_sffsdr.h @@ -85,7 +85,6 @@ #define CONFIG_SYS_NAND_BASE 0x02000000 #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ /* I2C switch definitions for PCA9543 chip */ #define CONFIG_SYS_I2C_PCA9543_ADDR 0x70 Index: u-boot-nand/include/configs/davinci_sonata.h =================================================================== --- u-boot-nand.orig/include/configs/davinci_sonata.h +++ u-boot-nand/include/configs/davinci_sonata.h @@ -122,7 +122,6 @@ #define CONFIG_SYS_NAND_BASE 0x02000000 #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ #define DEF_BOOTM "" #elif defined(CONFIG_SYS_USE_NOR) Index: u-boot-nand/include/configs/delta.h =================================================================== --- u-boot-nand.orig/include/configs/delta.h +++ u-boot-nand/include/configs/delta.h @@ -258,7 +258,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NO_FLASH 1 Index: u-boot-nand/include/configs/kilauea.h =================================================================== --- u-boot-nand.orig/include/configs/kilauea.h +++ u-boot-nand/include/configs/kilauea.h @@ -214,7 +214,6 @@ * NAND FLASH *----------------------------------------------------------------------*/ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ Index: u-boot-nand/include/configs/netstar.h =================================================================== --- u-boot-nand.orig/include/configs/netstar.h +++ u-boot-nand/include/configs/netstar.h @@ -120,7 +120,6 @@ * NAND flash */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23) #define NAND_ALLOW_ERASE_ALL 1 Index: u-boot-nand/include/configs/omap2420h4.h =================================================================== --- u-boot-nand.orig/include/configs/omap2420h4.h +++ u-boot-nand/include/configs/omap2420h4.h @@ -163,7 +163,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)0x6800A07C = d;} while(0) #define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)0x6800A080 = d;} while(0) Index: u-boot-nand/include/configs/pdnb3.h =================================================================== --- u-boot-nand.orig/include/configs/pdnb3.h +++ u-boot-nand/include/configs/pdnb3.h @@ -264,7 +264,6 @@ * NAND-FLASH stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE 0x51000000 /* NAND FLASH Base Address */ #endif Index: u-boot-nand/include/configs/quad100hd.h =================================================================== --- u-boot-nand.orig/include/configs/quad100hd.h +++ u-boot-nand/include/configs/quad100hd.h @@ -224,7 +224,6 @@ #define CONFIG_SYS_NAND_CE 24 /* our CE is GPIO24 */ #define CONFIG_SYS_NAND_CLE 31 /* our CLE is GPIO31 */ #define CONFIG_SYS_NAND_ALE 30 /* our ALE is GPIO30 */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif Index: u-boot-nand/include/configs/sbc2410x.h =================================================================== --- u-boot-nand.orig/include/configs/sbc2410x.h +++ u-boot-nand/include/configs/sbc2410x.h @@ -209,7 +209,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define NAND_WAIT_READY(nand) NF_WaitRB() #define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH) Index: u-boot-nand/include/configs/sc3.h =================================================================== --- u-boot-nand.orig/include/configs/sc3.h +++ u-boot-nand/include/configs/sc3.h @@ -424,7 +424,6 @@ extern unsigned long offsetOfEnvironment * NAND-FLASH stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE 0x77D00000 Index: u-boot-nand/include/configs/sequoia.h =================================================================== --- u-boot-nand.orig/include/configs/sequoia.h +++ u-boot-nand/include/configs/sequoia.h @@ -373,7 +373,6 @@ * NAND FLASH */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ Index: u-boot-nand/include/configs/smdk6400.h =================================================================== --- u-boot-nand.orig/include/configs/smdk6400.h +++ u-boot-nand/include/configs/smdk6400.h @@ -227,7 +227,6 @@ /* NAND configuration */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x70200010 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_S3C_NAND_HWECC #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ Index: u-boot-nand/include/configs/socrates.h =================================================================== --- u-boot-nand.orig/include/configs/socrates.h +++ u-boot-nand/include/configs/socrates.h @@ -186,7 +186,6 @@ #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70) #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_CMD_NAND /* LIME GDC */ Index: u-boot-nand/include/configs/stxxtc.h =================================================================== --- u-boot-nand.orig/include/configs/stxxtc.h +++ u-boot-nand/include/configs/stxxtc.h @@ -464,7 +464,6 @@ #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 /* ALE = PC15, CLE = PB23, CE = PA7, F_RY_BY = PA6 */ #define NAND_DISABLE_CE(nand) \ Index: u-boot-nand/include/configs/zylonite.h =================================================================== --- u-boot-nand.orig/include/configs/zylonite.h +++ u-boot-nand/include/configs/zylonite.h @@ -227,7 +227,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NO_FLASH 1 Index: u-boot-nand/include/linux/mtd/bbm.h =================================================================== --- u-boot-nand.orig/include/linux/mtd/bbm.h +++ u-boot-nand/include/linux/mtd/bbm.h @@ -18,8 +18,8 @@ #define __LINUX_MTD_BBM_H /* The maximum number of NAND chips in an array */ -#ifndef NAND_MAX_CHIPS -#define NAND_MAX_CHIPS 8 +#ifndef CONFIG_SYS_NAND_MAX_CHIPS +#define CONFIG_SYS_NAND_MAX_CHIPS 1 #endif /** @@ -48,10 +48,10 @@ */ struct nand_bbt_descr { int options; - int pages[NAND_MAX_CHIPS]; + int pages[CONFIG_SYS_NAND_MAX_CHIPS]; int offs; int veroffs; - uint8_t version[NAND_MAX_CHIPS]; + uint8_t version[CONFIG_SYS_NAND_MAX_CHIPS]; int len; int maxblocks; int reserved_block_code; Index: u-boot-nand/include/linux/mtd/nand.h =================================================================== --- u-boot-nand.orig/include/linux/mtd/nand.h +++ u-boot-nand/include/linux/mtd/nand.h @@ -46,11 +46,6 @@ extern void nand_release (struct mtd_inf /* Internal helper for board drivers which need to override command function */ extern void nand_wait_ready(struct mtd_info *mtd); -/* The maximum number of NAND chips in an array */ -#ifndef NAND_MAX_CHIPS -#define NAND_MAX_CHIPS 8 -#endif - /* This constant declares the max. oobsize / page, which * is supported now. If you add a chip with bigger oobsize/page * adjust this accordingly. @@ -477,10 +472,6 @@ struct nand_manufacturers { extern struct nand_flash_dev nand_flash_ids[]; extern struct nand_manufacturers nand_manuf_ids[]; -#ifndef NAND_MAX_CHIPS -#define NAND_MAX_CHIPS 8 -#endif - extern int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd); extern int nand_update_bbt(struct mtd_info *mtd, loff_t offs); extern int nand_default_bbt(struct mtd_info *mtd); Index: u-boot-nand/include/linux/mtd/nand_legacy.h =================================================================== --- u-boot-nand.orig/include/linux/mtd/nand_legacy.h +++ u-boot-nand/include/linux/mtd/nand_legacy.h @@ -40,6 +40,11 @@ #error This module is for the legacy NAND support #endif +/* The maximum number of NAND chips in an array */ +#ifndef CONFIG_SYS_NAND_MAX_CHIPS +#define CONFIG_SYS_NAND_MAX_CHIPS 1 +#endif + /* * Standard NAND flash commands */

2 1