January 2009 - U-Boot

[U-Boot] [PATCH][MPC8272ADS]
by Jean-Michel Hautbois 15 Jan '09

15 Jan '09

When trying to compile and boot from u-boot (after make distclean ; make MPC8272ADS_config ; make), I had these three errors: Loading Device Tree to 007fb000, end 007ff159 ... OK Unable to update property /cpus/cpu@0:bus-frequency, err=FDT_ERR_NOTFOUND Unable to update property /cpus/cpu@0:timebase-frequency, err=FDT_ERR_NOTFOUND Unable to update property /cpus/cpu@0:clock-frequency, err=FDT_ERR_NOTFOUND When looking at the include/configs/MPC8260ADS.h file, the OF_CPU was set to "cpu@0". In the linux kernel, the dts file in arch/powerpc/boot/dts/mpc8272ads.dts contains "PowerPC,8272@0". Here is the little patch I am proposing in order to correct this issue for the MPC8272ADS board. Best Regards. JM --------------------------------------------------------------- --- a/include/configs/MPC8260ADS.h +++ b/include/configs/MPC8260ADS.h @@ -200,7 +200,11 @@ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 #if defined(CONFIG_OF_LIBFDT) +#ifdef CONFIG_MPC8272 +#define OF_CPU "PowerPC,8272@0" +#else #define OF_CPU "cpu@0" +#endif #define OF_TBCLK (bd->bi_busfreq / 4) #endif

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[U-Boot] uboot for Intel EP80579
by Sai Amruta 15 Jan '09

15 Jan '09

Hi all, Is uboot supports Intel EP80579 SoC ? If not, what will be the effort to port uboot on Intel EP80579. -- --Amru

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[U-Boot] [PATCH v2] Add secondary CPUs processor frequency for e500 core
by Haiying Wang 15 Jan '09

15 Jan '09

This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS, and prints each CPU's frequency separately. It also fixes up each CPU's frequency in "clock-frequency" of fdt blob. Signed-off-by: James Yang <James.Yang(a)freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang(a)freescale.com> --- This v2 version is against Andy's latest u-boot-mpc85xx.git tree. cpu/mpc85xx/cpu.c | 7 +++++-- cpu/mpc85xx/fdt.c | 15 +++++++++++++-- cpu/mpc85xx/speed.c | 10 ++++++---- include/e500.h | 6 +++++- 4 files changed, 29 insertions(+), 9 deletions(-) diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 15ba7f1..a34e251 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -90,6 +90,7 @@ int checkcpu (void) #else u32 ddr_ratio = 0; #endif + int i; svr = get_svr(); ver = SVR_SOC_VER(svr); @@ -141,8 +142,10 @@ int checkcpu (void) get_sys_info(&sysinfo); - puts("Clock Configuration:\n"); - printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freqProcessor)); + puts("Clock Configuration:\n "); + for (i = 0; i < CONFIG_NUM_CPUS; i++) + printf("CPU%d:%-4s MHz, ", + i,strmhz(buf1, sysinfo.freqProcessor[i])); printf("CCB:%-4s MHz,\n", strmhz(buf1, sysinfo.freqSystemBus)); switch (ddr_ratio) { diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c index 69fab99..1fae47c 100644 --- a/cpu/mpc85xx/fdt.c +++ b/cpu/mpc85xx/fdt.c @@ -213,6 +213,10 @@ void fdt_add_enet_stashing(void *fdt) void ft_cpu_setup(void *blob, bd_t *bd) { + int off; + int val; + sys_info_t sysinfo; + /* delete crypto node if not on an E-processor */ if (!IS_E_PROCESSOR(get_svr())) fdt_fixup_crypto_node(blob, 0); @@ -228,8 +232,15 @@ void ft_cpu_setup(void *blob, bd_t *bd) "timebase-frequency", bd->bi_busfreq / 8, 1); do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "bus-frequency", bd->bi_busfreq, 1); - do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, - "clock-frequency", bd->bi_intfreq, 1); + get_sys_info(&sysinfo); + off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); + while (off != -FDT_ERR_NOTFOUND) { + u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); + val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]); + fdt_setprop(blob, off, "clock-frequency", &val, 4); + off = fdt_node_offset_by_prop_value(blob, off, "device_type", + "cpu", 4); + } do_fixup_by_prop_u32(blob, "device_type", "soc", 4, "bus-frequency", bd->bi_busfreq, 1); diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c index 0d55228..b0f47e0 100644 --- a/cpu/mpc85xx/speed.c +++ b/cpu/mpc85xx/speed.c @@ -39,17 +39,19 @@ void get_sys_info (sys_info_t * sysInfo) volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); uint plat_ratio,e500_ratio,half_freqSystemBus; uint lcrr_div; + int i; plat_ratio = (gur->porpllsr) & 0x0000003e; plat_ratio >>= 1; sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ; - e500_ratio = (gur->porpllsr) & 0x003f0000; - e500_ratio >>= 16; /* Divide before multiply to avoid integer * overflow for processor speeds above 2GHz */ half_freqSystemBus = sysInfo->freqSystemBus/2; - sysInfo->freqProcessor = e500_ratio*half_freqSystemBus; + for (i = 0; i < CONFIG_NUM_CPUS; i++) { + e500_ratio = ((gur->porpllsr) >> (i * 8 + 16)) & 0x3f; + sysInfo->freqProcessor[i] = e500_ratio * half_freqSystemBus; + } /* Note: freqDDRBus is the MCLK frequency, not the data rate. */ sysInfo->freqDDRBus = sysInfo->freqSystemBus; @@ -105,7 +107,7 @@ int get_clocks (void) dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT; #endif get_sys_info (&sys_info); - gd->cpu_clk = sys_info.freqProcessor; + gd->cpu_clk = sys_info.freqProcessor[0]; gd->bus_clk = sys_info.freqSystemBus; gd->mem_clk = sys_info.freqDDRBus; gd->lbc_clk = sys_info.freqLocalBus; diff --git a/include/e500.h b/include/e500.h index 9d3c841..4c5eeb7 100644 --- a/include/e500.h +++ b/include/e500.h @@ -8,9 +8,13 @@ #ifndef __ASSEMBLY__ +#ifndef CONFIG_NUM_CPUS +#define CONFIG_NUM_CPUS 1 +#endif + typedef struct { - unsigned long freqProcessor; + unsigned long freqProcessor[CONFIG_NUM_CPUS]; unsigned long freqSystemBus; unsigned long freqDDRBus; unsigned long freqLocalBus; -- 1.6.0.2

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[U-Boot] scanf in u-boot.1.2.0
by Ajeesh Kumar 15 Jan '09

15 Jan '09

Hi All, I'm using a u-boot.1.2.0 code base, do we have a "scanf()" type of function call where i can use. Please help me in this regard. Thanks, Ajeesh Kumar The information contained in this electronic message and any attachments to this message are intended for the exclusive use of the addressee(s) and may contain proprietary, confidential or privileged information. If you are not the intended recipient, you should not disseminate, distribute or copy this e-mail. Please notify the sender immediately and destroy all copies of this message and any attachments contained in it.

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[U-Boot] dtc/u-boot tool naming, "ftdump", "mkimage"
by Matt Sealey 15 Jan '09

15 Jan '09

I just noticed (was told by an affiliate) that the DTC compiler tools shares a tool name "ftdump" with the Freetype project. I was doing a lazy packaging effort to get a few tools around so we can all be running the same version and build some custom kernel RPMs, and this came up. Wouldn't a better name be "fdtdump", do you think? It's usually not a fun idea to conflict with tools already on the system. A user may run "ftdump" and get the Freetype tool because of a simple mistake in paths or so. With regards to U-Boot proper, I would say the same is true of "mkimage" which conflicts with jigdo. In essence, while U-Boot is usually installed into a user's home directory (~/bin etc.) simple path mixups, going to root shell, using another box etc. means you may have multiple same-named tools on a system for various work, which do different things. Is it possible that we could standardize on some tool naming here? I'm going to rename in the package these tools to "mkuimage" (since this goes well with suse mkzimage) and "fdtdump" for my package anyway so no worries if nothing ever gets done.. but since the Fedora guys were packaging dtc up right now I thought I would mention this as the RPM I downloaded from FC10 the other day did not take note of this (and RPM warns that there is a conflict but happily overwrites the file anyway, thus trashing Freetype :) (why am I packaging U-Boot tools like mkimage? We need them for post-install script on a kernel RPM..) -- Matt Sealey Genesi, Manager, Developer Relations

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[U-Boot] [PATCH 1/1 v2] ppc4xx: Autocalibration can set RDCC to over aggressive value.
by Adam Graham 15 Jan '09

15 Jan '09

The criteria of the AMCC SDRAM Controller DDR autocalibration U-Boot code is to pick the largest passing write/read/compare window that also has the smallest SDRAM_RDCC.[RDSS] Read Sample Cycle Select value. On some Kilauea boards the DDR autocalibration algorithm can find a large passing write/read/compare window with a small SDRAM_RDCC.[RDSS] aggressive value of Read Sample Cycle Select value "T1 Sample". This SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of "T1 Sample" proves to be to aggressive when later on U-Boot relocates into DDR memory and executes. The memory traces on the Kilauea board are short so on some Kilauea boards the SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of "T1 Sample" shows up as a potentially valid value for the DDR autocalibratiion algorithm. The fix is to define a weak default function which provides the minimum SDRAM_RDCC.[RDSS] Read Sample Cycle Select value to accept for DDR autocalibration. The default will be the "T2 Sample" value. A board developer who has a well defined board and chooses to be more aggressive can always provide their own board specific string function with the more aggressive "T1 Sample" value or stick with the default minimum SDRAM_RDCC.[RDSS] value of "T2". Also put in a autocalibration loop fix for case where current write/read/compare passing window size is the same as a prior window size, then in this case choose the write/read/compare result that has the associated smallest RDCC T-Sample value. Signed-off-by: Adam Graham <agraham(a)amcc.com> --- v2: - Shortened the maximum patch comment line lengths - Correct coding indentions by using TABS - Correct coding style by removing deep nested if statements cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c | 176 ++++++++++++++++++----------------- include/configs/kilauea.h | 7 -- 2 files changed, 91 insertions(+), 92 deletions(-) diff --git a/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c b/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c index 1e3e20d..0c97d10 100644 --- a/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c +++ b/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c @@ -61,6 +61,12 @@ #define NUMLOOPS 1 /* configure as you deem approporiate */ #define NUMMEMWORDS 16 +#define DDR_VERBOSE_PRT(dbg, lvl, fmt, args...) \ + do { \ + if (lvl > dbg) \ + printf(fmt, ##args); \ + } while (0) + /* Private Structure Definitions */ struct autocal_regs { @@ -147,6 +153,12 @@ ulong __ddr_scan_option(ulong default_val) } ulong ddr_scan_option(ulong) __attribute__((weak, alias("__ddr_scan_option"))); +u32 __ddr_rdss_opt(u32 default_val) +{ + return default_val; +} +u32 ddr_rdss_opt(ulong) __attribute__((weak, alias("__ddr_rdss_opt"))); + static u32 *get_membase(int bxcr_num) { ulong bxcf; @@ -341,6 +353,7 @@ static int short_mem_test(u32 *base_address) ppcDcbf((ulong)&(base_address[j])); } sync(); + iobarrier_rw(); for (l = 0; l < NUMLOOPS; l++) { for (j = 0; j < NUMMEMWORDS; j++) { if (base_address[j] != test[i][j]) { @@ -355,6 +368,7 @@ static int short_mem_test(u32 *base_address) ppcDcbf((u32)&(base_address[j])); } /* for (j = 0; j < NUMMEMWORDS; j++) */ sync(); + iobarrier_rw(); } /* for (l=0; l<NUMLOOPS; l++) */ } @@ -447,7 +461,8 @@ static u32 DQS_calibration_methodA(struct ddrautocal *cal) * Program RDCC register * Read sample cycle auto-update enable */ - mtsdram(SDRAM_RDCC, SDRAM_RDCC_RDSS_T1 | SDRAM_RDCC_RSAE_ENABLE); + mtsdram(SDRAM_RDCC, + ddr_rdss_opt(SDRAM_RDCC_RDSS_T2) | SDRAM_RDCC_RSAE_ENABLE); #ifdef DEBUG mfsdram(SDRAM_RDCC, temp); @@ -633,7 +648,8 @@ static u32 program_DQS_calibration_methodB(struct ddrautocal *ddrcal) * Program RDCC register * Read sample cycle auto-update enable */ - mtsdram(SDRAM_RDCC, SDRAM_RDCC_RDSS_T2 | SDRAM_RDCC_RSAE_ENABLE); + mtsdram(SDRAM_RDCC, + ddr_rdss_opt(SDRAM_RDCC_RDSS_T2) | SDRAM_RDCC_RSAE_ENABLE); #ifdef DEBUG mfsdram(SDRAM_RDCC, temp); @@ -1013,10 +1029,10 @@ u32 DQS_autocalibration(void) #endif debug("\n"); - if (verbose_lvl > 2) { - printf("*** SDRAM_WRDTR (wdtr) set to %d\n", wdtr); - printf("*** SDRAM_CLKTR (clkp) set to %d\n", clkp); - } + DDR_VERBOSE_PRT(2, verbose_lvl, + "*** SDRAM_WRDTR (wdtr) set to %d\n", wdtr); + DDR_VERBOSE_PRT(2, verbose_lvl, + "*** SDRAM_CLKTR (clkp) set to %d\n", clkp); memset(&ddrcal, 0, sizeof(ddrcal)); @@ -1091,91 +1107,81 @@ u32 DQS_autocalibration(void) * if no passing window was found, or is the * size of the RFFD passing window. */ - if (result != 0) { - tcal.autocal.flags = 1; - debug("*** (%d)(%d) result passed window size: 0x%08x, " - "rqfd = 0x%08x, rffd = 0x%08x, rdcc = 0x%08x\n", - wdtr, clkp, result, ddrcal.rqfd, - ddrcal.rffd, ddrcal.rdcc); - /* - * Save the SDRAM_WRDTR and SDRAM_CLKTR - * settings for the largest returned - * RFFD passing window size. - */ - if (result > best_result) { + /* + * want the lowest Read Sample Cycle Select + */ + val = (val & SDRAM_RDCC_RDSS_MASK) >> 30; + debug("*** (%d) (%d) current_rdcc, best_rdcc\n", + val, best_rdcc); + if ((result != 0) && + (val >= (ddr_rdss_opt(SDRAM_RDCC_RDSS_T2) >> 30))) { + if (((result == best_result) && (val < best_rdcc)) || + ((result > best_result) && (val <= best_rdcc))) { + tcal.autocal.flags = 1; + debug("*** (%d)(%d) result passed window " + "size: 0x%08x, rqfd = 0x%08x, " + "rffd = 0x%08x, rdcc = 0x%08x\n", + wdtr, clkp, result, ddrcal.rqfd, + ddrcal.rffd, ddrcal.rdcc); /* - * want the lowest Read Sample Cycle Select + * Save the SDRAM_WRDTR and SDRAM_CLKTR + * settings for the largest returned + * RFFD passing window size. */ - val = (val & SDRAM_RDCC_RDSS_MASK) >> 30; - debug("*** (%d) (%d) current_rdcc, best_rdcc\n", - val, best_rdcc); - if (val <= best_rdcc) { - best_rdcc = val; - tcal.clocks.wrdtr = wdtr; - tcal.clocks.clktr = clkp; - tcal.clocks.rdcc = (val << 30); - tcal.autocal.rqfd = ddrcal.rqfd; - tcal.autocal.rffd = ddrcal.rffd; - best_result = result; - - if (verbose_lvl > 2) { - printf("** (%d)(%d) " - "best result: 0x%04x\n", - wdtr, clkp, - best_result); - printf("** (%d)(%d) " - "best WRDTR: 0x%04x\n", - wdtr, clkp, - tcal.clocks.wrdtr); - printf("** (%d)(%d) " - "best CLKTR: 0x%04x\n", - wdtr, clkp, - tcal.clocks.clktr); - printf("** (%d)(%d) " - "best RQDC: 0x%04x\n", - wdtr, clkp, - tcal.autocal.rqfd); - printf("** (%d)(%d) " - "best RFDC: 0x%04x\n", - wdtr, clkp, - tcal.autocal.rffd); - printf("** (%d)(%d) " - "best RDCC: 0x%08x\n", - wdtr, clkp, - (u32)tcal.clocks.rdcc); - mfsdram(SDRAM_RTSR, val); - printf("** (%d)(%d) best " - "loop RTSR: 0x%08x\n", - wdtr, clkp, val); - mfsdram(SDRAM_FCSR, val); - printf("** (%d)(%d) best " - "loop FCSR: 0x%08x\n", - wdtr, clkp, val); - } - } /* if (val <= best_rdcc) */ - } /* if (result >= best_result) */ - } /* if (result != 0) */ + best_rdcc = val; + tcal.clocks.wrdtr = wdtr; + tcal.clocks.clktr = clkp; + tcal.clocks.rdcc = (val << 30); + tcal.autocal.rqfd = ddrcal.rqfd; + tcal.autocal.rffd = ddrcal.rffd; + best_result = result; + + DDR_VERBOSE_PRT(2, verbose_lvl, + "** (%d)(%d) best result: 0x%04x\n", + wdtr, clkp, best_result); + DDR_VERBOSE_PRT(2, verbose_lvl, + "** (%d)(%d) best WRDTR: 0x%04x\n", + wdtr, clkp, tcal.clocks.wrdtr); + DDR_VERBOSE_PRT(2, verbose_lvl, + "** (%d)(%d) best CLKTR: 0x%04x\n", + wdtr, clkp, tcal.clocks.clktr); + DDR_VERBOSE_PRT(2, verbose_lvl, + "** (%d)(%d) best RQDC: 0x%04x\n", + wdtr, clkp, tcal.autocal.rqfd); + DDR_VERBOSE_PRT(2, verbose_lvl, + "** (%d)(%d) best RFDC: 0x%04x\n", + wdtr, clkp, tcal.autocal.rffd); + DDR_VERBOSE_PRT(2, verbose_lvl, + "** (%d)(%d) best RDCC: 0x%08x\n", + wdtr, clkp, tcal.clocks.rdcc); + mfsdram(SDRAM_RTSR, val); + DDR_VERBOSE_PRT(2, verbose_lvl, + "** (%d)(%d) best loop RTSR: 0x%08x\n", + wdtr, clkp, val); + mfsdram(SDRAM_FCSR, val); + DDR_VERBOSE_PRT(2, verbose_lvl, + "** (%d)(%d) best loop FCSR: 0x%08x\n", + wdtr, clkp, val); + } + } /* if ((result != 0) && (val >= (ddr_rdss_opt()))) */ scan_list++; } /* while ((scan_list->wrdtr != -1) && (scan_list->clktr != -1)) */ if (tcal.autocal.flags == 1) { - if (verbose_lvl > 0) { - printf("*** --------------\n"); - printf("*** best_result window size: %d\n", - best_result); - printf("*** best_result WRDTR: 0x%04x\n", - tcal.clocks.wrdtr); - printf("*** best_result CLKTR: 0x%04x\n", - tcal.clocks.clktr); - printf("*** best_result RQFD: 0x%04x\n", - tcal.autocal.rqfd); - printf("*** best_result RFFD: 0x%04x\n", - tcal.autocal.rffd); - printf("*** best_result RDCC: 0x%04x\n", - tcal.clocks.rdcc); - printf("*** --------------\n"); - printf("\n"); - } + DDR_VERBOSE_PRT(0, verbose_lvl, "*** --------------\n"); + DDR_VERBOSE_PRT(0, verbose_lvl, + "*** best_result window size: %d\n", best_result); + DDR_VERBOSE_PRT(0, verbose_lvl, + "*** best_result WRDTR: 0x%04x\n", tcal.clocks.wrdtr); + DDR_VERBOSE_PRT(0, verbose_lvl, + "*** best_result CLKTR: 0x%04x\n", tcal.clocks.clktr); + DDR_VERBOSE_PRT(0, verbose_lvl, + "*** best_result RQFD: 0x%04x\n", tcal.autocal.rqfd); + DDR_VERBOSE_PRT(0, verbose_lvl, + "*** best_result RFFD: 0x%04x\n", tcal.autocal.rffd); + DDR_VERBOSE_PRT(0, verbose_lvl, + "*** best_result RDCC: 0x%04x\n", tcal.clocks.rdcc); + DDR_VERBOSE_PRT(0, verbose_lvl, "*** --------------\n\n"); /* * if got best passing result window, then lock in the diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index b943f31..237a9c5 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -235,16 +235,9 @@ * * DDR Autocalibration Method_B is the default. */ -#if 0 -/* - * Needs FIX!!! - * Disable autocalibration for now, because of the unresolved problem - * with kilauea board using 200MHz PLB/DDR2 frequency - */ #define CONFIG_PPC4xx_DDR_AUTOCALIBRATION /* IBM DDR autocalibration */ #define DEBUG_PPC4xx_DDR_AUTOCALIBRATION /* dynamic DDR autocal debug */ #undef CONFIG_PPC4xx_DDR_METHOD_A -#endif #define CONFIG_SYS_SDRAM0_MB0CF_BASE (( 0 << 20) + CONFIG_SYS_SDRAM_BASE) -- 1.5.5

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[U-Boot] PATCH for support W90P710 ARM SoC for U-Boot-1.3.3
by Vovk Konstantin 14 Jan '09

14 Jan '09

You can download patch that will add W90P710 ARM SoC from Nuvoton to U-Boot-1.3.3 source tree. This patch add W90P1 board. What included: 1.W90P710 ARM7 2.UART0 as standard input/output. 3.W90P710 MAC with KSZ8001 PHY initialization. 4.NOR Flash (tested with M29W320ET) 5.NAND Flash (memory mapped, tested with K9F2G08) 6.IDE interface (memory mapped, tested withDOM from PQI) You can download this patch from http://www.wiki.kslemb.com/lib/exe/fetch.php/uboot/w90x700-patch.diff.gz For see more information wisit wiki at www.wiki.kslemb.com Maybe this stuff will be useful someone else.

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[U-Boot] IMX27 NAND Probe Problem
by Alessandro Chies 14 Jan '09

14 Jan '09

Hello again, I would like to add more infos on my problem: When I try to register the device nand0, the call stack arrives to the function in the file nand-imx.c in uboot v2. static int __init imxnd_probe(struct device_d *dev) { struct nand_chip *this; struct mtd_info *mtd; struct imx_nand_platform_data *pdata = dev->platform_data; struct imx_nand_host *host; u16 tmp; int err = 0; #ifdef CONFIG_ARCH_MX27 PCCR1 |= PCCR1_NFC_BAUDEN; #endif /* Allocate memory for MTD device structure and private data */ host = kzalloc(sizeof(struct imx_nand_host), GFP_KERNEL); if (!host) return -ENOMEM; host->dev = dev; /* structures must be linked */ this = &host->nand; mtd = &host->mtd; mtd->priv = this; /* 50 us command delay time */ this->chip_delay = 5; this->priv = host; this->dev_ready = imx_nand_dev_ready; this->cmdfunc = imx_nand_command; this->select_chip = imx_nand_select_chip; this->read_byte = imx_nand_read_byte; this->read_word = imx_nand_read_word; this->write_buf = imx_nand_write_buf; this->read_buf = imx_nand_read_buf; this->verify_buf = imx_nand_verify_buf; #if 0 host->clk = clk_get(&pdev->dev, "nfc_clk"); if (IS_ERR(host->clk)) goto eclk; clk_enable(host->clk); #endif host->regs = (void __iomem *)dev->map_base; tmp = readw(host->regs + NFC_CONFIG1); tmp |= NFC_INT_MSK; writew(tmp, host->regs + NFC_CONFIG1); . And it locks at tmp = readw(host->regs + NFC_CONFIG1); If I exclude the nand, UBoot boots up very well from RAM but If I try Md 0xd8000e1a+0x2 I receive a value that is not real (most of the times, the result of the previous md instruction). Please, can someone give me any type of help on what is happening? Best regards Alessandro

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[U-Boot] [PATCH] cpu/mpc824x/Makefile: fix warning with parallel builds
by Wolfgang Denk 14 Jan '09

14 Jan '09

Parallel builds would occasionally issue this build warning: ln: creating symbolic link `cpu/mpc824x/bedbug_603e.c': File exists Use "ln -sf" as quick work around for the issue. Signed-off-by: Wolfgang Denk <wd(a)denx.de> --- cpu/mpc824x/Makefile | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/cpu/mpc824x/Makefile b/cpu/mpc824x/Makefile index f249dd7..a57ad12 100644 --- a/cpu/mpc824x/Makefile +++ b/cpu/mpc824x/Makefile @@ -44,7 +44,7 @@ $(LIB): $(OBJS) $(AR) $(ARFLAGS) $@ $(OBJS) $(obj)bedbug_603e.c: - ln -s $(src)../mpc8260/bedbug_603e.c $(obj)bedbug_603e.c + ln -sf $(src)../mpc8260/bedbug_603e.c $(obj)bedbug_603e.c ######################################################################### -- 1.6.0.6

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[U-Boot] u-boot newbie - question about the 'debug( )' function ...
by Jonathan Barrow 14 Jan '09

14 Jan '09

In many of the sources, such as "board.c", I notice calls to 'debug()'. The syntax looks similar to printf(), e.g.: debug ("Stack Pointer at: %08lx\n", addr_sp); Is this output sent to the BDM, such as bdi2000? or Ethernet? posted to memory? Also, is debug() related to the setting in 'config.mk' : DBGFLAGS= -g # DDEBUG I can't seem to locate where it lives, so uncertain how it works. Thank You, J.J. Barrow

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