March 2008 - U-Boot

Re: [U-Boot-Users] Performance in Booting Linux w/ Device Tree via U-Boot out of JFFS2 on NAND
by Grant Erickson 08 Mar '08

08 Mar '08

On 3/6/08 9:30 AM, Grant Erickson wrote: > I am continuing some experiments in booting Linux w/ a flattened device tree > via u-boot (1.3.2-rc3) from JFFS2 on NAND on an AMCC "Haleakala" board and am > curious if anyone has come up with some quantitative performance > characterizations of the various options (in all cases, u-boot lives on NOR > flash). The options I am evaluating are: > > 1) Put uImage and haleakala.dtb in their own "raw" NAND slices and boot with > u-boot nand commands: > > [ ... details omitted ... ] > > Qualitative performance: Nearly instantaneous. > > As expected, in this case the qualitative, subjective time to seeing "Linux > version 2.6.25-rc3-00951-g6514352-dirty ..." is nearly instantaneous. > > 2) Put uImage and haleakala.dtb as files in /boot in the ~12 MB JFFS2 root > file system image in the ~60 MB "root" NAND slice and boot with u-boot > fsload commands: > > [ ... details omitted ... ] > > 2a) With CFG_JFFS2_SORT_FRAGMENTS enabled. > > Qualitative performance: Takes the better part of 30-35 minutes. > > As expected with the in-documentation warnings about CFG_JFFS2_SORT_FRAGMENTS > and looking at the code in u-boot/fs/jffs2/jffs2_nand_1pass.c, the > qualitative, subjective time to seeing the Linux version banner is slow, slow > and slow. > > 2b) With CFG_JFFS2_SORT_FRAGMENTS disabled. > > Qualitative performance: Takes about 30 seconds to two minutes. > > 3) This is a hybrid approach that I am setting up right now and is where I am > curious if anyone has done plots of fsload time on JFFS2 + NAND relative to > file system size. > > Here, we use a separate 4 MB "/boot" JFFS2 file system for uImage and > haleakala.dtb files and a 60 MB "/" JFFS2 file system for the root file > system. > > [ ... details omitted ... ] > > 3a) With CFG_JFFS2_SORT_FRAGMENTS enabled. > > Shouldn't be necessary since the /boot file system would only ever be accessed > read-only and updated by nandwrite, not individual file updates. > > 3b) With CFG_JFFS2_SORT_FRAGMENTS disabled. > > Qualitative performance: TBD <= 2b For what it's worth, the results of (3b) above with a 4 MB "boot" JFFS2 file system were the same as (2b) where "/boot" was just a subdirectory of the 12 MB (62 MB total NAND space) "/" JFFS2 file system: In short, qualitative performance: Takes about 30 seconds to two minutes. So, with CFG_JFFS2_SORT_FRAGMENTS disabled it would appear that fsload on JFFS2 is O(1) with respect to one or all of: file system size, inodes or dirents in the 4 MB to 64 MB range. Regards, Grant

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[U-Boot-Users] [MPC8555CDS] 1.3.2-rc3 -- TSECx: No link
by Marcel Moolenaar 08 Mar '08

08 Mar '08

All, I just upgraded U-Boot from 1.1.6 to 1.3.2-rc3 on a MPC8555CDS and it seems TSEC isn't working. I see the same on another one, but only after rebooting from FreeBSD. In that case a reset from U-Boot resolves the problem. This board however always has a link problem. Is this a know issue? Has this been fixed and I simply missed it? Thanks, \begin{log} U-Boot 1.3.2-rc3 (Mar 7 2008 - 15:08:02) CPU: 8555, Version: 1.1, (0x80790011) Core: E500, Version: 2.0, (0x80200020) Clock Configuration: CPU: 825 MHz, CCB: 330 MHz, DDR: 165 MHz, LBC: 82 MHz L1: D-cache 32 kB enabled I-cache 32 kB enabled Board: CDS Version 0x11, PCI Slot 1 CPU Board Revision 1.1 (0x0101) PCI1: 32 bit, 33 MHz, sync PCI2: 32 bit, 66 MHz, async I2C: ready DRAM: Initializing Reusing current 256MB configuration SDRAM: 64 MB DDR: 256 MB FLASH: 16 MB L2 cache 256KB: already enabled. PCI-X will only work at 66 MHz 01 02 1957 3fff 0604 00 01 04 1106 0686 0601 00 01 04 1106 0571 0101 0e 01 04 1106 3038 0c03 00 01 04 1106 3038 0c03 00 01 04 1106 3057 0000 00 01 04 1106 3058 0401 00 01 04 1106 3068 0780 00 01 05 10ec 8139 0200 00 00 1c 1014 01a7 0604 ff In: serial Out: serial Err: serial Net: TSEC0, TSEC1 Hit any key to stop autoboot: 0 => ping 192.168.1.1 TSEC0: No link. TSEC1: No link. ping failed; host 192.168.1.1 is not alive \end{log} -- Marcel Moolenaar xcllnt(a)mac.com

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[U-Boot-Users] [PATCH] sh: Add Ethernet support for MPR2 board
by Mark Jonas 07 Mar '08

07 Mar '08

Hello, the attached patch adds a driver for the SMSC LAN911x and LAN921x family of Ethernet controllers. The patch also enables the use of this driver on the SH7720 based MPR2 board. Please note that the network driver does not obey the U-Boot coding style at all. The reason is that the driver is supplied like that by SMSC on their web page. I only modified it such that it not only supports the LAN9x18 but also the LAN9x15. And I removed CRLFs. My reasoning for leaving the driver as is that if SMSC updates the driver on their web page it will be easier to get the changes into U-Boot as well. Regards, Mark Jonas CHANGELOG: ---------- sh: Added support for SMSC LAN9115 networking on MPR2 board. Signed-off-by: Mark Jonas <mark.jonas(a)de.bosch.com>

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[U-Boot-Users] AT91SAM7 port of U-boot?
by Zachary P. Landau 07 Mar '08

07 Mar '08

Hello, Has anyone made any attempt to port any CPUs in the AT91SAM7 series to u-boot? I looked in the archives and did a general search on the web but didn't come across anything. If not, does anyone foresee any problems with u-boot running on these CPUs? Specifically I'm looking at the AT91SAM7SE512 which has 512K internal flash. It only has 32K internal SRAM, but I'll have plenty of SDRAM available. -- Zachary P. Landau <kapheine(a)gmail.com>

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[U-Boot-Users] [PATCH] Add flash programming counter]
by York Sun 07 Mar '08

07 Mar '08

Add flash programming counter. It prints how many KB has been programmed in case you suspect it hangs when programming large files. Signed-off-by: York Sun <yorksun(a)freescale.com> --- drivers/mtd/cfi_flash.c | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 439c950..c55cf1d 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1188,6 +1188,7 @@ void flash_print_info (flash_info_t * info) int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) { ulong wp; + ulong count, temp; uchar *p; int aln; cfiword_t cword; @@ -1196,6 +1197,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) #ifdef CFG_FLASH_USE_BUFFER_WRITE int buffered_size; #endif + count = cnt; /* get lower aligned address */ wp = (addr & ~(info->portwidth - 1)); @@ -1222,6 +1224,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) } /* handle the aligned part */ + temp = 0; #ifdef CFG_FLASH_USE_BUFFER_WRITE buffered_size = (info->portwidth / info->chipwidth); buffered_size *= info->buffer_size; @@ -1248,6 +1251,10 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) wp += i; src += i; cnt -= i; + if (((count-cnt)>>10) > temp) { + temp = (count-cnt)>>10; + printf("\r\t\t%d KB",temp); + } } #else while (cnt >= info->portwidth) { @@ -1259,8 +1266,13 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) return rc; wp += info->portwidth; cnt -= info->portwidth; + if (((count-cnt)>>10) > temp) { + temp = (count-cnt)>>10; + printf("\r\t\t%d KB",temp); + } } #endif /* CFG_FLASH_USE_BUFFER_WRITE */ + printf("\n"); if (cnt == 0) { return (0); }

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[U-Boot-Users] arm920t RAM relocation broken?
by Cory T. Tusar 07 Mar '08

07 Mar '08

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Commit d4fc6012 added an #ifdef CONFIG_AT91RM9200 construct around the RAM relocation bits in cpu/arm920t/start.S. More directly, it added an entire secondary relocation snippet surrounded by an #ifdef CONFIG_BOOTBINFUNC construct. It appears that this second implementation was later removed in commit 80767a6c, but the #ifdef CONFIG_AT91RM9200 logic was not removed also. Is RAM relocation only intended to function on at91rm9200 boards, or shall I submit a patch fixing the above? - -Cory - -- Cory T. Tusar Embedded Systems Engineer Videon Central, Inc. 2171 Sandy Drive State College, PA 16803 (814) 235-1111 x316 (814) 235-1118 fax "There are two ways of constructing a software design. One way is to make it so simple that there are obviously no deficiencies, and the other way is to make it so complicated that there are no obvious deficiencies." --Sir Charles Anthony Richard Hoare -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.7 (GNU/Linux) iD8DBQFH0FyBHT1tsfGwHJ8RAvOfAJ9y75jQiJih+IJrbD2beYyVpYYpVwCfQQyz /eeY22e7RSWYFbH0iLFcGEM= =yCLN -----END PGP SIGNATURE-----

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[U-Boot-Users] MPC8349-mITX-GP and MontaVista Linux
by Andy Pont 07 Mar '08

07 Mar '08

Hello, I am trying to get MontaVista Linux Pro 5.0 to run on the Freescale MPC8349-mITX-GP reference platform using U-Boot 1.3.2-rc2. When I try to start my kernel I get the following output: MPC8349E-mITX-GP> bootm $loadaddr - $fdtaddr ## Booting image at 00a00000 ... Image Name: Linux-2.6.18_pro500-8349itx Created: 2007-10-22 19:02:12 UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 2214322 Bytes = 2.1 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK Booting using the fdt at 0x800000 Loading Device Tree to 007fe000, end 007fefe7 ... OK WARNING: could not create /chosen FDT_ERR_NOSPACE. ERROR: /chosen node create failed - must RESET the board to recover. Resetting the board. Is this error a problem with the way that U-Boot is setting up the FDT or is it a problem with the way my Linux kernel is interpreting the information that the bootloader has given it? If it makes any difference the kernel and FDT file were built using the MontaVista LSP for the non-GP version of the 8349-mITX as that is what they currently support! TIA. __________________________________________________________ Sent from Yahoo! Mail. The World's Favourite Email http://uk.docs.yahoo.com/nowyoucan.html

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[U-Boot-Users] [PATCH 1/3] 83xx: nand support for MPC837XRDB boards
by Anton Vorontsov 07 Mar '08

07 Mar '08

Signed-off-by: Anton Vorontsov <avorontsov(a)ru.mvista.com> --- include/configs/MPC837XERDB.h | 24 ++++++++++++++++++++++-- 1 files changed, 22 insertions(+), 2 deletions(-) diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 2da4f29..7c19d1e 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -251,9 +251,29 @@ #define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CFG_VSC7385_BASE 0xF0000000 +/* + * NAND Flash on the Local Bus + */ +#define CFG_NAND_BASE 0xE0600000 /* 0xE0600000 */ +#define CFG_BR1_PRELIM (CFG_NAND_BASE | \ + (2 << BR_DECC_SHIFT) | /* Use HW ECC */ \ + BR_PS_8 | /* Port Size = 8 bit */ \ + BR_MS_FCM | /* MSEL = FCM */ \ + BR_V) /* valid */ +#define CFG_OR1_PRELIM (0xFFFF8000 | /* length 32K */ \ + OR_FCM_CSCT | \ + OR_FCM_CST | \ + OR_FCM_CHT | \ + OR_FCM_SCY_1 | \ + OR_FCM_TRLX | \ + OR_FCM_EHTR) +#define CFG_LBLAWBAR1_PRELIM CFG_NAND_BASE +#define CFG_LBLAWAR1_PRELIM 0x8000000E /* 32KB */ -/* VSC7385 Gigabit Switch support */ +/* + * VSC7385 Gigabit Switch support + */ +#define CFG_VSC7385_BASE 0xF0000000 #define CONFIG_VSC7385_ENET #define CFG_BR2_PRELIM 0xf0000801 /* Base address */ #define CFG_OR2_PRELIM 0xfffe09ff /* 128K bytes*/ -- 1.5.2.2

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[U-Boot-Users] Where Uboot executes in RAM?
by harsh poshtiwala 07 Mar '08

07 Mar '08

Hi All, I would like to know at what address range of RAM uboot runs? I would like to know this for my 64MB RAM.Is there any place in any config file or somewhere in uboot code where this address range is defined? Regards -- Thanks & Regards Harsh

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[U-Boot-Users] VXWorks EST Flat Binary
by Luigi 'Comio' Mantellini 07 Mar '08

07 Mar '08

HI Folks, How I can load (and start) an EST Flat Bin image? My supplier gives me this image and I don't know how run it from u-boot (from git). Can someone help me? thanks a lot. luigi -- ______ Luigi Mantellini .'______'. R&D - Software (.' '.) Industrie Dial Face S.p.A. ( :=----=: ) Via Canzo, 4 ('.______.') 20068 Peschiera Borromeo (MI), Italy '.______.' Tel.: +39 02 5167 2813 Fax: +39 02 5167 2459 Ind. Dial Face Email: luigi.mantellini(a)idf-hit.com www.idf-hit.com

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