March 2008 - U-Boot

[U-Boot-Users] [PATCH 4/13] SPARC: Added support for SPARC/LEON3
by Daniel Hellstrom 28 Mar '08

28 Mar '08

Hello Wolfgang, This patch adds support for SPARC/LEON3 to U-Boot. LEON3 boards are added in separate patches. This patch does not support LEON3 SMP system. Linux for SPARC assumes that there is a Sun Boot prom available. The boot prom is used as monitor to support basic features such as rebooting, printing to the system console (serial terminal in the LEON case) and getting information about the hardware (baudrate, main memory etc.). So, in order to boot SPARC Linux on LEON a standard boot prom is emulated. This is done in cpu/leon?/prom.c. The boot prom must be placed at a higher address that the stack to avoid that it gets overwritten. Some chip designs has UHCI and EHI USB. UHCI has been implemented for U-Boot on LEON3 systems. LEON3 processors is on an extended AMBA bus (with Plug&Play support), whereas LEON2 uses hardcoded addresses since it is on an AMBA bus without Plug&Play. ABOUT LEON3 and GRLIB --------------------- LEON3 is an open source (GPL) SPARC V7 and/or V8 processor part of GRLIB. GRLIB is a free comprehensive open source (GPL) Portable IP library (written in VHDL) featuring cores such as Ethernet 10/100/1000, SpaceWire, PCI, CAN, 1553, I2C, USB 1.1 and 2.0, SPI, DMA ATA, SVGA, PS/2, UART, Timer, SDRAM, SRAM, SSRAM, DDR, DDR2, FLASH/PROM, CPU Debug Unit, FPU, GPIO and many more. More info available at www.gaisler.com. ABOUT SPARC-ELF COMPILER ------------------------ Compiling u-boot for LEON3 and LEON2 has only been has only been tested with GCC 3.4.4 compiler with added LEON2 and LEON3 support available from www.gaisler.com or ftp://ftp.gaisler.com/gaisler.com/bcc/bin/linux/sparc-elf-3.4.4-1.0.30.tar.…, installation instructions can be found in bcc/doc/bcc.pdf. (extract to /opt/ and add /opt/sparc-elf-3.4.4/bin to PATH). U-BOOT support tested --------------------- - LEON3 (and LEON3FT Fault tolerant version) - LEON3 Simmulator (GRSIM and TSIM) - Network (GRETH and SMC91111) - USB 1.1 (UHCI) - Linux and RTEMS booting - booting UBOOT from RAM and FLASH by changing board/gaisler/xxx/config.mk - DDR, DDR2, SRAM, FT-SRAM - UART, IRQ, Timer This patch is available at ftp://ftp.gaisler.com/gaisler.com/u-boot/patches/4_leon3.patch due the patchsize. Best Regards, Daniel Hellstrom Makefile | 3 + README | 1 + cpu/leon3/Makefile | 54 ++ cpu/leon3/ambapp.c | 339 ++++++++++ cpu/leon3/config.mk | 26 + cpu/leon3/cpu.c | 67 ++ cpu/leon3/cpu_init.c | 254 +++++++ cpu/leon3/interrupts.c | 219 ++++++ cpu/leon3/prom.c | 1078 +++++++++++++++++++++++++++++ cpu/leon3/serial.c | 139 ++++ cpu/leon3/start.S | 616 +++++++++++++++++ cpu/leon3/usb_uhci.c | 1313 ++++++++++++++++++++++++++++++++++++ cpu/leon3/usb_uhci.h | 184 +++++ include/ambapp.h | 380 +++++++++++ include/asm-sparc/arch-leon3/asi.h | 36 + include/asm-sparc/leon.h | 38 + include/asm-sparc/leon3.h | 37 + include/asm-sparc/processor.h | 9 +- 18 files changed, 4792 insertions(+), 1 deletions(-)

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[U-Boot-Users] [PATCH 1/13] SPARC: Added support for generic SPARC architecture.
by Daniel Hellstrom 28 Mar '08

28 Mar '08

Hello Wolfgang, This patch adds support for the SPARC achitecture. Not much to say, I have fixed the mess you commented on and split the patches to smaller chunks, and tested on LEON2 simulator and LEON3 boards. ABOUT SPARC-ELF COMPILER ------------------------ Compiling u-boot for LEON3 and LEON2 has only been has been tested with GCC 3.4.4 compiler with added LEON2 and LEON3 support available from www.gaisler.com or ftp://ftp.gaisler.com/gaisler.com/bcc/bin/linux/sparc-elf-3.4.4-1.0.30.tar.…, installation instructions can be found in bcc/doc/bcc.pdf. (extract to /opt/ and add /opt/sparc-elf-3.4.4/bin to PATH). U-BOOT support tested --------------------- - LEON3 (and LEON3FT Fault tolerant version) - LEON3 Simulator (GRSIM and TSIM) - LEON2 Simulator (GRSIM and TSIM) - Network (GRETH and SMC91111) - USB 1.1 (UHCI) - Linux and RTEMS booting - booting UBOOT from RAM and FLASH by changing board/gaisler/xxx/config.mk - DDR, DDR2, SRAM, FT-SRAM - UART, IRQ, Timer This patch is available at ftp://ftp.gaisler.com/gaisler.com/u-boot/patches/1_sparc.patch. Best Regards, Daniel Hellstrom MAKEALL | 7 + Makefile | 9 +- README | 1 + examples/Makefile | 3 + examples/sparc.lds | 61 +++++ examples/stubs.c | 16 ++ include/asm-sparc/asi.h | 32 +++ include/asm-sparc/asmmacro.h | 45 ++++ include/asm-sparc/atomic.h | 29 +++ include/asm-sparc/bitops.h | 29 +++ include/asm-sparc/byteorder.h | 37 +++ include/asm-sparc/cache.h | 31 +++ include/asm-sparc/errno.h | 162 ++++++++++++ include/asm-sparc/global_data.h | 85 +++++++ include/asm-sparc/io.h | 94 +++++++ include/asm-sparc/irq.h | 49 ++++ include/asm-sparc/machines.h | 92 +++++++ include/asm-sparc/page.h | 43 ++++ include/asm-sparc/posix_types.h | 139 +++++++++++ include/asm-sparc/processor.h | 109 ++++++++ include/asm-sparc/prom.h | 297 ++++++++++++++++++++++ include/asm-sparc/psr.h | 97 ++++++++ include/asm-sparc/ptrace.h | 181 ++++++++++++++ include/asm-sparc/srmmu.h | 301 ++++++++++++++++++++++ include/asm-sparc/stack.h | 162 ++++++++++++ include/asm-sparc/string.h | 55 ++++ include/asm-sparc/types.h | 71 ++++++ include/asm-sparc/u-boot.h | 74 ++++++ include/asm-sparc/winmacro.h | 151 +++++++++++ lib_sparc/Makefile | 45 ++++ lib_sparc/board.c | 521 +++++++++++++++++++++++++++++++++++++++ lib_sparc/bootm.c | 226 +++++++++++++++++ lib_sparc/cache.c | 33 +++ lib_sparc/interrupts.c | 122 +++++++++ lib_sparc/time.c | 78 ++++++ sparc_config.mk | 24 ++ 36 files changed, 3510 insertions(+), 1 deletions(-)

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[U-Boot-Users] [PATCH 13/13] SPARC: Added support for LEON2 TSIM/GRSIM simulator.
by Daniel Hellstrom 28 Mar '08

28 Mar '08

Hello Wolfgang, This patch adds support for the LEON2 simulators TSIM and GRSIM. The simulators GRSIM and TSIM for LEON3 has been added as a board. A separate board is needed due to that the FLASH CFI interface has not been implemented in the simulators. This patch is also available at ftp://ftp.gaisler.com/gaisler.com/u-boot/patches. Best Regards, Daniel Hellstrom MAKEALL | 2 +- Makefile | 4 + board/gaisler/grsim_leon2/Makefile | 50 +++++ board/gaisler/grsim_leon2/config.mk | 34 +++ board/gaisler/grsim_leon2/grsim_leon2.c | 43 ++++ board/gaisler/grsim_leon2/u-boot.lds | 159 ++++++++++++++ include/configs/grsim_leon2.h | 349 +++++++++++++++++++++++++++++++ 7 files changed, 640 insertions(+), 1 deletions(-) diff --git a/MAKEALL b/MAKEALL index 5019f8a..c3be0c2 100755 --- a/MAKEALL +++ b/MAKEALL @@ -714,7 +714,7 @@ LIST_sh=" \ ## SPARC Systems ######################################################################### -LIST_sparc="gr_xc3s_1500 gr_cpci_ax2000 gr_ep2s60 grsim" +LIST_sparc="gr_xc3s_1500 gr_cpci_ax2000 gr_ep2s60 grsim grsim_leon2" #----------------------------------------------------------------------- diff --git a/Makefile b/Makefile index a094606..13a1147 100644 --- a/Makefile +++ b/Makefile @@ -2883,6 +2883,10 @@ grsim_config : unconfig ## LEON2 ######################################################################### +# Gaisler LEON2 GRSIM simulator +grsim_leon2_config : unconfig + @$(MKCONFIG) $(@:_config=) sparc leon2 grsim_leon2 gaisler + ######################################################################### ######################################################################### ######################################################################### diff --git a/board/gaisler/grsim_leon2/Makefile b/board/gaisler/grsim_leon2/Makefile new file mode 100644 index 0000000..6295109 --- /dev/null +++ b/board/gaisler/grsim_leon2/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2003-2004 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/gaisler/grsim_leon2/config.mk b/board/gaisler/grsim_leon2/config.mk new file mode 100644 index 0000000..65eba1b --- /dev/null +++ b/board/gaisler/grsim_leon2/config.mk @@ -0,0 +1,34 @@ +# +# (C) Copyright 2007 +# Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# GRSIM simulating a LEON2 board +# + +# RUN U-BOOT FROM PROM +TEXT_BASE = 0x00000000 + +# RUN U-BOOT FROM RAM +#TEXT_BASE = 0x40000000 + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/gaisler/grsim_leon2/grsim_leon2.c b/board/gaisler/grsim_leon2/grsim_leon2.c new file mode 100644 index 0000000..55dfe82 --- /dev/null +++ b/board/gaisler/grsim_leon2/grsim_leon2.c @@ -0,0 +1,43 @@ +/* GRSIM/TSIM board + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <asm/leon.h> + +long int initdram(int board_type) +{ + return 1; +} + +int checkboard(void) +{ + puts("Board: GRSIM/TSIM LEON2\n"); + return 0; +} + +int misc_init_r(void) +{ + return 0; +} diff --git a/board/gaisler/grsim_leon2/u-boot.lds b/board/gaisler/grsim_leon2/u-boot.lds new file mode 100644 index 0000000..2a22082 --- /dev/null +++ b/board/gaisler/grsim_leon2/u-boot.lds @@ -0,0 +1,159 @@ +/* Linker script for Gaisler Research AB's GRSIM LEON2 simulator. + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") +OUTPUT_ARCH(sparc) +ENTRY(_start) +SECTIONS +{ + +/* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + + .text : { + _load_addr = .; + _text = .; + + *(.start) + cpu/leon2/start.o (.text) +/* 8k is the same as the PROM offset from end of main memory, (CFG_PROM_SIZE) */ + . = ALIGN(8192); +/* PROM CODE, Will be relocated to the end of memory, + * no global data accesses please. + */ + __prom_start = .; + *(.prom.pgt) + *(.prom.data) + *(.prom.text) + . = ALIGN(16); + __prom_end = .; + *(.text) + *(.fixup) + *(.gnu.warning) +/* *(.got1)*/ + . = ALIGN(16); + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.eh_frame) + } + . = ALIGN(4); + _etext = .; + + /* CMD Table */ + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + . = ALIGN(4); + __u_boot_cmd_end = .; + + .data : + { + *(.data) + *(.data1) + *(.data.rel) + *(.data.rel.*) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = ALIGN(4); + __got_start = .; + .got : { + *(.got) +/* *(.data.rel) + *(.data.rel.local)*/ + . = ALIGN(16); + } + __got_end = .; + +/* .data.rel : { } */ + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(16); /* to speed clearing of bss up */ + } + __bss_end = . ; + _end = . ; + PROVIDE (end = .); + +/* Relocated into main memory */ + + /* Start of main memory */ + /*. = 0x40000000;*/ + + .stack (NOLOAD) : { *(.stack) } + + /* PROM CODE */ + + /* global data in RAM passed to kernel after booting */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + +} diff --git a/include/configs/grsim_leon2.h b/include/configs/grsim_leon2.h new file mode 100644 index 0000000..47f13d0 --- /dev/null +++ b/include/configs/grsim_leon2.h @@ -0,0 +1,349 @@ +/* Configuration header file for LEON2 GRSIM. + * + * (C) Copyright 2003-2005 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H__ +#define __CONFIG_H__ + +/* + * High Level Configuration Options + * (easy to change) + * + * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1. + * + * TSIM command + * tsim-leon -sdram 0 -ram 32000 -rom 8192 -mmu + * + */ + +#define CONFIG_LEON2 /* This is an LEON2 CPU */ +#define CONFIG_LEON 1 /* This is an LEON CPU */ +#define CONFIG_GRSIM 0 /* ... not running on GRSIM */ +#define CONFIG_TSIM 1 /* ... running on TSIM */ + +/* CPU / AMBA BUS configuration */ +#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */ + +/* Number of SPARC register windows */ +#define CFG_SPARC_NWINDOWS 8 + +/* + * Serial console configuration + */ +#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } + +/* Partitions */ +#define CONFIG_DOS_PARTITION +#define CONFIG_MAC_PARTITION +#define CONFIG_ISO_PARTITION + +/* + * Supported commands + */ +#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ +#define CONFIG_CMD_BDI /* bdinfo */ +#define CONFIG_CMD_CONSOLE /* coninfo */ +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_ECHO /* echo arguments */ +#define CONFIG_CMD_FPGA /* FPGA configuration Support */ +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_ITEST /* Integer (and string) test */ +#define CONFIG_CMD_LOADB /* loadb */ +#define CONFIG_CMD_LOADS /* loads */ +#define CONFIG_CMD_MISC /* Misc functions like sleep etc */ +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_RUN /* run command in env variable */ +#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ +#define CONFIG_CMD_XIMG /* Load part of Multi Image */ + +/* + * Autobooting + */ +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +#define CONFIG_PREBOOT "echo;" \ + "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ + "echo" + +#undef CONFIG_BOOTARGS +/*#define CFG_HUSH_PARSER 0*/ +#ifdef CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "flash_nfs=run nfsargs addip;" \ + "bootm ${kernel_addr}\0" \ + "flash_self=run ramargs addip;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ + "rootpath=/export/roofs\0" \ + "scratch=40000000\0" \ + "getkernel=tftpboot \$$scratch$\ \$$bootfile$\0" \ + "ethaddr=00:00:7A:CC:00:12\0" \ + "bootargs=console=ttyS0,38400" \ + "" +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.81 +#define CONFIG_IPADDR 192.168.0.80 +#define CONFIG_ROOTPATH /export/rootfs +#define CONFIG_HOSTNAME grxc3s1500 +#define CONFIG_BOOTFILE /uImage + +#define CONFIG_BOOTCOMMAND "run flash_self" + +/* Memory MAP + * + * Flash: + * |--------------------------------| + * | 0x00000000 Text & Data & BSS | * + * | for Monitor | * + * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * + * | UNUSED / Growth | * 256kb + * |--------------------------------| + * | 0x00050000 Base custom area | * + * | kernel / FS | * + * | | * Rest of Flash + * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| + * | END-0x00008000 Environment | * 32kb + * |--------------------------------| + * + * + * + * Main Memory: + * |--------------------------------| + * | UNUSED / scratch area | + * | | + * | | + * | | + * | | + * |--------------------------------| + * | Monitor .Text / .DATA / .BSS | * 256kb + * | Relocated! | * + * |--------------------------------| + * | Monitor Malloc | * 128kb (contains relocated environment) + * |--------------------------------| + * | Monitor/kernel STACK | * 64kb + * |--------------------------------| + * | Page Table for MMU systems | * 2k + * |--------------------------------| + * | PROM Code accessed from Linux | * 6kb-128b + * |--------------------------------| + * | Global data (avail from kernel)| * 128b + * |--------------------------------| + * + */ + +/* + * Flash configuration (8,16 or 32 MB) + * TEXT base always at 0xFFF00000 + * ENV_ADDR always at 0xFFF40000 + * FLASH_BASE at 0xFC000000 for 64 MB + * 0xFE000000 for 32 MB + * 0xFF000000 for 16 MB + * 0xFF800000 for 8 MB + */ +#define CFG_NO_FLASH 1 +#define CFG_FLASH_BASE 0x00000000 +#define CFG_FLASH_SIZE 0x00800000 +#define CFG_ENV_SIZE 0x8000 + +#define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_FLASH_SIZE-CFG_ENV_SIZE) + +#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */ +#define CFG_MAX_FLASH_SECT 64 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ + +#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ +#define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ +#define CFG_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ + +#ifdef ENABLE_FLASH_SUPPORT +/* For use with grsim FLASH emulation extension */ +#define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ + +#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */ + +/*** CFI CONFIG ***/ +#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT +#define CFG_FLASH_CFI_DRIVER +#define CFG_FLASH_CFI +#endif + +/* + * Environment settings + */ +#define CFG_ENV_IS_NOWHERE 1 +/*#define CFG_ENV_IS_IN_FLASH 0*/ +/*#define CFG_ENV_SIZE 0x8000*/ +#define CFG_ENV_SECT_SIZE 0x40000 +#define CONFIG_ENV_OVERWRITE 1 + +/* + * Memory map + */ +#define CFG_SDRAM_BASE 0x40000000 +#define CFG_SDRAM_SIZE 0x00800000 +#define CFG_SDRAM_END (CFG_SDRAM_BASE+CFG_SDRAM_SIZE) + +/* no SRAM available */ +#undef CFG_SRAM_BASE +#undef CFG_SRAM_SIZE + + +/* Always Run U-Boot from SDRAM */ +#define CFG_RAM_BASE CFG_SDRAM_BASE +#define CFG_RAM_SIZE CFG_SDRAM_SIZE +#define CFG_RAM_END CFG_SDRAM_END + +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_OFFSET (CFG_RAM_END - CFG_GBL_DATA_SIZE) + +#define CFG_PROM_SIZE (8192-CFG_GBL_DATA_SIZE) +#define CFG_PROM_OFFSET (CFG_GBL_DATA_OFFSET-CFG_PROM_SIZE) + +#define CFG_INIT_SP_OFFSET (CFG_PROM_OFFSET-32) +#define CFG_STACK_SIZE (0x10000-32) + +#define CFG_MONITOR_BASE TEXT_BASE +#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) +# define CFG_RAMBOOT 1 +#endif + +#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +#define CFG_MALLOC_END (CFG_INIT_SP_OFFSET-CFG_STACK_SIZE) +#define CFG_MALLOC_BASE (CFG_MALLOC_END-CFG_MALLOC_LEN) + +/* relocated monitor area */ +#define CFG_RELOC_MONITOR_MAX_END CFG_MALLOC_BASE +#define CFG_RELOC_MONITOR_BASE (CFG_RELOC_MONITOR_MAX_END-CFG_MONITOR_LEN) + +/* make un relocated address from relocated address */ +#define UN_RELOC(address) (address-(CFG_RELOC_MONITOR_BASE-TEXT_BASE)) + +/* + * Ethernet configuration + */ +/*#define CONFIG_GRETH 1*/ +/*#define CONFIG_NET_MULTI 1*/ + +/* Default HARDWARE address */ +#define GRETH_HWADDR_0 0x00 +#define GRETH_HWADDR_1 0x00 +#define GRETH_HWADDR_2 0x7A +#define GRETH_HWADDR_3 0xcc +#define GRETH_HWADDR_4 0x00 +#define GRETH_HWADDR_5 0x12 + +#define CONFIG_ETHADDR 00:00:7a:cc:00:12 + +/* + * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s + */ +/* #define CONFIG_GRETH_10MBIT 1 */ +#define CONFIG_PHY_ADDR 0x00 + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#if defined(CONFIG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ +#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ + +#define CFG_LOAD_ADDR 0x100000 /* default load address */ + +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ + +/***** Gaisler GRLIB IP-Cores Config ********/ + +#define CFG_GRLIB_SDRAM 0 +#define CFG_GRLIB_MEMCFG1 (0x000000ff | (1<<11)) +#if CONFIG_GRSIM +#define CFG_GRLIB_MEMCFG2 0x82206000 +#else +#define CFG_GRLIB_MEMCFG2 0x00001820 +#endif +#define CFG_GRLIB_MEMCFG3 0x00136000 + +/*** LEON2 UART 1 ***/ +#define CFG_LEON2_UART1_SCALER \ + ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) + +/* UART1 Define to 1 or 0 */ +#define LEON2_UART1_LOOPBACK_ENABLE 0 +#define LEON2_UART1_FLOWCTRL_ENABLE 0 +#define LEON2_UART1_PARITY_ENABLE 0 +#define LEON2_UART1_ODDPAR_ENABLE 0 + +/*** LEON2 UART 2 ***/ + +#define CFG_LEON2_UART2_SCALER \ + ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) + +/* UART2 Define to 1 or 0 */ +#define LEON2_UART2_LOOPBACK_ENABLE 0 +#define LEON2_UART2_FLOWCTRL_ENABLE 0 +#define LEON2_UART2_PARITY_ENABLE 0 +#define LEON2_UART2_ODDPAR_ENABLE 0 + +#define LEON_CONSOLE_UART1 1 +#define LEON_CONSOLE_UART2 2 + +/* Use UART2 as console */ +#define LEON2_CONSOLE_SELECT LEON_CONSOLE_UART1 + +/* LEON2 I/O Port */ +/*#define LEON2_IO_PORT_DIR 0x0000aa00*/ + +/* default kernel command line */ +#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" + +#define CONFIG_IDENT_STRING "Gaisler GRSIM LEON2" + +#endif /* __CONFIG_H */

1 0

[U-Boot-Users] [PATCH 12/13] SPARC: Added LEON3 AX board GR-CPCI-AX2000.
by Daniel Hellstrom 28 Mar '08

28 Mar '08

Hello Wolfgang, This patch adds support for the LEON3 board: * GR-CPCI-AX2000 (AX system with switchable AX FPGA) Note that by board support I mean support for the pre synthezied template design for the board. Supporting any configuration is not possible but almost, due to the Plug & Play system... The FPGA can be programmed with the template design by: $ cd grlib/designs/BOARD $ make ise-prog-prom-ref This patch is also available at ftp://ftp.gaisler.com/gaisler.com/u-boot/patches. Best Regards, Daniel Hellstrom MAKEALL | 2 +- Makefile | 4 + board/gaisler/gr_cpci_ax2000/Makefile | 52 ++++ board/gaisler/gr_cpci_ax2000/config.mk | 37 +++ board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c | 39 +++ board/gaisler/gr_cpci_ax2000/u-boot.lds | 160 +++++++++++ include/configs/gr_cpci_ax2000.h | 380 +++++++++++++++++++++++++ 7 files changed, 673 insertions(+), 1 deletions(-) diff --git a/MAKEALL b/MAKEALL index 14961f7..5019f8a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -714,7 +714,7 @@ LIST_sh=" \ ## SPARC Systems ######################################################################### -LIST_sparc="gr_xc3s_1500 gr_ep2s60 grsim" +LIST_sparc="gr_xc3s_1500 gr_cpci_ax2000 gr_ep2s60 grsim" #----------------------------------------------------------------------- diff --git a/Makefile b/Makefile index 96a7910..a094606 100644 --- a/Makefile +++ b/Makefile @@ -2866,6 +2866,10 @@ ms7722se_config : unconfig gr_xc3s_1500_config : unconfig @$(MKCONFIG) $(@:_config=) sparc leon3 gr_xc3s_1500 gaisler +# Gaisler GR-CPCI-AX2000 board, a General purpose FPGA-AX system +gr_cpci_ax2000_config : unconfig + @$(MKCONFIG) $(@:_config=) sparc leon3 gr_cpci_ax2000 gaisler + # Gaisler GRLIB template design (GPL SPARC/LEON3) for Altera NIOS # Development board Stratix II edition, FPGA Device EP2S60. gr_ep2s60_config: unconfig diff --git a/board/gaisler/gr_cpci_ax2000/Makefile b/board/gaisler/gr_cpci_ax2000/Makefile new file mode 100644 index 0000000..d58f50d --- /dev/null +++ b/board/gaisler/gr_cpci_ax2000/Makefile @@ -0,0 +1,52 @@ + +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o + +#flash.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/gaisler/gr_cpci_ax2000/config.mk b/board/gaisler/gr_cpci_ax2000/config.mk new file mode 100644 index 0000000..6c4d56b --- /dev/null +++ b/board/gaisler/gr_cpci_ax2000/config.mk @@ -0,0 +1,37 @@ +# +# (C) Copyright 2008 +# Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# GR-CPCI-AX2000 board +# + +# U-BOOT IN FLASH +TEXT_BASE = 0x00000000 + +# U-BOOT IN RAM or SDRAM with -nosram flag set when starting GRMON +#TEXT_BASE = 0x40000000 + +# U-BOOT IN SDRAM +#TEXT_BASE = 0x60000000 + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c new file mode 100644 index 0000000..d99b455 --- /dev/null +++ b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c @@ -0,0 +1,39 @@ +/* + * (C) Copyright 2008 + * Daniel Hellstrom, daniel(a)gaisler.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <config.h> +#include <asm/leon.h> + +long int initdram(int board_type) +{ + return 1; +} + +int checkboard(void) +{ + puts("Board: GR-CPCI-AX2000\n"); + return 0; +} + +int misc_init_r(void) +{ + return 0; +} diff --git a/board/gaisler/gr_cpci_ax2000/u-boot.lds b/board/gaisler/gr_cpci_ax2000/u-boot.lds new file mode 100644 index 0000000..3958670 --- /dev/null +++ b/board/gaisler/gr_cpci_ax2000/u-boot.lds @@ -0,0 +1,160 @@ +/* Linker script for Gaisler Research AB's GR-CPCI-AX2000 board + * with template design. + * + * (C) Copyright 2008 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") +OUTPUT_ARCH(sparc) +ENTRY(_start) +SECTIONS +{ + +/* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + + .text : { + _load_addr = .; + _text = .; + + *(.start) + cpu/leon3/start.o (.text) +/* 8k is the same as the PROM offset from end of main memory, (CFG_PROM_SIZE) */ + . = ALIGN(8192); +/* PROM CODE, Will be relocated to the end of memory, + * no global data accesses please. + */ + __prom_start = .; + *(.prom.pgt) + *(.prom.data) + *(.prom.text) + . = ALIGN(16); + __prom_end = .; + *(.text) + *(.fixup) + *(.gnu.warning) +/* *(.got1)*/ + . = ALIGN(16); + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.eh_frame) + } + . = ALIGN(4); + _etext = .; + + /* CMD Table */ + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + . = ALIGN(4); + __u_boot_cmd_end = .; + + .data : + { + *(.data) + *(.data1) + *(.data.rel) + *(.data.rel.*) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = ALIGN(4); + __got_start = .; + .got : { + *(.got) +/* *(.data.rel) + *(.data.rel.local)*/ + . = ALIGN(16); + } + __got_end = .; + +/* .data.rel : { } */ + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(16); /* to speed clearing of bss up */ + } + __bss_end = . ; + _end = . ; + PROVIDE (end = .); + +/* Relocated into main memory */ + + /* Start of main memory */ + /*. = 0x40000000;*/ + + .stack (NOLOAD) : { *(.stack) } + + /* PROM CODE */ + + /* global data in RAM passed to kernel after booting */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + +} diff --git a/include/configs/gr_cpci_ax2000.h b/include/configs/gr_cpci_ax2000.h new file mode 100644 index 0000000..1276f4d --- /dev/null +++ b/include/configs/gr_cpci_ax2000.h @@ -0,0 +1,380 @@ +/* Configuration header file for Gaisler GR-CPCI-AX2000 + * AX board. Note that since the AX is removable the configuration + * for this board must be edited below. + * + * (C) Copyright 2003-2005 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2008 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H__ +#define __CONFIG_H__ + +/* + * High Level Configuration Options + * (easy to change) + */ + +#define CONFIG_LEON3 /* This is an LEON3 CPU */ +#define CONFIG_LEON 1 /* This is an LEON CPU */ +#define CONFIG_CPCI_AX2000 1 /* ... on GR-CPCI-AX2000 board */ + +#define CONFIG_LEON_RAM_SRAM 1 +#define CONFIG_LEON_RAM_SDRAM 2 +#define CONFIG_LEON_RAM_SDRAM_NOSRAM 3 + +/* Select Memory to run from + * + * SRAM - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000 + * SDRAM - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000 + * SDRAM_NOSRAM - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000 + * + * Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since + * it doesn't fit into the 4Mb SRAM. + * + * SRAM is default since it will work for all systems, however will not + * be able to boot linux. + */ +#define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM + +/* CPU / AMBA BUS configuration */ +#define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */ + +/* Number of SPARC register windows */ +#define CFG_SPARC_NWINDOWS 8 + +/* + * Serial console configuration + */ +#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } + +/* Partitions */ +#define CONFIG_DOS_PARTITION +#define CONFIG_MAC_PARTITION +#define CONFIG_ISO_PARTITION + +/* + * Supported commands + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_AMBAPP +#define CONFIG_CMD_PING +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_IRQ + +/* + * Autobooting + */ +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +#define CONFIG_PREBOOT "echo;" \ + "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ + "echo" + +#undef CONFIG_BOOTARGS + +#define CONFIG_EXTRA_ENV_SETTINGS_BASE \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "flash_nfs=run nfsargs addip;" \ + "bootm ${kernel_addr}\0" \ + "flash_self=run ramargs addip;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "getkernel=tftpboot \$$scratch$\ \$$bootfile$\0" \ + "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0" + +#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM +#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \ + "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ + "scratch=40200000\0" \ + "" +#elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM +#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \ + "net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0" \ + "scratch=60800000\0" \ + "" +#else +/* More than 4Mb is assumed when running from SDRAM */ +#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \ + "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ + "scratch=40800000\0" \ + "" +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT + +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.20 +#define CONFIG_IPADDR 192.168.0.206 +#define CONFIG_ROOTPATH /export/rootfs +#define CONFIG_HOSTNAME ax2000 +#define CONFIG_BOOTFILE /uImage + +#define CONFIG_BOOTCOMMAND "run flash_self" + +/* Memory MAP + * + * Flash: + * |--------------------------------| + * | 0x00000000 Text & Data & BSS | * + * | for Monitor | * + * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * + * | UNUSED / Growth | * 256kb + * |--------------------------------| + * | 0x00050000 Base custom area | * + * | kernel / FS | * + * | | * Rest of Flash + * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| + * | END-0x00008000 Environment | * 32kb + * |--------------------------------| + * + * + * + * Main Memory (4Mb SRAM or XMb SDRAM): + * |--------------------------------| + * | UNUSED / scratch area | + * | | + * | | + * | | + * | | + * |--------------------------------| + * | Monitor .Text / .DATA / .BSS | * 256kb + * | Relocated! | * + * |--------------------------------| + * | Monitor Malloc | * 128kb (contains relocated environment) + * |--------------------------------| + * | Monitor/kernel STACK | * 64kb + * |--------------------------------| + * | Page Table for MMU systems | * 2k + * |--------------------------------| + * | PROM Code accessed from Linux | * 6kb-128b + * |--------------------------------| + * | Global data (avail from kernel)| * 128b + * |--------------------------------| + * + */ + +/* + * Flash configuration (8,16 or 32 MB) + * TEXT base always at 0xFFF00000 + * ENV_ADDR always at 0xFFF40000 + * FLASH_BASE at 0xFC000000 for 64 MB + * 0xFE000000 for 32 MB + * 0xFF000000 for 16 MB + * 0xFF800000 for 8 MB + */ +/*#define CFG_NO_FLASH 1*/ +#define CFG_FLASH_BASE 0x00000000 +#define CFG_FLASH_SIZE 0x00800000 + +#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */ +#define CFG_MAX_FLASH_SECT 64 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ + +#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ +#define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ +#define CFG_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ +#define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ + +/*** CFI CONFIG ***/ +#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT +#define CFG_FLASH_CFI_DRIVER +#define CFG_FLASH_CFI +/* Bypass cache when reading regs from flash memory */ +#define CFG_FLASH_CFI_BYPASS_READ +/* Buffered writes (32byte/go) instead of single accesses */ +#define CFG_FLASH_USE_BUFFER_WRITE + +/* + * Environment settings + */ +/*#define CFG_ENV_IS_NOWHERE 1*/ +#define CFG_ENV_IS_IN_FLASH 1 +/* CFG_ENV_ADDR need to be at sector boundary */ +#define CFG_ENV_SIZE 0x8000 +#define CFG_ENV_SECT_SIZE 0x20000 +#define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_FLASH_SIZE-CFG_ENV_SECT_SIZE) +#define CONFIG_ENV_OVERWRITE 1 + +/* + * Memory map + * + * Always 4Mb SRAM available + * SDRAM module may be available on 0x60000000, SDRAM + * is configured as if a 128Mb SDRAM module is available. + */ + +#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM +#define CFG_SDRAM_BASE 0x40000000 +#else +#define CFG_SDRAM_BASE 0x60000000 +#endif + +#define CFG_SDRAM_SIZE 0x08000000 +#define CFG_SDRAM_END (CFG_SDRAM_BASE+CFG_SDRAM_SIZE) + +/* 4Mb SRAM available */ +#if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM +#define CFG_SRAM_BASE 0x40000000 +#define CFG_SRAM_SIZE 0x400000 +#define CFG_SRAM_END (CFG_SRAM_BASE+CFG_SRAM_SIZE) +#endif + +/* Select RAM used to run U-BOOT from... */ +#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM +#define CFG_RAM_BASE CFG_SRAM_BASE +#define CFG_RAM_SIZE CFG_SRAM_SIZE +#define CFG_RAM_END CFG_SRAM_END +#else +#define CFG_RAM_BASE CFG_SDRAM_BASE +#define CFG_RAM_SIZE CFG_SDRAM_SIZE +#define CFG_RAM_END CFG_SDRAM_END +#endif + +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_OFFSET (CFG_RAM_END - CFG_GBL_DATA_SIZE) + +#define CFG_PROM_SIZE (8192-CFG_GBL_DATA_SIZE) +#define CFG_PROM_OFFSET (CFG_GBL_DATA_OFFSET-CFG_PROM_SIZE) + +#define CFG_INIT_SP_OFFSET (CFG_PROM_OFFSET-32) +#define CFG_STACK_SIZE (0x10000-32) + +#define CFG_MONITOR_BASE TEXT_BASE +#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) +# define CFG_RAMBOOT 1 +#endif + +#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +#define CFG_MALLOC_END (CFG_INIT_SP_OFFSET-CFG_STACK_SIZE) +#define CFG_MALLOC_BASE (CFG_MALLOC_END-CFG_MALLOC_LEN) + +/* relocated monitor area */ +#define CFG_RELOC_MONITOR_MAX_END CFG_MALLOC_BASE +#define CFG_RELOC_MONITOR_BASE (CFG_RELOC_MONITOR_MAX_END-CFG_MONITOR_LEN) + +/* make un relocated address from relocated address */ +#define UN_RELOC(address) (address-(CFG_RELOC_MONITOR_BASE-TEXT_BASE)) + +/* + * Ethernet configuration uses on board SMC91C111 + */ +#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */ +#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ +#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ +/*#define CONFIG_SHOW_ACTIVITY*/ +#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ + +#define CONFIG_ETHADDR 00:00:7a:cc:00:13 +#define CONFIG_PHY_ADDR 0x00 + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#if defined(CONFIG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ +#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ + +#define CFG_LOAD_ADDR 0x100000 /* default load address */ + +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ + +/* + * Various low-level settings + */ + +/*----------------------------------------------------------------------- + * USB stuff + *----------------------------------------------------------------------- + */ +#define CONFIG_USB_CLOCK 0x0001BBBB +#define CONFIG_USB_CONFIG 0x00005000 + +/***** Gaisler GRLIB IP-Cores Config ********/ + +/* AMBA Plug & Play info display on startup */ +/*#define CFG_AMBAPP_PRINT_ON_STARTUP*/ + +#define CFG_GRLIB_SDRAM 0 + +/* See, GRLIB Docs (grip.pdf) on how to set up + * These the memory controller registers. + */ +#define CFG_GRLIB_MEMCFG1 (0x10f800ff | (1<<11)) +#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM +#define CFG_GRLIB_MEMCFG2 0x82206000 +#else +#define CFG_GRLIB_MEMCFG2 0x82205260 +#endif +#define CFG_GRLIB_MEMCFG3 0x0809a000 + +#define CFG_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11)) +#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM +#define CFG_GRLIB_FT_MEMCFG2 0x82206000 +#else +#define CFG_GRLIB_FT_MEMCFG2 0x82205260 +#endif +#define CFG_GRLIB_FT_MEMCFG3 0x0809a000 + +/* no DDR controller */ +#define CFG_GRLIB_DDR_CFG 0x00000000 + +/* no DDR2 Controller */ +#define CFG_GRLIB_DDR2_CFG1 0x00000000 +#define CFG_GRLIB_DDR2_CFG3 0x00000000 + +/* Calculate scaler register value from default baudrate */ +#define CFG_GRLIB_APBUART_SCALER \ + ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) + +/* Identification string */ +#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-CPCI-AX2000" + +/* default kernel command line */ +#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" + +#endif /* __CONFIG_H */

1 0

[U-Boot-Users] [PATCH 11/13] SPARC: Added LEON3 board ALTERA NIOS Development board, Stratix II edition
by Daniel Hellstrom 28 Mar '08

28 Mar '08

Hello Wolfgang, This patch adds support for the LEON3 board: * ALTERA NIOS Development board, Stratix II edition Note that by board support I mean support for the pre synthezied template design for the board. Supporting any configuration is not possible but almost, due to the Plug & Play system... The FPGA can be programmed with the template design by: $ cd grlib/designs/BOARD $ make ise-prog-prom-ref This patch is also available at ftp://ftp.gaisler.com/gaisler.com/u-boot/patches. Best Regards, Daniel Hellstrom MAKEALL | 2 +- Makefile | 5 + board/gaisler/gr_ep2s60/Makefile | 52 +++++ board/gaisler/gr_ep2s60/config.mk | 35 ++++ board/gaisler/gr_ep2s60/gr_ep2s60.c | 39 ++++ board/gaisler/gr_ep2s60/u-boot.lds | 160 ++++++++++++++++ include/configs/gr_ep2s60.h | 356 +++++++++++++++++++++++++++++++++++ 7 files changed, 648 insertions(+), 1 deletions(-) diff --git a/MAKEALL b/MAKEALL index d31addf..14961f7 100755 --- a/MAKEALL +++ b/MAKEALL @@ -714,7 +714,7 @@ LIST_sh=" \ ## SPARC Systems ######################################################################### -LIST_sparc="gr_xc3s_1500 grsim" +LIST_sparc="gr_xc3s_1500 gr_ep2s60 grsim" #----------------------------------------------------------------------- diff --git a/Makefile b/Makefile index 27e480f..96a7910 100644 --- a/Makefile +++ b/Makefile @@ -2866,6 +2866,11 @@ ms7722se_config : unconfig gr_xc3s_1500_config : unconfig @$(MKCONFIG) $(@:_config=) sparc leon3 gr_xc3s_1500 gaisler +# Gaisler GRLIB template design (GPL SPARC/LEON3) for Altera NIOS +# Development board Stratix II edition, FPGA Device EP2S60. +gr_ep2s60_config: unconfig + @$(MKCONFIG) $(@:_config=) sparc leon3 gr_ep2s60 gaisler + # Gaisler LEON3 GRSIM simulator grsim_config : unconfig @$(MKCONFIG) $(@:_config=) sparc leon3 grsim gaisler diff --git a/board/gaisler/gr_ep2s60/Makefile b/board/gaisler/gr_ep2s60/Makefile new file mode 100644 index 0000000..d58f50d --- /dev/null +++ b/board/gaisler/gr_ep2s60/Makefile @@ -0,0 +1,52 @@ + +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o + +#flash.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/gaisler/gr_ep2s60/config.mk b/board/gaisler/gr_ep2s60/config.mk new file mode 100644 index 0000000..2ee0957 --- /dev/null +++ b/board/gaisler/gr_ep2s60/config.mk @@ -0,0 +1,35 @@ +# +# (C) Copyright 2008 +# Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# Altera NIOS delopment board Stratix II edition, FPGA device EP2S60, +# with GRLIB Template design (GPL Open Source SPARC/LEON3) +# + +# U-BOOT IN FLASH +TEXT_BASE = 0x00000000 + +# U-BOOT IN SDRAM +#TEXT_BASE = 0x40000000 + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/gaisler/gr_ep2s60/gr_ep2s60.c b/board/gaisler/gr_ep2s60/gr_ep2s60.c new file mode 100644 index 0000000..e8617f0 --- /dev/null +++ b/board/gaisler/gr_ep2s60/gr_ep2s60.c @@ -0,0 +1,39 @@ +/* + * (C) Copyright 2008 + * Daniel Hellstrom, daniel(a)gaisler.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <config.h> +#include <asm/leon.h> + +long int initdram(int board_type) +{ + return 1; +} + +int checkboard(void) +{ + puts("Board: EP2S60 GRLIB\n"); + return 0; +} + +int misc_init_r(void) +{ + return 0; +} diff --git a/board/gaisler/gr_ep2s60/u-boot.lds b/board/gaisler/gr_ep2s60/u-boot.lds new file mode 100644 index 0000000..100350d --- /dev/null +++ b/board/gaisler/gr_ep2s60/u-boot.lds @@ -0,0 +1,160 @@ +/* Linker script for Gaisler Research AB's Template design + * for Altera NIOS Development board Stratix II Edition, EP2S60 FPGA. + * + * (C) Copyright 2008 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") +OUTPUT_ARCH(sparc) +ENTRY(_start) +SECTIONS +{ + +/* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + + .text : { + _load_addr = .; + _text = .; + + *(.start) + cpu/leon3/start.o (.text) +/* 8k is the same as the PROM offset from end of main memory, (CFG_PROM_SIZE) */ + . = ALIGN(8192); +/* PROM CODE, Will be relocated to the end of memory, + * no global data accesses please. + */ + __prom_start = .; + *(.prom.pgt) + *(.prom.data) + *(.prom.text) + . = ALIGN(16); + __prom_end = .; + *(.text) + *(.fixup) + *(.gnu.warning) +/* *(.got1)*/ + . = ALIGN(16); + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.eh_frame) + } + . = ALIGN(4); + _etext = .; + + /* CMD Table */ + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + . = ALIGN(4); + __u_boot_cmd_end = .; + + .data : + { + *(.data) + *(.data1) + *(.data.rel) + *(.data.rel.*) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = ALIGN(4); + __got_start = .; + .got : { + *(.got) +/* *(.data.rel) + *(.data.rel.local)*/ + . = ALIGN(16); + } + __got_end = .; + +/* .data.rel : { } */ + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(16); /* to speed clearing of bss up */ + } + __bss_end = . ; + _end = . ; + PROVIDE (end = .); + +/* Relocated into main memory */ + + /* Start of main memory */ + /*. = 0x40000000;*/ + + .stack (NOLOAD) : { *(.stack) } + + /* PROM CODE */ + + /* global data in RAM passed to kernel after booting */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + +} diff --git a/include/configs/gr_ep2s60.h b/include/configs/gr_ep2s60.h new file mode 100644 index 0000000..710a082 --- /dev/null +++ b/include/configs/gr_ep2s60.h @@ -0,0 +1,356 @@ +/* Configuration header file for Gaisler Research AB's Template + * design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS + * Development board Stratix II edition, with the FPGA device + * EP2S60. + * + * (C) Copyright 2003-2005 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2008 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H__ +#define __CONFIG_H__ + +/* + * High Level Configuration Options + * (easy to change) + */ + +#define CONFIG_LEON3 /* This is an LEON3 CPU */ +#define CONFIG_LEON 1 /* This is an LEON CPU */ +/* Altera NIOS Development board, Stratix II board */ +#define CONFIG_GR_EP2S60 1 + +/* CPU / AMBA BUS configuration */ +#define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */ + +/* Number of SPARC register windows */ +#define CFG_SPARC_NWINDOWS 8 + +/* Define this is the GR-2S60-MEZZ mezzanine is available and you + * want to use the USB and GRETH functionality of the board + */ +#undef GR_2S60_MEZZ + +#ifdef GR_2S60_MEZZ +#define USE_GRETH 1 +#define USE_GRUSB 1 +#endif + +/* + * Serial console configuration + */ +#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } + +/* Partitions */ +#define CONFIG_DOS_PARTITION +#define CONFIG_MAC_PARTITION +#define CONFIG_ISO_PARTITION + +/* + * Supported commands + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_AMBAPP +#define CONFIG_CMD_PING +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_IRQ + +/* USB support */ +#if USE_GRUSB +#define CONFIG_USB_UHCI +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +/* Enable needed helper functions */ +#define CFG_DEVICE_DEREGISTER /* needs device_deregister */ +#endif + +/* + * Autobooting + */ +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +#define CONFIG_PREBOOT "echo;" \ + "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ + "echo" + +#undef CONFIG_BOOTARGS + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "flash_nfs=run nfsargs addip;" \ + "bootm ${kernel_addr}\0" \ + "flash_self=run ramargs addip;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ + "scratch=40800000\0" \ + "getkernel=tftpboot \$$scratch$\ \$$bootfile$\0" \ + "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \ + "" + +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.20 +#define CONFIG_IPADDR 192.168.0.207 +#define CONFIG_ROOTPATH /export/rootfs +#define CONFIG_HOSTNAME ml401 +#define CONFIG_BOOTFILE /uImage + +#define CONFIG_BOOTCOMMAND "run flash_self" + +/* Memory MAP + * + * Flash: + * |--------------------------------| + * | 0x00000000 Text & Data & BSS | * + * | for Monitor | * + * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * + * | UNUSED / Growth | * 256kb + * |--------------------------------| + * | 0x00050000 Base custom area | * + * | kernel / FS | * + * | | * Rest of Flash + * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| + * | END-0x00008000 Environment | * 32kb + * |--------------------------------| + * + * + * + * Main Memory: + * |--------------------------------| + * | UNUSED / scratch area | + * | | + * | | + * | | + * | | + * |--------------------------------| + * | Monitor .Text / .DATA / .BSS | * 512kb + * | Relocated! | * + * |--------------------------------| + * | Monitor Malloc | * 128kb (contains relocated environment) + * |--------------------------------| + * | Monitor/kernel STACK | * 64kb + * |--------------------------------| + * | Page Table for MMU systems | * 2k + * |--------------------------------| + * | PROM Code accessed from Linux | * 6kb-128b + * |--------------------------------| + * | Global data (avail from kernel)| * 128b + * |--------------------------------| + * + */ + +/* + * Flash configuration (8,16 or 32 MB) + * TEXT base always at 0xFFF00000 + * ENV_ADDR always at 0xFFF40000 + * FLASH_BASE at 0xFC000000 for 64 MB + * 0xFE000000 for 32 MB + * 0xFF000000 for 16 MB + * 0xFF800000 for 8 MB + */ +/*#define CFG_NO_FLASH 1*/ +#define CFG_FLASH_BASE 0x00000000 +#define CFG_FLASH_SIZE 0x00400000 /* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */ + +#define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */ +#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ + +#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ +#define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ +#define CFG_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ +#define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ + +/*** CFI CONFIG ***/ +#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT +#define CFG_FLASH_CFI_DRIVER +#define CFG_FLASH_CFI +/* Bypass cache when reading regs from flash memory */ +#define CFG_FLASH_CFI_BYPASS_READ +/* Buffered writes (32byte/go) instead of single accesses */ +#define CFG_FLASH_USE_BUFFER_WRITE + +/* + * Environment settings + */ +/*#define CFG_ENV_IS_NOWHERE 1*/ +#define CFG_ENV_IS_IN_FLASH 1 +/* CFG_ENV_ADDR need to be at sector boundary */ +#define CFG_ENV_SIZE 0x8000 +#define CFG_ENV_SECT_SIZE 0x20000 +#define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_FLASH_SIZE-CFG_ENV_SECT_SIZE) +#define CONFIG_ENV_OVERWRITE 1 + +/* + * Memory map + */ +#define CFG_SDRAM_BASE 0x40000000 +#define CFG_SDRAM_SIZE 0x02000000 +#define CFG_SDRAM_END (CFG_SDRAM_BASE+CFG_SDRAM_SIZE) + +/* no SRAM available */ +#undef CFG_SRAM_BASE +#undef CFG_SRAM_SIZE + +#define CFG_RAM_BASE CFG_SDRAM_BASE +#define CFG_RAM_SIZE CFG_SDRAM_SIZE +#define CFG_RAM_END CFG_SDRAM_END + +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_END - CFG_GBL_DATA_SIZE) + +#define CFG_PROM_SIZE (8192-CFG_GBL_DATA_SIZE) +#define CFG_PROM_OFFSET (CFG_GBL_DATA_OFFSET-CFG_PROM_SIZE) + +#define CFG_INIT_SP_OFFSET (CFG_PROM_OFFSET-32) +#define CFG_STACK_SIZE (0x10000-32) + +#define CFG_MONITOR_BASE TEXT_BASE +#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) +# define CFG_RAMBOOT 1 +#endif + +#define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */ +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +#define CFG_MALLOC_END (CFG_INIT_SP_OFFSET-CFG_STACK_SIZE) +#define CFG_MALLOC_BASE (CFG_MALLOC_END-CFG_MALLOC_LEN) + +/* relocated monitor area */ +#define CFG_RELOC_MONITOR_MAX_END CFG_MALLOC_BASE +#define CFG_RELOC_MONITOR_BASE (CFG_RELOC_MONITOR_MAX_END-CFG_MONITOR_LEN) + +/* make un relocated address from relocated address */ +#define UN_RELOC(address) (address-(CFG_RELOC_MONITOR_BASE-TEXT_BASE)) + +/* + * Ethernet configuration uses on board SMC91C111, however if a mezzanine + * with a PHY is attached the GRETH can be used on this board. + * Define USE_GRETH in order to use the mezzanine provided PHY with the + * onchip GRETH network MAC, note that this is not supported by the + * template design. + */ +#ifndef USE_GRETH + +/* USE SMC91C111 MAC */ +#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */ +#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ +#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ +/*#define CONFIG_SHOW_ACTIVITY*/ +#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ + +#else + +/* USE GRETH Ethernet Driver */ +#define CONFIG_NET_MULTI 1 +#define CONFIG_GRETH 1 + +/* Default GRETH Ethernet HARDWARE address */ +#define GRETH_HWADDR_0 0x00 +#define GRETH_HWADDR_1 0x00 +#define GRETH_HWADDR_2 0x7a +#define GRETH_HWADDR_3 0xcc +#define GRETH_HWADDR_4 0x00 +#define GRETH_HWADDR_5 0x13 +#endif + +#define CONFIG_ETHADDR 00:00:7a:cc:00:13 +#define CONFIG_PHY_ADDR 0x00 + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#if defined(CONFIG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ +#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ + +#define CFG_LOAD_ADDR 0x100000 /* default load address */ + +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ + +/*----------------------------------------------------------------------- + * USB stuff + *----------------------------------------------------------------------- + */ +#define CONFIG_USB_CLOCK 0x0001BBBB +#define CONFIG_USB_CONFIG 0x00005000 + +/***** Gaisler GRLIB IP-Cores Config ********/ + +/* AMBA Plug & Play info display on startup */ +/*#define CFG_AMBAPP_PRINT_ON_STARTUP*/ + +#define CFG_GRLIB_SDRAM 0 + +/* See, GRLIB Docs (grip.pdf) on how to set up + * These the memory controller registers. + */ +#define CFG_GRLIB_MEMCFG1 (0x10f800ff | (1<<11)) +#define CFG_GRLIB_MEMCFG2 0x00000000 +#define CFG_GRLIB_MEMCFG3 0x00000000 + +#define CFG_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11)) +#define CFG_GRLIB_FT_MEMCFG2 0x00000000 +#define CFG_GRLIB_FT_MEMCFG3 0x00000000 + +#define CFG_GRLIB_DDR_CFG 0xa900830a + +#define CFG_GRLIB_DDR2_CFG1 0x00000000 +#define CFG_GRLIB_DDR2_CFG3 0x00000000 + +/* Calculate scaler register value from default baudrate */ +#define CFG_GRLIB_APBUART_SCALER \ + ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) + +/* Identification string */ +#define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60" + +/* default kernel command line */ +#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" + +#endif /* __CONFIG_H */

1 0

[U-Boot-Users] [PATCH 10/13] SPARC: Added support for LEON3 TSIM/GRSIM simulator.
by Daniel Hellstrom 28 Mar '08

28 Mar '08

Hello Wolfgang, This patch adds support for the LEON3 simulators TSIM and GRSIM. The simulators GRSIM and TSIM for LEON3 has been added as a board. A separate board is needed due to that the FLASH CFI interface has not been implemented in the simulators. Configuring the GR-XC3S-1500 board without FLASH support should run in the simulator. This patch is also available at ftp://ftp.gaisler.com/gaisler.com/u-boot/patches. Best Regards, Daniel Hellstrom MAKEALL | 2 +- Makefile | 4 + board/gaisler/grsim/Makefile | 50 ++++++ board/gaisler/grsim/config.mk | 34 ++++ board/gaisler/grsim/grsim.c | 43 +++++ board/gaisler/grsim/u-boot.lds | 161 +++++++++++++++++++ include/configs/grsim.h | 340 ++++++++++++++++++++++++++++++++++++++++ 7 files changed, 633 insertions(+), 1 deletions(-) diff --git a/MAKEALL b/MAKEALL index dc11ed8..d31addf 100755 --- a/MAKEALL +++ b/MAKEALL @@ -714,7 +714,7 @@ LIST_sh=" \ ## SPARC Systems ######################################################################### -LIST_sparc="gr_xc3s_1500" +LIST_sparc="gr_xc3s_1500 grsim" #----------------------------------------------------------------------- diff --git a/Makefile b/Makefile index 99811aa..27e480f 100644 --- a/Makefile +++ b/Makefile @@ -2866,6 +2866,10 @@ ms7722se_config : unconfig gr_xc3s_1500_config : unconfig @$(MKCONFIG) $(@:_config=) sparc leon3 gr_xc3s_1500 gaisler +# Gaisler LEON3 GRSIM simulator +grsim_config : unconfig + @$(MKCONFIG) $(@:_config=) sparc leon3 grsim gaisler + ######################################################################### ## LEON2 ######################################################################### diff --git a/board/gaisler/grsim/Makefile b/board/gaisler/grsim/Makefile new file mode 100644 index 0000000..6295109 --- /dev/null +++ b/board/gaisler/grsim/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2003-2004 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/gaisler/grsim/config.mk b/board/gaisler/grsim/config.mk new file mode 100644 index 0000000..81cd415 --- /dev/null +++ b/board/gaisler/grsim/config.mk @@ -0,0 +1,34 @@ +# +# (C) Copyright 2007 +# Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# GRSIM simulating a LEON3 GR-XC3S-1500 board +# + +# U-BOOT IN FLASH +TEXT_BASE = 0x00000000 + +# U-BOOT IN RAM +#TEXT_BASE = 0x40000000 + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/gaisler/grsim/grsim.c b/board/gaisler/grsim/grsim.c new file mode 100644 index 0000000..70a2f23 --- /dev/null +++ b/board/gaisler/grsim/grsim.c @@ -0,0 +1,43 @@ +/* GRSIM/TSIM board + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <asm/leon.h> + +long int initdram(int board_type) +{ + return 1; +} + +int checkboard(void) +{ + puts("Board: GRSIM/TSIM\n"); + return 0; +} + +int misc_init_r(void) +{ + return 0; +} diff --git a/board/gaisler/grsim/u-boot.lds b/board/gaisler/grsim/u-boot.lds new file mode 100644 index 0000000..1e8bb69 --- /dev/null +++ b/board/gaisler/grsim/u-boot.lds @@ -0,0 +1,161 @@ +/* Linker script for Gaisler Research AB's GRSIM LEON3 simulator. + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") +OUTPUT_ARCH(sparc) +ENTRY(_start) +SECTIONS +{ + +/* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + + .text : { + _load_addr = .; + _text = .; + + *(.start) + cpu/leon3/start.o (.text) +/* 8k is the same as the PROM offset from end of main memory, (CFG_PROM_SIZE) */ + . = ALIGN(8192); +/* PROM CODE, Will be relocated to the end of memory, + * no global data accesses please. + */ + __prom_start = .; + *(.prom.pgt) + *(.prom.data) + *(.prom.text) + . = ALIGN(16); + __prom_end = .; + *(.text) + *(.fixup) + *(.gnu.warning) +/* *(.got1)*/ + . = ALIGN(16); + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.eh_frame) + } + . = ALIGN(4); + _etext = .; + + /* CMD Table */ + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + . = ALIGN(4); + __u_boot_cmd_end = .; + + .data : + { + *(.data) + *(.data1) + *(.data.rel) + *(.data.rel.*) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = ALIGN(4); + __got_start = .; + .got : { + *(.got) +/* *(.data.rel) + *(.data.rel.local)*/ + . = ALIGN(16); + } + __got_end = .; + +/* .data.rel : { } */ + + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(16); /* to speed clearing of bss up */ + } + __bss_end = . ; + _end = . ; + PROVIDE (end = .); + +/* Relocated into main memory */ + + /* Start of main memory */ + /*. = 0x40000000;*/ + + .stack (NOLOAD) : { *(.stack) } + + /* PROM CODE */ + + /* global data in RAM passed to kernel after booting */ + + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + +} diff --git a/include/configs/grsim.h b/include/configs/grsim.h new file mode 100644 index 0000000..60ad396 --- /dev/null +++ b/include/configs/grsim.h @@ -0,0 +1,340 @@ +/* Configuration header file for LEON3 GRSIM, trying to be similar + * to Gaisler's GR-XC3S-1500 board. + * + * (C) Copyright 2003-2005 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H__ +#define __CONFIG_H__ + +/* + * High Level Configuration Options + * (easy to change) + * + * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1. + * + * TSIM command + * tsim-leon3 -sdram 0 -ram 32000 -rom 8192 -mmu + * + */ + +#define CONFIG_LEON3 /* This is an LEON3 CPU */ +#define CONFIG_LEON 1 /* This is an LEON CPU */ +#define CONFIG_GRSIM 0 /* ... not running on GRSIM */ +#define CONFIG_TSIM 1 /* ... running on TSIM */ + +/* CPU / AMBA BUS configuration */ +#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */ + +/* Number of SPARC register windows */ +#define CFG_SPARC_NWINDOWS 8 + +/* + * Serial console configuration + */ +#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } + +/* Partitions */ +#define CONFIG_DOS_PARTITION +#define CONFIG_MAC_PARTITION +#define CONFIG_ISO_PARTITION + +/* + * Supported commands + */ +#define CONFIG_CMD_AMBAPP /* AMBA Plyg&Play information */ +#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ +#define CONFIG_CMD_BDI /* bdinfo */ +#define CONFIG_CMD_CONSOLE /* coninfo */ +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_ECHO /* echo arguments */ +#define CONFIG_CMD_FPGA /* FPGA configuration Support */ +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_ITEST /* Integer (and string) test */ +#define CONFIG_CMD_LOADB /* loadb */ +#define CONFIG_CMD_LOADS /* loads */ +#define CONFIG_CMD_MISC /* Misc functions like sleep etc */ +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_RUN /* run command in env variable */ +#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ +#define CONFIG_CMD_XIMG /* Load part of Multi Image */ + +/* + * Autobooting + */ +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +#define CONFIG_PREBOOT "echo;" \ + "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ + "echo" + +#undef CONFIG_BOOTARGS +/*#define CFG_HUSH_PARSER 0*/ +#ifdef CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "flash_nfs=run nfsargs addip;" \ + "bootm ${kernel_addr}\0" \ + "flash_self=run ramargs addip;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ + "rootpath=/export/roofs\0" \ + "scratch=40000000\0" \ + "getkernel=tftpboot \$$scratch$\ \$$bootfile$\0" \ + "ethaddr=00:00:7A:CC:00:12\0" \ + "bootargs=console=ttyS0,38400" \ + "" +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.81 +#define CONFIG_IPADDR 192.168.0.80 +#define CONFIG_ROOTPATH /export/rootfs +#define CONFIG_HOSTNAME grxc3s1500 +#define CONFIG_BOOTFILE /uImage + +#define CONFIG_BOOTCOMMAND "run flash_self" + +/* Memory MAP + * + * Flash: + * |--------------------------------| + * | 0x00000000 Text & Data & BSS | * + * | for Monitor | * + * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * + * | UNUSED / Growth | * 256kb + * |--------------------------------| + * | 0x00050000 Base custom area | * + * | kernel / FS | * + * | | * Rest of Flash + * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| + * | END-0x00008000 Environment | * 32kb + * |--------------------------------| + * + * + * + * Main Memory: + * |--------------------------------| + * | UNUSED / scratch area | + * | | + * | | + * | | + * | | + * |--------------------------------| + * | Monitor .Text / .DATA / .BSS | * 256kb + * | Relocated! | * + * |--------------------------------| + * | Monitor Malloc | * 128kb (contains relocated environment) + * |--------------------------------| + * | Monitor/kernel STACK | * 64kb + * |--------------------------------| + * | Page Table for MMU systems | * 2k + * |--------------------------------| + * | PROM Code accessed from Linux | * 6kb-128b + * |--------------------------------| + * | Global data (avail from kernel)| * 128b + * |--------------------------------| + * + */ + +/* + * Flash configuration (8,16 or 32 MB) + * TEXT base always at 0xFFF00000 + * ENV_ADDR always at 0xFFF40000 + * FLASH_BASE at 0xFC000000 for 64 MB + * 0xFE000000 for 32 MB + * 0xFF000000 for 16 MB + * 0xFF800000 for 8 MB + */ +#define CFG_NO_FLASH 1 +#define CFG_FLASH_BASE 0x00000000 +#define CFG_FLASH_SIZE 0x00800000 +#define CFG_ENV_SIZE 0x8000 + +#define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_FLASH_SIZE-CFG_ENV_SIZE) + +#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */ +#define CFG_MAX_FLASH_SECT 64 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ + +#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ +#define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ +#define CFG_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ + +#ifdef ENABLE_FLASH_SUPPORT +/* For use with grsim FLASH emulation extension */ +#define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ + +#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */ + +/*** CFI CONFIG ***/ +#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT +#define CFG_FLASH_CFI_DRIVER +#define CFG_FLASH_CFI +#endif + +/* + * Environment settings + */ +#define CFG_ENV_IS_NOWHERE 1 +/*#define CFG_ENV_IS_IN_FLASH 0*/ +/*#define CFG_ENV_SIZE 0x8000*/ +#define CFG_ENV_SECT_SIZE 0x40000 +#define CONFIG_ENV_OVERWRITE 1 + +/* + * Memory map + */ +#define CFG_SDRAM_BASE 0x40000000 +#define CFG_SDRAM_SIZE 0x02000000 +#define CFG_SDRAM_END (CFG_SDRAM_BASE+CFG_SDRAM_SIZE) + +/* no SRAM available */ +#undef CFG_SRAM_BASE +#undef CFG_SRAM_SIZE + +/* Always Run U-Boot from SDRAM */ +#define CFG_RAM_BASE CFG_SDRAM_BASE +#define CFG_RAM_SIZE CFG_SDRAM_SIZE +#define CFG_RAM_END CFG_SDRAM_END + +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_OFFSET (CFG_RAM_END - CFG_GBL_DATA_SIZE) + +#define CFG_PROM_SIZE (8192-CFG_GBL_DATA_SIZE) +#define CFG_PROM_OFFSET (CFG_GBL_DATA_OFFSET-CFG_PROM_SIZE) + +#define CFG_INIT_SP_OFFSET (CFG_PROM_OFFSET-32) +#define CFG_STACK_SIZE (0x10000-32) + +#define CFG_MONITOR_BASE TEXT_BASE +#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) +# define CFG_RAMBOOT 1 +#endif + +#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +#define CFG_MALLOC_END (CFG_INIT_SP_OFFSET-CFG_STACK_SIZE) +#define CFG_MALLOC_BASE (CFG_MALLOC_END-CFG_MALLOC_LEN) + +/* relocated monitor area */ +#define CFG_RELOC_MONITOR_MAX_END CFG_MALLOC_BASE +#define CFG_RELOC_MONITOR_BASE (CFG_RELOC_MONITOR_MAX_END-CFG_MONITOR_LEN) + +/* make un relocated address from relocated address */ +#define UN_RELOC(address) (address-(CFG_RELOC_MONITOR_BASE-TEXT_BASE)) + +/* + * Ethernet configuration + */ +#define CONFIG_GRETH 1 +#define CONFIG_NET_MULTI 1 + +/* Default HARDWARE address */ +#define GRETH_HWADDR_0 0x00 +#define GRETH_HWADDR_1 0x00 +#define GRETH_HWADDR_2 0x7A +#define GRETH_HWADDR_3 0xcc +#define GRETH_HWADDR_4 0x00 +#define GRETH_HWADDR_5 0x12 + +#define CONFIG_ETHADDR 00:00:7a:cc:00:12 + +/* + * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s + */ +/* #define CONFIG_GRETH_10MBIT 1 */ +#define CONFIG_PHY_ADDR 0x00 + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#if defined(CONFIG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ +#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ + +#define CFG_LOAD_ADDR 0x100000 /* default load address */ + +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ + +/***** Gaisler GRLIB IP-Cores Config ********/ + +/* AMBA Plug & Play info display on startup */ +/*#define CFG_AMBAPP_PRINT_ON_STARTUP*/ + +#define CFG_GRLIB_SDRAM 0 +#define CFG_GRLIB_MEMCFG1 (0x000000ff | (1<<11)) +#if CONFIG_GRSIM +/* GRSIM configuration */ +#define CFG_GRLIB_MEMCFG2 0x82206000 +#else +/* TSIM configuration */ +#define CFG_GRLIB_MEMCFG2 0x00001820 +#endif +#define CFG_GRLIB_MEMCFG3 0x00136000 + +#define CFG_GRLIB_FT_MEMCFG1 (0x000000ff | (1<<11)) +#define CFG_GRLIB_FT_MEMCFG2 0x82206000 +#define CFG_GRLIB_FT_MEMCFG3 0x00136000 + +/* no DDR controller */ +#define CFG_GRLIB_DDR_CFG 0x00000000 + +/* no DDR2 Controller */ +#define CFG_GRLIB_DDR2_CFG1 0x00000000 +#define CFG_GRLIB_DDR2_CFG3 0x00000000 + +#define CFG_GRLIB_APBUART_SCALER \ + ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) + +/* default kernel command line */ +#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" + +#define CONFIG_IDENT_STRING "Gaisler GRSIM" + +#endif /* __CONFIG_H */

1 0

Re: [U-Boot-Users] MPC83xx HRCW
by Jerry Van Baren 28 Mar '08

28 Mar '08

Andre Schwarz wrote: > Jerry Van Baren schrieb: >> Andre Schwarz wrote: >>> In "cpu/mpc83xx/start.S" there is a comment : >>> >>> /* >>> * The Hard Reset Configuration Word (HRCW) table is in the first 64 >>> * (0x40) bytes of flash. It has 8 bytes, but each byte is repeated 8 >>> * times so the processor can fetch it out of flash whether the flash >>> * is 8, 16, 32, or 64 bits wide (hardware trickery). >>> */ >>> >>> This does _not_ hold true for all configurations. Flash is simply one >>> of many options ... >>> Maybe it's true for the Freescale boards. >>> >>> Other sources of the HRCW can be hard-coded strapping pins or an I2C >>> EEPROM. >>> >>> Why is there a need to define the HRCW ? >>> >>> regards, >>> Andre Schwarz >> >> Hi Andre, >> >> The HRCW in flash (could be other memory or a FPGA register) is a >> processor feature which a board may or may not use. I am not familiar >> with the whole 83xx family, but I presume the feature is part of the >> whole family. >> >> As you point out, there are other ways of configuring the processor on >> power up, and it is board-specific which way is used on the particular >> board. >> >> For the boards that support the HRCW, obviously the definition in the >> first 64 bytes of flash is necessary. For other boards, it is >> unnecessary. FWIIW, the Freescale eval boards that I have experience >> with allow the HRCW to come from flash, i2c, or an FPGA (BCSR). >> >> To date, having a potentially unused HRCW definition in memory has not >> been an issue - people either use it or ignore it. If it is an issue, >> you could use conditionals to disable it. I'm sure the 83xx custodian >> (Kim Phillips) would consider patches to do that. ;-) Note that >> there is a possibility that some of the code assumes the presence of a >> HRCW, so you would have to inspect and/or regression test as part of a >> conditionalization patch. >> > ok - so should be no problem to #define the HRCW to "0x0" since it won't > be used at all - just occupies some memory. > I just wanted to be sure that the #defined HRCW is not used as a > reference at all in any code ! Theoretically, there is no problem. I don't know if there are any implicit uses of the HRCW - that would be part of the need to inspect and/or regression test. I suspect that the CPU frequency determination code uses it, since part of the CPU PLL multiplier comes from the HRCW (IIRC - I get confused between the 82xx and 83xx families sometimes). [snip] Best regards, gvb

2 1

[U-Boot-Users] [PATCH 9/13] SPARC: Added LEON3 board GR-XC3S-1500.
by Daniel Hellstrom 28 Mar '08

28 Mar '08

Hello Wolfgang, This patch adds support for the LEON3 board: * GR-XC3S-1500 (Low cost Xilinx Spartan FPGA board) Note that by board support I mean support for the pre synthezied template design for the board. Supporting any configuration is not possible but almost, due to the Plug & Play system... The FPGA can be programmed with the template design by: $ cd grlib/designs/BOARD $ make ise-prog-prom-ref This patch is also available at ftp://ftp.gaisler.com/gaisler.com/u-boot/patches. Best Regards, Daniel Hellstrom MAKEALL | 2 +- Makefile | 4 + board/gaisler/gr_xc3s_1500/Makefile | 52 +++++ board/gaisler/gr_xc3s_1500/config.mk | 34 +++ board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c | 39 ++++ board/gaisler/gr_xc3s_1500/u-boot.lds | 162 +++++++++++++++ include/configs/gr_xc3s_1500.h | 321 +++++++++++++++++++++++++++++ 7 files changed, 613 insertions(+), 1 deletions(-) diff --git a/MAKEALL b/MAKEALL index d63a228..dc11ed8 100755 --- a/MAKEALL +++ b/MAKEALL @@ -714,7 +714,7 @@ LIST_sh=" \ ## SPARC Systems ######################################################################### -LIST_sparc="" +LIST_sparc="gr_xc3s_1500" #----------------------------------------------------------------------- diff --git a/Makefile b/Makefile index 8d4c10d..99811aa 100644 --- a/Makefile +++ b/Makefile @@ -2862,6 +2862,10 @@ ms7722se_config : unconfig ## LEON3 ######################################################################### +# Gaisler GR-XC3S-1500 board +gr_xc3s_1500_config : unconfig + @$(MKCONFIG) $(@:_config=) sparc leon3 gr_xc3s_1500 gaisler + ######################################################################### ## LEON2 ######################################################################### diff --git a/board/gaisler/gr_xc3s_1500/Makefile b/board/gaisler/gr_xc3s_1500/Makefile new file mode 100644 index 0000000..d58f50d --- /dev/null +++ b/board/gaisler/gr_xc3s_1500/Makefile @@ -0,0 +1,52 @@ + +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o + +#flash.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/gaisler/gr_xc3s_1500/config.mk b/board/gaisler/gr_xc3s_1500/config.mk new file mode 100644 index 0000000..35cbc1b --- /dev/null +++ b/board/gaisler/gr_xc3s_1500/config.mk @@ -0,0 +1,34 @@ +# +# (C) Copyright 2007 +# Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# GR-XC3S-1500 board +# + +# U-BOOT IN FLASH +TEXT_BASE = 0x00000000 + +# U-BOOT IN RAM +#TEXT_BASE = 0x40000000 + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c b/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c new file mode 100644 index 0000000..1ee7024 --- /dev/null +++ b/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c @@ -0,0 +1,39 @@ +/* + * (C) Copyright 2007 + * Daniel Hellstrom, daniel(a)gaisler.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <config.h> +#include <asm/leon.h> + +long int initdram(int board_type) +{ + return 1; +} + +int checkboard(void) +{ + puts("Board: GR-XC3S-1500\n"); + return 0; +} + +int misc_init_r(void) +{ + return 0; +} diff --git a/board/gaisler/gr_xc3s_1500/u-boot.lds b/board/gaisler/gr_xc3s_1500/u-boot.lds new file mode 100644 index 0000000..3848c68 --- /dev/null +++ b/board/gaisler/gr_xc3s_1500/u-boot.lds @@ -0,0 +1,162 @@ +/* Linker script for Gaisler Research AB's GR-XC3S-1500 board + * with template design. + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") +OUTPUT_ARCH(sparc) +ENTRY(_start) +SECTIONS +{ + +/* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + + .text : { + _load_addr = .; + _text = .; + + *(.start) + cpu/leon3/start.o (.text) +/* 8k is the same as the PROM offset from end of main memory, (CFG_PROM_SIZE) */ + . = ALIGN(8192); +/* PROM CODE, Will be relocated to the end of memory, + * no global data accesses please. + */ + __prom_start = .; + *(.prom.pgt) + *(.prom.data) + *(.prom.text) + . = ALIGN(16); + __prom_end = .; + *(.text) + *(.fixup) + *(.gnu.warning) +/* *(.got1)*/ + . = ALIGN(16); + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.eh_frame) + } + . = ALIGN(4); + _etext = .; + + /* CMD Table */ + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + . = ALIGN(4); + __u_boot_cmd_end = .; + + .data : + { + *(.data) + *(.data1) + *(.data.rel) + *(.data.rel.*) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = ALIGN(4); + __got_start = .; + .got : { + *(.got) +/* *(.data.rel) + *(.data.rel.local)*/ + . = ALIGN(16); + } + __got_end = .; + +/* .data.rel : { } */ + + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(16); /* to speed clearing of bss up */ + } + __bss_end = . ; + _end = . ; + PROVIDE (end = .); + +/* Relocated into main memory */ + + /* Start of main memory */ + /*. = 0x40000000;*/ + + .stack (NOLOAD) : { *(.stack) } + + /* PROM CODE */ + + /* global data in RAM passed to kernel after booting */ + + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + +} diff --git a/include/configs/gr_xc3s_1500.h b/include/configs/gr_xc3s_1500.h new file mode 100644 index 0000000..1fdef3d --- /dev/null +++ b/include/configs/gr_xc3s_1500.h @@ -0,0 +1,321 @@ +/* Configuration header file for Gaisler GR-XC3S-1500 + * spartan board. + * + * (C) Copyright 2003-2005 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H__ +#define __CONFIG_H__ + +/* + * High Level Configuration Options + * (easy to change) + */ + +#define CONFIG_LEON3 /* This is an LEON3 CPU */ +#define CONFIG_LEON 1 /* This is an LEON CPU */ +#define CONFIG_GRXC3S1500 1 /* ... on GR-XC3S-1500 board */ + +/* CPU / AMBA BUS configuration */ +#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */ + +/* Number of SPARC register windows */ +#define CFG_SPARC_NWINDOWS 8 + +/* + * Serial console configuration + */ +#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } + +/* Partitions */ +#define CONFIG_DOS_PARTITION +#define CONFIG_MAC_PARTITION +#define CONFIG_ISO_PARTITION + +/* + * Supported commands + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_AMBAPP +#define CONFIG_CMD_PING +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_IRQ + +/* + * Autobooting + */ +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +#define CONFIG_PREBOOT "echo;" \ + "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ + "echo" + +#undef CONFIG_BOOTARGS + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "flash_nfs=run nfsargs addip;" \ + "bootm ${kernel_addr}\0" \ + "flash_self=run ramargs addip;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ + "scratch=40200000\0" \ + "getkernel=tftpboot \$$scratch$\ \$$bootfile$\0" \ + "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:grxc3s1500_daniel:eth0\0" \ + "" + +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.20 +#define CONFIG_IPADDR 192.168.0.206 +#define CONFIG_ROOTPATH /export/rootfs +#define CONFIG_HOSTNAME grxc3s1500 +#define CONFIG_BOOTFILE /uImage + +#define CONFIG_BOOTCOMMAND "run flash_self" + +/* Memory MAP + * + * Flash: + * |--------------------------------| + * | 0x00000000 Text & Data & BSS | * + * | for Monitor | * + * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * + * | UNUSED / Growth | * 256kb + * |--------------------------------| + * | 0x00050000 Base custom area | * + * | kernel / FS | * + * | | * Rest of Flash + * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| + * | END-0x00008000 Environment | * 32kb + * |--------------------------------| + * + * + * + * Main Memory: + * |--------------------------------| + * | UNUSED / scratch area | + * | | + * | | + * | | + * | | + * |--------------------------------| + * | Monitor .Text / .DATA / .BSS | * 256kb + * | Relocated! | * + * |--------------------------------| + * | Monitor Malloc | * 128kb (contains relocated environment) + * |--------------------------------| + * | Monitor/kernel STACK | * 64kb + * |--------------------------------| + * | Page Table for MMU systems | * 2k + * |--------------------------------| + * | PROM Code accessed from Linux | * 6kb-128b + * |--------------------------------| + * | Global data (avail from kernel)| * 128b + * |--------------------------------| + * + */ + +/* + * Flash configuration (8,16 or 32 MB) + * TEXT base always at 0xFFF00000 + * ENV_ADDR always at 0xFFF40000 + * FLASH_BASE at 0xFC000000 for 64 MB + * 0xFE000000 for 32 MB + * 0xFF000000 for 16 MB + * 0xFF800000 for 8 MB + */ +/*#define CFG_NO_FLASH 1*/ +#define CFG_FLASH_BASE 0x00000000 +#define CFG_FLASH_SIZE 0x00800000 + +#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */ +#define CFG_MAX_FLASH_SECT 64 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ + +#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ +#define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ +#define CFG_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ +#define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ + +/*** CFI CONFIG ***/ +#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT +#define CFG_FLASH_CFI_DRIVER +#define CFG_FLASH_CFI +/* Bypass cache when reading regs from flash memory */ +#define CFG_FLASH_CFI_BYPASS_READ +/* Buffered writes (32byte/go) instead of single accesses */ +#define CFG_FLASH_USE_BUFFER_WRITE + +/* + * Environment settings + */ +/*#define CFG_ENV_IS_NOWHERE 1*/ +#define CFG_ENV_IS_IN_FLASH 1 +/* CFG_ENV_ADDR need to be at sector boundary */ +#define CFG_ENV_SIZE 0x8000 +#define CFG_ENV_SECT_SIZE 0x20000 +#define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_FLASH_SIZE-CFG_ENV_SECT_SIZE) +#define CONFIG_ENV_OVERWRITE 1 + +/* + * Memory map + */ +#define CFG_SDRAM_BASE 0x40000000 +#define CFG_SDRAM_SIZE 0x4000000 +#define CFG_SDRAM_END (CFG_SDRAM_BASE+CFG_SDRAM_SIZE) + +/* no SRAM available */ +#undef CFG_SRAM_BASE +#undef CFG_SRAM_SIZE + +/* Always Run U-Boot from SDRAM */ +#define CFG_RAM_BASE CFG_SDRAM_BASE +#define CFG_RAM_SIZE CFG_SDRAM_SIZE +#define CFG_RAM_END CFG_SDRAM_END + +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_OFFSET (CFG_RAM_END - CFG_GBL_DATA_SIZE) + +#define CFG_PROM_SIZE (8192-CFG_GBL_DATA_SIZE) +#define CFG_PROM_OFFSET (CFG_GBL_DATA_OFFSET-CFG_PROM_SIZE) + +#define CFG_INIT_SP_OFFSET (CFG_PROM_OFFSET-32) +#define CFG_STACK_SIZE (0x10000-32) + +#define CFG_MONITOR_BASE TEXT_BASE +#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) +# define CFG_RAMBOOT 1 +#endif + +#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +#define CFG_MALLOC_END (CFG_INIT_SP_OFFSET-CFG_STACK_SIZE) +#define CFG_MALLOC_BASE (CFG_MALLOC_END-CFG_MALLOC_LEN) + +/* relocated monitor area */ +#define CFG_RELOC_MONITOR_MAX_END CFG_MALLOC_BASE +#define CFG_RELOC_MONITOR_BASE (CFG_RELOC_MONITOR_MAX_END-CFG_MONITOR_LEN) + +/* make un relocated address from relocated address */ +#define UN_RELOC(address) (address-(CFG_RELOC_MONITOR_BASE-TEXT_BASE)) + +/* + * Ethernet configuration + */ +#define CONFIG_GRETH 1 +#define CONFIG_NET_MULTI 1 + +/* Default GRETH Ethernet HARDWARE address */ +#define GRETH_HWADDR_0 0x00 +#define GRETH_HWADDR_1 0x00 +#define GRETH_HWADDR_2 0x7a +#define GRETH_HWADDR_3 0xcc +#define GRETH_HWADDR_4 0x00 +#define GRETH_HWADDR_5 0x12 + +#define CONFIG_ETHADDR 00:00:7a:cc:00:12 +#define CONFIG_PHY_ADDR 0x00 + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#if defined(CONFIG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ +#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ + +#define CFG_LOAD_ADDR 0x100000 /* default load address */ + +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ + +/* + * Various low-level settings + */ + +/*----------------------------------------------------------------------- + * USB stuff + *----------------------------------------------------------------------- + */ +#define CONFIG_USB_CLOCK 0x0001BBBB +#define CONFIG_USB_CONFIG 0x00005000 + +/***** Gaisler GRLIB IP-Cores Config ********/ + +/* AMBA Plug & Play info display on startup */ +/*#define CFG_AMBAPP_PRINT_ON_STARTUP*/ + +#define CFG_GRLIB_SDRAM 0 + +/* See, GRLIB Docs (grip.pdf) on how to set up + * These the memory controller registers. + */ +#define CFG_GRLIB_MEMCFG1 (0x000000ff | (1<<11)) +#define CFG_GRLIB_MEMCFG2 0x82206000 +#define CFG_GRLIB_MEMCFG3 0x00136000 + +#define CFG_GRLIB_FT_MEMCFG1 (0x000000ff | (1<<11)) +#define CFG_GRLIB_FT_MEMCFG2 0x82206000 +#define CFG_GRLIB_FT_MEMCFG3 0x00136000 + +/* no DDR controller */ +#define CFG_GRLIB_DDR_CFG 0x00000000 + +/* no DDR2 Controller */ +#define CFG_GRLIB_DDR2_CFG1 0x00000000 +#define CFG_GRLIB_DDR2_CFG3 0x00000000 + +/* Calculate scaler register value from default baudrate */ +#define CFG_GRLIB_APBUART_SCALER \ + ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) + +/* Identification string */ +#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-XC3S-1500" + +/* default kernel command line */ +#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" + +#endif /* __CONFIG_H */

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[U-Boot-Users] [PATCH 8/13] SPARC: Added SMC91111 support for LEON2 and LEON3 processors
by Daniel Hellstrom 28 Mar '08

28 Mar '08

Hello Wolfgang, This patch makes SPARC/LEON processors able to read and write to the SMC91111 chip using the chip external I/O bus of the memory controller. This patchs defines the standard in and out macros expected by the SMC9111 driver. To access that I/O bus one must set up the memory controller (MCTRL or FTMCTRL) correctly. It is assumed that the user sets up this correctly when the other MCTRL parameters are set up. It can be set up from the board configuration header file. This patch is also available at ftp://ftp.gaisler.com/gaisler.com/u-boot/patches. Best Regards, Daniel Hellstrom drivers/net/smc91111.h | 74 +++++++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 73 insertions(+), 1 deletions(-) diff --git a/drivers/net/smc91111.h b/drivers/net/smc91111.h index 8dcbb3e..6c4af64 100644 --- a/drivers/net/smc91111.h +++ b/drivers/net/smc91111.h @@ -176,7 +176,79 @@ typedef unsigned long int dword; }; \ }) -#else /* if not CONFIG_PXA250 */ +#elif defined(CONFIG_LEON) /* if not CONFIG_PXA250 */ + +#define SMC_LEON_SWAP16(_x_) \ + ({ word _x = (_x_); ((_x << 8) | (_x >> 8)); }) + +#define SMC_LEON_SWAP32(_x_) \ + ({ dword _x = (_x_); \ + ((_x << 24) | \ + ((0x0000FF00UL & _x) << 8) | \ + ((0x00FF0000UL & _x) >> 8) | \ + (_x >> 24)); }) + +#define SMC_inl(r) (SMC_LEON_SWAP32((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))))) +#define SMC_inl_nosw(r) ((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0)))) +#define SMC_inw(r) (SMC_LEON_SWAP16((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))))) +#define SMC_inw_nosw(r) ((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0)))) +#define SMC_inb(p) ({ \ + word ___v = SMC_inw((p) & ~1); \ + if (p & 1) ___v >>= 8; \ + else ___v &= 0xff; \ + ___v; }) +#define SMC_outl(d,r) (*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))=SMC_LEON_SWAP32(d)) +#define SMC_outl_nosw(d,r) (*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))=(d)) +#define SMC_outw(d,r) (*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))=SMC_LEON_SWAP16(d)) +#define SMC_outw_nosw(d,r) (*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))=(d)) +#define SMC_outb(d,r) ({ word __d = (byte)(d); \ + word __w = SMC_inw((r)&~1); \ + __w &= ((r)&1) ? 0x00FF : 0xFF00; \ + __w |= ((r)&1) ? __d<<8 : __d; \ + SMC_outw(__w,(r)&~1); \ + }) +#define SMC_outsl(r,b,l) ({ int __i; \ + dword *__b2; \ + __b2 = (dword *) b; \ + for (__i = 0; __i < l; __i++) { \ + SMC_outl_nosw( *(__b2 + __i), r); \ + } \ + }) +#define SMC_outsw(r,b,l) ({ int __i; \ + word *__b2; \ + __b2 = (word *) b; \ + for (__i = 0; __i < l; __i++) { \ + SMC_outw_nosw( *(__b2 + __i), r); \ + } \ + }) +#define SMC_insl(r,b,l) ({ int __i ; \ + dword *__b2; \ + __b2 = (dword *) b; \ + for (__i = 0; __i < l; __i++) { \ + *(__b2 + __i) = SMC_inl_nosw(r); \ + SMC_inl(0); \ + }; \ + }) + +#define SMC_insw(r,b,l) ({ int __i ; \ + word *__b2; \ + __b2 = (word *) b; \ + for (__i = 0; __i < l; __i++) { \ + *(__b2 + __i) = SMC_inw_nosw(r); \ + SMC_inw(0); \ + }; \ + }) + +#define SMC_insb(r,b,l) ({ int __i ; \ + byte *__b2; \ + __b2 = (byte *) b; \ + for (__i = 0; __i < l; __i++) { \ + *(__b2 + __i) = SMC_inb(r); \ + SMC_inb(0); \ + }; \ + }) + +#else /* if not CONFIG_PXA250 and not CONFIG_LEON */ #ifndef CONFIG_SMC_USE_IOFUNCS /* these macros don't work on some boards */ /*

1 0

[U-Boot-Users] [PATCH 7/13] SPARC: Added GRETH Ethernet 10/100/1000 support for LEON3
by Daniel Hellstrom 28 Mar '08

28 Mar '08

Hello Wolfgang, GRETH is an Ethernet 10/100 or 10/100/1000 MAC with out without a debug link (EDCL). The GRETH core is documented in GRIP.pdf available at www.gaisler.com. If the GRETH has GigaBit support (GBIT, Scatter gather, checksum offloading etc.) can be determined by a bit in the control register. The GBIT MAC is supported by operating in GRTEH 10/100 legacy mode. This patch is also available at ftp://ftp.gaisler.com/gaisler.com/u-boot/patches. Best Regards, Daniel Hellstrom drivers/net/Makefile | 1 + drivers/net/greth.c | 661 ++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/net/greth.h | 97 ++++++++ net/eth.c | 4 + 4 files changed, 763 insertions(+), 0 deletions(-) diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 320dc3e..eafd267 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -35,6 +35,7 @@ COBJS-y += e1000.o COBJS-y += eepro100.o COBJS-y += enc28j60.o COBJS-y += fsl_mcdmafec.o +COBJS-$(CONFIG_GRETH) += greth.o COBJS-y += inca-ip_sw.o COBJS-y += ks8695eth.o COBJS-y += lan91c96.o diff --git a/drivers/net/greth.c b/drivers/net/greth.c new file mode 100644 index 0000000..76ece59 --- /dev/null +++ b/drivers/net/greth.c @@ -0,0 +1,661 @@ +/* Gaisler.com GRETH 10/100/1000 Ethernet MAC driver + * + * Driver use polling mode (no Interrupt) + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <net.h> +#include <malloc.h> +#include <asm/processor.h> +#include <ambapp.h> +#include <asm/leon.h> + +/* #define DEBUG */ + +#include "greth.h" + +/* Default to 3s timeout on autonegotiation */ +#ifndef GRETH_PHY_TIMEOUT_MS +#define GRETH_PHY_TIMEOUT_MS 3000 +#endif + +/* ByPass Cache when reading regs */ +#define GRETH_REGLOAD(addr) SPARC_NOCACHE_READ(addr) +/* Write-through cache ==> no bypassing needed on writes */ +#define GRETH_REGSAVE(addr,data) (*(unsigned int *)(addr) = (data)) +#define GRETH_REGORIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)|data) +#define GRETH_REGANDIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)&data) + +#define GRETH_RXBD_CNT 4 +#define GRETH_TXBD_CNT 1 + +#define GRETH_RXBUF_SIZE 1540 +#define GRETH_BUF_ALIGN 4 +#define GRETH_RXBUF_EFF_SIZE \ + ( (GRETH_RXBUF_SIZE&~(GRETH_BUF_ALIGN-1))+GRETH_BUF_ALIGN ) + +typedef struct { + greth_regs *regs; + int irq; + struct eth_device *dev; + + /* Hardware info */ + unsigned char phyaddr; + int gbit_mac; + + /* Current operating Mode */ + int gb; /* GigaBit */ + int fd; /* Full Duplex */ + int sp; /* 10/100Mbps speed (1=100,0=10) */ + int auto_neg; /* Auto negotiate done */ + + unsigned char hwaddr[6]; /* MAC Address */ + + /* Descriptors */ + greth_bd *rxbd_base, *rxbd_max; + greth_bd *txbd_base, *txbd_max; + + greth_bd *rxbd_curr; + + /* rx buffers in rx descriptors */ + void *rxbuf_base; /* (GRETH_RXBUF_SIZE+ALIGNBYTES) * GRETH_RXBD_CNT */ + + /* unused for gbit_mac, temp buffer for sending packets with unligned + * start. + * Pointer to packet allocated with malloc. + */ + void *txbuf; + + struct { + /* rx status */ + unsigned int rx_packets, + rx_crc_errors, rx_frame_errors, rx_length_errors, rx_errors; + + /* tx stats */ + unsigned int tx_packets, + tx_latecol_errors, + tx_underrun_errors, tx_limit_errors, tx_errors; + } stats; +} greth_priv; + +/* Read MII register 'addr' from core 'regs' */ +static int read_mii(int addr, volatile greth_regs * regs) +{ + while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) { + } + + GRETH_REGSAVE(&regs->mdio, (0 << 11) | ((addr & 0x1F) << 6) | 2); + + while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) { + } + + if (!(GRETH_REGLOAD(&regs->mdio) & GRETH_MII_NVALID)) { + return (GRETH_REGLOAD(&regs->mdio) >> 16) & 0xFFFF; + } else { + return -1; + } +} + +static void write_mii(int addr, int data, volatile greth_regs * regs) +{ + while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) { + } + + GRETH_REGSAVE(&regs->mdio, + ((data & 0xFFFF) << 16) | (0 << 11) | ((addr & 0x1F) << 6) + | 1); + + while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) { + } + +} + +/* init/start hardware and allocate descriptor buffers for rx side + * + */ +int greth_init(struct eth_device *dev, bd_t * bis) +{ + int i; + + greth_priv *greth = dev->priv; + greth_regs *regs = greth->regs; +#ifdef DEBUG + printf("greth_init\n"); +#endif + + GRETH_REGSAVE(&regs->control, 0); + + if (!greth->rxbd_base) { + + /* allocate descriptors */ + greth->rxbd_base = (greth_bd *) + memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd)); + greth->txbd_base = (greth_bd *) + memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd)); + + /* allocate buffers to all descriptors */ + greth->rxbuf_base = + malloc(GRETH_RXBUF_EFF_SIZE * GRETH_RXBD_CNT); + } + + /* initate rx decriptors */ + for (i = 0; i < GRETH_RXBD_CNT; i++) { + greth->rxbd_base[i].addr = (unsigned int) + greth->rxbuf_base + (GRETH_RXBUF_EFF_SIZE * i); + /* enable desciptor & set wrap bit if last descriptor */ + if (i >= (GRETH_RXBD_CNT - 1)) { + greth->rxbd_base[i].stat = GRETH_BD_EN | GRETH_BD_WR; + } else { + greth->rxbd_base[i].stat = GRETH_BD_EN; + } + } + + /* initiate indexes */ + greth->rxbd_curr = greth->rxbd_base; + greth->rxbd_max = greth->rxbd_base + (GRETH_RXBD_CNT - 1); + greth->txbd_max = greth->txbd_base + (GRETH_TXBD_CNT - 1); + /* + * greth->txbd_base->addr = 0; + * greth->txbd_base->stat = GRETH_BD_WR; + */ + + /* initate tx decriptors */ + for (i = 0; i < GRETH_TXBD_CNT; i++) { + greth->txbd_base[i].addr = 0; + /* enable desciptor & set wrap bit if last descriptor */ + if (i >= (GRETH_RXBD_CNT - 1)) { + greth->txbd_base[i].stat = GRETH_BD_WR; + } else { + greth->txbd_base[i].stat = 0; + } + } + + /**** SET HARDWARE REGS ****/ + + /* Set pointer to tx/rx descriptor areas */ + GRETH_REGSAVE(&regs->rx_desc_p, (unsigned int)&greth->rxbd_base[0]); + GRETH_REGSAVE(&regs->tx_desc_p, (unsigned int)&greth->txbd_base[0]); + + /* Enable Transmitter, GRETH will now scan descriptors for packets + * to transmitt */ +#ifdef DEBUG + printf("greth_init: enabling receiver\n"); +#endif + GRETH_REGORIN(&regs->control, GRETH_RXEN); + + return 0; +} + +/* Initiate PHY to a relevant speed + * return: + * - 0 = success + * - 1 = timeout/fail + */ +int greth_init_phy(greth_priv * dev, bd_t * bis) +{ + greth_regs *regs = dev->regs; + int tmp, tmp1, tmp2, i; + unsigned int start, timeout; + + /* X msecs to ticks */ + timeout = usec2ticks(GRETH_PHY_TIMEOUT_MS * 1000); + + /* Get system timer0 current value + * Total timeout is 5s + */ + start = get_timer(0); + + /* get phy control register default values */ + + while ((tmp = read_mii(0, regs)) & 0x8000) { + if (get_timer(start) > timeout) + return 1; /* Fail */ + } + + /* reset PHY and wait for completion */ + write_mii(0, 0x8000 | tmp, regs); + + while (((tmp = read_mii(0, regs))) & 0x8000) { + if (get_timer(start) > timeout) + return 1; /* Fail */ + } + + /* Check if PHY is autoneg capable and then determine operating + * mode, otherwise force it to 10 Mbit halfduplex + */ + dev->gb = 0; + dev->fd = 0; + dev->sp = 0; + dev->auto_neg = 0; + if (!((tmp >> 12) & 1)) { + write_mii(0, 0, regs); + } else { + /* wait for auto negotiation to complete and then check operating mode */ + dev->auto_neg = 1; + i = 0; + while (!(((tmp = read_mii(1, regs)) >> 5) & 1)) { + if (get_timer(start) > timeout) { + printf("Auto negotiation timed out. " + "Selecting default config\n"); + tmp = read_mii(0, regs); + dev->gb = ((tmp >> 6) & 1) + && !((tmp >> 13) & 1); + dev->sp = !((tmp >> 6) & 1) + && ((tmp >> 13) & 1); + dev->fd = (tmp >> 8) & 1; + goto auto_neg_done; + } + } + if ((tmp >> 8) & 1) { + tmp1 = read_mii(9, regs); + tmp2 = read_mii(10, regs); + if ((tmp1 & GRETH_MII_EXTADV_1000FD) && + (tmp2 & GRETH_MII_EXTPRT_1000FD)) { + dev->gb = 1; + dev->fd = 1; + } + if ((tmp1 & GRETH_MII_EXTADV_1000HD) && + (tmp2 & GRETH_MII_EXTPRT_1000HD)) { + dev->gb = 1; + dev->fd = 0; + } + } + if ((dev->gb == 0) || ((dev->gb == 1) && (dev->gbit_mac == 0))) { + tmp1 = read_mii(4, regs); + tmp2 = read_mii(5, regs); + if ((tmp1 & GRETH_MII_100TXFD) && + (tmp2 & GRETH_MII_100TXFD)) { + dev->sp = 1; + dev->fd = 1; + } + if ((tmp1 & GRETH_MII_100TXHD) && + (tmp2 & GRETH_MII_100TXHD)) { + dev->sp = 1; + dev->fd = 0; + } + if ((tmp1 & GRETH_MII_10FD) && (tmp2 & GRETH_MII_10FD)) { + dev->fd = 1; + } + if ((dev->gb == 1) && (dev->gbit_mac == 0)) { + dev->gb = 0; + dev->fd = 0; + write_mii(0, dev->sp << 13, regs); + } + } + + } + auto_neg_done: +#ifdef DEBUG + printf("%s GRETH Ethermac at [0x%x] irq %d. Running \ + %d Mbps %s duplex\n", dev->gbit_mac ? "10/100/1000" : "10/100", (unsigned int)(regs), (unsigned int)(dev->irq), dev->gb ? 1000 : (dev->sp ? 100 : 10), dev->fd ? "full" : "half"); +#endif + /* Read out PHY info if extended registers are available */ + if (tmp & 1) { + tmp1 = read_mii(2, regs); + tmp2 = read_mii(3, regs); + tmp1 = (tmp1 << 6) | ((tmp2 >> 10) & 0x3F); + tmp = tmp2 & 0xF; + + tmp2 = (tmp2 >> 4) & 0x3F; +#ifdef DEBUG + printf("PHY: Vendor %x Device %x Revision %d\n", tmp1, + tmp2, tmp); +#endif + } else { + printf("PHY info not available\n"); + } + + /* set speed and duplex bits in control register */ + GRETH_REGORIN(&regs->control, + (dev->gb << 8) | (dev->sp << 7) | (dev->fd << 4)); + + return 0; +} + +void greth_halt(struct eth_device *dev) +{ + greth_priv *greth; + greth_regs *regs; + int i; +#ifdef DEBUG + printf("greth_halt\n"); +#endif + if (!dev || !dev->priv) + return; + + greth = dev->priv; + regs = greth->regs; + + if (!regs) + return; + + /* disable receiver/transmitter by clearing the enable bits */ + GRETH_REGANDIN(&regs->control, ~(GRETH_RXEN | GRETH_TXEN)); + + /* reset rx/tx descriptors */ + if (greth->rxbd_base) { + for (i = 0; i < GRETH_RXBD_CNT; i++) { + greth->rxbd_base[i].stat = + (i >= (GRETH_RXBD_CNT - 1)) ? GRETH_BD_WR : 0; + } + } + + if (greth->txbd_base) { + for (i = 0; i < GRETH_TXBD_CNT; i++) { + greth->txbd_base[i].stat = + (i >= (GRETH_TXBD_CNT - 1)) ? GRETH_BD_WR : 0; + } + } +} + +int greth_send(struct eth_device *dev, volatile void *eth_data, int data_length) +{ + greth_priv *greth = dev->priv; + greth_regs *regs = greth->regs; + greth_bd *txbd; + void *txbuf; + unsigned int status; +#ifdef DEBUG + printf("greth_send\n"); +#endif + /* send data, wait for data to be sent, then return */ + if (((unsigned int)eth_data & (GRETH_BUF_ALIGN - 1)) + && !greth->gbit_mac) { + /* data not aligned as needed by GRETH 10/100, solve this by allocating 4 byte aligned buffer + * and copy data to before giving it to GRETH. + */ + if (!greth->txbuf) { + greth->txbuf = malloc(GRETH_RXBUF_SIZE); +#ifdef DEBUG + printf("GRETH: allocated aligned tx-buf\n"); +#endif + } + + txbuf = greth->txbuf; + + /* copy data info buffer */ + memcpy((char *)txbuf, (char *)eth_data, data_length); + + /* keep buffer to next time */ + } else { + txbuf = (void *)eth_data; + } + /* get descriptor to use, only 1 supported... hehe easy */ + txbd = greth->txbd_base; + + /* setup descriptor to wrap around to it self */ + txbd->addr = (unsigned int)txbuf; + txbd->stat = GRETH_BD_EN | GRETH_BD_WR | data_length; + + /* Remind Core which descriptor to use when sending */ + GRETH_REGSAVE(&regs->tx_desc_p, (unsigned int)txbd); + + /* initate send by enabling transmitter */ + GRETH_REGORIN(&regs->control, GRETH_TXEN); + + /* Wait for data to be sent */ + while ((status = GRETH_REGLOAD(&txbd->stat)) & GRETH_BD_EN) { + ; + } + + /* was the packet transmitted succesfully? */ + if (status & GRETH_TXBD_ERR_AL) { + greth->stats.tx_limit_errors++; + } + + if (status & GRETH_TXBD_ERR_UE) { + greth->stats.tx_underrun_errors++; + } + + if (status & GRETH_TXBD_ERR_LC) { + greth->stats.tx_latecol_errors++; + } + + if (status & + (GRETH_TXBD_ERR_LC | GRETH_TXBD_ERR_UE | GRETH_TXBD_ERR_AL)) { + /* any error */ + greth->stats.tx_errors++; + return -1; + } + + /* bump tx packet counter */ + greth->stats.tx_packets++; + + /* return succefully */ + return 0; +} + +int greth_recv(struct eth_device *dev) +{ + greth_priv *greth = dev->priv; + greth_regs *regs = greth->regs; + greth_bd *rxbd; + unsigned int status, len = 0, bad; + unsigned char *d; + int enable = 0; + int i; +#ifdef DEBUG +/* printf("greth_recv\n"); */ +#endif + /* Receive One packet only, but clear as many error packets as there are + * available. + */ + { + /* current receive descriptor */ + rxbd = greth->rxbd_curr; + + /* get status of next received packet */ + status = GRETH_REGLOAD(&rxbd->stat); + + bad = 0; + + /* stop if no more packets received */ + if (status & GRETH_BD_EN) { + goto done; + } +#ifdef DEBUG + printf("greth_recv: packet 0x%lx, 0x%lx, len: %d\n", + (unsigned int)rxbd, status, status & GRETH_BD_LEN); +#endif + + /* Check status for errors. + */ + if (status & GRETH_RXBD_ERR_FT) { + greth->stats.rx_length_errors++; + bad = 1; + } + if (status & (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE)) { + greth->stats.rx_frame_errors++; + bad = 1; + } + if (status & GRETH_RXBD_ERR_CRC) { + greth->stats.rx_crc_errors++; + bad = 1; + } + if (bad) { + greth->stats.rx_errors++; + printf + ("greth_recv: Bad packet (%d, %d, %d, 0x%08x, %d)\n", + greth->stats.rx_length_errors, + greth->stats.rx_frame_errors, + greth->stats.rx_crc_errors, status, + greth->stats.rx_packets); + /* print all rx descriptors */ + for (i = 0; i < GRETH_RXBD_CNT; i++) { + printf("[%d]: Stat=0x%lx, Addr=0x%lx\n", i, + GRETH_REGLOAD(&greth->rxbd_base[i].stat), + GRETH_REGLOAD(&greth->rxbd_base[i]. + addr)); + } + } else { + /* Process the incoming packet. */ + len = status & GRETH_BD_LEN; + d = (char *)rxbd->addr; +#ifdef DEBUG + printf + ("greth_recv: new packet, length: %d. data: %x %x %x %x %x %x %x %x\n", + len, d[0], d[1], d[2], d[3], d[4], d[5], d[6], + d[7]); +#endif + /* flush all data cache to make sure we're not reading old packet data */ + sparc_dcache_flush_all(); + + /* pass packet on to network subsystem */ + NetReceive((void *)d, len); + + /* bump stats counters */ + greth->stats.rx_packets++; + + /* bad is now 0 ==> will stop loop */ + } + + /* reenable descriptor to receive more packet with this descriptor, wrap around if needed */ + rxbd->stat = + GRETH_BD_EN | + (((unsigned int)greth->rxbd_curr >= + (unsigned int)greth->rxbd_max) ? GRETH_BD_WR : 0); + enable = 1; + + /* increase index */ + greth->rxbd_curr = + ((unsigned int)greth->rxbd_curr >= + (unsigned int)greth->rxbd_max) ? greth-> + rxbd_base : (greth->rxbd_curr + 1); + + }; + + if (enable) { + GRETH_REGORIN(&regs->control, GRETH_RXEN); + } + done: + /* return positive length of packet or 0 if non recieved */ + return len; +} + +void greth_set_hwaddr(greth_priv * greth, unsigned char *mac) +{ + /* save new MAC address */ + greth->dev->enetaddr[0] = greth->hwaddr[0] = mac[0]; + greth->dev->enetaddr[1] = greth->hwaddr[1] = mac[1]; + greth->dev->enetaddr[2] = greth->hwaddr[2] = mac[2]; + greth->dev->enetaddr[3] = greth->hwaddr[3] = mac[3]; + greth->dev->enetaddr[4] = greth->hwaddr[4] = mac[4]; + greth->dev->enetaddr[5] = greth->hwaddr[5] = mac[5]; + greth->regs->esa_msb = (mac[0] << 8) | mac[1]; + greth->regs->esa_lsb = + (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5]; +#ifdef DEBUG + printf("GRETH: New MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); +#endif +} + +int greth_initialize(bd_t * bis) +{ + greth_priv *greth; + ambapp_apbdev apbdev; + struct eth_device *dev; + int i; + char *addr_str, *end; + unsigned char addr[6]; +#ifdef DEBUG + printf("Scanning for GRETH\n"); +#endif + /* Find Device & IRQ via AMBA Plug&Play information */ + if (ambapp_apb_first(VENDOR_GAISLER, GAISLER_ETHMAC, &apbdev) != 1) { + return -1; /* GRETH not found */ + } + + greth = (greth_priv *) malloc(sizeof(greth_priv)); + dev = (struct eth_device *)malloc(sizeof(struct eth_device)); + memset(dev, 0, sizeof(struct eth_device)); + memset(greth, 0, sizeof(greth_priv)); + + greth->regs = (greth_regs *) apbdev.address; + greth->irq = apbdev.irq; +#ifdef DEBUG + printf("Found GRETH at 0x%lx, irq %d\n", greth->regs, greth->irq); +#endif + dev->priv = (void *)greth; + dev->iobase = (unsigned int)greth->regs; + dev->init = greth_init; + dev->halt = greth_halt; + dev->send = greth_send; + dev->recv = greth_recv; + greth->dev = dev; + + /* Reset Core */ + GRETH_REGSAVE(&greth->regs->control, GRETH_RESET); + + /* Wait for core to finish reset cycle */ + while (GRETH_REGLOAD(&greth->regs->control) & GRETH_RESET) ; + + /* Get the phy address which assumed to have been set + correctly with the reset value in hardware */ + greth->phyaddr = (GRETH_REGLOAD(&greth->regs->mdio) >> 11) & 0x1F; + + /* Check if mac is gigabit capable */ + greth->gbit_mac = (GRETH_REGLOAD(&greth->regs->control) >> 27) & 1; + + /* Make descriptor string */ + if (greth->gbit_mac) { + sprintf(dev->name, "GRETH 10/100/GB"); + } else { + sprintf(dev->name, "GRETH 10/100"); + } + + /* initiate PHY, select speed/duplex depending on connected PHY */ + if (greth_init_phy(greth, bis)) { + /* Failed to init PHY (timedout) */ + return -1; + } + + /* Register Device to EtherNet subsystem */ + eth_register(dev); + + /* Get MAC address */ + if ((addr_str = getenv("ethaddr")) != NULL) { + for (i = 0; i < 6; i++) { + addr[i] = + addr_str ? simple_strtoul(addr_str, &end, 16) : 0; + if (addr_str) { + addr_str = (*end) ? end + 1 : end; + } + } + } else { + /* HW Address not found in environment, Set default HW address */ + addr[0] = GRETH_HWADDR_0; /* MSB */ + addr[1] = GRETH_HWADDR_1; + addr[2] = GRETH_HWADDR_2; + addr[3] = GRETH_HWADDR_3; + addr[4] = GRETH_HWADDR_4; + addr[5] = GRETH_HWADDR_5; /* LSB */ + } + + /* set and remember MAC address */ + greth_set_hwaddr(greth, addr); + + return 1; +} diff --git a/drivers/net/greth.h b/drivers/net/greth.h new file mode 100644 index 0000000..7d5fbd3 --- /dev/null +++ b/drivers/net/greth.h @@ -0,0 +1,97 @@ +/* Gaisler.com GRETH 10/100/1000 Ethernet MAC driver + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel(a)gaisler.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define GRETH_FD 0x10 +#define GRETH_RESET 0x40 +#define GRETH_MII_BUSY 0x8 +#define GRETH_MII_NVALID 0x10 + +/* MII registers */ +#define GRETH_MII_EXTADV_1000FD 0x00000200 +#define GRETH_MII_EXTADV_1000HD 0x00000100 +#define GRETH_MII_EXTPRT_1000FD 0x00000800 +#define GRETH_MII_EXTPRT_1000HD 0x00000400 + +#define GRETH_MII_100T4 0x00000200 +#define GRETH_MII_100TXFD 0x00000100 +#define GRETH_MII_100TXHD 0x00000080 +#define GRETH_MII_10FD 0x00000040 +#define GRETH_MII_10HD 0x00000020 + +#define GRETH_BD_EN 0x800 +#define GRETH_BD_WR 0x1000 +#define GRETH_BD_IE 0x2000 +#define GRETH_BD_LEN 0x7FF + +#define GRETH_TXEN 0x1 +#define GRETH_INT_TX 0x8 +#define GRETH_TXI 0x4 +#define GRETH_TXBD_STATUS 0x0001C000 +#define GRETH_TXBD_MORE 0x20000 +#define GRETH_TXBD_IPCS 0x40000 +#define GRETH_TXBD_TCPCS 0x80000 +#define GRETH_TXBD_UDPCS 0x100000 +#define GRETH_TXBD_ERR_LC 0x10000 +#define GRETH_TXBD_ERR_UE 0x4000 +#define GRETH_TXBD_ERR_AL 0x8000 +#define GRETH_TXBD_NUM 128 +#define GRETH_TXBD_NUM_MASK (GRETH_TXBD_NUM-1) +#define GRETH_TX_BUF_SIZE 2048 + +#define GRETH_INT_RX 0x4 +#define GRETH_RXEN 0x2 +#define GRETH_RXI 0x8 +#define GRETH_RXBD_STATUS 0xFFFFC000 +#define GRETH_RXBD_ERR_AE 0x4000 +#define GRETH_RXBD_ERR_FT 0x8000 +#define GRETH_RXBD_ERR_CRC 0x10000 +#define GRETH_RXBD_ERR_OE 0x20000 +#define GRETH_RXBD_ERR_LE 0x40000 +#define GRETH_RXBD_IP_DEC 0x80000 +#define GRETH_RXBD_IP_CSERR 0x100000 +#define GRETH_RXBD_UDP_DEC 0x200000 +#define GRETH_RXBD_UDP_CSERR 0x400000 +#define GRETH_RXBD_TCP_DEC 0x800000 +#define GRETH_RXBD_TCP_CSERR 0x1000000 + +#define GRETH_RXBD_NUM 128 +#define GRETH_RXBD_NUM_MASK (GRETH_RXBD_NUM-1) +#define GRETH_RX_BUF_SIZE 2048 + +/* Ethernet configuration registers */ +typedef struct _greth_regs { + volatile unsigned int control; + volatile unsigned int status; + volatile unsigned int esa_msb; + volatile unsigned int esa_lsb; + volatile unsigned int mdio; + volatile unsigned int tx_desc_p; + volatile unsigned int rx_desc_p; +} greth_regs; + +/* Ethernet buffer descriptor */ +typedef struct _greth_bd { + volatile unsigned int stat; + unsigned int addr; /* Buffer address not changed by HW */ +} greth_bd; diff --git a/net/eth.c b/net/eth.c index 16a6dcb..3b86f87 100644 --- a/net/eth.c +++ b/net/eth.c @@ -60,6 +60,7 @@ extern int npe_initialize(bd_t *); extern int uec_initialize(int); extern int bfin_EMAC_initialize(bd_t *); extern int atstk1000_eth_initialize(bd_t *); +extern int greth_initialize(bd_t *); extern int atngw100_eth_initialize(bd_t *); extern int mcffec_initialize(bd_t*); extern int mcdmafec_initialize(bd_t*); @@ -275,6 +276,9 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_ATSTK1000) atstk1000_eth_initialize(bis); #endif +#if defined(CONFIG_GRETH) + greth_initialize(bis); +#endif #if defined(CONFIG_ATNGW100) atngw100_eth_initialize(bis); #endif

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