June 2007 - U-Boot

[U-Boot-Users] Please pull -mpc86xx custodian tree!
by Jon Loeliger 06 Jun '07

06 Jun '07

Hi Wolfgang, Please pull the u-boot-mpc86xx custodian tree! Thanks, jdl The following changes since commit abca901869c3760b6c5fecb825db6c1d91a78a93: Wolfgang Denk (1): Get rid of duplicated file (see include/configs/sbc8560.h instead) are found in the git repository at: git://www.denx.de/git/u-boot-mpc86xx.git Ed Swarthout (2): 8641hpcn: Fix Makefile after moving pixis to board/freescale. mpc8641 image size cleanup Makefile | 3 --- board/mpc8641hpcn/Makefile | 4 ++++ board/mpc8641hpcn/config.mk | 2 +- board/mpc8641hpcn/u-boot.lds | 22 ++++------------------ cpu/mpc86xx/resetvec.S | 2 -- doc/README.mpc8641hpcn | 11 +++++++---- include/configs/MPC8641HPCN.h | 10 +++++++++- 7 files changed, 25 insertions(+), 29 deletions(-) delete mode 100644 cpu/mpc86xx/resetvec.S

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[U-Boot-Users] The Network performance
by hankchiang0911＠gmail.com 06 Jun '07

06 Jun '07

Dear All, Recently, I got my board(S3C2410 based, running on 150MHz) work with SMSC's LAN9118, the driver comes from SMSC and is configured to 32bit mode. I simply test the network performance by download a 32MB file via tftp. All the testing are done in 100Mb full-duplex LAN. It needs nearly 40s to finish. My question is... Is it usual? How about your board. Thanks for the reply! JC-Chiang

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[U-Boot-Users] Timer IRQs appear broken on 8548/e500v2
by Paul Gortmaker 06 Jun '07

06 Jun '07

I'd built 1.2.0 for the MPC8548 CDS, and put that on an earlier board which worked fine. Then I went to install it on a newer board (e500v2) and the same image was giving me an illegal instruction fault. Once I saw the latest git trees gave me the same error, I went back in time and started poking around older versions and eventually tracked it down to the timer IRQ support. Here is the patch I'm running now -- this may not be the desired long term fix, but at least it will save people the detective work part (which was kind of nasty, as the PHY code shows up as the culprit, just out of coincidence...) Thanks, Paul. --------- The interrupt support is broken on newer e500v2 boards. Trying to enable it will result in an illegal instruction trap once the 1st TCR_PIE event happens, which will roughly be around the PHY detection for the TSEC (depending on your CPU speed). Since the interrupt generation is only used for the periodic timer interrupts, which are in turn only used if you are using the u-boot watchdog, a fix is to just disable it as per pre-1.1.4 u-boot versions. Signed-off-by: Paul Gortmaker <paul.gortmaker(a)windriver.com> --- --- orig/u-boot-1.2.0/cpu/mpc85xx/interrupts.c 2007-01-06 18:13:11.000000000 -0500 +++ u-boot-1.2.0/cpu/mpc85xx/interrupts.c 2007-05-23 21:15:20.000000000 -0400 @@ -80,6 +80,7 @@ int interrupt_init (void) { +#ifdef CONFIG_MPC85xx_TIMER_IRQ volatile immap_t *immr = (immap_t *)CFG_IMMR; immr->im_pic.gcr = MPC85xx_PICGCR_RST; @@ -89,6 +90,7 @@ mtspr(SPRN_TCR, TCR_PIE); set_dec (decrementer_count); set_msr (get_msr () | MSR_EE); +#endif /* CONFIG_MPC85xx_TIMER_IRQ */ return (0); }

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Re: [U-Boot-Users] Altera Stratix II support
by eran liberty 06 Jun '07

06 Jun '07

This patch adds my corp board along with an example of the Alter Stratix board specific implementation Alas, it is larger than 40k and will be rejected... here is a temporary link till I will find a better place. http://download.yousendit.com/9380CEAB68FA66F3 If anyone experience problem accessing, mail me. Liberty

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[U-Boot-Users] (no subject)
by Libor Fiedler - Alistar Systems s.r.o. 06 Jun '07

06 Jun '07

Hi all, help please, I have a board with AT91RM9200 and AT49BV6416. Everything works fine but atmel stopped to produce the flash. So I'd like to use AT49BV642D. Do everybody have any version (the higher the better) of u-boot working with this new flash chip ? If so, could send me a patch ?? Thanx for help Libor ------------------------------ Alistar Systems Ltd. Strnadova 51 54701 Nachod CZECH REPUBLIC Phone: +420 491 428 385 Mobile: +420 604 672 252 IČO: 25936867 VAT: CZ25936867

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[U-Boot-Users] U-boot runtime detection
by Florian Fainelli 06 Jun '07

06 Jun '07

Hi all, I am currently working on the adm5120 target under Linux and this board is available with at least 4 bootloaders, including U-boot. We manage getting runtime bootloader detection working using the fw_arg0-3 values for CFE, RouterBoot, Bootbase. Now I would like to do so for U-boot and I could not find any informations if U-boot fills the fw_arg0-3 with some specific values that could let us identify it at runtime. Can you indicate me if such identification is possible ? If not, would another method (like reading the first flash block) work ? Thank you very much in advance for your answer. -- Cordialement, Florian Fainelli ---------------------------------------------

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Re: [U-Boot-Users] IXP425 ethernet & NPE microcode
by Stefan Roese 06 Jun '07

06 Jun '07

Hi Martijn, On Monday 14 May 2007, Martijn de Gouw wrote: > > Doesn't apply on current version: > > > > Could you please create a new patch against the current > > U-Boot version and > > here is a new patch Sorry it took me so long. Still doesn't apply though: stefan@ubuntu:~/git/u-boot/u-boot-ixp$ cg-patch < u-boot-npe-nor.diff patching file include/configs/pdnb3.h Hunk #2 succeeded at 93 (offset 6 lines). Hunk #3 succeeded at 132 (offset 6 lines). Hunk #4 FAILED at 184. 1 out of 4 hunks FAILED -- saving rejects to file include/configs/pdnb3.h.rej patching file tools/env/fw_env.h patching file cpu/ixp/npe/IxNpeDl.c patching file cpu/ixp/npe/IxNpeDlImageMgr.c patching file cpu/ixp/npe/Makefile patching file cpu/ixp/npe/include/IxNpeDlImageMgr_p.h patching file cpu/ixp/npe/include/IxNpeMicrocode.h patching file cpu/ixp/npe/npe.c patching file include/configs/pdnb3.h Hunk #2 FAILED at 76. Hunk #3 FAILED at 182. Hunk #4 succeeded at 223 (offset 20 lines). 2 out of 4 hunks FAILED -- saving rejects to file include/configs/pdnb3.h.rej This is quite confusing since you seem to have combined two patches in this single patch file. For example pdnb3.h is patched twice! If it's easier for you, then please send me two patches, one for the IXP-NPE stuff and one for your pdnb3 config file. Thanks. Could you please resend a patch against the current repository? I'll promise to check and submit this time quickly. > > resend. And please add a more descriptive commit log than: > > Patch includes trimming of unused functionality in NPE driver. > > The following defines define the address to load firmware from: > > CONFIG_NPE_B_ADDR1 > CONFIG_NPE_C_ADDR1 > > There are also a second set addresses, in case first fails to contain a > valid microcode image: > > CONFIG_NPE_B_ADDR2 > CONFIG_NPE_C_ADDR2 Thanks. But it's still missing the requested README. As I wrote earlier: " And please also add a little description (perhap in doc/README.ixp-npe) on how to configure the newly added configuration defines "CONFIG_NPE_x_ADDRx". I assume they point to a location in FLASH where the NPE binary should be stored, right? Please describe this so that other people (and me after a few months) understand this too. " Best would be to add a small example here, what file needs to get downloaded from Intel (NPE binary), and how to program this to the correct location in FLASH. Thanks. Best regards, Stefan ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de =====================================================================

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[U-Boot-Users] Blocking network in ixp425
by Teemu Keskinarkaus 06 Jun '07

06 Jun '07

Hi, I'm working with the ixp425 based system. The u-boot is also working fine except I noticed that the network calls like eth_rx is blocking. That creates problem with the software that has to work with the U-boot because whole system is block and timing and stuff won't work. I know that some systems have non-blocking network functions (like the one where I took the software that I'm working on with ixp425) so is it possible to get them for ixp425 too? Can it be done by configuration or does it need some code changes? For reason beyond me I have to use base version 1.1.2, but I can take some stuff from newer version if it's required to get the non-blocking network commands to work. Thanks. Teemu K.

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[U-Boot-Users] explanation congestion
by David 06 Jun '07

06 Jun '07

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[U-Boot-Users] [PATCH] PCI_READ_VIA_DWORD_OP: initialize val parameter on fail
by Shinya Kuribayashi 06 Jun '07

06 Jun '07

Hi, pci_hose_read_config_{byte,word}_via_dword uses a temporary read buffer `val32', so if read_config_dword returns -1 then val32 also should be initialized. Without this fix we'll go on scanning bus with vendor or header_ type uninitialized. This brings many unnecessary config trials. compiled and tested with our MIPS board. Thanks, Shinya Index: b/drivers/pci.c =================================================================== --- a/drivers/pci.c +++ b/drivers/pci.c @@ -75,7 +75,7 @@ PCI_OP(write, word, u16, ) PCI_OP(write, dword, u32, ) #endif /* CONFIG_IXP425 */ -#define PCI_READ_VIA_DWORD_OP(size, type, off_mask) \ +#define PCI_READ_VIA_DWORD_OP(size, type, off_mask, error_code) \ int pci_hose_read_config_##size##_via_dword(struct pci_controller *hose,\ pci_dev_t dev, \ int offset, type val) \ @@ -83,7 +83,10 @@ int pci_hose_read_config_##size##_via_dw u32 val32; \ \ if (pci_hose_read_config_dword(hose, dev, offset & 0xfc, &val32) < 0)\ + { \ + error_code; \ return -1; \ + } \ \ *val = (val32 >> ((offset & (int)off_mask) * 8)); \ \ @@ -111,8 +114,8 @@ int pci_hose_write_config_##size##_via_d return 0; \ } -PCI_READ_VIA_DWORD_OP(byte, u8 *, 0x03) -PCI_READ_VIA_DWORD_OP(word, u16 *, 0x02) +PCI_READ_VIA_DWORD_OP(byte, u8 *, 0x03, *val = 0xff) +PCI_READ_VIA_DWORD_OP(word, u16 *, 0x02, *val = 0xffff) PCI_WRITE_VIA_DWORD_OP(byte, u8, 0x03, 0x000000ff) PCI_WRITE_VIA_DWORD_OP(word, u16, 0x02, 0x0000ffff)

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