December 2007 - U-Boot

[U-Boot-Users] [PATCH] ARM: S3C24x0 SoC NAND controller support
by Harald Welte 05 Feb '08

05 Feb '08

This patch adds NAND support to the S3C24x0 SoC code in u-boot Signed-off-by: Harald Welte <laforge(a)openmoko.org> Index: u-boot/cpu/arm920t/s3c24x0/Makefile =================================================================== --- u-boot.orig/cpu/arm920t/s3c24x0/Makefile +++ u-boot/cpu/arm920t/s3c24x0/Makefile @@ -26,7 +26,7 @@ LIB = $(obj)lib$(SOC).a COBJS = i2c.o interrupts.o serial.o speed.o \ - usb.o usb_ohci.o + usb.o usb_ohci.o nand.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) Index: u-boot/cpu/arm920t/s3c24x0/nand.c =================================================================== --- /dev/null +++ u-boot/cpu/arm920t/s3c24x0/nand.c @@ -0,0 +1,179 @@ +/* + * (C) Copyright 2006 OpenMoko, Inc. + * Author: Harald Welte <laforge(a)openmoko.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#if 0 +#define DEBUGN printf +#else +#define DEBUGN(x, args ...) {} +#endif + +#if defined(CONFIG_CMD_NAND) +#if !defined(CFG_NAND_LEGACY) + +#include <nand.h> +#include <s3c2410.h> + +#define __REGb(x) (*(volatile unsigned char *)(x)) +#define __REGi(x) (*(volatile unsigned int *)(x)) + +#define NF_BASE 0x4e000000 +#define NFCONF __REGi(NF_BASE + 0x0) +#define NFCMD __REGb(NF_BASE + 0x4) +#define NFADDR __REGb(NF_BASE + 0x8) +#define NFDATA __REGb(NF_BASE + 0xc) +#define NFSTAT __REGb(NF_BASE + 0x10) +#define NFECC0 __REGb(NF_BASE + 0x14) +#define NFECC1 __REGb(NF_BASE + 0x15) +#define NFECC2 __REGb(NF_BASE + 0x16) + +#define S3C2410_NFCONF_EN (1<<15) +#define S3C2410_NFCONF_512BYTE (1<<14) +#define S3C2410_NFCONF_4STEP (1<<13) +#define S3C2410_NFCONF_INITECC (1<<12) +#define S3C2410_NFCONF_nFCE (1<<11) +#define S3C2410_NFCONF_TACLS(x) ((x)<<8) +#define S3C2410_NFCONF_TWRPH0(x) ((x)<<4) +#define S3C2410_NFCONF_TWRPH1(x) ((x)<<0) + +static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *chip = mtd->priv; + + DEBUGN("hwcontrol(): 0x%02x: ", cmd); + + switch (cmd) { + case NAND_CTL_SETNCE: + NFCONF &= ~S3C2410_NFCONF_nFCE; + DEBUGN("NFCONF=0x%08x\n", NFCONF); + break; + case NAND_CTL_CLRNCE: + NFCONF |= S3C2410_NFCONF_nFCE; + DEBUGN("NFCONF=0x%08x\n", NFCONF); + break; + case NAND_CTL_SETALE: + chip->IO_ADDR_W = NF_BASE + 0x8; + DEBUGN("SETALE\n"); + break; + case NAND_CTL_SETCLE: + chip->IO_ADDR_W = NF_BASE + 0x4; + DEBUGN("SETCLE\n"); + break; + default: + chip->IO_ADDR_W = NF_BASE + 0xc; + break; + } + return; +} + +static int s3c2410_dev_ready(struct mtd_info *mtd) +{ + DEBUGN("dev_ready\n"); + return (NFSTAT & 0x01); +} + +#ifdef CONFIG_S3C2410_NAND_HWECC +void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) +{ + DEBUGN("s3c2410_nand_enable_hwecc(%p, %d)\n", mtd ,mode); + NFCONF |= S3C2410_NFCONF_INITECC; +} + +static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, + u_char *ecc_code) +{ + ecc_code[0] = NFECC0; + ecc_code[1] = NFECC1; + ecc_code[2] = NFECC2; + DEBUGN("s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n", + mtd , ecc_code[0], ecc_code[1], ecc_code[2]); + + return 0; +} + +static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, + u_char *read_ecc, u_char *calc_ecc) +{ + if (read_ecc[0] == calc_ecc[0] && + read_ecc[1] == calc_ecc[1] && + read_ecc[2] == calc_ecc[2]) + return 0; + + printf("s3c2410_nand_correct_data: not implemented\n"); + return -1; +} +#endif + +int board_nand_init(struct nand_chip *nand) +{ + u_int32_t cfg; + u_int8_t tacls, twrph0, twrph1; + S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); + + DEBUGN("board_nand_init()\n"); + + clk_power->CLKCON |= (1 << 4); + + /* initialize hardware */ + twrph0 = 3; twrph1 = 0; tacls = 0; + + cfg = S3C2410_NFCONF_EN; + cfg |= S3C2410_NFCONF_TACLS(tacls - 1); + cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1); + cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1); + + NFCONF = cfg; + + /* initialize nand_chip data structure */ + nand->IO_ADDR_R = nand->IO_ADDR_W = 0x4e00000c; + + /* read_buf and write_buf are default */ + /* read_byte and write_byte are default */ + + /* hwcontrol always must be implemented */ + nand->hwcontrol = s3c2410_hwcontrol; + + nand->dev_ready = s3c2410_dev_ready; + +#ifdef CONFIG_S3C2410_NAND_HWECC + nand->enable_hwecc = s3c2410_nand_enable_hwecc; + nand->calculate_ecc = s3c2410_nand_calculate_ecc; + nand->correct_data = s3c2410_nand_correct_data; + nand->eccmode = NAND_ECC_HW3_512; +#else + nand->eccmode = NAND_ECC_SOFT; +#endif + +#ifdef CONFIG_S3C2410_NAND_BBT + nand->options = NAND_USE_FLASH_BBT; +#else + nand->options = 0; +#endif + + DEBUGN("end of nand_init\n"); + + return 0; +} + +#else + #error "U-Boot legacy NAND support not available for S3C2410" +#endif +#endif -- - Harald Welte <laforge(a)openmoko.org> http://openmoko.org/ ============================================================================ Software for the world's first truly open Free Software mobile phone

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[U-Boot-Users] [PATCH] OMAP5912: fix FIFO handling in UART driver
by Wolfgang Denk 05 Feb '08

05 Feb '08

According to the OMAP5912 Serial Interfaces Reference Guide (see http://focus.ti.com/lit/ug/spru760c/spru760c.pdf, page 150), the FIFO_EN enable bit in the FIFO Control Register (FCR) can only be changed when the baud clock is not running, i. e. when both DLL and DLH are set to 0. Thus make sure that DLL and DLH are 0 when writing the FCR. Signed-off-by: Wolfgang Denk <wd(a)denx.de> --- drivers/serial/ns16550.c | 16 ++++++++++++---- 1 files changed, 12 insertions(+), 4 deletions(-) Unfortunately I can test this only on a limited number of boards with other NS16550 compatible UARTs (like TQM85xx, TQM83xx); the patch seems to cause no problems there. Comments welcome... diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 2429464..6b3f60e 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -21,11 +21,15 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) com_port->mdr1 = 0x7; /* mode select reset TL16C750*/ #endif com_port->lcr = LCR_BKSE | LCRVAL; - com_port->dll = baud_divisor & 0xff; - com_port->dlm = (baud_divisor >> 8) & 0xff; + com_port->dll = 0; + com_port->dlm = 0; com_port->lcr = LCRVAL; com_port->mcr = MCRVAL; com_port->fcr = FCRVAL; + com_port->lcr = LCR_BKSE | LCRVAL; + com_port->dll = baud_divisor & 0xff; + com_port->dlm = (baud_divisor >> 8) & 0xff; + com_port->lcr = LCRVAL; #if defined(CONFIG_OMAP) #if defined(CONFIG_APTIX) com_port->mdr1 = 3; /* /13 mode so Aptix 6MHz can hit 115200 */ @@ -38,12 +42,16 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) void NS16550_reinit (NS16550_t com_port, int baud_divisor) { com_port->ier = 0x00; + com_port->lcr = LCR_BKSE | LCRVAL; + com_port->dll = 0; + com_port->dlm = 0; + com_port->lcr = LCRVAL; + com_port->mcr = MCRVAL; + com_port->fcr = FCRVAL; com_port->lcr = LCR_BKSE; com_port->dll = baud_divisor & 0xff; com_port->dlm = (baud_divisor >> 8) & 0xff; com_port->lcr = LCRVAL; - com_port->mcr = MCRVAL; - com_port->fcr = FCRVAL; } void NS16550_putc (NS16550_t com_port, char c) -- 1.5.2.2 Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de ...when fits of creativity run strong, more than one programmer or writer has been known to abandon the desktop for the more spacious floor. - Fred Brooks, Jr.

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[U-Boot-Users] [PATCH] ARM: s3c24xx: Multiple serial port support
by Harald Welte 04 Feb '08

04 Feb '08

This patch adds support for CONFIG_SERIAL_MULTI on s3c24x0 CPU's Signed-off-by: Harald Welte <laforge(a)openmoko.org> Index: u-boot/common/serial.c =================================================================== --- u-boot.orig/common/serial.c +++ u-boot/common/serial.c @@ -59,6 +59,16 @@ #else return &serial0_device; #endif +#elif defined(CONFIG_S3C2410) +#if defined(CONFIG_SERIAL1) + return &s3c24xx_serial0_device; +#elif defined(CONFIG_SERIAL2) + return &s3c24xx_serial1_device; +#elif defined(CONFIG_SERIAL3) + return &s3c24xx_serial2_device; +#else +#error "CONFIG_SERIAL? missing." +#endif #else #error No default console #endif @@ -119,6 +129,11 @@ #if defined (CONFIG_STUART) serial_register(&serial_stuart_device); #endif +#if defined(CONFIG_S3C2410) + serial_register(&s3c24xx_serial0_device); + serial_register(&s3c24xx_serial1_device); + serial_register(&s3c24xx_serial2_device); +#endif serial_assign (default_serial_console ()->name); } Index: u-boot/cpu/arm920t/s3c24x0/serial.c =================================================================== --- u-boot.orig/cpu/arm920t/s3c24x0/serial.c +++ u-boot/cpu/arm920t/s3c24x0/serial.c @@ -48,18 +48,74 @@ #error "Bad: you didn't configure serial ..." #endif -void serial_setbrg (void) +#if defined(CONFIG_SERIAL_MULTI) +#include <serial.h> + +/* Multi serial device functions */ +#define DECLARE_S3C_SERIAL_FUNCTIONS(port) \ + int s3serial##port##_init (void) {\ + return serial_init_dev(port);}\ + void s3serial##port##_setbrg (void) {\ + serial_setbrg_dev(port);}\ + int s3serial##port##_getc (void) {\ + return serial_getc_dev(port);}\ + int s3serial##port##_tstc (void) {\ + return serial_tstc_dev(port);}\ + void s3serial##port##_putc (const char c) {\ + serial_putc_dev(port, c);}\ + void s3serial##port##_puts (const char *s) {\ + serial_puts_dev(port, s);} + +#define INIT_S3C_SERIAL_STRUCTURE(port,name,bus) {\ + name,\ + bus,\ + s3serial##port##_init,\ + s3serial##port##_setbrg,\ + s3serial##port##_getc,\ + s3serial##port##_tstc,\ + s3serial##port##_putc,\ + s3serial##port##_puts, } + +#endif /* CONFIG_SERIAL_MULTI */ + +void _serial_setbrg(const int dev_index) { - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR); - int i; + S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); unsigned int reg = 0; + int i; /* value is calculated so : (int)(PCLK/16./baudrate) -1 */ reg = get_PCLK() / (16 * gd->baudrate) - 1; + uart->UBRDIV = reg; + for (i = 0; i < 100; i++); +} +#if defined(CONFIG_SERIAL_MULTI) +static inline void +serial_setbrg_dev(unsigned int dev_index) +{ + _serial_setbrg(dev_index); +} +#else +void serial_setbrg(void) +{ + _serial_setbrg(UART_NR); +} +#endif + + +/* Initialise the serial port. The settings are always 8 data bits, no parity, + * 1 stop bit, no start bits. + */ +static int serial_init_dev(const int dev_index) +{ + S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); + int i; + /* FIFO enable, Tx/Rx FIFO clear */ uart->UFCON = 0x07; uart->UMCON = 0x0; + /* Normal,No parity,1 stop,8 bit */ uart->ULCON = 0x3; /* @@ -67,40 +123,57 @@ * normal,interrupt or polling */ uart->UCON = 0x245; - uart->UBRDIV = reg; #ifdef CONFIG_HWFLOW uart->UMCON = 0x1; /* RTS up */ #endif - for (i = 0; i < 100; i++); + + /* FIXME: This is sooooooooooooooooooo ugly */ +#if defined(CONFIG_ARCH_GTA02_v1) || defined(CONFIG_ARCH_GTA02_v2) + /* we need auto hw flow control on the gsm and gps port */ + if (dev_index == 0 || dev_index == 1) + uart->UMCON = 0x10; +#endif + _serial_setbrg(dev_index); + + return (0); } -/* - * Initialise the serial port with the given baudrate. The settings - * are always 8 data bits, no parity, 1 stop bit, no start bits. - * +#if !defined(CONFIG_SERIAL_MULTI) +/* Initialise the serial port. The settings are always 8 data bits, no parity, + * 1 stop bit, no start bits. */ int serial_init (void) { - serial_setbrg (); - - return (0); + return serial_init_dev(UART_NR); } +#endif /* * Read a single byte from the serial port. Returns 1 on success, 0 * otherwise. When the function is succesfull, the character read is * written into its argument c. */ -int serial_getc (void) +int _serial_getc (const int dev_index) { - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR); + S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); /* wait for character to arrive */ while (!(uart->UTRSTAT & 0x1)); return uart->URXH & 0xff; } +#if defined(CONFIG_SERIAL_MULTI) +static inline int serial_getc_dev(unsigned int dev_index) +{ + return _serial_getc(dev_index); +} +#else +int serial_getc (void) +{ + return _serial_getc(UART_NR); +} +#endif #ifdef CONFIG_HWFLOW static int hwflow = 0; /* turned off by default */ @@ -138,9 +211,9 @@ /* * Output a single byte to the serial port. */ -void serial_putc (const char c) +void _serial_putc (const char c, const int dev_index) { - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR); + S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); #ifdef CONFIG_MODEM_SUPPORT if (be_quiet) return; @@ -161,23 +234,72 @@ if (c == '\n') serial_putc ('\r'); } +#if defined(CONFIG_SERIAL_MULTI) +static inline void serial_putc_dev(unsigned int dev_index, const char c) +{ + _serial_putc(c, dev_index); +} +#else +void serial_putc(const char c) +{ + _serial_putc(c, UART_NR); +} +#endif + /* * Test whether a character is in the RX buffer */ -int serial_tstc (void) +int _serial_tstc(const int dev_index) { - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR); + S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); return uart->UTRSTAT & 0x1; } +#if defined(CONFIG_SERIAL_MULTI) +static inline int +serial_tstc_dev(unsigned int dev_index) +{ + return _serial_tstc(dev_index); +} +#else +int serial_tstc(void) +{ + return _serial_tstc(UART_NR); +} +#endif -void -serial_puts (const char *s) +void _serial_puts(const char *s, const int dev_index) { while (*s) { - serial_putc (*s++); + _serial_putc (*s++, dev_index); } } +#if defined(CONFIG_SERIAL_MULTI) +static inline void +serial_puts_dev(int dev_index, const char *s) +{ + _serial_puts(s, dev_index); +} +#else +void +serial_puts (const char *s) +{ + _serial_puts(s, UART_NR); +} +#endif + +#if defined(CONFIG_SERIAL_MULTI) +DECLARE_S3C_SERIAL_FUNCTIONS(0); +struct serial_device s3c24xx_serial0_device = + INIT_S3C_SERIAL_STRUCTURE(0, "s3ser0", "S3UART1"); +DECLARE_S3C_SERIAL_FUNCTIONS(1); +struct serial_device s3c24xx_serial1_device = + INIT_S3C_SERIAL_STRUCTURE(1, "s3ser1", "S3UART2"); +DECLARE_S3C_SERIAL_FUNCTIONS(2); +struct serial_device s3c24xx_serial2_device = + INIT_S3C_SERIAL_STRUCTURE(2, "s3ser2", "S3UART3"); + +#endif /* CONFIG_SERIAL_MULTI */ #endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */ Index: u-boot/include/serial.h =================================================================== --- u-boot.orig/include/serial.h +++ u-boot/include/serial.h @@ -35,6 +35,11 @@ #endif +#if defined(CONFIG_S3C2410) +extern struct serial_device s3c24xx_serial0_device; +extern struct serial_device s3c24xx_serial1_device; +extern struct serial_device s3c24xx_serial2_device; +#endif extern struct serial_device serial_ffuart_device; extern struct serial_device serial_btuart_device; -- - Harald Welte <laforge(a)openmoko.org> http://openmoko.org/ ============================================================================ Software for the world's first truly open Free Software mobile phone

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[U-Boot-Users] [PATCH] ARM: arm920t: Allow use of 'gd' pointer from IRQ
by Harald Welte 04 Feb '08

04 Feb '08

This patch allows us to use the 'gd' pointer (and thus environment and everything else associated with it) from interrupt context on arm920t. Signed-off-by: Harald Welte <laforge(a)openmoko.org> Index: u-boot/cpu/arm920t/start.S =================================================================== --- u-boot.orig/cpu/arm920t/start.S +++ u-boot/cpu/arm920t/start.S @@ -415,12 +415,12 @@ .macro irq_save_user_regs sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Calling r0-r12 - add r8, sp, #S_PC - stmdb r8, {sp, lr}^ @ Calling SP, LR - str lr, [r8, #0] @ Save calling PC + add r7, sp, #S_PC + stmdb r7, {sp, lr}^ @ Calling SP, LR + str lr, [r7, #0] @ Save calling PC mrs r6, spsr - str r6, [r8, #4] @ Save CPSR - str r0, [r8, #8] @ Save OLD_R0 + str r6, [r7, #4] @ Save CPSR + str r0, [r7, #8] @ Save OLD_R0 mov r0, sp .endm -- - Harald Welte <laforge(a)openmoko.org> http://openmoko.org/ ============================================================================ Software for the world's first truly open Free Software mobile phone

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[U-Boot-Users] [PATCH] ARM: arm920/s3c24xx: IRQ demulitplexer callback
by Harald Welte 04 Feb '08

04 Feb '08

This patch adds a IRQ demultiplexer callback to the arm920 cpu core code, plus a stub implementation of it for the S3C2410. The purpose is to allow arm920t implementations suhc as the s3c24x0 to implement interrupt handlers in u-boot without having to touch core arm920t code. Signed-off-by: Harald Welte <laforge(a)openmoko.org> Index: u-boot/cpu/arm920t/interrupts.c =================================================================== --- u-boot.orig/cpu/arm920t/interrupts.c +++ u-boot/cpu/arm920t/interrupts.c @@ -161,11 +161,16 @@ void do_irq (struct pt_regs *pt_regs) { -#if defined (CONFIG_USE_IRQ) && defined (CONFIG_ARCH_INTEGRATOR) +#if defined (CONFIG_USE_IRQ) +#if defined (ARM920_IRQ_CALLBACK) + ARM920_IRQ_CALLBACK(); + return; +#elif defined (CONFIG_ARCH_INTEGRATOR) /* ASSUMED to be a timer interrupt */ /* Just clear it - count handled in */ /* integratorap.c */ *(volatile ulong *)(CFG_TIMERBASE + 0x0C) = 0; +#endif /* ARCH_INTEGRATOR */ #else printf ("interrupt request\n"); show_regs (pt_regs); Index: u-boot/cpu/arm920t/s3c24x0/interrupts.c =================================================================== --- u-boot.orig/cpu/arm920t/s3c24x0/interrupts.c +++ u-boot/cpu/arm920t/s3c24x0/interrupts.c @@ -216,4 +216,13 @@ /*NOTREACHED*/ } +#ifdef CONFIG_USE_IRQ +void s3c2410_irq(void) +{ + S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT(); + u_int32_t intpnd = irq->INTPND; + +} +#endif /* USE_IRQ */ + #endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */ Index: u-boot/include/common.h =================================================================== --- u-boot.orig/include/common.h +++ u-boot/include/common.h @@ -480,6 +480,8 @@ ulong get_PCI_freq (void); #endif #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_LH7A40X) +void s3c2410_irq(void); +#define ARM920_IRQ_CALLBACK s3c2410_irq ulong get_FCLK (void); ulong get_HCLK (void); ulong get_PCLK (void); -- - Harald Welte <laforge(a)openmoko.org> http://openmoko.org/ ============================================================================ Software for the world's first truly open Free Software mobile phone

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[U-Boot-Users] [PATCH] ARM926: Remove compiler warning: target CPU does not support interworking
by Hebbar 04 Feb '08

04 Feb '08

Hi, This Patch removes compiler warning about target cpu not supporting interworking for arm926ejs processor. --- u-boot-1.3.1/cpu/arm926ejs/config.mk 2007-12-06 01:21:19.000000000 -0800 +++ uboot/cpu/arm926ejs/config.mk 2007-12-18 20:22:57.093750000 -0800 @@ -31,4 +31,5 @@ PLATFORM_CPPFLAGS += -march=armv4 # # ========================================================================= PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) Signed-off-by: Hebbar I welcome comments, complaints, suggestions and advices. Regards Gururaja -- View this message in context: http://www.nabble.com/-PATCH--ARM926%3A-Remove-compiler-warning%3A-target-C… Sent from the Uboot - Users mailing list archive at Nabble.com.

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[U-Boot-Users] [PATCH] ARM: I2C Init function call in lib_arm/board.c
by Hebbar 04 Feb '08

04 Feb '08

Hi, we are working on a Customized ARM 926ejs Board. I am trying to port Uboot for the same board. I found that few patches/changes/updates were required for arm & ARM926 Specidifc Modules. Below are the Patches for the same This Patch adds I2C init func call to init sequence for arm boards. This is present in ppc,blackfin and other processor init sequence. --- u-boot-1.3.1/lib_arm/board.c 2007-12-06 01:21:19.000000000 -0800 +++ uboot/lib_arm/board.c 2007-12-12 19:57:51.296875000 -0800 @@ -84,6 +84,11 @@ extern void cs8900_get_enetaddr (uchar * extern void rtl8019_get_enetaddr (uchar * addr); #endif +#if defined(CONFIG_HARD_I2C) || \ + defined(CONFIG_SOFT_I2C) +#include <i2c.h> +#endif + /* * Begin and End of memory area for malloc(), and current "brk" */ @@ -209,6 +214,16 @@ static void display_flash_config (ulong } #endif /* CFG_NO_FLASH */ +#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) +static int init_func_i2c (void) +{ + puts ("I2C: "); + i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + puts ("ready\n"); + return (0); +} +#endif + /* * Breathe some life into the board... * @@ -251,6 +266,9 @@ init_fnc_t *init_sequence[] = { #if defined(CONFIG_DISPLAY_BOARDINFO) checkboard, /* display board info */ #endif +#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) + init_func_i2c, +#endif dram_init, /* configure available RAM banks */ display_dram_config, NULL, Signed-off-by: Hebbar I welcome comments, complaints, suggestions and advices. Regards Gururaja -- View this message in context: http://www.nabble.com/-PATCH--ARM%3A-I2C-Init-function-call-in-lib_arm-boar… Sent from the Uboot - Users mailing list archive at Nabble.com.

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[U-Boot-Users] [PATCH] ARM: Board voiceblue update
by Ladislav Michl 04 Feb '08

04 Feb '08

Signed-off-by: Ladislav Michl <ladis(a)linux-mips.org> Board voiceblue update diff --git a/Makefile b/Makefile index 1ff80b5..7f66bc5 100644 --- a/Makefile +++ b/Makefile @@ -2294,20 +2294,8 @@ versatileab_config \ versatilepb_config : unconfig @board/versatile/split_by_variant.sh $@ -voiceblue_smallflash_config \ voiceblue_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/voiceblue - @if [ "$(findstring _smallflash_,$@)" ] ; then \ - echo "... boot from lower flash bank" ; \ - echo "#define VOICEBLUE_SMALL_FLASH" >>$(obj)include/config.h ; \ - echo "VOICEBLUE_SMALL_FLASH=y" >$(obj)board/voiceblue/config.tmp ; \ - else \ - echo "... boot from upper flash bank" ; \ - >$(obj)include/config.h ; \ - echo "VOICEBLUE_SMALL_FLASH=n" >$(obj)board/voiceblue/config.tmp ; \ - fi - @$(MKCONFIG) -a voiceblue arm arm925t voiceblue + @$(MKCONFIG) $(@:_config=) arm arm925t voiceblue cm4008_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695 diff --git a/board/voiceblue/Makefile b/board/voiceblue/Makefile index 5f340b4..9386bb0 100644 --- a/board/voiceblue/Makefile +++ b/board/voiceblue/Makefile @@ -62,7 +62,7 @@ clean: distclean: clean - rm -f $(LIB) core config.tmp *.bak .depend + rm -f $(LIB) core *.bak .depend ######################################################################### diff --git a/board/voiceblue/config.mk b/board/voiceblue/config.mk index d55daa4..2cfc56a 100644 --- a/board/voiceblue/config.mk +++ b/board/voiceblue/config.mk @@ -1,16 +1 @@ -# -# Linux-Kernel is expected to be at 1000'8000, -# entry 1000'8000 (mem base + reserved) -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifeq ($(VOICEBLUE_SMALL_FLASH),y) -# We load ourself to internal SRAM at 2001'2000 -# Check map file when changing TEXT_BASE. -# Everything has fit into 192kB internal SRAM! -TEXT_BASE = 0x20012000 -else -# Running in SDRAM... TEXT_BASE = 0x13FD0000 -endif diff --git a/board/voiceblue/setup.S b/board/voiceblue/setup.S index dcf37b5..78cd2b6 100644 --- a/board/voiceblue/setup.S +++ b/board/voiceblue/setup.S @@ -77,7 +77,7 @@ MUX_CONFIG_VALUES: .word 0x00000000 @ FUNC_MUX_CTRL_3 .word 0x00000000 @ FUNC_MUX_CTRL_4 .word 0x12082480 @ FUNC_MUX_CTRL_5 - .word 0x00000004 @ FUNC_MUX_CTRL_6 + .word 0x0000001c @ FUNC_MUX_CTRL_6 .word 0x00000003 @ FUNC_MUX_CTRL_7 .word 0x10001200 @ FUNC_MUX_CTRL_8 .word 0x01201012 @ FUNC_MUX_CTRL_9 diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h index 7cab31d..8c827af 100644 --- a/include/configs/voiceblue.h +++ b/include/configs/voiceblue.h @@ -26,10 +26,6 @@ #include <configs/omap1510.h> -/* - * High Level Configuration Options - * (easy to change) - */ #define CONFIG_ARM925T 1 /* This is an arm925t CPU */ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP1510 1 /* which is in a 5910 */ @@ -54,10 +50,9 @@ */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE SZ_64M +#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_2 0x0c000000 #define CFG_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */ @@ -67,50 +62,34 @@ #define CFG_FLASH_CFI /* Flash is CFI conformant */ #define CFG_FLASH_CFI_DRIVER /* Use the common driver */ #define CFG_MAX_FLASH_BANKS 1 -#ifdef VOICEBLUE_SMALL_FLASH -#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_2 } -#else -#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1 } -#endif +#define CFG_FLASH_BASE PHYS_FLASH_1 /* FIXME: Does not work on AMD flash */ /* #define CFG_FLASH_USE_BUFFER_WRITE 1 */ /* use buffered writes (20x faster) */ #define CFG_MAX_FLASH_SECT 512 /* max # of sectors on one chip */ #define CFG_MONITOR_BASE PHYS_FLASH_1 -#define CFG_MONITOR_LEN SZ_128K +#define CFG_MONITOR_LEN (256 * 1024) /* * Environment settings */ -#ifdef VOICEBLUE_SMALL_FLASH -#define CFG_ENV_IS_NOWHERE -#define CFG_ENV_SIZE SZ_1K -#else #define CFG_ENV_IS_IN_FLASH #define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_MONITOR_LEN) -#define CFG_ENV_SIZE SZ_8K -#define CFG_ENV_SECT_SIZE SZ_64K +#define CFG_ENV_SIZE (8 * 1024) +#define CFG_ENV_SECT_SIZE (64 * 1024) #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) #define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE #define CONFIG_ENV_OVERWRITE -#endif - /* * Size of malloc() pool and stack */ #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#ifdef VOICEBLUE_SMALL_FLASH -#define CFG_MALLOC_LEN (SZ_64K - CFG_GBL_DATA_SIZE) -#define CONFIG_STACKSIZE SZ_8K -#define PHYS_SDRAM_1_RESERVED 0 -#else -#define CFG_MALLOC_LEN SZ_4M -#define CONFIG_STACKSIZE SZ_1M +#define CFG_MALLOC_LEN (4 * 1024 * 1024) +#define CONFIG_STACKSIZE (1 * 1024 * 1024) #define PHYS_SDRAM_1_RESERVED (CFG_MONITOR_LEN + CFG_MALLOC_LEN + CONFIG_STACKSIZE) -#endif /* * Hardware drivers @@ -118,6 +97,14 @@ #define CONFIG_DRIVER_SMC91111 #define CONFIG_SMC91111_BASE 0x08000300 +#define CONFIG_HARD_I2C +#define CFG_I2C_SPEED 100000 +#define CFG_I2C_SLAVE 1 +#define CONFIG_DRIVER_OMAP1510_I2C + +#define CONFIG_RTC_DS1307 +#define CFG_I2C_RTC_ADDR 0x68 + /* * NS16550 Configuration */ @@ -138,21 +125,18 @@ #include <config_cmd_default.h> #define CONFIG_CMD_BDI -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_IMI +#define CONFIG_CMD_BOOTD +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV #define CONFIG_CMD_FLASH +#define CONFIG_CMD_IMI +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_LOADB #define CONFIG_CMD_MEMORY #define CONFIG_CMD_NET -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_DHCP #define CONFIG_CMD_PING #define CONFIG_CMD_RUN -#if !defined(VOICEBLUE_SMALL_FLASH) - #define CONFIG_CMD_ENV - #define CONFIG_CMD_JFFS2 -#endif - /* * BOOTP options @@ -165,32 +149,20 @@ #define CONFIG_LOOPW -#ifdef VOICEBLUE_SMALL_FLASH -#define CONFIG_BOOTDELAY 0 -#undef CONFIG_BOOTARGS /* the preboot command will set bootargs*/ -#define CFG_AUTOLOAD "n" /* no autoload */ -#define CONFIG_PREBOOT "run setup" -#define CONFIG_EXTRA_ENV_SETTINGS \ - "setup=setenv bootargs console=ttyS0,${baudrate} " \ - "root=/dev/nfs ip=dhcp\0" \ - "update=erase c000000 c03ffff; " \ - "cp.b 10400000 c000000 ${filesize}\0" -#else #define CONFIG_BOOTDELAY 3 -#undef CONFIG_BOOTARGS /* boot command will set bootargs */ -#define CFG_AUTOLOAD "n" /* no autoload */ +#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */ +#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ +#define CFG_AUTOLOAD "n" /* No autoload */ #define CONFIG_BOOTCOMMAND "run nboot" #define CONFIG_PREBOOT "run setup" #define CONFIG_EXTRA_ENV_SETTINGS \ "silent=1\0" \ "ospart=0\0" \ - "swapos=no\0" \ + "bootfile=/boot/uImage\0" \ "setpart=" \ - "if test $swapos = yes; then " \ - "if test $ospart -eq 0; then chpart 4; else chpart 3; fi; "\ - "setenv swapos no; saveenv; " \ - "else " \ - "if test $ospart -eq 0; then chpart 3; else chpart 4; fi; "\ + "if test -n $swapos; then " \ + "setenv swapos; saveenv; " \ + "if test $ospart -eq 0; then setenv ospart 1; else setenv ospart 0; fi; "\ "fi\0" \ "setup=setenv bootargs console=ttyS0,$baudrate " \ "mtdparts=$mtdparts\0" \ @@ -198,16 +170,14 @@ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \ "nfsroot=$rootpath root=/dev/nfs\0" \ "flashargs=run setpart; setenv bootargs $bootargs " \ - "root=/dev/mtdblock$partition ro " \ + "root=mtd:data$ospart ro " \ "rootfstype=jffs2\0" \ "initrdargs=setenv bootargs $bootargs " \ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \ - "fboot=run flashargs; fsload /boot/uImage; bootm\0" \ - "iboot=bootp; run initrdargs; tftp; bootm\0" \ + "fboot=run flashargs; chpart data$ospart; fsload; bootm\0" \ + "mboot=bootp; run initrdargs; tftp; bootm\0" \ "nboot=bootp; run nfsargs; tftp; bootm\0" -#endif -#ifndef VOICEBLUE_SMALL_FLASH #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */ #if 1 /* feel free to disable for development */ @@ -221,19 +191,15 @@ */ #define CONFIG_JFFS2_CMDLINE #define MTDIDS_DEFAULT "nor0=omapflash.0" -#define MTDPARTS_DEFAULT "mtdparts=omapflash.0:128k(uboot),64k(env),64k(r_env),16256k(data1),-(data2)" - -#endif /* VOICEBLUE_SMALL_FLASH */ +#define MTDPARTS_DEFAULT "mtdparts=omapflash.0:256k(u-boot),64k(env),64k(r_env),16192k(data0),-(data1)" /* * Miscellaneous configurable options */ -#ifndef VOICEBLUE_SMALL_FLASH #define CFG_HUSH_PARSER #define CFG_PROMPT_HUSH_PS2 "> " #define CONFIG_AUTO_COMPLETE -#endif #define CFG_LONGHELP /* undef to save memory */ #define CFG_PROMPT "# " /* Monitor Command Prompt */ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */

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[U-Boot-Users] [PATCH] ARM: AT91RM9200 based boards config cleanup
by Ladislav Michl 04 Feb '08

04 Feb '08

Signed-off-by: Ladislav Michl <ladis(a)linux-mips.org> Remove nowhere used struct bd_info_ext, remove trailing whitespaces, fix indentation. diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index a65c5f3..96dbe4b 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -170,8 +170,8 @@ #define CONFIG_HAS_DATAFLASH 1 #define CFG_SPI_WRITE_TOUT (5*CFG_HZ) -#define CFG_MAX_DATAFLASH_BANKS 2 -#define CFG_MAX_DATAFLASH_PAGES 16384 +#define CFG_MAX_DATAFLASH_BANKS 2 +#define CFG_MAX_DATAFLASH_PAGES 16384 #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */ #define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */ @@ -213,35 +213,16 @@ #define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } +#define CFG_BAUDRATE_TABLE { 115200, 19200, 38400, 57600, 9600 } #define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#ifndef __ASSEMBLY__ -/*----------------------------------------------------------------------- - * Board specific extension for bd_info - * - * This structure is embedded in the global bd_info (bd_t) structure - * and can be used by the board specific code (eg board/...) - */ - -struct bd_info_ext { - /* helper variable for board environment handling - * - * env_crc_valid == 0 => uninitialised - * env_crc_valid > 0 => environment crc in flash is valid - * env_crc_valid < 0 => environment crc in flash is invalid - */ - int env_crc_valid; -}; -#endif - #define CFG_HZ 1000 #define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */ - /* AT91C_TC_TIMER_DIV1_CLOCK */ + /* AT91C_TC_TIMER_DIV1_CLOCK */ #define CONFIG_STACKSIZE (32*1024) /* regular stack */ diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h index f32c8c2..d22d350 100644 --- a/include/configs/cmc_pu2.h +++ b/include/configs/cmc_pu2.h @@ -148,7 +148,7 @@ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 -#define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */ +#define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */ #define CFG_MEMTEST_START PHYS_SDRAM #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144 @@ -186,25 +186,6 @@ #define CFG_MAXARGS 32 /* max number of command args */ #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#ifndef __ASSEMBLY__ -/*----------------------------------------------------------------------- - * Board specific extension for bd_info - * - * This structure is embedded in the global bd_info (bd_t) structure - * and can be used by the board specific code (eg board/...) - */ - -struct bd_info_ext { - /* helper variable for board environment handling - * - * env_crc_valid == 0 => uninitialised - * env_crc_valid > 0 => environment crc in flash is valid - * env_crc_valid < 0 => environment crc in flash is invalid - */ - int env_crc_valid; -}; -#endif /* __ASSEMBLY__ */ - #define CFG_HZ 1000 #define CFG_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */ /* AT91C_TC_TIMER_DIV1_CLOCK */ diff --git a/include/configs/csb637.h b/include/configs/csb637.h index 976dae3..f93c3bc 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -170,8 +170,8 @@ #undef CONFIG_HAS_DATAFLASH #define CFG_SPI_WRITE_TOUT (5*CFG_HZ) -#define CFG_MAX_DATAFLASH_BANKS 0 -#define CFG_MAX_DATAFLASH_PAGES 16384 +#define CFG_MAX_DATAFLASH_BANKS 0 +#define CFG_MAX_DATAFLASH_PAGES 16384 #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */ #define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */ @@ -209,35 +209,16 @@ #define CFG_LOAD_ADDR 0x21000000 /* default load address */ -#define CFG_BAUDRATE_TABLE {115200, 57600, 38400, 19200, 9600 } +#define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } #define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#ifndef __ASSEMBLY__ -/*----------------------------------------------------------------------- - * Board specific extension for bd_info - * - * This structure is embedded in the global bd_info (bd_t) structure - * and can be used by the board specific code (eg board/...) - */ - -struct bd_info_ext { - /* helper variable for board environment handling - * - * env_crc_valid == 0 => uninitialised - * env_crc_valid > 0 => environment crc in flash is valid - * env_crc_valid < 0 => environment crc in flash is invalid - */ - int env_crc_valid; -}; -#endif - #define CFG_HZ 1000 #define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */ - /* AT91C_TC_TIMER_DIV1_CLOCK */ + /* AT91C_TC_TIMER_DIV1_CLOCK */ #define CONFIG_STACKSIZE (32*1024) /* regular stack */ diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index ea5a44b..294221f 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -47,7 +47,7 @@ #define CFG_ATMEL_PLL_INIT_BUG 1 #ifndef CONFIG_SKIP_LOWLEVEL_INIT -#define CFG_USE_MAIN_OSCILLATOR 1 +#define CFG_USE_MAIN_OSCILLATOR 1 /* flash */ #define MC_PUIA_VAL 0x00000000 #define MC_PUP_VAL 0x00000000 @@ -216,25 +216,6 @@ #define CFG_DEVICE_DEREGISTER /* needs device_deregister */ #define LITTLEENDIAN 1 /* used by usb_ohci.c */ -#ifndef __ASSEMBLY__ -/*----------------------------------------------------------------------- - * Board specific extension for bd_info - * - * This structure is embedded in the global bd_info (bd_t) structure - * and can be used by the board specific code (eg board/...) - */ - -struct bd_info_ext { - /* helper variable for board environment handling - * - * env_crc_valid == 0 => uninitialised - * env_crc_valid > 0 => environment crc in flash is valid - * env_crc_valid < 0 => environment crc in flash is invalid - */ - int env_crc_valid; -}; -#endif /* __ASSEMBLY__ */ - #define CFG_HZ 1000 #define CFG_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */ /* AT91C_TC_TIMER_DIV1_CLOCK */

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[U-Boot-Users] [PATCH] ARM: Fix at91rm9200dk base address
by Ladislav Michl 04 Feb '08

04 Feb '08

Somewhere during development of U-Boot-1.1.3 CONFIG_BOOTBINFUNC was renamed into CONFIG_INIT_CRITICAL which was 04 Apr 2005 replaced with CONFIG_SKIP_LOWLEVEL_INIT and CONFIG_SKIP_RELOCATE_UBOOT. However CONFIG_SKIP_LOWLEVEL_INIT has oposite meaning to CONFIG_BOOTBINFUNC, so fix configuration to reflect this fact. I'm sending this patch 4th (!) time in hope it produces at least some reaction. Signed-off-by: Ladislav Michl <ladis(a)linux-mips.org> Fix at91rm9200dk base and environment address. diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index a65c5f3..1e42fa5 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -192,11 +192,11 @@ #else #define CFG_ENV_IS_IN_FLASH 1 #ifdef CONFIG_SKIP_LOWLEVEL_INIT -#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */ -#define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */ -#else #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */ #define CFG_ENV_SIZE 0x2000 /* 0x8000 */ +#else +#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */ +#define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #endif /* CFG_ENV_IS_IN_DATAFLASH */ @@ -204,13 +204,13 @@ #define CFG_LOAD_ADDR 0x21000000 /* default load address */ #ifdef CONFIG_SKIP_LOWLEVEL_INIT -#define CFG_BOOT_SIZE 0x00 /* 0 KBytes */ -#define CFG_U_BOOT_BASE PHYS_FLASH_1 -#define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */ -#else #define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */ #define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000) #define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */ +#else +#define CFG_BOOT_SIZE 0x00 /* 0 KBytes */ +#define CFG_U_BOOT_BASE PHYS_FLASH_1 +#define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }

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