November 2007 - U-Boot

[U-Boot-Users] Make sure your up early on Monday
by wlim＠fleshlightcash.com 24 Nov '07

24 Nov '07

World Seeks Energy Solutions, ETGU Investors Pile In Thanksgivings top five points you should be considering: 1. Global and domestic energy problems are rampant and taking their toll on businesses worldwide. 2. Little relief is in site. Corporations everywhere are looking for new ways to meet the energy challenge. 3. EnerBrite (Et g u) provides real solutions to energy costs, reducing them as much as 30%. 4. Florida facilities are already using ETG u's new SensorStat to provide relief from their enormous energy bills. 5. A planned media campaign next week will be drawing both investors and brokers to the table. It's a trading frenzy on ET Gu all week. Volume was going through the roof all week and Wednesday and Friday saw Market Makers pushing the price down and grabbing huge blocks in expectation of next weeks trading. Now is the time to grab e T G U. Act fast Monday morning.

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[U-Boot-Users] [PATCH] sh: Add document for SuperH.
by Nobuhiro Iwamatsu 24 Nov '07

24 Nov '07

From: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> This document is a summary of information concerning SuperH of U-Boot. --- doc/README.sh | 62 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 62 insertions(+), 0 deletions(-) create mode 100644 doc/README.sh diff --git a/doc/README.sh b/doc/README.sh new file mode 100644 index 0000000..0441a7a --- /dev/null +++ b/doc/README.sh @@ -0,0 +1,62 @@ + +U-Boot for Renesas SuperH + Last update 08/10/2007 by Nobuhiro Iwamatsu + +================================================================================ +0. What's this? + This file contains status information for the port of U-Boot to the + Renesas SuperH series of CPUs. + +================================================================================ +1. Overview + SuperH has an original boot loader. However, source code is dirty, and + maintenance is not done. + To improve sharing and the maintenance of the code, Nobuhiro Iwamatsu + started the porting to u-boot in 2007. + +================================================================================ +2. Supported CPUs + + 2.1. Renesas SH7750/SH7750R + 2.2. Renesas SH7722 + +================================================================================ +3. Supported Boards + + 3.1. Hitachi UL MS7750SE01/MS7750RSE01 + Board specific code is in board/ms7750se + To use this board, type "make ms7750se_config". + + 3.2. Hitachi UL MS7722SE01 + Board specific code is in board/ms7722se + To use this board, type "make ms7722se_config". + + ** README ** + In SuperH, S-record and binary of made u-boot work on the memory. + When u-boot is written in the flash, it is necessary to change the + address by using 'objcopy'. + ex) shX-linux-objcopy -Ibinary -Osrec u-boot.bin u-boot.flash.srec + +================================================================================ +4. Compiler + You can use the following of u-boot to compile. + - SuperH Linux Open site + http://www.superh-linux.org/ + - KPIT GNU tools + http://www.kpitgnutools.com/ + +================================================================================ +5. Future + I plan to support the following CPUs and boards. + 5.1. CPUs + - SH7710/SH7712 (SH3) + - SH7780(SH4) + - SH7785(SH4) + + 5.2. Boards + - Many boards ;-) + +================================================================================ +Copyright (c) 2007 + Nobuhiro Iwamatsu <iwamatsu(a)nigaur.org> + -- 1.5.2.4

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[U-Boot-Users] [PATCH] sh: Add marubun's pcmcia driver
by Nobuhiro Iwamatsu 24 Nov '07

24 Nov '07

From: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Marubun pcmcia is a chip for PCMCIA used with SuperH. Of course, this can be used even by other architectures. When use this driver, came to be able to use CompactFlash and Ethernet. --- doc/README.marubun-pcmcia | 65 ++++++++++++++++++++++++++ drivers/Makefile | 1 + drivers/marubun_pcmcia.c | 113 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 179 insertions(+), 0 deletions(-) create mode 100644 doc/README.marubun-pcmcia create mode 100644 drivers/marubun_pcmcia.c diff --git a/doc/README.marubun-pcmcia b/doc/README.marubun-pcmcia new file mode 100644 index 0000000..73c9f7f --- /dev/null +++ b/doc/README.marubun-pcmcia @@ -0,0 +1,65 @@ + +U-Boot MARUBUN MR-SHPC-01 PCMCIA controller driver + Last update 21/11/2007 by Nobuhiro Iwamatsu + +======================================================================================== + +0. What's this? + This driver supports MARUBUN MR-SHPC-01. + url: http://www.marubun.co.jp/product/semicon/devices/qgc18e0000002n2z.html + (Sorry Japanese only.) + + This chip is used with SuperH well, and adopted by the + reference board. + ex. * MS7750SE01 + * MS7722SE01 + * other + + This chip doesn't support CardBus. + +1. base source code + The code is based on sources from the Linux kernel + ( arch/sh/kernel/cf-enabler.c ). + +2. How to use + The options you have to specify in the config file are (with the + value for my board as an example): + + * CONFIG_MARUBUN_PCCARD + If you want to use this device driver, should define CONFIG_MARUBUN_PCCARD. + ex. #define CONFIG_MARUBUN_PCCARD + + * CONFIG_PCMCIA_SLOT_A + Most devices have only one slot. You should define CONFIG_PCMCIA_SLOT_A . + ex. #define CONFIG_PCMCIA_SLOT_A 1 + + * CFG_MARUBUN_MRSHPC + This is MR-SHPC-01 PCMCIA controler base address. + You should do the setting matched to your environment. + ex. #define CFG_MARUBUN_MRSHPC 0xb03fffe0 + ( for MS7722SE01 environment ) + + * CFG_MARUBUN_MW1 + This is MR-SHPC-01 memory window base address. + You should do the setting matched to your environment. + ex. #define CFG_MARUBUN_MW1 0xb0400000 + ( for MS7722SE01 environment ) + + * CFG_MARUBUN_MW1 + This is MR-SHPC-01 attribute window base address. + You should do the setting matched to your environment. + ex. #define CFG_MARUBUN_MW2 0xb0500000 + ( for MS7722SE01 environment ) + + * CFG_MARUBUN_MW1 + This is MR-SHPC-01 I/O window base address. + You should do the setting matched to your environment. + ex. #define CFG_MARUBUN_IO 0xb0600000 + ( for MS7722SE01 environment ) + +3. Other + * Check Compact Flash only. + * Maybe, NE2000 compatible NIC is sure to move. + +Copyright (c) 2007 + Nobuhiro Iwamatsu <iwamatsu(a)nigaur.org> diff --git a/drivers/Makefile b/drivers/Makefile index e23b011..bd4349e 100755 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -125,6 +125,7 @@ COBJS-y += ti_pci1410a.o COBJS-y += tqm8xx_pcmcia.o COBJS-y += tsi108_pci.o COBJS-y += w83c553f.o +COBJS-y += marubun_pcmcia.o # # USB Drivers diff --git a/drivers/marubun_pcmcia.c b/drivers/marubun_pcmcia.c new file mode 100644 index 0000000..89b2015 --- /dev/null +++ b/drivers/marubun_pcmcia.c @@ -0,0 +1,113 @@ +/* + * Marubun MR-SHPC-01 PCMCIA controller device driver + * + * (c) 2007 Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <config.h> +#include <pcmcia.h> +#include <asm/io.h> + +#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) +#define CONFIG_PCMCIA +#endif + +#if (CONFIG_COMMANDS & CFG_CMD_IDE) +#define CONFIG_PCMCIA +#endif + +#if defined(CONFIG_PCMCIA) \ + && (defined(CONFIG_MARUBUN_PCCARD)) + +/* MR-SHPC-01 register */ +#define MRSHPC_MODE (CFG_MARUBUN_MRSHPC + 4) +#define MRSHPC_OPTION (CFG_MARUBUN_MRSHPC + 6) +#define MRSHPC_CSR (CFG_MARUBUN_MRSHPC + 8) +#define MRSHPC_ISR (CFG_MARUBUN_MRSHPC + 10) +#define MRSHPC_ICR (CFG_MARUBUN_MRSHPC + 12) +#define MRSHPC_CPWCR (CFG_MARUBUN_MRSHPC + 14) +#define MRSHPC_MW0CR1 (CFG_MARUBUN_MRSHPC + 16) +#define MRSHPC_MW1CR1 (CFG_MARUBUN_MRSHPC + 18) +#define MRSHPC_IOWCR1 (CFG_MARUBUN_MRSHPC + 20) +#define MRSHPC_MW0CR2 (CFG_MARUBUN_MRSHPC + 22) +#define MRSHPC_MW1CR2 (CFG_MARUBUN_MRSHPC + 24) +#define MRSHPC_IOWCR2 (CFG_MARUBUN_MRSHPC + 26) +#define MRSHPC_CDCR (CFG_MARUBUN_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (CFG_MARUBUN_MRSHPC + 30) + +int pcmcia_on (void) +{ + printf("Enable PCMCIA " PCMCIA_SLOT_MSG "\n"); + + /* Init */ + outw( 0x0000 , MRSHPC_MODE ); + + if ((inw(MRSHPC_CSR) & 0x000c) == 0){ /* if card detect is true */ + if ((inw(MRSHPC_CSR) & 0x0080) == 0){ + outw(0x0674 ,MRSHPC_CPWCR); /* Card Vcc is 3.3v? */ + }else{ + outw(0x0678 ,MRSHPC_CPWCR); /* Card Vcc is 5V */ + } + udelay( 100000 ); /* wait for power on */ + }else{ + return 1; + } + /* + * PC-Card window open + * flag == COMMON/ATTRIBUTE/IO + */ + /* common window open */ + outw(0x8a84,MRSHPC_MW0CR1); /* window 0xb8400000 */ + if ((inw(MRSHPC_CSR) & 0x4000) != 0) + outw(0x0b00,MRSHPC_MW0CR2); /* common mode & bus width 16bit SWAP = 1 */ + else + outw(0x0300,MRSHPC_MW0CR2); /* common mode & bus width 16bit SWAP = 0 */ + + /* attribute window open */ + outw(0x8a85,MRSHPC_MW1CR1); /* window 0xb8500000 */ + if ((inw(MRSHPC_CSR) & 0x4000) != 0) + outw(0x0a00,MRSHPC_MW1CR2); /* attribute mode & bus width 16bit SWAP = 1 */ + else + outw(0x0200,MRSHPC_MW1CR2); /* attribute mode & bus width 16bit SWAP = 0 */ + + /* I/O window open */ + outw(0x8a86,MRSHPC_IOWCR1); /* I/O window 0xb8600000 */ + outw(0x0008,MRSHPC_CDCR); /* I/O card mode */ + if ((inw(MRSHPC_CSR) & 0x4000) != 0) + outw(0x0a00,MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1 */ + else + outw(0x0200,MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0 */ + + outw(0x0000,MRSHPC_ISR); + outw(0x2000,MRSHPC_ICR); + outb(0x00,(CFG_MARUBUN_MW2 + 0x206)); + outb(0x42,(CFG_MARUBUN_MW2 + 0x200)); + + return 0; +} + +int pcmcia_off (void) +{ + printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n"); + + return 0; +} + +#endif /* CONFIG_MARUBUN_PCCARD */ -- 1.5.2.4

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[U-Boot-Users] [PATCH] sh: Update SuperH SCIF driver
by Nobuhiro Iwamatsu 24 Nov '07

24 Nov '07

From: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> - Changed volatile unsigned to vu_. - Changed Makefile for kconfig. --- drivers/Makefile | 1 + drivers/serial_sh.c | 30 +++++++++++++++--------------- 2 files changed, 16 insertions(+), 15 deletions(-) diff --git a/drivers/Makefile b/drivers/Makefile index 480b358..e23b011 100755 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -65,6 +65,7 @@ COBJS-y += sed156x.o COBJS-y += serial.o COBJS-y += serial_max3100.o COBJS-y += serial_xuartlite.o +COBJS-y += serial_sh.o COBJS-y += sm501.o COBJS-y += smiLynxEM.o COBJS-y += usbtty.o diff --git a/drivers/serial_sh.c b/drivers/serial_sh.c index fca92fd..7818632 100644 --- a/drivers/serial_sh.c +++ b/drivers/serial_sh.c @@ -30,24 +30,24 @@ #error "Default SCIF doesn't set....." #endif -#define SCSMR (volatile unsigned short *)(SCIF_BASE + 0x0) -#define SCBRR (volatile unsigned char *)(SCIF_BASE + 0x4) -#define SCSCR (volatile unsigned short *)(SCIF_BASE + 0x8) -#define SCFTDR (volatile unsigned char *)(SCIF_BASE + 0xC) -#define SCFSR (volatile unsigned short *)(SCIF_BASE + 0x10) -#define SCFRDR (volatile unsigned char *)(SCIF_BASE + 0x14) -#define SCFCR (volatile unsigned short *)(SCIF_BASE + 0x18) -#define SCFDR (volatile unsigned short *)(SCIF_BASE + 0x1C) +#define SCSMR (vu_short *)(SCIF_BASE + 0x0) +#define SCBRR (vu_char *)(SCIF_BASE + 0x4) +#define SCSCR (vu_short *)(SCIF_BASE + 0x8) +#define SCFTDR (vu_char *)(SCIF_BASE + 0xC) +#define SCFSR (vu_short *)(SCIF_BASE + 0x10) +#define SCFRDR (vu_char *)(SCIF_BASE + 0x14) +#define SCFCR (vu_short *)(SCIF_BASE + 0x18) +#define SCFDR (vu_short *)(SCIF_BASE + 0x1C) #if defined(CONFIG_SH4A) -#define SCRFDR (volatile unsigned short *)(SCIF_BASE + 0x20) -#define SCSPTR (volatile unsigned short *)(SCIF_BASE + 0x24) -#define SCLSR (volatile unsigned short *)(SCIF_BASE + 0x28) -#define SCRER (volatile unsigned short *)(SCIF_BASE + 0x2C) +#define SCRFDR (vu_short *)(SCIF_BASE + 0x20) +#define SCSPTR (vu_short *)(SCIF_BASE + 0x24) +#define SCLSR (vu_short *)(SCIF_BASE + 0x28) +#define SCRER (vu_short *)(SCIF_BASE + 0x2C) #elif defined (CONFIG_SH4) -#define SCSPTR (volatile unsigned short *)(SCIF_BASE + 0x20) -#define SCLSR (volatile unsigned short *)(SCIF_BASE + 0x24) +#define SCSPTR (vu_short *)(SCIF_BASE + 0x20) +#define SCLSR (vu_short *)(SCIF_BASE + 0x24) #elif defined (CONFIG_SH3) -#define SCLSR (volatile unsigned short *)(SCIF_BASE + 0x24) +#define SCLSR (vu_short *)(SCIF_BASE + 0x24) #endif #define SCR_RE (1 << 4) -- 1.5.2.4

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[U-Boot-Users] [PATCH] sh: Add support command of ide with sh
by Nobuhiro Iwamatsu 24 Nov '07

24 Nov '07

From: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- common/cmd_ide.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/common/cmd_ide.c b/common/cmd_ide.c index bb064ea..456640a 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -892,7 +892,7 @@ input_swap_data(int dev, ulong *sect_buf, int words) #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */ -#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) +#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH) static void output_data(int dev, ulong *sect_buf, int words) { @@ -944,7 +944,7 @@ output_data(int dev, ulong *sect_buf, int words) } #endif /* __PPC__ */ -#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) +#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH) static void input_data(int dev, ulong *sect_buf, int words) { -- 1.5.3.5

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[U-Boot-Users] [PATCH] sh: Update MS7750SE01 platform
by Nobuhiro Iwamatsu 24 Nov '07

24 Nov '07

From: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Update MS7750SE01 platform. - Add support type-R mode - Add support sh7751 Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- board/ms7750se/lowlevel_init.S | 63 +++++++++++++++++++------------- board/ms7750se/ms7750se.c | 2 +- include/configs/ms7750se.h | 79 ++++++++++++++++++++++++++++------------ 3 files changed, 94 insertions(+), 50 deletions(-) diff --git a/board/ms7750se/lowlevel_init.S b/board/ms7750se/lowlevel_init.S index 056c691..360c9fa 100644 --- a/board/ms7750se/lowlevel_init.S +++ b/board/ms7750se/lowlevel_init.S @@ -1,7 +1,28 @@ /* - modified from SH-IPL+g - Renesaso SuperH Solution Enginge MS775x BSC setting - Coyright (c) 2007 Nobuhiro Iwamatsu + modified from SH-IPL+g + Renesaso SuperH / Solution Enginge MS775xSE01 BSC setting. + + Support CPU : SH7750/SH7750S/SH7750R/SH7751/SH7751R + + Coyright (c) 2007 Nobuhiro Iwamatsu <iwmatsu(a)nigauri.org> + + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA */ #include <config.h> @@ -9,38 +30,34 @@ #include <asm/processor.h> -#ifdef CONFIG_CPU_SUBTYPE_SH7751 +#ifdef CONFIG_CPU_SH7751 #define BCR2_D_VALUE 0x2FFC /* Area 1-6 width: 32/32/32/32/32/16 */ #define WCR1_D_VALUE 0x02770771 /* DMA:0 A6:2 A3:0 A0:1 Others:15 */ -#ifdef CONFIG_MRSHPC +#ifdef CONFIG_MARUBUN_PCCARD #define WCR2_D_VALUE 0xFFFE4FE7 /* A6:15 A6B:7 A5:15 A5B:7 A4:15 A3:2 A2:15 A1:15 A0:6 A0B:7 */ -#else /* CONFIG_MRSHPC*/ +#else /* CONFIG_MARUBUN_PCCARD */ #define WCR2_D_VALUE 0x7FFE4FE7 /* A6:3 A6B:7 A5:15 A5B:7 A4:15 A3:2 A2:15 A1:15 A0:6 A0B:7 */ -#endif /* CONFIG_MRSHPC */ +#endif /* CONFIG_MARUBUN_PCCARD */ #define WCR3_D_VALUE 0x01777771 /* A6: 0-1 A5: 1-3 A4: 1-3 A3: 1-3 A2: 1-3 A1: 1-3 A0: 0-1 */ -#define LED_ADDRESS 0xBA000000 /* Address of LED register */ #define RTCOR_D_VALUE 0xA50D /* Write code A5, data 0D (~15us?) */ #define SDMR3_ADDRESS 0xFF940088 /* SDMR3 address on 32-bit bus */ #define MCR_D1_VALUE 0x100901B4 /* SDRAM 32-bit, CAS/RAS Refresh, ... */ #define MCR_D2_VALUE 0x500901B4 /* Same w/MRSET now 1 (mode reg cmd) */ -#define SWITCH_ADDR 0xB9000000 /* Address of DIP switches */ -#else /* CONFIG_CPU_SUBTYPE_SH7751 */ +#else /* CONFIG_CPU_SH7751 */ #define BCR2_D_VALUE 0x2E3C /* Area 1-6 width: 32/32/64/16/32/16 */ #define WCR1_D_VALUE 0x02720777 /* DMA:0 A6:2 A4:2 A3:0 Others:15 */ #define WCR2_D_VALUE 0xFFFE4FFF /* A6:15 A6B:7 A5:15 A5B:7 A4:15 A3:2 A2:15 A1:15 A0:15 A0B:7 */ #define WCR3_D_VALUE 0x01717771 /* A6: 0-1 A5: 1-3 A4: 0-1 A3: 1-3 A2: 1-3 A1: 1-3 A0: 0-1 */ -#define LED_ADDRESS 0xB0C00000 /* Address of LED register */ #define RTCOR_D_VALUE 0xA510 /* Write code A5, data 10 (~15us?) */ #define SDMR3_ADDRESS 0xFF940110 /* SDMR3 address on 64-bit bus */ #define MCR_D1_VALUE 0x8801001C /* SDRAM 64-bit, CAS/RAS Refresh, ... */ #define MCR_D2_VALUE 0xC801001C /* Same w/MRSET now 1 (mode reg cmd) */ -#define SWITCH_ADDR 0xb0800000 /* Address of DIP switches */ -#endif /* CONFIG_CPU_SUBTYPE_SH7751 */ +#endif /* CONFIG_CPU_SH7751 */ .global lowlevel_init .text @@ -48,8 +65,8 @@ lowlevel_init: - mov.l L_CCR, r1 ! CCR Address - mov.l L_CCR_DISABLE, r0 ! CCR Data + mov.l CCR_A, r1 ! CCR Address + mov.l CCR_D_DISABLE, r0 ! CCR Data mov.l r0, @r1 init_bsc: @@ -77,11 +94,6 @@ init_bsc: mov.l WCR3_D,r0 /* WCR3 Data */ mov.l r0,@r1 - mov.l LED_A,r1 /* LED Address */ - mov #0xff,r0 /* LED ALL 'on' */ - shll8 r0 - mov.w r0,@r1 - mov.l MCR_A,r1 /* MCR Address */ mov.l MCR_D1,r0 /* MCR Data1 */ mov.l r0,@r1 @@ -129,19 +141,19 @@ init_bsc: .align 2 -L_CCR: .long CCR -L_CCR_DISABLE: .long 0x0808 +CCR_A: .long CCR +CCR_D_DISABLE: .long 0x0808 FRQCR_A: .long FRQCR FRQCR_D: -#ifdef CONFIG_CPU_SUBTYPE_SH_R +#ifdef CONFIG_CPU_TYPE_R .long 0x00000e1a /* 12:3:3 */ -#else +#else /* CONFIG_CPU_TYPE_R */ #ifdef CONFIG_GOOD_SESH4 .long 0x00000e13 /* 6:2:1 */ #else .long 0x00000e23 /* 6:1:1 */ #endif -#endif /* CONFIG_CPU_SUBTYPE_SH_R */ +#endif /* CONFIG_CPU_TYPE_R */ BCR1_A: .long BCR1 BCR1_D: .long 0x00000008 /* Area 3 SDRAM */ @@ -153,7 +165,6 @@ WCR2_A: .long WCR2 WCR2_D: .long WCR2_D_VALUE /* Per-area access and burst wait states */ WCR3_A: .long WCR3 WCR3_D: .long WCR3_D_VALUE /* Address setup and data hold cycles */ -LED_A: .long LED_ADDRESS /* LED Address */ RTCSR_A: .long RTCSR RTCSR_D: .long 0xA518 /* RTCSR Write Code A5h Data 18h */ RTCNT_A: .long RTCNT diff --git a/board/ms7750se/ms7750se.c b/board/ms7750se/ms7750se.c index 4b4697b..1ae9dd1 100644 --- a/board/ms7750se/ms7750se.c +++ b/board/ms7750se/ms7750se.c @@ -26,7 +26,7 @@ int checkboard(void) { - puts("BOARD: SH7750 Solution Engine\n"); + puts("BOARD: SH7750/SH7750S/SH7750R Solution Engine\n"); return 0; } diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 0467a5e..7925f20 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -1,50 +1,89 @@ -#ifndef __CONFIG_H -#define __CONFIG_H +/* + * Configuation settings for the Hitachi Solution Engine 7750 + * + * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MS7750SE_H +#define __MS7750SE_H #undef DEBUG - #define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7750 1 +/* #define CONFIG_CPU_SH7751 1 */ +/* #define CONFIG_CPU_TYPE_R 1 */ #define CONFIG_MS7750SE 1 #define __LITTLE_ENDIAN__ 1 -//#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_NET |CFG_CMD_PING) -#define CONFIG_COMMANDS CONFIG_CMD_DFL & ~CFG_CMD_NET +/* + * Command line configuration. + */ +//#include <config_cmd_default.h> + +#define CONFIG_CMD_DFL +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_ENV #define CFG_SCIF_CONSOLE 1 #define CONFIG_BAUDRATE 38400 #define CONFIG_CONS_SCIF1 1 #define BOARD_LATE_INIT 1 -#include <cmd_confdefs.h> - #define CONFIG_BOOTDELAY -1 -#define CONFIG_BOOTARGS "console=ttySC0,115200" +#define CONFIG_BOOTARGS "console=ttySC0,38400" #define CONFIG_ENV_OVERWRITE 1 +/* SDRAM */ #define CFG_SDRAM_BASE (0x8C000000) #define CFG_SDRAM_SIZE (64 * 1024 * 1024) #define CFG_LONGHELP -#define CFG_PROMPT "=> " -#define CFG_CBSIZE 256 -#define CFG_PBSIZE 256 +#define CFG_PROMPT "=> " +#define CFG_CBSIZE 256 +#define CFG_PBSIZE 256 #define CFG_MAXARGS 16 -#define CFG_BARGSIZE 512 -#define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } /* List of legal baudrate settings for this board */ +#define CFG_BARGSIZE 512 +/* List of legal baudrate settings for this board */ +#define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } #define CFG_MEMTEST_START (CFG_SDRAM_BASE) #define CFG_MEMTEST_END (TEXT_BASE - 0x100000) +/* NOR Flash */ +/* #define CFG_FLASH_BASE (0xA1000000)*/ +#define CFG_FLASH_BASE (0xA0000000) +#define CFG_MAX_FLASH_BANKS (1) /* Max number of + * Flash memory banks + */ +#define CFG_MAX_FLASH_SECT 142 +#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 4 * 1024 * 1024) #define CFG_MONITOR_BASE (CFG_FLASH_BASE) /* Address of u-boot image in Flash */ -#define CFG_MONITOR_LEN (128 * 1024) +#define CFG_MONITOR_LEN (128 * 1024) #define CFG_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ #define CFG_GBL_DATA_SIZE (256) /* size in bytes reserved for initial data */ -#define CFG_BOOTMAPSZ (8 * 1024 * 1024) +#define CFG_BOOTMAPSZ (8 * 1024 * 1024) #define CFG_RX_ETH_BUFFER (8) #define CFG_FLASH_CFI @@ -53,12 +92,6 @@ #undef CFG_FLASH_QUIET_TEST #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -#define CFG_FLASH_BASE (0xA1000000) -#define CFG_MAX_FLASH_BANKS (1) /* Max number of - * Flash memory banks - */ -#define CFG_MAX_FLASH_SECT 142 -#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } #define CFG_ENV_IS_IN_FLASH #define CFG_ENV_SECT_SIZE 0x20000 @@ -67,9 +100,9 @@ #define CFG_FLASH_ERASE_TOUT 120000 #define CFG_FLASH_WRITE_TOUT 500 +/* Board Clock */ #define CONFIG_SYS_CLK_FREQ 33333333 #define TMU_CLK_DIVIDER 4 #define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) -#define CFG_PLL_SETTLING_TIME 100 /* in us */ -#endif /* __CONFIG_H */ +#endif /* __MS7750SE_H */ -- 1.5.3.5

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[U-Boot-Users] [PATCH] sh: Remove comment out code from include/asm-sh/cpu_sh4.h
by Nobuhiro Iwamatsu 24 Nov '07

24 Nov '07

From: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Remove C++ type comment. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- include/asm-sh/cpu_sh4.h | 7 ------- 1 files changed, 0 insertions(+), 7 deletions(-) diff --git a/include/asm-sh/cpu_sh4.h b/include/asm-sh/cpu_sh4.h index dca61ca..2658039 100644 --- a/include/asm-sh/cpu_sh4.h +++ b/include/asm-sh/cpu_sh4.h @@ -29,18 +29,11 @@ #define CACHE_OC_WAY_SHIFT 14 #define CACHE_OC_NUM_ENTRIES 512 #define CACHE_OC_ENTRY_SHIFT 5 -//#define CACHE_OC_NUM_WAYS 1 #if defined (CONFIG_CPU_SH7750) #include <asm/cpu_sh7750.h> -//#ifdef CONFIG_CPU_TYPE_R -//#define CCR_CACHE_INIT 0x8000090d /* EMODE,ICI,ICE(16k),OCI,P1-wb,OCE(32k) */ -//#else -//#define CCR_CACHE_INIT 0x0000090b -//#endif #elif defined (CONFIG_CPU_SH7722) #include <asm/cpu_sh7722.h> -//#define CCR_CACHE_INIT 0x0000090d #else #error "Unknown SH4 variant" #endif -- 1.5.3.5

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[U-Boot-Users] question of codes in \cpu\74xx_7xx\cache.S
by xiangguo_li＠hotmail.com 24 Nov '07

24 Nov '07

intercepted from \cpu\74xx_7xx\cache.S /* * Enable L1 Instruction cache */ _GLOBAL(icache_enable) mfspr r3, HID0 li r5, HID0_ICFI|HID0_ILOCK andc r3, r3, r5 ori r3, r3, HID0_ICE ori r5, r3, HID0_ICFI mtspr HID0, r5 // this instruction is redundant, mtspr HID0, r3 // or this one? isync blr -lxg

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[U-Boot-Users] [PATCH libfdt] Add spaces around the = in the fdt print format.
by Jerry Van Baren 24 Nov '07

24 Nov '07

Signed-off-by: Gerald Van Baren <vanbaren(a)cideas.com> --- Better coding standards, y'know. This will also be important for the next patch. gvb common/cmd_fdt.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/common/cmd_fdt.c b/common/cmd_fdt.c index 629c9b4..4639126 100644 --- a/common/cmd_fdt.c +++ b/common/cmd_fdt.c @@ -588,7 +588,7 @@ static int fdt_print(const char *pathp, char *prop, int depth) printf("%s %s\n", pathp, prop); return 0; } else if (len > 0) { - printf("%s=", prop); + printf("%s = ", prop); print_data (nodep, len); printf("\n"); return 0; @@ -649,7 +649,7 @@ static int fdt_print(const char *pathp, char *prop, int depth) pathp); } else { if (level <= depth) { - printf("%s%s=", + printf("%s%s = ", &tabs[MAX_LEVEL - level], pathp); print_data (nodep, len); -- 1.5.3.4

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[U-Boot-Users] MPC8548 problem in Boot Sequencer mode
by sivaji 23 Nov '07

23 Nov '07

Hi, We have designed MPC8548 based AMC card. We are using u-boot-1.1.4 and it was up. Now we plan to boot using bootsequencer mode. We are using AT24C64C EEPROM and it was configured as Extended I2C addressing mode. Our flash size is 16MB(0xff000000-ffffffff). Boot code was flashed in the location 0xfff80000. In the eeprom csv file we have configured following registers ALTCBAR, ALTCAR and BPTR. CSV file content : 0, f, 00008, 000e0000 0, f, 00010, 80400000 0, f, 00020, 80fff800 After board is power on uboot was not up in the Boot Sequencer mode. So we plan to debug via BDI, for this we create an empty bdi configuraiton file and load that file in the bdi and we got the bdi prompt. The configurations values in the eeprom are updtaed in the CCSRBAR region. BDI>md 0xff700000 0_ff700000 : 000ff700 00000000 000e0000 00000000 ................ 0_ff700010 : 80400000 00000000 00000000 00000000 .@.............. 0_ff700020 : 80fff800 00000000 00000000 00000000 ................ 0_ff700030 : 00000000 00000000 00000000 00000000 ................ 0_ff700040 : 00000000 00000000 00000000 00000000 ................ 0_ff700050 : 00000000 00000000 00000000 00000000 ................ Output of the info command: BDI>info Target CPU : MPC8548 Rev.2 Target state : halted Debug entry cause : COP halt Current PC : 0xfffffffc Current CR : 0x00000000 Current MSR : 0x00000000 Current LR : 0x00000000 Current CCSRBAR : 0x0_ff700000 We flash the bootcode in the address 0xfff80000. But in the boot sequencer mode boot code is not there. BDI>md 0xfff80000 0_fff80000 : 9fb079e1 0de2dfbb 023a473d dc060849 ..y......:G=...I 0_fff80010 : 21aef9a7 d7c1df77 0c29dfc8 35ba53a6 !......w.)..5.S. 0_fff80020 : 51f9e017 35cf9246 65e07762 7b0c05c3 Q...5..Fe.wb{... 0_fff80030 : ae73030d 56384494 8f9d6b9b 39cc3136 .s..V8D...k.9.16 0_fff80040 : d91adacd 318163d6 7e6bd1ab 778b3798 ....1.c.~k..w.7. 0_fff80050 : 04f4ee7c 3aa90755 e3d3148e 6c4c5bda ...|:..U....lL[. 0_fff80060 : 194a6b46 291bc53d cd644f71 cb651e27 .JkF)..=.dOq.e.' 0_fff80070 : 45fb21e2 c35d3114 e6b90868 7ac8f328 E.!..]1....hz..( I want to know how the boot code was changed in that location or flash was not configured properly. Please give some idea to up the uboot in Boot Sequencer mode. Thanks and Regards Sivaji -- View this message in context: http://www.nabble.com/MPC8548-problem-in-Boot-Sequencer-mode-tf4862279.html… Sent from the Uboot - Users mailing list archive at Nabble.com.

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