November 2007 - U-Boot

[U-Boot-Users] [PATCH] Remove CONFIG options related to OF that we dont use
by Kumar Gala 26 Nov '07

26 Nov '07

The MPC8360E MDS config defined: CONFIG_OF_HAS_BD_T CONFIG_OF_HAS_UBOOT_ENV Which we don't use or ever needed. This seems like copy-paste feature creep. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- include/configs/MPC8360EMDS.h | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index 41f062c..5eb7215 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -348,8 +348,6 @@ #define CONFIG_OF_LIBFDT 1 #undef CONFIG_OF_FLAT_TREE #define CONFIG_OF_BOARD_SETUP 1 -#define CONFIG_OF_HAS_BD_T 1 -#define CONFIG_OF_HAS_UBOOT_ENV 1 #define OF_CPU "PowerPC,8360@0" #define OF_SOC "soc8360@e0000000" -- 1.5.3.4

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Re: [U-Boot-Users] boot up u-boot from RAM
by Nghiem, Tien 26 Nov '07

26 Nov '07

Lei, You have to rebuild your code to put your code in the RAM area (other than the FLASH area). Don't use the address 0x00-0x2fff because its reserved for the exception vectors usually. I have a Lite5200 EVB. I use the address 0x20000 to put my u-boot in RAM and it works. I don't know if it could be done for the mpc8270. Tien -----Original Message----- From: u-boot-users-bounces(a)lists.sourceforge.net [mailto:u-boot-users-bounces@lists.sourceforge.net]On Behalf Of Lei Sun Sent: Thursday, October 26, 2006 4:15 PM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] boot up u-boot from RAM Hi all: I am debugging a costomized board based on mpc8270, due to the design flaw, we can't boot up the system using flash, so I was trying to debug u-boot by loading it into the RAM. I used JTAG debugger to initialize the SDRAM and load the u-boot to 0x0, after reset, the PC is at 0x100. the disassembled code looks correct on that location, however, i can't single step start from 0x100. Is that because 0x100 is the reset vector ? I tried to put some breakpoint at some places not far from start point, but it gave me "unknown halt at 0x00000000" error after "run" command. after that the memory seems corrupted. Too bad I was using a bad debugger(Guardian-SE), I have a evaluation copy of the codewarrior plus USB+TAP from freescale. I tried that on our PQ2FADS-VR SDK. After reset, and CPU halt, I can't see any disassembed code on 0x100 (the uboot is already in the flash, and I assume it should read data from CS0 upon reset). Although the code does execute after hitting "run" button. I wonder why can't I see the disassembed code after reset? Thanks lei ------------------------------------------------------------------------- Using Tomcat but need to do more? Need to support web services, security? Get stuff done quickly with pre-integrated technology to make your job easier Download IBM WebSphere Application Server v.1.0.1 based on Apache Geronimo http://sel.as-us.falkag.net/sel?cmd=lnk&kid=120709&bid=263057&dat=121642 _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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[U-Boot-Users] sequoia: add CONFIG_BOOTP_SUBNETMASK to board config
by Markus Klotzbücher 26 Nov '07

26 Nov '07

sequoia: when using dhcp/bootp the "netmask" environment variable is not set because CONFIG_BOOTP_SUBNETMASK is not defined. But usually this is desireable, so the following patch adds this this option to the board config. Signed-off-by: Markus Klotzbuecher <mk(a)denx.de> Best regards Markus Klotzbuecher -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 600f98c..ebf7fd1 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -314,6 +314,7 @@ #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_SUBNETMASK /*

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[U-Boot-Users] AMCC440SPe & PCI Express
by Patil, Pankaj P. 26 Nov '07

26 Nov '07

Hi, I have been using u-boot-1.1.5 on my custom 440SPe based board. I am able to establish a link on PCIE0. However, I am having trouble accessing outbound Memory on PCIE0. My memory map seetings for Outbound PCIE memory are the default U-boot Settings. I was curious if anybody's tried accessing PCIE Outbound memory with the default settings. I seem to get a bus error when I try to access that region. Thanks Pankaj

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[U-Boot-Users] Fallback kernel
by Marco Stornelli 26 Nov '07

26 Nov '07

Hi, I'm using two Linux kernel a fallback (safe) kernel and a kernel downloaded in flash via ethernet. I'd like that u-boot starts the downloaded kernel, if this kernel fails for more than N times uboot starts the fallback. Is there already something like in uboot or how can I do that? Thanks in advance. Marco

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[U-Boot-Users] issue about IBM power 450 support
by jie han 26 Nov '07

26 Nov '07

Dear All, Does ELDK and U-boot support IBM power 450 cpu development?How can I do it? Best regards, Jie --------------------------------- Never miss a thing. Make Yahoo your homepage.

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[U-Boot-Users] MPC83xx Ethernet bug
by Joakim Tjernlund 25 Nov '07

25 Nov '07

Just tried to move my 83xx based board to latest u-boot and noticed an old problem. u-boot tries to bring up the ethernet at startup, not the first time it is used: U-Boot 1.3.0-rc3-g992742a5-dirty (Nov 19 2007 - 16:45:18) Reset Status: External/Internal Soft, External/Internal Hard CPU: e300c2, MPC8323E, Rev: 10 at 266.664 MHz, CSB: 133 MHz Board: Transmode CU I2C reset sequence. I2C: ready DRAM: DDR RAM: 256 MB FLASH: 128 MB In: serial Out: serial Err: serial Net: read wrong value : mii_id 3,mii_reg 2, base e0102320 read wrong value : mii_id 3,mii_reg 3, base e0102320 UEC: PHY is Generic MII (ffffffff) read wrong value : mii_id 3,mii_reg 1, base e0102320 read wrong value : mii_id 3,mii_reg 5, base e0102320 FSL UEC0: Full Duplex FSL UEC0: Speed 100BT FSL UEC0: Link is up read wrong value : mii_id 4,mii_reg 2, base e0103320 read wrong value : mii_id 4,mii_reg 3, base e0103320 UEC: PHY is Generic MII (ffffffff) read wrong value : mii_id 4,mii_reg 1, base e0103320 read wrong value : mii_id 4,mii_reg 1, base e0103320 read wrong value : mii_id 4,mii_reg 5, base e0103320 FSL UEC1: Full Duplex FSL UEC1: Speed 100BT FSL UEC1: Link is up FSL UEC0, FSL UEC1 read wrong value : mii_id 3,mii_reg 1, base e0102320 =>

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[U-Boot-Users] Passing the OF tree to bootm from board code?
by Joakim Tjernlund 25 Nov '07

25 Nov '07

One upon a time one could compile the flat tree into u-boot and bootm would find it. This feature was removed at some point for no apparent reason. Is this still the case(browsing the code suggests it is)? Could this feature be returned? Jocke

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Re: [U-Boot-Users] question of codes in \cpu\74xx_7xx\cache.S
by xiangguo_li＠hotmail.com 25 Nov '07

25 Nov '07

thank you. you are right. I find the reason in the manual: DCE 2 Data cache enable 0 The data cache is neither accessed nor updated. All pages are accessed as if they were marked cache-inhibited (WIM = x1x). Potential cache accesses from the bus (snoop and cache operations) are ignored. In the disabled state for the L1 caches, the cache tag state bits are ignored and all accesses are propagated to the L2 cache, L3 cache, or bus as cache-inhibited. For those transactions, CI is asserted regardless of address translation.DCE is zero at power-up. 1 The data cache is enabled.Note that HID0[DCFI] must be set at the same time that this bit is set. ******************************************************************************** ------------------------- Most likely neither are redundant. To say for sure, you need to read the User's Manual for the 74xx family where it specifies how to change the HID0 register .................... HTH, gvb

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[U-Boot-Users] cramfs voodoo
by Haavard Skinnemoen 24 Nov '07

24 Nov '07

Does anyone know why the following deep voodoo magic in include/cramfs/cramfs_fs.h is needed? #define CRAMFS_GET_NAMELEN(x) (((u8*)(x))[8] & 0x3f) #define CRAMFS_GET_OFFSET(x) ((CRAMFS_24(((u32*)(x))[2] & 0xffffff) << 2) |\ ((((u32*)(x))[2] & 0xc0000000) >> 30)) #define CRAMFS_SET_NAMELEN(x,y) (((u8*)(x))[8] = (((0x3f & (y))) | \ (0xc0 & ((u8*)(x))[8]))) #define CRAMFS_SET_OFFSET(x,y) (((u32*)(x))[2] = (((y) & 3) << 30) | \ CRAMFS_24((((y) & 0x03ffffff) >> 2)) | \ (((u32)(((u8*)(x))[8] & 0x3f)) << 24)) It looks like a workaround for buggy bitfield handling in the compiler, but newer versions of gcc are not at all happy with it and spews warnings like this: cramfs.c:82: warning: dereferencing type-punned pointer will break strict-aliasing rules which indicates that the generated code is probably wrong. Can we get rid of it somehow? Haavard

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