August 2006 - U-Boot

[U-Boot-Users] [PATCH] Fix/workaround broken dependency handling with make 3.81
by Haavard Skinnemoen 24 Oct '06

24 Oct '06

This patch fixes the following problem: make[1]: *** No rule to make target `hello_world.srec', needed by `all'. The problem has been reported several times before, but so far no patches have been accepted and no one has fixed make. In fact, I can't even find any relevant bug reports against make. This patch takes a slightly different approach than the other patches I've seen on the mailing list, as it lists the targets explicitly before each of the pattern rules for the elf-, srec- and bin-files. The dependencies for each target are correctly specified, so we don't end up depending on the build order (i.e. the ordering of prerequisites for the `all' rule) As an added bonus, this gets rid of some duplication as each architecture, cpu, board, etc. only needs to add stuff to the ELF variable. The SREC and BIN variables are calculated automatically from the ELF variable. Signed-off-by: Haavard Skinnemoen <hskinnemoen(a)atmel.com> --- examples/Makefile | 32 +++++++++++++------------------- 1 files changed, 13 insertions(+), 19 deletions(-) diff --git a/examples/Makefile b/examples/Makefile index a342d75..8814f13 100644 --- a/examples/Makefile +++ b/examples/Makefile @@ -59,51 +59,45 @@ endif include $(TOPDIR)/config.mk -SREC = hello_world.srec -BIN = hello_world.bin hello_world +ELF = hello_world ifeq ($(CPU),mpc8xx) -SREC = test_burst.srec -BIN = test_burst.bin test_burst +ELF = test_burst endif ifeq ($(ARCH),i386) -SREC += 82559_eeprom.srec -BIN += 82559_eeprom.bin 82559_eeprom +ELF += 82559_eeprom endif ifeq ($(ARCH),ppc) -SREC += sched.srec -BIN += sched.bin sched +ELF += sched endif ifeq ($(ARCH),blackfin) -SREC += smc91111_eeprom.srec -BIN += smc91111_eeprom.bin smc91111_eeprom +ELF += smc91111 endif # The following example is pretty 8xx specific... ifeq ($(CPU),mpc8xx) -SREC += timer.srec -BIN += timer.bin timer +ELF += timer endif # The following example is 8260 specific... ifeq ($(CPU),mpc8260) -SREC += mem_to_mem_idma2intr.srec -BIN += mem_to_mem_idma2intr.bin mem_to_mem_idma2intr +ELF += mem_to_mem_idma2intr endif # Utility for resetting i82559 EEPROM ifeq ($(BOARD),oxc) -SREC += eepro100_eeprom.srec -BIN += eepro100_eeprom.bin eepro100_eeprom +ELF += eepro100_eeprom endif ifeq ($(BIG_ENDIAN),y) EX_LDFLAGS += -EB endif +SREC = $(addsuffix .srec,$(ELF)) +BIN = $(addsuffix .bin,$(ELF)) OBJS = $(SREC:.srec=.o) LIB = libstubs.a @@ -128,14 +122,14 @@ ######################################## $(LIB): .depend $(LIBOBJS) $(AR) crv $@ $(LIBOBJS) -%: %.o $(LIB) +$(ELF): %: %.o $(LIB) $(LD) -g $(EX_LDFLAGS) -Ttext $(LOAD_ADDR) \ -o $@ -e $(<:.o=) $< $(LIB) \ -L$(gcclibdir) -lgcc -%.srec: % +$(SREC): %.srec: % $(OBJCOPY) -O srec $< $@ 2>/dev/null -%.bin: % +$(BIN): %.bin: % $(OBJCOPY) -O binary $< $@ 2>/dev/null ######################################################################### -- 1.4.1.1

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[U-Boot-Users] [PATCH] NAND feature update
by Ladislav Michl 23 Oct '06

23 Oct '06

Wolfgang, this patch implements functionaly I found useful to have and hopefuly others can benefit from it too. Please drop all my previous NAND related, not yet applied patches. Once (if) applied I will rediff the rest. Now you can do: # mtdparts [snip] device nand0 <omapnand.0>, # parts = 5 #: name size offset mask_flags 0: kernel0 0x00400000 0x00000000 0 1: rootfs0 0x02800000 0x00400000 0 2: kernel1 0x00400000 0x02c00000 0 3: rootfs1 0x02800000 0x03000000 0 4: data 0x02800000 0x05800000 0 # nand write 10400000 kernel1 100000 NAND write: device 0 offset 0x2c00000, size 0x100000 1048576 bytes written: OK # nboot kernel0 Loading from NAND 128MiB 3,3V 8-bit, offset 0x0 ... # nand era kernel1 NAND erase: device 0 offset 0x2c00000, size 0x400000 OK or # nand era nand0,2 NAND erase: device 0 offset 0x2c00000, size 0x400000 OK # chpart rootfs1 partition changed to nand0,3 # fsload /boot/uImage ### JFFS2 loading '/boot/uImage' to 0x10400000 ... etc... Best regards, ladis Signed-off-by: Ladislav Michl <ladis(a)linux-mips.org> CHANGELOG * Patch by Ladislav Michl, 18 Aug 2006: chpart, nboot and NAND subsystem related commands now accept also partition name to specify offset. diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c index 201c3c1..90b2930 100644 --- a/common/cmd_jffs2.c +++ b/common/cmd_jffs2.c @@ -1300,7 +1303,7 @@ static void list_partitions(void) * Given partition identifier in form of <dev_type><dev_num>,<part_num> find * corresponding device and verify partition number. * - * @param id string describing device and partition + * @param id string describing device and partition or partition name * @param dev pointer to the requested device (output) * @param part_num verified partition number (output) * @param part pointer to requested partition (output) @@ -1309,11 +1312,23 @@ static void list_partitions(void) int find_dev_and_part(const char *id, struct mtd_device **dev, u8 *part_num, struct part_info **part) { + struct list_head *dentry, *pentry; u8 type, dnum, pnum; const char *p; DEBUGF("--- find_dev_and_part ---\nid = %s\n", id); + list_for_each(dentry, &devices) { + *part_num = 0; + *dev = list_entry(dentry, struct mtd_device, link); + list_for_each(pentry, &(*dev)->parts) { + *part = list_entry(pentry, struct part_info, link); + if (strcmp((*part)->name, id) == 0) + return 0; + (*part_num)++; + } + } + p = id; *dev = NULL; *part = NULL; diff --git a/common/cmd_nand.c b/common/cmd_nand.c index 21adb1b..2c9268c 100644 --- a/common/cmd_nand.c +++ b/common/cmd_nand.c @@ -36,6 +36,15 @@ #endif #include <jffs2/jffs2.h> #include <nand.h> +#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE) + +/* parition handling routines */ +int mtdparts_init(void); +int id_parse(const char *id, const char **ret_id, u8 *dev_type, u8 *dev_num); +int find_dev_and_part(const char *id, struct mtd_device **dev, + u8 *part_num, struct part_info **part); +#endif + extern nand_info_t nand_info[]; /* info for NAND chips */ static int nand_dump_oob(nand_info_t *nand, ulong off) @@ -83,50 +92,66 @@ static int nand_dump(nand_info_t *nand, /* ------------------------------------------------------------------------- */ -static void -arg_off_size(int argc, char *argv[], ulong *off, ulong *size, ulong totsize) +static int str2long(char *p, ulong *num) { - *off = 0; - *size = 0; - -#if defined(CONFIG_JFFS2_NAND) && defined(CFG_JFFS_CUSTOM_PART) - if (argc >= 1 && strcmp(argv[0], "partition") == 0) { - int part_num; - struct part_info *part; - const char *partstr; + char *endptr; - if (argc >= 2) - partstr = argv[1]; - else - partstr = getenv("partition"); - - if (partstr) - part_num = (int)simple_strtoul(partstr, NULL, 10); - else - part_num = 0; + *num = simple_strtoul(p, &endptr, 16); + return (*p != '\0' && *endptr == '\0') ? 1 : 0; +} - part = jffs2_part_info(part_num); - if (part == NULL) { - printf("\nInvalid partition %d\n", part_num); - return; +static int +arg_off_size(int argc, char *argv[], nand_info_t *nand, ulong *off, ulong *size) +{ + int idx = nand_curr_device; +#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE) + struct mtd_device *dev; + struct part_info *part; + u8 pnum; + + if (argc >= 1 && !(str2long(argv[0], off))) { + if ((mtdparts_init() == 0) && + (find_dev_and_part(argv[0], &dev, &pnum, &part) == 0)) { + if (dev->id->type != MTD_DEV_TYPE_NAND) { + puts("not a NAND device\n"); + return 1; + } + *off = part->offset; + if (argc >= 2) { + if (!(str2long(argv[1], size))) { + printf("'%s' is not a number\n", argv[1]); + return 1; + } + if (*size > part->size) + *size = part->size; + } else + *size = part->size; + idx = dev->id->num; + *nand = nand_info[idx]; + goto out; } - *size = part->size; - *off = (ulong)part->offset; - } else + } #endif - { - if (argc >= 1) - *off = (ulong)simple_strtoul(argv[0], NULL, 16); - else - *off = 0; - if (argc >= 2) - *size = (ulong)simple_strtoul(argv[1], NULL, 16); - else - *size = totsize - *off; + if (argc >= 1) { + if (!(str2long(argv[0], off))) { + printf("'%s' is not a number\n", argv[0]); + return 1; + } + } else + *off = 0; - } + if (argc >= 2) { + if (!(str2long(argv[1], size))) { + printf("'%s' is not a number\n", argv[1]); + return 1; + } + } else + *size = nand->size - *off; +out: + printf("device %d offset 0x%x, size 0x%x ", idx, *off, *size); + return 0; } int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) @@ -176,7 +201,7 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, return 0; } - if (strcmp(cmd, "bad") != 0 && strcmp(cmd, "erase") != 0 && + if (strcmp(cmd, "bad") != 0 && strncmp(cmd, "erase", 3) != 0 && strncmp(cmd, "dump", 4) != 0 && strncmp(cmd, "read", 4) != 0 && strncmp(cmd, "write", 5) != 0) goto usage; @@ -197,13 +222,23 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, return 0; } - if (strcmp(cmd, "erase") == 0) { - arg_off_size(argc - 2, argv + 2, &off, &size, nand->size); - if (off == 0 && size == 0) + /* + * Syntax is: + * 0 1 2 3 4 + * nand erase [clean] [off size] + */ + if (strncmp(cmd, "erase", 3) == 0) { + /* "clean" at index 2 means request to erase OOB */ + int clean = (argc > 2 && strcmp(argv[2], "clean") == 0) ? 1 : 0; + int o = clean ? 3 : 2; + puts("\nNAND erase: "); + /* skip first two or three arguments, look for offset and size */ + if (arg_off_size(argc - o, argv + o, nand, &off, &size) != 0) return 1; - - printf("\nNAND erase: device %d offset 0x%x, size 0x%x ", - nand_curr_device, off, size); + if (clean) { /* TODO */ + puts("'clean' not implemented yet\n"); + return 1; + } ret = nand_erase(nand, off, size); printf("%s\n", ret ? "ERROR" : "OK"); @@ -241,13 +276,10 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, */ addr = (ulong)simple_strtoul(argv[2], NULL, 16); - arg_off_size(argc - 3, argv + 3, &off, &size, nand->size); - if (off == 0 && size == 0) - return 1; - i = strncmp(cmd, "read", 4) == 0; /* 1 = read, 0 = write */ - printf("\nNAND %s: device %d offset %u, size %u ... ", - i ? "read" : "write", nand_curr_device, off, size); + printf("\nNAND %s: ", i ? "read" : "write"); + if (arg_off_size(argc - 3, argv + 3, nand, &off, &size) != 0) + return 1; if (i) ret = nand_read(nand, off, &size, (u_char *)addr); @@ -268,8 +300,8 @@ U_BOOT_CMD(nand, 5, 1, do_nand, "nand - NAND sub-system\n", "info - show available NAND devices\n" "nand device [dev] - show or set current device\n" - "nand read[.jffs2] - addr off size\n" - "nand write[.jffs2] - addr off size - read/write `size' bytes starting\n" + "nand read[.jffs2] - addr off|partition size\n" + "nand write[.jffs2] - addr off|partiton size - read/write `size' bytes starting\n" " at offset `off' to/from memory address `addr'\n" "nand erase [clean] [off size] - erase `size' bytes from\n" " offset `off' (entire device if not specified)\n" @@ -279,62 +311,20 @@ U_BOOT_CMD(nand, 5, 1, do_nand, "nand markbad off - mark bad block at offset (UNSAFE)\n" "nand biterr off - make a bit error at offset (UNSAFE)\n"); -int do_nandboot(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +static int nand_load_image(cmd_tbl_t *cmdtp, nand_info_t *nand, + ulong offset, ulong addr, char *cmd) { - char *boot_device = NULL; - char *ep; - int dev; int r; - ulong addr, cnt, offset = 0; + char *ep; + ulong cnt; image_header_t *hdr; - nand_info_t *nand; - switch (argc) { - case 1: - addr = CFG_LOAD_ADDR; - boot_device = getenv("bootdevice"); - break; - case 2: - addr = simple_strtoul(argv[1], NULL, 16); - boot_device = getenv("bootdevice"); - break; - case 3: - addr = simple_strtoul(argv[1], NULL, 16); - boot_device = argv[2]; - break; - case 4: - addr = simple_strtoul(argv[1], NULL, 16); - boot_device = argv[2]; - offset = simple_strtoul(argv[3], NULL, 16); - break; - default: - printf("Usage:\n%s\n", cmdtp->usage); - SHOW_BOOT_PROGRESS(-1); - return 1; - } - - if (!boot_device) { - puts("\n** No boot device **\n"); - SHOW_BOOT_PROGRESS(-1); - return 1; - } - - dev = simple_strtoul(boot_device, &ep, 16); - - if (dev < 0 || dev >= CFG_MAX_NAND_DEVICE || !nand_info[dev].name) { - printf("\n** Device %d not available\n", dev); - SHOW_BOOT_PROGRESS(-1); - return 1; - } - - nand = &nand_info[dev]; - printf("\nLoading from device %d: %s (offset 0x%lx)\n", - dev, nand->name, offset); + printf("\nLoading from %s, offset 0x%lx\n", nand->name, offset); cnt = nand->oobblock; r = nand_read(nand, offset, &cnt, (u_char *) addr); if (r) { - printf("** Read error on %d\n", dev); + puts("** Read error\n"); SHOW_BOOT_PROGRESS(-1); return 1; } @@ -353,7 +343,7 @@ int do_nandboot(cmd_tbl_t * cmdtp, int f r = nand_read(nand, offset, &cnt, (u_char *) addr); if (r) { - printf("** Read error on %d\n", dev); + puts("** Read error\n"); SHOW_BOOT_PROGRESS(-1); return 1; } @@ -367,7 +357,7 @@ int do_nandboot(cmd_tbl_t * cmdtp, int f char *local_args[2]; extern int do_bootm(cmd_tbl_t *, int, int, char *[]); - local_args[0] = argv[0]; + local_args[0] = cmd; local_args[1] = NULL; printf("Automatic boot of image at addr 0x%08lx ...\n", addr); @@ -378,9 +368,81 @@ int do_nandboot(cmd_tbl_t * cmdtp, int f return 0; } -U_BOOT_CMD(nboot, 4, 1, do_nandboot, - "nboot - boot from NAND device\n", "loadAddr dev\n"); +int do_nandboot(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +{ + char *boot_device = NULL; + int idx; + ulong addr, offset = 0; +#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE) + struct mtd_device *dev; + struct part_info *part; + u8 pnum; + + if (argc >= 2) { + char *p = (argc == 2) ? argv[1] : argv[2]; + if (!(str2long(p, &addr)) && (mtdparts_init() == 0) && + (find_dev_and_part(p, &dev, &pnum, &part) == 0)) { + if (dev->id->type != MTD_DEV_TYPE_NAND) { + puts("Not a NAND device\n"); + return 1; + } + if (argc > 3) + goto usage; + if (argc == 3) + addr = simple_strtoul(argv[2], NULL, 16); + else + addr = CFG_LOAD_ADDR; + return nand_load_image(cmdtp, &nand_info[dev->id->num], + part->offset, addr, argv[0]); + } + } +#endif + + switch (argc) { + case 1: + addr = CFG_LOAD_ADDR; + boot_device = getenv("bootdevice"); + break; + case 2: + addr = simple_strtoul(argv[1], NULL, 16); + boot_device = getenv("bootdevice"); + break; + case 3: + addr = simple_strtoul(argv[1], NULL, 16); + boot_device = argv[2]; + break; + case 4: + addr = simple_strtoul(argv[1], NULL, 16); + boot_device = argv[2]; + offset = simple_strtoul(argv[3], NULL, 16); + break; + default: +usage: + printf("Usage:\n%s\n", cmdtp->usage); + SHOW_BOOT_PROGRESS(-1); + return 1; + } + if (!boot_device) { + puts("\n** No boot device **\n"); + SHOW_BOOT_PROGRESS(-1); + return 1; + } + + idx = simple_strtoul(boot_device, NULL, 16); + + if (idx < 0 || idx >= CFG_MAX_NAND_DEVICE || !nand_info[idx].name) { + printf("\n** Device %d not available\n", idx); + SHOW_BOOT_PROGRESS(-1); + return 1; + } + + return nand_load_image(cmdtp, &nand_info[idx], offset, addr, argv[0]); +} + +U_BOOT_CMD(nboot, 4, 1, do_nandboot, + "nboot - boot from NAND device\n", + "[partition] | [[[loadAddr] dev] offset]\n"); #endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */ diff --git a/doc/README.nand b/doc/README.nand index f2d6a5b..a2d10db 100644 --- a/doc/README.nand +++ b/doc/README.nand @@ -36,14 +36,19 @@ Commands: nand device num Make device `num' the current device and print information about it. - nand erase off size - nand erase clean [off size] - Erase `size' bytes starting at offset `off'. Only complete erase - blocks can be erased. + nand erase off|partition size + nand erase clean [off|partition size] + Erase `size' bytes starting at offset `off'. Alternatively partition + name can be specified, in this case size will be eventually limited + to not exceed partition size (this behaviour applies also to read + and write commands). Only complete erase blocks can be erased. + + If `erase' is specified without an offset or size, the entire flash + is erased. If `erase' is specified with partition but without an + size, the entire partition is erased. If `clean' is specified, a JFFS2-style clean marker is written to - each block after it is erased. If `clean' is specified without an - offset or size, the entire flash is erased. + each block after it is erased. This command will not erase blocks that are marked bad. There is a debug option in cmd_nand.c to allow bad blocks to be erased. @@ -53,28 +58,28 @@ Commands: nand info Print information about all of the NAND devices found. - nand read addr ofs size + nand read addr ofs|partition size Read `size' bytes from `ofs' in NAND flash to `addr'. If a page cannot be read because it is marked bad or an uncorrectable data error is found the command stops with an error. - nand read.jffs2 addr ofs size + nand read.jffs2 addr ofs|partition size Like `read', but the data for blocks that are marked bad is read as 0xff. This gives a readable JFFS2 image that can be processed by the JFFS2 commands such as ls and fsload. - nand read.oob addr ofs size + nand read.oob addr ofs|partition size Read `size' bytes from the out-of-band data area corresponding to `ofs' in NAND flash to `addr'. This is limited to the 16 bytes of data for one 512-byte page or 2 256-byte pages. There is no check for bad blocks or ECC errors. - nand write addr ofs size + nand write addr ofs|partition size Write `size' bytes from `addr' to `ofs' in NAND flash. If a page cannot be written because it is marked bad or the write fails the command stops with an error. - nand write.jffs2 addr ofs size + nand write.jffs2 addr ofs|partition size Like `write', but blocks that are marked bad are skipped and the is written to the next block instead. This allows writing writing a JFFS2 image, as long as the image is short enough to fit even @@ -82,7 +87,7 @@ Commands: produced by mkfs.jffs2 should work well, but loading an image copied from another flash is going to be trouble if there are any bad blocks. - nand write.oob addr ofs size + nand write.oob addr ofs|partition size Write `size' bytes from `addr' to the out-of-band data area corresponding to `ofs' in NAND flash. This is limited to the 16 bytes of data for one 512-byte page or 2 256-byte pages. There is no check

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[U-Boot-Users] Ping on pending U-Boot patches
by Tolunay Orkun 12 Oct '06

12 Oct '06

Wolfgang, Stefan: Can you provide the status of the following two patches that I've submitted early April? I appreciate if you can apply them if there are no objections. Ticket DNX#2006040842000013 http://sourceforge.net/mailarchive/message.php?msg_id=15341050 Ticket DNX#2006040842000022 http://sourceforge.net/mailarchive/message.php?msg_id=15341052 Best regards, Tolunay Orkun

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[U-Boot-Users] [PATCH] Add target 'cscope' to Makefile
by Horst Kronstorfer 12 Oct '06

12 Oct '06

hi! the following patch adds target 'cscope' to the main makefile. it also puts the list of directories with source files and the arguments to `find' into make variables. Signed-off-by: Horst Kronstorfer <hkronsto(a)frequentis.com> diff --git a/Makefile b/Makefile index 9305cab..80e3677 100644 --- a/Makefile +++ b/Makefile @@ -135,6 +135,14 @@ SUBDIRS = tools \ post/cpu .PHONY : $(SUBDIRS) +# Directories with files for tag generation +TAGDIRS := $(SUBDIRS) include lib_generic board/$(BOARDDIR) cpu/$(CPU)\ + lib_$(ARCH) fs/cramfs fs/fat fs/fdos fs/jffs2 net disk rtc dtt drivers\ + drivers/sk98lin common + +# Arguments to `find' when generating a list of files for tag generation +TAGFINDARGS := $ -name CVS -prune $ -o $ -name '*.[ch]' -print $ + ######################################################################### ######################################################################### @@ -179,19 +187,14 @@ gdbtools: depend dep: @for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir .depend ; done +cscope: + find $(TAGDIRS) $(TAGFINDARGS) >cscope.files; cscope -b -q -k + tags: - ctags -w `find $(SUBDIRS) include \ - lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \ - fs/cramfs fs/fat fs/fdos fs/jffs2 \ - net disk rtc dtt drivers drivers/sk98lin common \ - $ -name CVS -prune $ -o $ -name '*.[ch]' -print $` + ctags -w `find $(TAGDIRS) $(TAGFINDARGS)` etags: - etags -a `find $(SUBDIRS) include \ - lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \ - fs/cramfs fs/fat fs/fdos fs/jffs2 \ - net disk rtc dtt drivers drivers/sk98lin common \ - $ -name CVS -prune $ -o $ -name '*.[ch]' -print $` + etags -a `find $(TAGDIRS) $(TAGFINDARGS)` System.map: u-boot @$(NM) $< | \ @@ -1838,7 +1841,7 @@ clobber: clean -o -name '*.srec' -o -name '*.bin' -o -name u-boot.img \) \ -print0 \ | xargs -0 rm -f - rm -f $(OBJS) *.bak tags TAGS + rm -f $(OBJS) *.bak tags TAGS cscope.* rm -fr *.*~ rm -f u-boot u-boot.map u-boot.hex $(ALL) rm -f tools/crc32.c tools/environment.c tools/env/crc32.c -h

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[U-Boot-Users] [PATCH] load_elf_image() uses program headers instead of section headers
by Wood, Jarrod Jay 10 Oct '06

10 Oct '06

I have modified the common/cmd_elf.c:load_elf_image function to support loading ELF images via reading the program headers instead of the section headers, which according to the TIS ELF v1.2 standard is the correct method. This was modified due to errors loading various ELF images such as the INTEGRITY RTOS. In addition, the current version also does not check to see if the ELF headers will be overwritten when the program sections are extracted, resulting in a machine check when reading the next section. The modified version moves the ELF image out of the way. CHANGELOG: * Modified common/cmd_elf.c:load_elf_image() to use program headers instead of section headers to match TIS ELF v1.2 specification. The function also will detect and report if the ELF image will be overwritten during program data extraction and moves the image appropriately.

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[U-Boot-Users] [patch] move ar flags to ARFLAGS
by Mike Frysinger 09 Oct '06

09 Oct '06

i like to run `make -s` to better pick out warnings and stuff ... the hardcoded "$(AR) crv" gets in the way ive moved all of the "crv" stuff to the toplevel config.mk as ARFLAGS so people can change as they see fit without having to edit a ton of makefiles -mike

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[U-Boot-Users] [patch] change-post-behaviour-for-tqm5200-boards
by Martin Krause 09 Oct '06

09 Oct '06

Change POST behaviour for TQM5200 boards Patch by Martin Krause, 8 Mar 2006 Now a POST memory test is only performed on STK52XX base boards (and there only if pin PSC6_3 is read as "1" during boot time). On all other TQM5200 base boards no memory test is performed during POST (regardless of the state of pin PSC6_3). Signed-off-by: Martin Krause <martin.krause(a)tqs.de> CHANGELOG: * Change POST behaviour for TQM5200 boards Patch by Martin Krause, 8 Mar 2006

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[U-Boot-Users] PATCH - Support for EP82xxM Boards
by Aaron Sells 09 Oct '06

09 Oct '06

Hi, The following patch allows support for Embedded Planet EP82xxM boards. It has been tested on MPC8250, MPC8270 and MPC8280 populated boards with 256MB SDRAM and 64MB FLASH. Regards, Aaron Sells CHANGELOG: * Added ep82xxm board directory and config file for Embedded Planet EP82xxM board support diff --git a/CHANGELOG b/CHANGELOG index 8c3f13e..f45dd62 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,9 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Add support for EP82xxM boards + Patch by Aaron Sells, 20 Jun 2006 + * Add support for wrPPMC7xx/74xx boards Patch from Richard Danter, 12 Aug 2005 diff --git a/CREDITS b/CREDITS index 94153a7..dc45eed 100644 --- a/CREDITS +++ b/CREDITS @@ -385,6 +385,10 @@ N: Robert Schwebel E: r.schwebel(a)pengutronix.de D: Support for csb226, logodl and innokom boards (PXA2xx) +N: Aaron Sells +E: sellsa(a)embeddedplanet.com +D: Support for EP82xxM + N: Art Shipkowski E: art(a)videon-central.com D: Support for NetSilicon NS7520 diff --git a/MAKEALL b/MAKEALL index 1b63767..cdd0076 100755 --- a/MAKEALL +++ b/MAKEALL @@ -109,7 +109,7 @@ LIST_8260=" \ MPC8272ADS PM826 PM828 ppmc8260 \ Rattler8248 RPXsuper rsdproto sacsng \ sbc8260 SCM TQM8260_AC TQM8260_AD \ - TQM8260_AE ZPC1900 \ + TQM8260_AE ZPC1900 ep82xxm \ " ######################################################################### diff --git a/Makefile b/Makefile index e282b1f..13ce42a 100644 --- a/Makefile +++ b/Makefile @@ -1097,6 +1097,9 @@ CPU87_ROMBOOT_config: unconfig fi; \ echo "export CONFIG_BOOT_ROM" >> config.mk; +ep82xxm_config: unconfig + @./mkconfig $(@:_config=) ppc mpc8260 ep82xxm + ep8248_config \ ep8248E_config : unconfig @./mkconfig ep8248 ppc mpc8260 ep8248 diff --git a/board/ep82xxm/Makefile b/board/ep82xxm/Makefile new file mode 100644 index 0000000..8b10993 --- /dev/null +++ b/board/ep82xxm/Makefile @@ -0,0 +1,46 @@ +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := $(BOARD).o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/ep82xxm/config.mk b/board/ep82xxm/config.mk new file mode 100644 index 0000000..30fd0f1 --- /dev/null +++ b/board/ep82xxm/config.mk @@ -0,0 +1,30 @@ +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# Modified by, Yuli Barcohen, Arabella Software Ltd. <yuli(a)arabellasw.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# EP82xxM series boards by Embedded Planet +# + +TEXT_BASE = 0xFFF00000 diff --git a/board/ep82xxm/ep82xxm.c b/board/ep82xxm/ep82xxm.c new file mode 100644 index 0000000..c3d9a4e --- /dev/null +++ b/board/ep82xxm/ep82xxm.c @@ -0,0 +1,292 @@ +/* + * Copyright (C) 2006 Embedded Planet, LLC. + * + * Support for Embedded Planet EP82xxM boards. + * Tested on EP82xxM (MPC8270). + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc8260.h> +#include <ioports.h> +#include <asm/m8260_pci.h> +#ifdef CONFIG_PCI +#include <pci.h> +#endif +#include <miiphy.h> + +/* + * I/O Port configuration table + * + * if conf is 1, then that port pin will be configured at boot time + * according to the five values podr/pdir/ppar/psor/pdat for that entry + */ + +#define CFG_FCC2 1 +#define CFG_FCC3 1 + +const iop_conf_t iop_conf_tab[4][32] = { + + /* Port A */ + { /* conf ppar psor pdir podr pdat */ + /* PA31 */ { 0, 0, 0, 0, 0, 1 }, /* PA31 */ + /* PA30 */ { 0, 0, 0, 0, 0, 1 }, /* PA30 */ + /* PA29 */ { 0, 0, 0, 0, 0, 1 }, /* PA29 */ + /* PA28 */ { 0, 0, 0, 0, 0, 1 }, /* PA28 */ + /* PA27 */ { 0, 0, 0, 0, 0, 1 }, /* PA27 */ + /* PA26 */ { 0, 0, 0, 0, 0, 1 }, /* PA26 */ + /* PA25 */ { 0, 0, 0, 0, 0, 1 }, /* PA25 */ + /* PA24 */ { 0, 0, 0, 0, 0, 1 }, /* PA24 */ + /* PA23 */ { 0, 0, 0, 0, 0, 1 }, /* PA23 */ + /* PA22 */ { 0, 0, 0, 0, 0, 0 }, /* PA22 */ + /* PA21 */ { 0, 0, 0, 0, 0, 1 }, /* PA21 */ + /* PA20 */ { 0, 0, 0, 0, 0, 1 }, /* PA20 */ + /* PA19 */ { 0, 0, 0, 0, 0, 1 }, /* PA19 */ + /* PA18 */ { 0, 0, 0, 0, 0, 1 }, /* PA18 */ + /* PA17 */ { 0, 0, 0, 0, 0, 1 }, /* PA17 */ + /* PA16 */ { 0, 0, 0, 0, 0, 1 }, /* PA16 */ + /* PA15 */ { 0, 0, 0, 0, 0, 1 }, /* PA15 */ + /* PA14 */ { 0, 0, 0, 0, 0, 1 }, /* PA14 */ + /* PA13 */ { 0, 0, 0, 0, 0, 1 }, /* PA13 */ + /* PA12 */ { 0, 0, 0, 0, 0, 1 }, /* PA12 */ + /* PA11 */ { 0, 0, 0, 0, 0, 1 }, /* PA11 */ + /* PA10 */ { 0, 0, 0, 0, 0, 1 }, /* PA10 */ + /* PA9 */ { 1, 1, 0, 1, 0, 1 }, /* SMC2 TxD */ + /* PA8 */ { 1, 1, 0, 0, 0, 1 }, /* SMC2 RxD */ + /* PA7 */ { 0, 0, 0, 0, 0, 1 }, /* PA7 */ + /* PA6 */ { 0, 0, 0, 0, 0, 1 }, /* PA6 */ + /* PA5 */ { 0, 0, 0, 0, 0, 1 }, /* PA5 */ + /* PA4 */ { 0, 0, 0, 0, 0, 1 }, /* PA4 */ + /* PA3 */ { 0, 0, 0, 0, 0, 1 }, /* PA3 */ + /* PA2 */ { 0, 0, 0, 0, 0, 1 }, /* PA2 */ + /* PA1 */ { 0, 0, 0, 0, 0, 1 }, /* PA1 */ + /* PA0 */ { 0, 0, 0, 0, 0, 1 } /* PA0 */ + }, + + /* Port B */ + { /* conf ppar psor pdir podr pdat */ + /* PB31 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ + /* PB30 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ + /* PB29 */ { CFG_FCC2, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ + /* PB28 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */ + /* PB27 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */ + /* PB26 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */ + /* PB25 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */ + /* PB24 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */ + /* PB23 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */ + /* PB22 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */ + /* PB21 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */ + /* PB20 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */ + /* PB19 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */ + /* PB18 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */ + /* PB17 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */ + /* PB16 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */ + /* PB15 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */ + /* PB14 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */ + /* PB13 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:COL */ + /* PB12 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:CRS */ + /* PB11 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ + /* PB10 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ + /* PB9 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ + /* PB8 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ + /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */ + /* PB6 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ + /* PB5 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ + /* PB4 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ + /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */ + }, + + /* Port C */ + { /* conf ppar psor pdir podr pdat */ + /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */ + /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */ + /* PC29 */ { 1, 1, 1, 0, 0, 0 }, /* SCC1 CTS# */ + /* PC28 */ { 0, 0, 0, 0, 0, 0 }, /* PC28 */ + /* PC27 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3: TXD[0] */ + /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */ + /* PC25 */ { 0, 0, 0, 0, 0, 0 }, /* PC25 */ + /* PC24 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */ + /* PC23 */ { 0, 0, 0, 0, 0, 0 }, /* PC23 */ + /* PC22 */ { 0, 0, 0, 0, 0, 0 }, /* PC22 */ + /* PC21 */ { 0, 0, 0, 0, 0, 0 }, /* PC21 */ + /* PC20 */ { 0, 0, 0, 0, 0, 0 }, /* PC20 */ + /* PC19 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* RxClk (CLK13) */ + /* PC18 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* TxClk (CLK14) */ + /* PC17 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* RxClk (CLK15) */ + /* PC16 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* TxClk (CLK16) */ + /* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */ + /* PC14 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 CD# */ + /* PC13 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 CTS# */ + /* PC12 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 CD# */ + /* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */ + /* PC10 */ { 1, 1, 0, 0, 0, 0 }, /* SCC3 CD# */ + /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* PC9 */ + /* PC8 */ { 1, 1, 1, 0, 0, 0 }, /* SCC3 CTS# */ + /* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */ + /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */ + /* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* PC5 */ + /* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* PC4 */ + /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */ + /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */ + /* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */ + /* PC0 */ { 0, 0, 0, 0, 0, 0 }, /* PC0 */ + }, + + /* Port D */ + { /* conf ppar psor pdir podr pdat */ + /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 RXD */ + /* PD30 */ { 1, 1, 1, 1, 0, 1 }, /* SCC1 TXD */ + /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 RTS# */ + /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RXD */ + /* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 TXD */ + /* PD26 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 RTS# */ + /* PD25 */ { 1, 1, 0, 0, 0, 0 }, /* SCC3 RXD */ + /* PD24 */ { 1, 1, 0, 1, 0, 0 }, /* SCC3 TXD */ + /* PD23 */ { 1, 1, 0, 1, 0, 0 }, /* SCC3 RTS# */ + /* PD22 */ { 0, 0, 0, 0, 0, 1 }, /* PD22 */ + /* PD21 */ { 0, 0, 0, 0, 0, 1 }, /* PD21 */ + /* PD20 */ { 0, 0, 0, 0, 0, 1 }, /* PD20 */ + /* PD19 */ { 0, 0, 0, 0, 0, 1 }, /* PD19 */ + /* PD18 */ { 0, 0, 0, 0, 0, 1 }, /* PD18 */ + /* PD17 */ { 0, 0, 0, 0, 0, 1 }, /* PD17 */ + /* PD16 */ { 0, 0, 0, 0, 0, 1 }, /* PD16 */ + /* PD15 */ { 1, 1, 1, 0, 1, 1 }, /* I2C SDA */ + /* PD14 */ { 1, 1, 1, 0, 1, 1 }, /* I2C SCL */ + /* PD13 */ { 0, 0, 0, 0, 0, 1 }, /* PD13 */ + /* PD12 */ { 0, 0, 0, 0, 0, 1 }, /* PD12 */ + /* PD11 */ { 0, 0, 0, 0, 0, 1 }, /* PD11 */ + /* PD10 */ { 0, 0, 0, 0, 0, 1 }, /* PD10 */ + /* PD9 */ { 1, 1, 0, 1, 0, 1 }, /* SMC1 TxD */ + /* PD8 */ { 1, 1, 0, 0, 0, 1 }, /* SMC1 RxD */ + /* PD7 */ { 1, 1, 0, 0, 0, 1 }, /* SMC1 SMSYN */ + /* PD6 */ { 0, 0, 0, 0, 0, 1 }, /* PD6 */ + /* PD5 */ { 0, 0, 0, 0, 0, 1 }, /* PD5 */ + /* PD4 */ { 0, 0, 0, 0, 0, 1 }, /* PD4 */ + /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */ + } +}; + +#ifdef CONFIG_PCI +typedef struct pci_ic_s { + unsigned long pci_int_stat; + unsigned long pci_int_mask; +}pci_ic_t; +#endif + +int board_early_init_f (void) +{ + vu_char *bcsr = (vu_char *)CFG_BCSR; + + bcsr[4] |= 0x30; /* Turn the LEDs off */ + +#if defined(CONFIG_CONS_ON_SMC) || defined(CONFIG_KGDB_ON_SMC) + bcsr[6] |= 0x10; +#endif +#if defined(CONFIG_CONS_ON_SCC) || defined(CONFIG_KGDB_ON_SCC) + bcsr[7] |= 0x10; +#endif + +#if CFG_FCC3 + bcsr[8] |= 0xC0; +#endif /* CFG_FCC3 */ +#if CFG_FCC2 + bcsr[8] |= 0x30; +#endif /* CFG_FCC2 */ + + return 0; +} + +long int initdram(int board_type) +{ + /* Size in MB of SDRAM populated on board*/ + long int msize = 256; + +#ifndef CFG_RAMBOOT + volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile memctl8260_t *memctl = &immap->im_memctl; + vu_char *ramaddr = (vu_char *)CFG_SDRAM_BASE; + uchar c = 0xFF; + uint psdmr = CFG_PSDMR; + int i; + + unsigned char ramtmp; + unsigned char *ramptr1 = (unsigned char *)0x00000110; + + memctl->memc_mptpr = CFG_MPTPR; + +udelay(400); + + /* Initialise 60x bus SDRAM */ + memctl->memc_psrt = CFG_PSRT; + memctl->memc_or1 = CFG_SDRAM_OR; + memctl->memc_br1 = CFG_SDRAM_BR; + memctl->memc_psdmr = psdmr; + +udelay(400); + + memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; /* Precharge all banks */ + ramtmp = *ramptr1; + memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; /* CBR refresh */ + for (i = 0; i < 8; i++) + { + memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; /* CBR refresh */ + } + ramtmp = *ramptr1; + memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; /* Mode Register write */ + *ramptr1 = 0xFF; + memctl->memc_psdmr = psdmr | PSDMR_RFEN; /* Refresh enable */ +#endif /* !CFG_RAMBOOT */ + + /* Return total 60x bus SDRAM size */ + return msize * 1024 * 1024; +} + +int checkboard(void) +{ + vu_char *bcsr = (vu_char *)CFG_BCSR; + + puts("Board: "); + switch (bcsr[0]) { + case 0x0A: + printf("EP82xxM 1.0 CPLD revision %d\n", bcsr[1]); + break; + default: + printf("unknown: ID=%02X\n", bcsr[0]); + } + + return 0; +} + +#ifdef CONFIG_PCI +struct pci_controller hose; + +extern void pci_mpc8250_init(struct pci_controller *); + +void pci_init_board(void) +{ + pci_mpc8250_init(&hose); +} +#endif diff --git a/board/ep82xxm/u-boot.lds b/board/ep82xxm/u-boot.lds new file mode 100644 index 0000000..18c4b46 --- /dev/null +++ b/board/ep82xxm/u-boot.lds @@ -0,0 +1,125 @@ +/* + * (C) Copyright 2001 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * Modified by Yuli Barcohen <yuli(a)arabellasw.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + cpu/mpc8260/start.o (.text) + *(.text) + *(.fixup) + *(.got1) + . = ALIGN(16); + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x0FFF) & 0xFFFFF000; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} +ENTRY(_start) diff --git a/include/bmp_logo.h b/include/bmp_logo.h old mode 100644 new mode 100755 diff --git a/include/configs/ep82xxm.h b/include/configs/ep82xxm.h new file mode 100644 index 0000000..5d7bed6 --- /dev/null +++ b/include/configs/ep82xxm.h @@ -0,0 +1,395 @@ +/* + * Copyright (C) 2006 Embedded Planet, LLC. + * + * U-Boot configuration for Embedded Planet EP82xxM boards. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_MPC8260 +#define CPU_ID_STR "MPC8270" + +#define CONFIG_EP82XXM /* Embedded Planet EP82xxM H 1.0 board /* + /* 256MB SDRAM / 64MB FLASH */ + +#undef DEBUG + +#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ + +/* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ +#define CONFIG_ENV_OVERWRITE + +/* + * Select serial console configuration + * + * If either CONFIG_CONS_ON_SMC or CONFIG_CONS_ON_SCC is selected, then + * CONFIG_CONS_INDEX must be set to the channel number (1-2 for SMC, 1-4 + * for SCC). + */ +#define CONFIG_CONS_ON_SMC /* Console is on SMC */ +#undef CONFIG_CONS_ON_SCC /* It's not on SCC */ +#undef CONFIG_CONS_NONE /* It's not on external UART */ +#define CONFIG_CONS_INDEX 1 /* SMC1 is used for console */ + +#define CFG_BCSR 0xFA000000 + +/* + * Select ethernet configuration + * + * If either CONFIG_ETHER_ON_SCC or CONFIG_ETHER_ON_FCC is selected, + * then CONFIG_ETHER_INDEX must be set to the channel number (1-4 for + * SCC, 1-3 for FCC) + * + * If CONFIG_ETHER_NONE is defined, then either the ethernet routines + * must be defined elsewhere (as for the console), or CFG_CMD_NET must + * be removed from CONFIG_COMMANDS to remove support for networking. + */ +#undef CONFIG_ETHER_ON_SCC /* Ethernet is not on SCC */ +#define CONFIG_ETHER_ON_FCC /* Ethernet is on FCC */ +#undef CONFIG_ETHER_NONE /* No external Ethernet */ + +#define CONFIG_NET_MULTI + +#define CONFIG_ETHER_ON_FCC2 +#define CONFIG_ETHER_ON_FCC3 + +#define CFG_CMXFCR_MASK3 (CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK) +#define CFG_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK15 | CMXFCR_TF3CS_CLK16) +#define CFG_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) +#define CFG_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) + +#define CFG_CPMFCR_RAMTYPE 0 +#define CFG_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB) + +#define CONFIG_MII /* MII PHY management */ +#define CONFIG_BITBANGMII /* Bit-banged MDIO interface */ + +/* + * GPIO pins used for bit-banged MII communications + */ +#define MDIO_PORT 0 /* Not used - implemented in BCSR */ +#define MDIO_ACTIVE (*(vu_char *)(CFG_BCSR + 8) &= 0xFB) +#define MDIO_TRISTATE (*(vu_char *)(CFG_BCSR + 8) |= 0x04) +#define MDIO_READ (*(vu_char *)(CFG_BCSR + 8) & 1) + +#define MDIO(bit) if(bit) *(vu_char *)(CFG_BCSR + 8) |= 0x01; \ + else *(vu_char *)(CFG_BCSR + 8) &= 0xFE + +#define MDC(bit) if(bit) *(vu_char *)(CFG_BCSR + 8) |= 0x02; \ + else *(vu_char *)(CFG_BCSR + 8) &= 0xFD + +#define MIIDELAY udelay(1) + + +#ifndef CONFIG_8260_CLKIN +#define CONFIG_8260_CLKIN 66000000 /* in Hz */ +#endif + +#define CONFIG_BAUDRATE 115200 + +#define CFG_VXWORKS_MAC_PTR 0x4300 /* Pass Ethernet MAC to VxWorks */ + +#define CONFIG_COMMANDS (CONFIG_CMD_DFL \ + | CFG_CMD_DHCP \ + | CFG_CMD_ECHO \ + | CFG_CMD_I2C \ + | CFG_CMD_IMMAP \ + | CFG_CMD_MII \ + | CFG_CMD_PING \ + | CFG_CMD_DATE \ + | CFG_CMD_DTT \ + | CFG_CMD_EEPROM \ + | CFG_CMD_PCI \ + | CFG_CMD_DIAG \ + ) + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include <cmd_confdefs.h> + +#define CONFIG_ETHADDR 00:10:EC:00:88:65 +#define CONFIG_HAS_ETH1 +#define CONFIG_ETH1ADDR 00:10:EC:80:88:65 +#define CONFIG_IPADDR 10.0.0.245 +#define CONFIG_HOSTNAME EP82xxM +#define CONFIG_SERVERIP 10.0.0.26 +#define CONFIG_GATEWAYIP 10.0.0.1 +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ +#define CFG_ENV_IN_OWN_SECT 1 +#define CFG_AUTO_COMPLETE +#define CONFIG_EXTRA_ENV_SETTINGS "ethprime=FCC3 ETHERNET" + +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */ +#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */ +#undef CONFIG_KGDB_NONE /* define if kgdb on something else */ +#define CONFIG_KGDB_INDEX 1 /* which serial channel for kgdb */ +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port at */ +#endif + +#define CONFIG_BZIP2 /* include support for bzip2 compressed images */ +#undef CONFIG_WATCHDOG /* disable platform specific watchdog */ + +/* + * Miscellaneous configurable options + */ +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "ep82xxm=> " /* Monitor Command Prompt */ +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ +#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ + +#define CFG_LOAD_ADDR 0x100000 /* default load address */ + +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ + +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } + +/*----------------------------------------------------------------------- + * Environment + *----------------------------------------------------------------------*/ +/* + * Define here the location of the environment variables (FLASH or EEPROM). + * Note: DENX encourages to use redundant environment in FLASH. + */ +#if 1 +#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ +#else +#define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ +#endif + +/*----------------------------------------------------------------------- + * FLASH related + *----------------------------------------------------------------------*/ +#define CFG_FLASH_BASE 0xFC000000 +#define CFG_FLASH_CFI +#define CFG_FLASH_CFI_DRIVER +#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks */ +#define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */ +#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector in flinfo */ + +#ifdef CFG_ENV_IS_IN_FLASH +#define CFG_ENV_SECT_SIZE 0x20000 +#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) +#endif /* CFG_ENV_IS_IN_FLASH */ + +/*----------------------------------------------------------------------- + * I2C + *----------------------------------------------------------------------*/ +/* EEPROM Configuration */ +#define CFG_EEPROM_SIZE 0x1000 +#define CFG_I2C_EEPROM_ADDR 0x54 +#define CFG_I2C_EEPROM_ADDR_LEN 1 +#define CFG_EEPROM_PAGE_WRITE_BITS 3 +#define CFG_EEPROM_PAGE_WRITE_ENABLE +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 + +#ifdef CFG_ENV_IS_IN_EEPROM +#define CFG_ENV_SIZE 0x200 /* Size of Environment vars */ +#define CFG_ENV_OFFSET 0x0 +#endif /* CFG_ENV_IS_IN_EEPROM */ + +/* RTC Configuration */ +#define CONFIG_RTC_M41T11 1 /* uses a M41T81 */ +#define CFG_I2C_RTC_ADDR 0x68 +#define CONFIG_M41T11_BASE_YEAR 1900 + +/* I2C SYSMON (LM75) */ +#define CONFIG_DTT_LM75 1 +#define CONFIG_DTT_SENSORS {0} +#define CFG_DTT_MAX_TEMP 70 +#define CFG_DTT_LOW_TEMP -30 +#define CFG_DTT_HYSTERESIS 3 + +/*----------------------------------------------------------------------- + * NVRAM Configuration + *----------------------------------------------------------------------- + */ +#define CFG_NVRAM_BASE_ADDR 0xFA080000 +#define CFG_NVRAM_SIZE (128*1024)-16 + + +/*----------------------------------------------------------------------- + * PCI stuff + *----------------------------------------------------------------------- + */ +/* General PCI */ +#define CONFIG_PCI /* include pci support */ +#define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ +#define CONFIG_PCI_BOOTDELAY 0 + +/* PCI Memory map (if different from default map */ +#define CFG_PCI_SLV_MEM_LOCAL CFG_SDRAM_BASE /* Local base */ +#define CFG_PCI_SLV_MEM_BUS 0x00000000 /* PCI base */ +#define CFG_PICMR0_MASK_ATTRIB (PICMR_MASK_512MB | PICMR_ENABLE | \ + PICMR_PREFETCH_EN) + +/* + * These are the windows that allow the CPU to access PCI address space. + * All three PCI master windows, which allow the CPU to access PCI + * prefetch, non prefetch, and IO space (see below), must all fit within + * these windows. + */ + +/* + * Master window that allows the CPU to access PCI Memory (prefetch). + * This window will be setup with the second set of Outbound ATU registers + * in the bridge. + */ + +#define CFG_PCI_MSTR_MEM_LOCAL 0x80000000 /* Local base */ +#define CFG_PCI_MSTR_MEM_BUS 0x80000000 /* PCI base */ +#define CFG_CPU_PCI_MEM_START PCI_MSTR_MEM_LOCAL +#define CFG_PCI_MSTR_MEM_SIZE 0x20000000 /* 512MB */ +#define CFG_POCMR0_MASK_ATTRIB (POCMR_MASK_512MB | POCMR_ENABLE | POCMR_PREFETCH_EN) + +/* + * Master window that allows the CPU to access PCI Memory (non-prefetch). + * This window will be setup with the second set of Outbound ATU registers + * in the bridge. + */ + +#define CFG_PCI_MSTR_MEMIO_LOCAL 0xA0000000 /* Local base */ +#define CFG_PCI_MSTR_MEMIO_BUS 0xA0000000 /* PCI base */ +#define CFG_CPU_PCI_MEMIO_START PCI_MSTR_MEMIO_LOCAL +#define CFG_PCI_MSTR_MEMIO_SIZE 0x20000000 /* 512MB */ +#define CFG_POCMR1_MASK_ATTRIB (POCMR_MASK_512MB | POCMR_ENABLE) + +/* + * Master window that allows the CPU to access PCI IO space. + * This window will be setup with the first set of Outbound ATU registers + * in the bridge. + */ + +#define CFG_PCI_MSTR_IO_LOCAL 0xF6000000 /* Local base */ +#define CFG_PCI_MSTR_IO_BUS 0x00000000 /* PCI base */ +#define CFG_CPU_PCI_IO_START PCI_MSTR_IO_LOCAL +#define CFG_PCI_MSTR_IO_SIZE 0x02000000 /* 64MB */ +#define CFG_POCMR2_MASK_ATTRIB (POCMR_MASK_32MB | POCMR_ENABLE | POCMR_PCI_IO) + + +/* PCIBR0 - for PCI IO*/ +#define CFG_PCI_MSTR0_LOCAL CFG_PCI_MSTR_IO_LOCAL /* Local base */ +#define CFG_PCIMSK0_MASK ~(CFG_PCI_MSTR_IO_SIZE - 1U) /* Size of window */ +/* PCIBR1 - prefetch and non-prefetch regions joined together */ +#define CFG_PCI_MSTR1_LOCAL CFG_PCI_MSTR_MEM_LOCAL +#define CFG_PCIMSK1_MASK ~(CFG_PCI_MSTR_MEM_SIZE + CFG_PCI_MSTR_MEMIO_SIZE - 1U) + + +#define CFG_DIRECT_FLASH_TFTP + +#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) +#define CFG_JFFS2_FIRST_BANK 0 +#define CFG_JFFS2_NUM_BANKS CFG_MAX_FLASH_BANKS +#define CFG_JFFS2_FIRST_SECTOR 0 +#define CFG_JFFS2_LAST_SECTOR 62 +#define CFG_JFFS2_SORT_FRAGMENTS +#define CFG_JFFS_CUSTOM_PART +#endif /* CFG_CMD_JFFS2 */ + +#if (CONFIG_COMMANDS & CFG_CMD_I2C) +#define CONFIG_HARD_I2C 1 /* To enable I2C support */ +#define CFG_I2C_SPEED 100000 /* I2C speed */ +#define CFG_I2C_SLAVE 0x7F /* I2C slave address */ +#endif /* CFG_CMD_I2C */ + +#define CFG_MONITOR_BASE TEXT_BASE +#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) +#define CFG_RAMBOOT +#endif + +#define CFG_MONITOR_LEN (512 << 10) /* Reserve 256KB for Monitor */ + +#define CFG_DEFAULT_IMMR 0x00010000 +#define CFG_IMMR 0xF0000000 + +#define CFG_INIT_RAM_ADDR CFG_IMMR +#define CFG_INIT_RAM_END 0x2000 /* End of used area in DPRAM */ +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET + + +/* Hard reset configuration word */ +#define CFG_HRCW_MASTER 0 /*0x1C800641*/ /* Not used - provided by CPLD */ +/* No slaves */ +#define CFG_HRCW_SLAVE1 0 +#define CFG_HRCW_SLAVE2 0 +#define CFG_HRCW_SLAVE3 0 +#define CFG_HRCW_SLAVE4 0 +#define CFG_HRCW_SLAVE5 0 +#define CFG_HRCW_SLAVE6 0 +#define CFG_HRCW_SLAVE7 0 + +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +#define CFG_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPUs */ +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ +#endif + +#define CFG_HID0_INIT 0 +#define CFG_HID0_FINAL 0 + +#define CFG_HID2 0 + +#define CFG_SIUMCR 0x02610000 +#define CFG_SYPCR 0xFFFF0689 +#define CFG_BCR 0x8080E000 +#define CFG_SCCR 0x00000001 + +#define CFG_RMR 0 +#define CFG_TMCNTSC 0x000000C3 +#define CFG_PISCR 0x00000083 +#define CFG_RCCR 0 + +#define CFG_MPTPR 0x0A00 +#define CFG_PSDMR 0xC432246E +#define CFG_PSRT 0x32 + +#define CFG_SDRAM_BASE 0x00000000 +#define CFG_SDRAM_BR (CFG_SDRAM_BASE | 0x00000041) +#define CFG_SDRAM_OR 0xF0002900 + +#define CFG_BR0_PRELIM (CFG_FLASH_BASE | 0x00001801) +#define CFG_OR0_PRELIM 0xFC000882 +#define CFG_BR4_PRELIM (CFG_BCSR | 0x00001001) +#define CFG_OR4_PRELIM 0xFFF00050 + +#define CFG_RESET_ADDRESS 0xFFF00100 + +#endif /* __CONFIG_H */

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[U-Boot-Users] [PATCH 0/11] MPC85xx platform updates
by Matthew McClintock 09 Oct '06

09 Oct '06

The following is a series of patches to update the MPC85xx platforms. It changes the method flat device trees are stored/obtained by U-Boot. With these patches, U-Boot will update and boot from a flat device tree stored in memory. It also contains refactored patches posted over the last year to reflect this change. -Matthew

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[U-Boot-Users] [PATCH] Spansion Flash configuration words
by Marc Leeman 09 Oct '06

09 Oct '06

This is one of the first patches that will add support for a new 834x board (based on the 834x sys board). CHANGELOG: * Add the configuration words for the Spansion flash S29GL128N, S29GL256N and S29GL512N Patch by Marc Leeman, 4 Jul 2006 -- greetz, marc Long enough for me to see your blue backside meditating, but not long enough for you to touch me. Rygel - PK Tech Girl scorpius.homelinux.org 2.6.17 #2 PREEMPT Thu Jun 22 07:18:33 CEST 2006 GNU/Linux

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