February 2005 - U-Boot

[U-Boot-Users] MPC85XX ioports patch
by Jon Loeliger 08 Feb '05

08 Feb '05

Wolfgang, This patch is separated out from the previously submitted broken patch of 2004-Dec-6 that is now obsolete. Obsolete patch: CPM2 config patch by Jon Loeliger dated 2004-Dec-6 Thanks, jdl * Patch by Kumar Gala, 2005-02-08 - Add missing PCI IO port definitions. diff -Nur --exclude=CVS u-boot/board/cds/mpc8541cds/mpc8541cds.c u-boot-pq3/board/cds/mpc8541cds/mpc8541cds.c --- u-boot/board/cds/mpc8541cds/mpc8541cds.c 2004-11-01 15:53:02.000000000 -0600 +++ u-boot-pq3/board/cds/mpc8541cds/mpc8541cds.c 2004-12-03 15:20:42.000000000 -0600 @@ -26,6 +26,7 @@ #include <pci.h> #include <asm/processor.h> #include <asm/immap_85xx.h> +#include <ioports.h> #include <spd.h> #include "../common/cadmus.h" @@ -40,6 +41,160 @@ void local_bus_init(void); void sdram_init(void); +/* + * I/O Port configuration table + * + * if conf is 1, then that port pin will be configured at boot time + * according to the five values podr/pdir/ppar/psor/pdat for that entry + */ + +const iop_conf_t iop_conf_tab[4][32] = { + + /* Port A configuration */ + { /* conf ppar psor pdir podr pdat */ + /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */ + /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */ + /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */ + /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */ + /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */ + /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */ + /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */ + /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */ + /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */ + /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */ + /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */ + /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */ + /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */ + /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */ + /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */ + /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */ + /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */ + /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */ + /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */ + /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */ + /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */ + /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */ + /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */ + /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */ + /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */ + /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */ + /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */ + /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */ + /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */ + /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */ + /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FREERUN */ + /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */ + }, + + /* Port B configuration */ + { /* conf ppar psor pdir podr pdat */ + /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ + /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ + /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ + /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */ + /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */ + /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */ + /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */ + /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */ + /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */ + /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */ + /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */ + /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */ + /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */ + /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */ + /* PB17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */ + /* PB16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */ + /* PB15 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */ + /* PB14 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */ + /* PB13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:COL */ + /* PB12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:CRS */ + /* PB11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ + /* PB10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ + /* PB9 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ + /* PB8 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ + /* PB7 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ + /* PB6 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ + /* PB5 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ + /* PB4 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ + /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ + /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ + /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ + /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ + }, + + /* Port C */ + { /* conf ppar psor pdir podr pdat */ + /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */ + /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */ + /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */ + /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */ + /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */ + /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */ + /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */ + /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */ + /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */ + /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */ + /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */ + /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */ + /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */ + /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */ + /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */ + /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */ + /* PC15 */ { 1, 1, 0, 0, 0, 0 }, /* PC15 */ + /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */ + /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */ + /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */ + /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */ + /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* FETHMDC */ + /* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* FETHMDIO */ + /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */ + /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */ + /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */ + /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */ + /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */ + /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */ + /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */ + /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */ + /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */ + }, + + /* Port D */ + { /* conf ppar psor pdir podr pdat */ + /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */ + /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */ + /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */ + /* PD28 */ { 0, 1, 0, 0, 0, 0 }, /* PD28 */ + /* PD27 */ { 0, 1, 1, 1, 0, 0 }, /* PD27 */ + /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */ + /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */ + /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */ + /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */ + /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */ + /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */ + /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */ + /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */ + /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */ + /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */ + /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */ + /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */ + /* PD14 */ { 0, 0, 0, 1, 0, 0 }, /* LED */ + /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */ + /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */ + /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */ + /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */ + /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */ + /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */ + /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */ + /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */ + /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */ + /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */ + /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ + /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ + /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ + /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ + } +}; + int board_early_init_f (void) { return 0; diff -Nur --exclude=CVS u-boot/board/cds/mpc8555cds/mpc8555cds.c u-boot-pq3/board/cds/mpc8555cds/mpc8555cds.c --- u-boot/board/cds/mpc8555cds/mpc8555cds.c 2004-11-01 15:53:03.000000000 -0600 +++ u-boot-pq3/board/cds/mpc8555cds/mpc8555cds.c 2004-12-03 15:20:42.000000000 -0600 @@ -24,6 +24,7 @@ #include <pci.h> #include <asm/processor.h> #include <asm/immap_85xx.h> +#include <ioports.h> #include <spd.h> #include "../common/cadmus.h" @@ -38,6 +39,160 @@ void local_bus_init(void); void sdram_init(void); +/* + * I/O Port configuration table + * + * if conf is 1, then that port pin will be configured at boot time + * according to the five values podr/pdir/ppar/psor/pdat for that entry + */ + +const iop_conf_t iop_conf_tab[4][32] = { + + /* Port A configuration */ + { /* conf ppar psor pdir podr pdat */ + /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */ + /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */ + /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */ + /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */ + /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */ + /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */ + /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */ + /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */ + /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */ + /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */ + /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */ + /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */ + /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */ + /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */ + /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */ + /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */ + /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */ + /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */ + /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */ + /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */ + /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */ + /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */ + /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */ + /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */ + /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */ + /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */ + /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */ + /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */ + /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */ + /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */ + /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FREERUN */ + /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */ + }, + + /* Port B configuration */ + { /* conf ppar psor pdir podr pdat */ + /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ + /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ + /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ + /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */ + /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */ + /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */ + /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */ + /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */ + /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */ + /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */ + /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */ + /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */ + /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */ + /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */ + /* PB17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */ + /* PB16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */ + /* PB15 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */ + /* PB14 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */ + /* PB13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:COL */ + /* PB12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:CRS */ + /* PB11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ + /* PB10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ + /* PB9 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ + /* PB8 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ + /* PB7 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ + /* PB6 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ + /* PB5 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ + /* PB4 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ + /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ + /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ + /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ + /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ + }, + + /* Port C */ + { /* conf ppar psor pdir podr pdat */ + /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */ + /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */ + /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */ + /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */ + /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */ + /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */ + /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */ + /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */ + /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */ + /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */ + /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */ + /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */ + /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */ + /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */ + /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */ + /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */ + /* PC15 */ { 1, 1, 0, 0, 0, 0 }, /* PC15 */ + /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */ + /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */ + /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */ + /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */ + /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* FETHMDC */ + /* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* FETHMDIO */ + /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */ + /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */ + /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */ + /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */ + /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */ + /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */ + /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */ + /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */ + /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */ + }, + + /* Port D */ + { /* conf ppar psor pdir podr pdat */ + /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */ + /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */ + /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */ + /* PD28 */ { 0, 1, 0, 0, 0, 0 }, /* PD28 */ + /* PD27 */ { 0, 1, 1, 1, 0, 0 }, /* PD27 */ + /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */ + /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */ + /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */ + /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */ + /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */ + /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */ + /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */ + /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */ + /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */ + /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */ + /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */ + /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */ + /* PD14 */ { 0, 0, 0, 1, 0, 0 }, /* LED */ + /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */ + /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */ + /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */ + /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */ + /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */ + /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */ + /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */ + /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */ + /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */ + /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */ + /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ + /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ + /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ + /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ + } +}; + int board_early_init_f (void) { return 0;

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[U-Boot-Users] CPM2 Config Patches
by Jon Loeliger 08 Feb '05

08 Feb '05

Wolfgang, This patch corrects problems with a previously posted patch for some CPM2 configuration changes that I made on 2004-Dec-6. It was incomplete. Obsolete patch: CPM2 Config Patch by Jon Loelier dated 2004-12-06 14:54 New changelog: * Patch by Jon Loeliger, Kumar Gala 2005-02-08 - Convert the CPM2 based functionality to use new CONFIG_CPM2 option rather than a myriad of CONFIG_MPC8560-like variants. Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560. Eliminates the CONFIG_MPC8560 option entirely. diff -Nur --exclude=CVS u-boot/board/cds/mpc8541cds/config.mk u-boot-pq3/board/cds/mpc8541cds/config.mk --- u-boot/board/cds/mpc8541cds/config.mk 2004-11-01 15:53:02.000000000 -0600 +++ u-boot-pq3/board/cds/mpc8541cds/config.mk 2004-12-03 15:20:42.000000000 -0600 @@ -27,4 +27,5 @@ PLATFORM_CPPFLAGS += -DCONFIG_E500=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 +PLATFORM_CPPFLAGS += -DCONFIG_CPM2=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC8541=1 diff -Nur --exclude=CVS u-boot/board/cds/mpc8555cds/config.mk u-boot-pq3/board/cds/mpc8555cds/config.mk --- u-boot/board/cds/mpc8555cds/config.mk 2004-11-01 15:53:03.000000000 -0600 +++ u-boot-pq3/board/cds/mpc8555cds/config.mk 2004-12-03 15:20:42.000000000 -0600 @@ -27,4 +27,5 @@ PLATFORM_CPPFLAGS += -DCONFIG_E500=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 +PLATFORM_CPPFLAGS += -DCONFIG_CPM2=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC8555=1 diff -Nur --exclude=CVS u-boot/board/mpc8560ads/config.mk u-boot-pq3/board/mpc8560ads/config.mk --- u-boot/board/mpc8560ads/config.mk 2004-06-08 19:34:47.000000000 -0500 +++ u-boot-pq3/board/mpc8560ads/config.mk 2004-12-03 15:20:43.000000000 -0600 @@ -29,5 +29,5 @@ TEXT_BASE = 0xfff80000 PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 -PLATFORM_CPPFLAGS += -DCONFIG_MPC8560=1 +PLATFORM_CPPFLAGS += -DCONFIG_CPM2=1 PLATFORM_CPPFLAGS += -DCONFIG_E500=1 diff -Nur --exclude=CVS u-boot/board/sbc8560/config.mk u-boot-pq3/board/sbc8560/config.mk --- u-boot/board/sbc8560/config.mk 2004-11-01 15:53:04.000000000 -0600 +++ u-boot-pq3/board/sbc8560/config.mk 2004-12-03 15:20:44.000000000 -0600 @@ -30,5 +30,5 @@ TEXT_BASE = 0xfffc0000 PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 -PLATFORM_CPPFLAGS += -DCONFIG_MPC8560=1 +PLATFORM_CPPFLAGS += -DCONFIG_CPM2=1 PLATFORM_CPPFLAGS += -DCONFIG_E500=1 diff -Nur --exclude=CVS u-boot/board/stxgp3/config.mk u-boot-pq3/board/stxgp3/config.mk --- u-boot/board/stxgp3/config.mk 2004-04-18 16:45:44.000000000 -0500 +++ u-boot-pq3/board/stxgp3/config.mk 2004-12-03 15:20:44.000000000 -0600 @@ -29,5 +29,5 @@ TEXT_BASE = 0xfff80000 PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 -PLATFORM_CPPFLAGS += -DCONFIG_MPC8560=1 +PLATFORM_CPPFLAGS += -DCONFIG_CPM2=1 PLATFORM_CPPFLAGS += -DCONFIG_E500=1 diff -Nur --exclude=CVS u-boot/common/cmd_bdinfo.c u-boot-pq3/common/cmd_bdinfo.c --- u-boot/common/cmd_bdinfo.c 2004-12-31 03:32:50.000000000 -0600 +++ u-boot-pq3/common/cmd_bdinfo.c 2005-02-01 13:16:44.000000000 -0600 @@ -68,13 +68,13 @@ print_str ("pci_busfreq", strmhz(buf, bd->bi_pci_busfreq)); #endif #else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_ML300 */ -#if defined(CONFIG_8260) || defined(CONFIG_MPC8560) +#if defined(CONFIG_CPM2) print_str ("vco", strmhz(buf, bd->bi_vco)); print_str ("sccfreq", strmhz(buf, bd->bi_sccfreq)); print_str ("brgfreq", strmhz(buf, bd->bi_brgfreq)); #endif print_str ("intfreq", strmhz(buf, bd->bi_intfreq)); -#if defined(CONFIG_8260) || defined(CONFIG_MPC8560) +#if defined(CONFIG_CPM2) print_str ("cpmfreq", strmhz(buf, bd->bi_cpmfreq)); #endif print_str ("busfreq", strmhz(buf, bd->bi_busfreq)); diff -Nur --exclude=CVS u-boot/common/cmd_bootm.c u-boot-pq3/common/cmd_bootm.c --- u-boot/common/cmd_bootm.c 2004-11-20 18:06:34.000000000 -0600 +++ u-boot-pq3/common/cmd_bootm.c 2005-02-01 13:16:44.000000000 -0600 @@ -580,12 +580,12 @@ kbd->bi_flbfreq /= 1000000L; kbd->bi_vcofreq /= 1000000L; #endif -#if defined(CONFIG_8260) || defined(CONFIG_MPC8560) +#if defined(CONFIG_CPM2) kbd->bi_cpmfreq /= 1000000L; kbd->bi_brgfreq /= 1000000L; kbd->bi_sccfreq /= 1000000L; kbd->bi_vco /= 1000000L; -#endif /* CONFIG_8260 */ +#endif #if defined(CONFIG_MPC5xxx) kbd->bi_ipbfreq /= 1000000L; kbd->bi_pcifreq /= 1000000L; diff -Nur --exclude=CVS u-boot/cpu/mpc8260/config.mk u-boot-pq3/cpu/mpc8260/config.mk --- u-boot/cpu/mpc8260/config.mk 2003-11-17 15:14:39.000000000 -0600 +++ u-boot-pq3/cpu/mpc8260/config.mk 2004-12-03 15:20:46.000000000 -0600 @@ -23,5 +23,5 @@ PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -PLATFORM_CPPFLAGS += -DCONFIG_8260 -ffixed-r2 -ffixed-r29 \ +PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 -ffixed-r2 -ffixed-r29 \ -mstring -mcpu=603e -mmultiple diff -Nur --exclude=CVS u-boot/cpu/mpc85xx/commproc.c u-boot-pq3/cpu/mpc85xx/commproc.c --- u-boot/cpu/mpc85xx/commproc.c 2003-10-15 18:53:51.000000000 -0500 +++ u-boot-pq3/cpu/mpc85xx/commproc.c 2004-12-03 15:20:46.000000000 -0600 @@ -24,7 +24,7 @@ #include <common.h> #include <asm/cpm_85xx.h> -#if defined(CONFIG_MPC8560) +#if defined(CONFIG_CPM2) /* * because we have stack and init data in dual port ram * we must reduce the size @@ -211,4 +211,4 @@ #endif /* CONFIG_POST */ -#endif /* CONFIG_MPC8560 */ +#endif /* CONFIG_CPM2 */ diff -Nur --exclude=CVS u-boot/cpu/mpc85xx/cpu_init.c u-boot-pq3/cpu/mpc85xx/cpu_init.c --- u-boot/cpu/mpc85xx/cpu_init.c 2003-10-15 18:53:51.000000000 -0500 +++ u-boot-pq3/cpu/mpc85xx/cpu_init.c 2004-12-03 15:20:46.000000000 -0600 @@ -30,7 +30,7 @@ #include <ioports.h> #include <asm/io.h> -#ifdef CONFIG_MPC8560 +#ifdef CONFIG_CPM2 static void config_8560_ioports (volatile immap_t * immr) { int portnum; @@ -115,7 +115,7 @@ memset ((void *) gd, 0, sizeof (gd_t)); -#ifdef CONFIG_MPC8560 +#ifdef CONFIG_CPM2 config_8560_ioports(immap); #endif @@ -173,7 +173,7 @@ memctl->br7 = CFG_BR7_PRELIM; #endif -#if defined(CONFIG_MPC8560) +#if defined(CONFIG_CPM2) m8560_cpm_reset(); #endif } @@ -189,6 +189,21 @@ volatile uint temp; asm("msync;isync"); + temp = l2cache->l2ctl; + temp &= 0x30000000; + switch ( temp ) { + case 0x20000000: + printf ("L2 cache 256KB:"); + break; + case 0x00000000: + case 0x10000000: + case 0x30000000: + default: + printf ("L2 cache unknown size. Check the silicon!\n"); + return -1; + } + + asm("msync;isync"); l2cache->l2ctl = 0x68000000; /* invalidate */ temp = l2cache->l2ctl; asm("msync;isync"); @@ -196,7 +211,7 @@ temp = l2cache->l2ctl; asm("msync;isync"); - printf("L2 cache enabled: 256KB\n"); + printf("enabled\n"); #else printf("L2 cache disabled.\n"); #endif diff -Nur --exclude=CVS u-boot/cpu/mpc85xx/ether_fcc.c u-boot-pq3/cpu/mpc85xx/ether_fcc.c --- u-boot/cpu/mpc85xx/ether_fcc.c 2003-10-15 18:53:51.000000000 -0500 +++ u-boot-pq3/cpu/mpc85xx/ether_fcc.c 2004-12-03 15:20:46.000000000 -0600 @@ -48,7 +48,7 @@ #include <config.h> #include <net.h> -#if defined(CONFIG_MPC8560) +#if defined(CONFIG_CPM2) #if defined(CONFIG_ETHER_ON_FCC) && (CONFIG_COMMANDS & CFG_CMD_NET) && \ defined(CONFIG_NET_MULTI) @@ -458,4 +458,4 @@ #endif /* CONFIG_ETHER_ON_FCC && CFG_CMD_NET && CONFIG_NET_MULTI */ -#endif /* CONFIG_MPC8560 */ +#endif /* CONFIG_CPM2 */ diff -Nur --exclude=CVS u-boot/cpu/mpc85xx/serial_scc.c u-boot-pq3/cpu/mpc85xx/serial_scc.c --- u-boot/cpu/mpc85xx/serial_scc.c 2003-10-15 18:53:51.000000000 -0500 +++ u-boot-pq3/cpu/mpc85xx/serial_scc.c 2004-12-03 15:20:46.000000000 -0600 @@ -35,7 +35,7 @@ #include <common.h> #include <asm/cpm_85xx.h> -#if defined(CONFIG_MPC8560) +#if defined(CONFIG_CPM2) #if defined(CONFIG_CONS_ON_SCC) #if CONFIG_CONS_INDEX == 1 /* Console on SCC1 */ @@ -271,4 +271,4 @@ #endif /* CONFIG_CONS_ON_SCC */ -#endif /* CONFIG_MPC8560 */ +#endif /* CONFIG_CPM2 */ diff -Nur --exclude=CVS u-boot/cpu/mpc85xx/speed.c u-boot-pq3/cpu/mpc85xx/speed.c --- u-boot/cpu/mpc85xx/speed.c 2004-08-01 17:48:20.000000000 -0500 +++ u-boot-pq3/cpu/mpc85xx/speed.c 2004-12-03 15:20:46.000000000 -0600 @@ -82,7 +82,7 @@ { DECLARE_GLOBAL_DATA_PTR; sys_info_t sys_info; -#if defined(CONFIG_MPC8560) +#if defined(CONFIG_CPM2) volatile immap_t *immap = (immap_t *) CFG_IMMR; uint sccr, dfbrg; @@ -94,7 +94,7 @@ get_sys_info (&sys_info); gd->cpu_clk = sys_info.freqProcessor; gd->bus_clk = sys_info.freqSystemBus; -#if defined(CONFIG_MPC8560) +#if defined(CONFIG_CPM2) gd->vco_out = 2*sys_info.freqSystemBus; gd->cpm_clk = gd->vco_out / 2; gd->scc_clk = gd->vco_out / 4; diff -Nur --exclude=CVS u-boot/doc/README.mpc85xxads u-boot-pq3/doc/README.mpc85xxads --- u-boot/doc/README.mpc85xxads 2004-10-10 16:21:57.000000000 -0500 +++ u-boot-pq3/doc/README.mpc85xxads 2004-12-03 16:31:35.000000000 -0600 @@ -134,7 +134,6 @@ CONFIG_E500 BOOKE e500 family(Motorola) CONFIG_MPC85xx MPC8540,MPC8560 and their derivatives CONFIG_MPC8540 MPC8540 specific - CONFIG_MPC8560 MPC8560 specific CONFIG_MPC8540ADS MPC8540ADS board specific CONFIG_MPC8560ADS MPC8560ADS board specific CONFIG_TSEC_ENET Use on-chip 10/100/1000 ethernet for networking diff -Nur --exclude=CVS u-boot/include/asm-ppc/global_data.h u-boot-pq3/include/asm-ppc/global_data.h --- u-boot/include/asm-ppc/global_data.h 2004-10-27 19:09:39.000000000 -0500 +++ u-boot-pq3/include/asm-ppc/global_data.h 2005-02-01 13:17:13.000000000 -0600 @@ -39,7 +39,7 @@ unsigned long baudrate; unsigned long cpu_clk; /* CPU clock in Hz! */ unsigned long bus_clk; -#if defined(CONFIG_8260) || defined(CONFIG_MPC8560) +#if defined(CONFIG_CPM2) /* There are many clocks on the MPC8260 - see page 9-5 */ unsigned long vco_out; unsigned long cpm_clk; @@ -64,7 +64,7 @@ unsigned long env_addr; /* Address of Environment struct */ unsigned long env_valid; /* Checksum of Environment valid? */ unsigned long have_console; /* serial_init() was called */ -#if defined(CFG_ALLOC_DPRAM) || defined(CONFIG_8260) || defined(CONFIG_MPC8560) +#if defined(CFG_ALLOC_DPRAM) || defined(CONFIG_CPM2) unsigned int dp_alloc_base; unsigned int dp_alloc_top; #endif diff -Nur --exclude=CVS u-boot/include/asm-ppc/immap_85xx.h u-boot-pq3/include/asm-ppc/immap_85xx.h --- u-boot/include/asm-ppc/immap_85xx.h 2004-10-10 16:21:57.000000000 -0500 +++ u-boot-pq3/include/asm-ppc/immap_85xx.h 2004-12-03 15:20:48.000000000 -0600 @@ -1023,9 +1023,7 @@ } ccsr_pic_t; /* CPM Block(0x8_0000-0xc_0000) */ -#if defined(CONFIG_MPC8540) \ - || defined(CONFIG_MPC8541) \ - || defined(CONFIG_MPC8555) +#ifndef CONFIG_CPM2 typedef struct ccsr_cpm { char res[262144]; } ccsr_cpm_t; diff -Nur --exclude=CVS u-boot/include/asm-ppc/u-boot.h u-boot-pq3/include/asm-ppc/u-boot.h --- u-boot/include/asm-ppc/u-boot.h 2004-12-31 03:32:53.000000000 -0600 +++ u-boot-pq3/include/asm-ppc/u-boot.h 2005-02-01 13:17:13.000000000 -0600 @@ -59,7 +59,7 @@ unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ unsigned long bi_intfreq; /* Internal Freq, in MHz */ unsigned long bi_busfreq; /* Bus Freq, in MHz */ -#if defined(CONFIG_8260) || defined(CONFIG_MPC8560) +#if defined(CONFIG_CPM2) unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ diff -Nur --exclude=CVS u-boot/include/configs/MPC8541CDS.h u-boot-pq3/include/configs/MPC8541CDS.h --- u-boot/include/configs/MPC8541CDS.h 2005-02-02 15:58:50.000000000 -0600 +++ u-boot-pq3/include/configs/MPC8541CDS.h 2005-02-01 13:17:15.000000000 -0600 @@ -33,6 +33,7 @@ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */ +#define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_MPC8541 1 /* MPC8541 specific */ #define CONFIG_MPC8541CDS 1 /* MPC8541CDS board specific */ diff -Nur --exclude=CVS u-boot/include/configs/MPC8555CDS.h u-boot-pq3/include/configs/MPC8555CDS.h --- u-boot/include/configs/MPC8555CDS.h 2005-02-02 15:58:50.000000000 -0600 +++ u-boot-pq3/include/configs/MPC8555CDS.h 2005-02-01 13:17:15.000000000 -0600 @@ -33,6 +33,7 @@ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */ +#define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_MPC8555 1 /* MPC8555 specific */ #define CONFIG_MPC8555CDS 1 /* MPC8555CDS board specific */ diff -Nur --exclude=CVS u-boot/include/configs/MPC8560ADS.h u-boot-pq3/include/configs/MPC8560ADS.h --- u-boot/include/configs/MPC8560ADS.h 2005-01-09 11:12:34.000000000 -0600 +++ u-boot-pq3/include/configs/MPC8560ADS.h 2005-02-01 13:17:15.000000000 -0600 @@ -38,7 +38,7 @@ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ -#define CONFIG_MPC8560 1 /* MPC8560 specific */ +#define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */ #define CONFIG_PCI diff -Nur --exclude=CVS u-boot/include/configs/SBC8540.h u-boot-pq3/include/configs/SBC8540.h --- u-boot/include/configs/SBC8540.h 2005-02-02 15:58:50.000000000 -0600 +++ u-boot-pq3/include/configs/SBC8540.h 2005-02-01 13:17:15.000000000 -0600 @@ -46,7 +46,7 @@ #define CONFIG_MPC85xx_REV1 1 /* MPC85xx Rev 1.0 chip */ -#define CONFIG_MPC8560 1 /* MPC8560 (CPU) specific */ +#define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_SBC8540 1 /* configuration for SBC8560 board */ diff -Nur --exclude=CVS u-boot/include/configs/sbc8560.h u-boot-pq3/include/configs/sbc8560.h --- u-boot/include/configs/sbc8560.h 2005-02-02 15:58:51.000000000 -0600 +++ u-boot-pq3/include/configs/sbc8560.h 2005-02-01 13:17:16.000000000 -0600 @@ -40,7 +40,7 @@ #define CONFIG_MPC85xx_REV1 1 /* MPC85xx Rev 1.0 chip */ -#define CONFIG_MPC8560 1 /* MPC8560 specific */ +#define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_SBC8560 1 /* configuration for SBC8560 board */ /* XXX flagging this as something I might want to delete */ diff -Nur --exclude=CVS u-boot/include/configs/SBC8560.h u-boot-pq3/include/configs/SBC8560.h --- u-boot/include/configs/SBC8560.h 2005-02-02 15:58:51.000000000 -0600 +++ u-boot-pq3/include/configs/SBC8560.h 2005-02-01 13:17:15.000000000 -0600 @@ -46,7 +46,7 @@ #define CONFIG_MPC85xx_REV1 1 /* MPC85xx Rev 1.0 chip */ -#define CONFIG_MPC8560 1 /* MPC8560 (CPU) specific */ +#define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_SBC8560 1 /* configuration for SBC8560 board */ #define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific (supplement) */ diff -Nur --exclude=CVS u-boot/include/configs/stxgp3.h u-boot-pq3/include/configs/stxgp3.h --- u-boot/include/configs/stxgp3.h 2005-02-02 15:58:51.000000000 -0600 +++ u-boot-pq3/include/configs/stxgp3.h 2005-02-01 13:17:16.000000000 -0600 @@ -39,7 +39,7 @@ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ -#define CONFIG_MPC8560 1 /* MPC8560 specific */ +#define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_STXGP3 1 /* Silicon Tx GPPP board specific*/ #undef CONFIG_PCI /* pci ethernet support */ diff -Nur --exclude=CVS u-boot/include/ioports.h u-boot-pq3/include/ioports.h --- u-boot/include/ioports.h 2003-10-15 18:53:55.000000000 -0500 +++ u-boot-pq3/include/ioports.h 2004-12-03 15:20:47.000000000 -0600 @@ -25,7 +25,7 @@ * the internal memory map aligns the above structure on * a 0x20 byte boundary */ -#ifdef CONFIG_MPC8560 +#ifdef CONFIG_MPC85xx #define ioport_addr(im, idx) (ioport_t *)((uint)&((im)->im_cpm.im_cpm_iop) + ((idx)*0x20)) #else #define ioport_addr(im, idx) (ioport_t *)((uint)&(im)->im_ioport + ((idx)*0x20)) diff -Nur --exclude=CVS u-boot/include/net.h u-boot-pq3/include/net.h --- u-boot/include/net.h 2004-10-09 16:56:21.000000000 -0500 +++ u-boot-pq3/include/net.h 2004-12-03 15:20:47.000000000 -0600 @@ -29,7 +29,7 @@ # endif #endif /* CONFIG_MPC5xxx */ -#if !defined(CONFIG_NET_MULTI) && (defined(CONFIG_8260) || defined(CONFIG_MPC8560)) +#if !defined(CONFIG_NET_MULTI) && defined(CONFIG_CPM2) #include <config.h> #if defined(CONFIG_ETHER_ON_FCC) #if defined(CONFIG_ETHER_ON_SCC) diff -Nur --exclude=CVS u-boot/lib_ppc/board.c u-boot-pq3/lib_ppc/board.c --- u-boot/lib_ppc/board.c 2004-12-31 03:32:54.000000000 -0600 +++ u-boot-pq3/lib_ppc/board.c 2005-02-01 13:17:25.000000000 -0600 @@ -50,7 +50,7 @@ #include <net.h> #include <serial.h> #ifdef CFG_ALLOC_DPRAM -#if !(defined(CONFIG_8260)||defined(CONFIG_MPC8560)) +#if !defined(CONFIG_CPM2) #include <commproc.h> #endif #endif @@ -272,7 +272,7 @@ init_timebase, #endif #ifdef CFG_ALLOC_DPRAM -#if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560)) +#if !defined(CONFIG_CPM2) dpram_init, #endif #endif @@ -360,7 +360,7 @@ /* compiler optimization barrier needed for GCC >= 3.4 */ __asm__ __volatile__("": : :"memory"); -#if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560)) +#if !defined(CONFIG_CPM2) /* Clear initial global data */ memset ((void *) gd, 0, sizeof (gd_t)); #endif @@ -521,12 +521,12 @@ WATCHDOG_RESET (); bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ -#if defined(CONFIG_8260) || defined(CONFIG_MPC8560) +#if defined(CONFIG_CPM2) bd->bi_cpmfreq = gd->cpm_clk; bd->bi_brgfreq = gd->brg_clk; bd->bi_sccfreq = gd->scc_clk; bd->bi_vco = gd->vco_out; -#endif /* CONFIG_8260 */ +#endif /* CONFIG_CPM2 */ #if defined(CONFIG_MPC5xxx) bd->bi_ipbfreq = gd->ipb_clk; bd->bi_pcifreq = gd->pci_clk;

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[U-Boot-Users] IXP425 in little-endian.
by Herb Radford 08 Feb '05

08 Feb '05

I'm starting on a "port" of U-Boot to the IXP425 psuedo-little-endian mode. Before I get too far, I was wondering if anyone is in the process of doing this. I know that the little-endian name is a bit bogus since the IXP425' version is NOT really little-endian. I'm starting from 1.1.3 (and diffing for changes weekly) and am assuming I'll be using the "address coherent" mode since data coherency requires the use of the p-bit in the MMU page tables. Any pointers, hints etc. are welcome. Regards, Herb --- Outgoing mail is certified Virus Free. Checked by AVG anti-virus system (http://www.grisoft.com). Version: 6.0.796 / Virus Database: 540 - Release Date: 11/13/2004

1 0

[U-Boot-Users] I2C related questions with regards to booting 8xx on 2.6.10-rc3
by Povolotsky, Alexander 07 Feb '05

07 Feb '05

> Hello, > > I have MPC880 microprocessor based board with single 24C02 I2C EEPROM, > connected to the I2C bus. In 2.6.10-rc3 the 8xx configuration is only buildable for the following settings : CONFIG_EXPERIMENTAL=y # CONFIG_CLEAN_COMPILE is not set CONFIG_BROKEN=y CONFIG_BROKEN_ON_SMP=y > However until some time ago, even bulding of 8xx with I2C configured was broken. > Per suggestion from Tom Rini, I copied i2c-algo-8xx.h from Linux 2.4.26 > into 2.6.10-rc3 code source and made couple small changes > to allow building of the 8xx code with I2C configured, please see: > http://archives.andrew.net.au/lm-sensors/msg28725.html > > Currently booting of the board hangs in the I2C driver after invocation of > interruptible_sleep_on( ) > function call in cpm_iic_tryaddress( ) function (in i2c-algo-8xx.c > file). > > Is it appropriate to use the interruptible_sleep_on( ) function at the > kernel booting stage ? > (I personally do not think so - since such usage prevents further kernel > booting - as observed). > What should be done in this code to avoid slleping ? > > I presume that the usage of the interruptible_sleep_on( ) function would > be appropriate if the > I2C would be configured as a module (after the kernel booting is > completed) ? > Follow up question: is it really expected to do I2C initialization ONLY > as a module after the kernel booting ? > (is it documented anyplace ?) I understood (am I correct ?) that there is an alternative "soft" I2C approach, used in U-boot ? If so, do you think - is it possible to port and try this "soft" I2C method at kernel booting ? > The (end of the ) log buffer (please note that I have console_init() call > commented out and rely on log buffer examination during the bootloader stage upon kernel's soft reboot) shows following: > .... ..... <6>HDLC support module revision 1.17. <6>elevator: using anticipatory as default io scheduler. <5>physmap flash device:400000 at 4000000. <4>__ioremap(): phys addr 04000000 is RAM lr c01d93f0. <4>__ioremap(): virt_to_phys(high_memory) addr 02000000. <4>__ioremap(): passed first cond. <4>__ioremap(): passed second cond. <4>__ioremap(): passed label. <5>init_physmap after simple_map_init. <5>init_physmap type=cfi_probe. <6>phys_mapped_flash: Found 1 x16 devys_mapped_flash: Found 1 x16 devices at 0x0 in 16-bit bank. <4> Amd/Fujitsu Extended Query Tableat 0x0040. <5>number of CFI chips: 1. <5>cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.. <5>init_physmap after for loop. <5>RedBoot partition parsing not available. <5>init_physmap after parse_mtd_partitions. <6>mtd: Giving out device 0 to phys_mapped_flash. <5>init_physmap after add_mtd_device. <7>CLASS: registering class device: ID = 'mice'. <<==== can not get rid of this from configuration (Of course I do not have mice !) <6>mice: PS/2 mouse device common for all mice > <6>i2c /dev entries driver. > <7>device class 'i2c-dev': registering. > <7>bus i2c:add driver dev_driver. > <7>i2c-core: driver dev_driver registered > <6>i2c-rpx: i2c MPC8xx driver. > <7>DEV: registering device: ID ='i2c-0'. > <7>CLASS: registering class device: ID= 'i2c-0'. > <7>i2c_adapter i2c-0:Registered as minor 0. > <7>CLASS:registering class device: ID = 'i2c-0' > <7>i2c_adapter i2c-0: registered as adapter #0. > <4>cpm_iic_init() - iip=fa203c80. > <4>cpm_iic_init[132] Install ISR for IRQ 16. > <6>CPM interrupt c0105d90 replacing c01f7a8c. > <3>request_irq() returned -22 for CPM vector 32. > <6> i2c-algo-8xx.o: scanning bus m8xx........ > <4>cpm_iic_tryaddress(cpm=c019b9f8,addr=0). > <4>iip fa203c80, dp_addr 0x800. > <4>iic_tbase 2048, r_tbase 2048 > <4>about to sleep > .ABOVE LINE IS THE LAST ENTRY IN THE LOG BUFFER - THE BOOT HANGS > THEREAFTER ... > > Here is the fragment of the cpm_iic_tryaddress( ) function in > i2c-algo-8xx.c, > where the problem takes place. This function is getting called from a "for loop" with the increment of the addresses range, starting from the address "0" to address "128", but it is getting into sleep on a first entry into the cpm_iic_tryaddress( ) function with address 0 as an argument. I tried to exclude address 0 from the loop and start with address 1 - but then it would hang at waiting response from address 1. > : > .... > // save_flags(flags); cli(); > i2c->i2c_i2cer = 0xff; > i2c->i2c_i2cmr = 0x13; /* Enable some interupts */ > i2c->i2c_i2mod = 1; /* Enable */ > i2c->i2c_i2com = 0x81; /* Start master */ > // restore_flags(flags); > > if (cpm_debug > 1) printk("about to sleep\n"); > > /* wait for IIC transfer */ > interruptible_sleep_on(&iic_wait); > if (signal_pending(current)) > return -EIO; > > if (cpm_debug > 1) printk("back from sleep\n"); > > if (tbdf->cbd_sc & BD_SC_NAK) { > if (cpm_debug > 1) printk("IIC try; no ack\n"); > return 0; > } > > if (tbdf->cbd_sc & BD_SC_READY) { > printk("IIC try; complete but tbuf ready\n"); > } > > return 1; > > ........ Below I am attaching the log buffer showing successful I2C initialization on Linux 2.4.26: ..... Starting kswapd devfs: v1.12c (20020818) Richard Gooch (rgooch(a)atnf.csiro.au) devfs: boot_options: 0x1 JFFS2 version 2.2. (NAND) (C) 2001-2003 Red Hat, Inc. i2c-core.o: i2c core module version 2.6.1 (20010830) i2c-dev.o: i2c /dev entries driver module version 2.6.1 (20010830) i2c-algo-8xx.o: i2c mpc8xx algorithm module i2c-rpx.o: i2c RPX Lite module i2c-algo-8xx.o: scanning bus rpx... (56) i2c-proc.o version 2.6.1 (20010830) CPM UART driver version 0.04 ttyS0 at 0x0280 is on SMC1 using BRG1 ttyS1 at 0x0380 is on SMC2 using BRG2 pty: 256 Unix98 ptys configured Entropia driver v0.1 Entropia @06300000 remaped to c3072000 ... > As one could see, the same (in principle, except for my potential goofs in porting ;-) ) code works in 2.4.26 without hanging and finds the 24C02 I2C EEPROM device at address 56 ! > Thanks, > Best Regards, > Alex > >

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[U-Boot-Users] (no subject)
by Bruce 07 Feb '05

07 Feb '05

Hello! i'm starting to use u-boot for the first time. But i encounter a lot of dificulties. Is there someone who can help me?. please The first problem is that i can't find my evaluation board in config files. how i can build u-boot withou this file? my board is a Memec Virtex II Pro, xc2vp20-ff1152. Need i to write my board configuration? what memery is needeed to uboot? i want to put it in flash memory. i want to load linux via Ethernet and write into Flash memory, how i do it? Thanks to give me some explanations, because english is not my language, and it is very difficult to find documentations in french. John!

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RE: [U-Boot-Users] bdi2000 reset target failed
by Neil Wilson 07 Feb '05

07 Feb '05

> -----Original Message----- > From: u-boot-users-admin(a)lists.sourceforge.net > [mailto:u-boot-users-admin@lists.sourceforge.net] On Behalf > Of Hinko Kocevar > Sent: Monday, February 07, 2005 12:56 PM > To: u-boot-users(a)lists.sourceforge.net > Subject: [U-Boot-Users] bdi2000 reset target failed > > Hi, > After good start I'm back to square one in my debugging > session. After a while and with help on this list I managed > to get target resetted and did some tests. After a while the > same problem appeared - BDI2000 can not reset target and > fails with message: > - TARGET: processing reset request > - TARGET: BDI asserts RESET and TRST > - TARGET: BDI removed TRST > - TARGET: Bypass check: 0x000000001 => 0x00FFFFFF > - TARGET: JTAG exists check failed > # TARGET: resetting target failed > # JTAG: communication with target failed > - TARGET: target will be restarted in 10 sec > > I'm pretty sure that JTAG cable for first target is OK, since > it was working a while ago, and I also tested BDI2000 with > another PXA target and the same error emerges there (with > this target I have direct connection between BDI2000 and target JTAG). > > Any help is appreciated... > I know we had some problems getting a bdi2000 to reset one of our own powerpc boards, slowing the clock rate in the bdi script helped. Neil -- Neil Wilson Airspan Communications Ltd. Cambridge House, Oxford Road, Uxbridge, Middx, UB8 1UN, UK. Tel: +44(0)1895-467265 neilwilson(a)airspan.com www.airspan.com

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[U-Boot-Users] Debugging U-Boot using BDI2000
by "Häpe, Sebastian, HRD/AB" 07 Feb '05

07 Feb '05

Hi! I have a little problem with debugging when using a BDI2000 JTAG-debugger. Currently I try to port U-Boot to a self-designed board, based on an PPC 603e-processor. When I start U-Boot from Flash-memory using the BDI2000 it is impossible to set any software-breakpoints, this means I _can_ set the breakpoints, but when I start the code, the debugger does not stop there. It is the same with the hardware-breakpoints. Here the steps i did: My Flash-memory starts at Address 0xff800000 and there I load the U-Boot image. Then I tell the BDI2000 via the 'TI 0xff800100' command to start U-Boot. After that step the PC stands at 0xff800104 and I start the GDB and connect to the BDI using the command 'target remote bdi:2001'. If after that I set a breakpoint at address 0xff800148 (sync-command) with 'BI 0xff800148' the BDI says: 'Breakpoint identification 0'. Calling the 'continue'-command in GDB results in an error like that: 'Cannot insert breakpoint -2.' 'Error accessing memory address 0xff800100: Unknown error 4294967295' Does anyone have experiences in BDI2000-debugging and can tell me how he/she solved the breakpoint-problems? Thanks, Sebastian Häpe

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[U-Boot-Users] MXLADS porting
by mike 07 Feb '05

07 Feb '05

Dear all I am trying to port mxlads board,and i copy all the files from board/mx1ads/ and include/configs/mx1ads.h. But i can not see the u-boot banner in minicom. The difference between MX1ADS and MXLADS should be very small, As i know embedded sram is reduced in MXL processor and different flash are used, I also looked up motorola BSP bootloader, the SDRAM setting should be the same. Does anyone try MXLADS before, or anyone can suggest me a way to debug? best regard Mike,Lee

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[U-Boot-Users] link error on first compile
by Tim Bird 04 Feb '05

04 Feb '05

Hi all, On a fresh untar; make xxx_config; make all, I get an error linking the example program hello_world with start.o. This can be worked around by removing 'examples' from the list of SUBDIRS in the top-level Makefile. After building, I added 'examples' back in. Strangely, for one set of builds, this solved my problem (and hello_world linked OK, even after a 'make distclean'), but for another set of builds, hello_world wouldn't link even when cpu/arm925t/start.o was present. I haven't been able to figure out the problem, but I thought I'd report it. This is with a home-built gcc: arm-sony-linux-gcc (GCC) 3.4.3 -- Tim ---------------- [tbird@timdesk u-boot-1.1.2]$ make all make[1]: Entering directory `/home/tbird/work/innovator/u-boot-1.1.2/tools' make[1]: `.depend' is up to date. make[1]: Leaving directory `/home/tbird/work/innovator/u-boot-1.1.2/tools' make[1]: Entering directory `/home/tbird/work/innovator/u-boot-1.1.2/examples' make[1]: `.depend' is up to date. make[1]: Leaving directory `/home/tbird/work/innovator/u-boot-1.1.2/examples' make[1]: Entering directory `/home/tbird/work/innovator/u-boot-1.1.2/post' make[1]: `.depend' is up to date. make[1]: Leaving directory `/home/tbird/work/innovator/u-boot-1.1.2/post' make[1]: Entering directory `/home/tbird/work/innovator/u-boot-1.1.2/post/cpu' make[1]: `.depend' is up to date. make[1]: Leaving directory `/home/tbird/work/innovator/u-boot-1.1.2/post/cpu' make -C tools all make[1]: Entering directory `/home/tbird/work/innovator/u-boot-1.1.2/tools' gcc -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -c -o img2srec.o img2srec.c gcc -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -o img2srec img2srec.o strip img2srec gcc -g -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -c mkimage.c gcc -g -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -c crc32.c gcc -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -o mkimage mkimage.o crc32.o strip mkimage gcc -g -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -c envcrc.c gcc -g -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -c environment.c gcc -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -o envcrc envcrc.o crc32.o environment.o gcc -g -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -c gen_eth_addr.c gcc -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -o gen_eth_addr gen_eth_addr.o strip gen_eth_addr gcc -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -c -o bmp_logo.o bmp_logo.c gcc -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -o bmp_logo bmp_logo.o strip bmp_logo ./bmp_logo logos/denx.bmp >/home/tbird/work/innovator/u-boot-1.1.2/include/bmp_logo.h make[1]: Leaving directory `/home/tbird/work/innovator/u-boot-1.1.2/tools' make -C examples all make[1]: Entering directory `/home/tbird/work/innovator/u-boot-1.1.2/examples' arm-sony-linux-gcc -g -Os -fno-strict-aliasing -fno-common -ffixed-r8 -malignment-traps -msoft-float -D__KERNEL__ -DTEXT_BASE=0x11080000 -I/home/tbird/work/innovator/u-boot-1.1.2/include -fno-builtin -ffreestanding -nostdinc -isystem /home/local/arm-sony-linux/devel/bin/../lib/gcc/arm-sony-linux/3.4.3/include -pipe -DCONFIG_ARM -D__ARM__ -mapcs-32 -march=armv4 -Wall -Wstrict-prototypes -c -o stubs.o stubs.c arm-sony-linux-ar crv libstubs.a stubs.o a - stubs.o arm-sony-linux-gcc -g -Os -fno-strict-aliasing -fno-common -ffixed-r8 -malignment-traps -msoft-float -D__KERNEL__ -DTEXT_BASE=0x11080000 -I/home/tbird/work/innovator/u-boot-1.1.2/include -fno-builtin -ffreestanding -nostdinc -isystem /home/local/arm-sony-linux/devel/bin/../lib/gcc/arm-sony-linux/3.4.3/include -pipe -DCONFIG_ARM -D__ARM__ -mapcs-32 -march=armv4 -Wall -Wstrict-prototypes -g -Os -fno-strict-aliasing -fno-common -ffixed-r8 -malignment-traps -msoft-float -D__KERNEL__ -DTEXT_BASE=0x11080000 -I/home/tbird/work/innovator/u-boot-1.1.2/include -fno-builtin -ffreestanding -nostdinc -isystem /home/local/arm-sony-linux/devel/bin/../lib/gcc/arm-sony-linux/3.4.3/include -pipe -DCONFIG_ARM -D__ARM__ -mapcs-32 -march=armv4 -I.. -Bstatic -T /home/tbird/work/innovator/u-boot-1.1.2/board/omap1510inn/u-boot.lds -Ttext 0x11080000 hello_world.c -o hello_world /home/local/arm-sony-linux/devel/bin/../lib/gcc/arm-sony-linux/3.4.3/../../../../arm-sony-linux/bin/ld: cannot find cpu/arm925t/start.o collect2: ld returned 1 exit status make[1]: *** [hello_world] Error 1 make[1]: Leaving directory `/home/tbird/work/innovator/u-boot-1.1.2/examples' make: *** [examples] Error 2 ----- ============================= Tim Bird Architecture Group Chair, CE Linux Forum Senior Staff Engineer, Sony Electronics =============================

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[U-Boot-Users] Content violation
by mailadmin2＠lntinfotech.com 04 Feb '05

04 Feb '05

Content violation found in email message. From: u-boot-users(a)lists.sourceforge.net To: angalore1helpdesk(a)lntinfotech.com File(s): message.scr Matching filename: *.scr

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