May 2004 - U-Boot

[U-Boot-Users] Add another FLASH to my board
by CG 12 May '04

12 May '04

Hello, I ordered a Strataflash from Intel (E28F128J3C), 128 Mbits. I would like to add it to the AT91RM9200 development board. Is there any document to explain how to proceed to add a new flash memory? So I will have two flashes to initialize. But the first flash, it works. The base address of the first flash (AT49BV162A - 2 MB) is 0x1000000 The base address of the strataflash memory : 0x30000000 To do? 1. In lib_arm\board.c, I have to call a strataflash_init() routine in order to initialize the flash_info_t structure. 2. call display_flash_config to print out the flash size. 3. I don't know what to do with these routines: flash_erase, write_word, write_buff. The content of these routines are different if we access to the strataflash or AT49 flash. So, how can I manage it correctly? Best regards Christian

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[U-Boot-Users] MVME2700 MPC750
by Vuong My-Hong 12 May '04

12 May '04

Hi, Has anyone developed any code for the MVME2700 board with the MPC750? Thanks, My Hong Vuong

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[U-Boot-Users] [PATCH] Add support for Logic LH7A400
by Paul Ruhland 12 May '04

12 May '04

This patch adds support for Logic's Zoom LH7A40x boards, specifically the LH7A400. This board depends on changes to the smc91111 driver for working ethernet. I've submitted that patch seperately. I apoligize if this mail is duplicated as we were experiencing network difficulties when I sent the original and it never seemed to have arrived.

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[U-Boot-Users] CROSS_COMPILE definition question
by Stan Kuciej 11 May '04

11 May '04

Hi All, I''m new to u-boot and I have a question: I want to compile u-boot for a MPC8272ADS board on a Sun with the gcc cross-compiler. In the u-boot README it says that I have to change the CROSS_COMPILE definition. What do I change it to in this case? Thanks, Stan Kuciej

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[U-Boot-Users] [PATCH] Add support for Logic LH7A400 SDK board(s)
by Paul Ruhland 11 May '04

11 May '04

This patch adds support for the Logic Zoom LH7A40x, specifically the LH7A400, SDK board(s). There are changes to the smc91111 driver required to support this board. I've left those changes out of this patch and will submit them in a seperate post. -- Paul Ruhland (pruhland(a)microwavedata.com) Software Engineer Microwave Data Systems, Inc. Rochester, NY 14620

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[U-Boot-Users] [PATCH] smc91111 - Add I/O functions, remove environment calls
by Paul Ruhland 11 May '04

11 May '04

Previous post had wrong patch...sorry ===== This patch makes the following hanges to the smc91111 driver, detailed description(s) follow: 1) adds I/O functions (SMC_inb, SMC_outb, SMC_inw, SMC_outw, SMC_insw, SMC_outsw ) since some hardware will not work with the macro I/O (Logic LH7A400). 2) backs out/modifies a recent change putting calls to getenv and setenv in 'smc_get_ethaddr'. 3) restores CTL_DEFAULT definition to the register default and or's CTL_AUTO_RELEASE in smc_reset. 4) removes packet number and ptr register 'saving and restoral'. You don't have to do this unless you're changing these in an interrupt handler. This driver is polled. 5) adds proper handling of tx interrupt status and autorelease Description: ------------ 1) Using the I/O macros on the Logic LH7A400 SDK does not work and puts the MAC in an unknown state. Symptoms being data being shifted on the wire, packets being sent twice, MAC unable to free packets. Receive works just fine while all this is going on. It seems multiple word writes are happening to fast for the SMC while all other access modes work fine. It could be the IO function calls add just enough delay to make the SMC happy. Its not my hardware and our board will be different so I didn't want to spend any more time on this. No code is added for boards that don't enable the functions. This is done by defining 'CONFIG_SMC_USE_IOFUNCS' in the board config. 2) I don't think there should be calls to environment functions from the ethernet driver. The value being read is already passed into the function in the board info structure. If you haven't set an ethernet address in your environment this will be all zeros. If you have set an address in your environment it will be in the board info struct. If either of these is not true, your board is not set up correctly. I don't want a driver changing my environment, period. Changing the board info ethaddr value is fine but don't touch the environment. I've modified the code to use the value in board info, and modify that same value if needed. 3) Autorelease is NOT the control register default 4) again, this driver is polled not interrupt driven, no need to save/restore these registers 5) Moved tx interrupt status handling to the poll4int function. If autorelease not enabled we only care about IM_TX_INT and must free packets on either success or failure. If autorelease enabled we have to look for IM_TX_EMPTY_INT or IM_TX_INT...the former indicates tx was successfull, the latter indicates an error. In error case the packet must still be freed manually. -- Paul Ruhland (pruhland(a)microwavedata.com) Software Engineer Microwave Data Systems, Inc. Rochester, NY 14620

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[U-Boot-Users] [PATCH] smc91111 - Add I/O functions, remove environment calls
by Paul Ruhland 11 May '04

11 May '04

This patch makes the following hanges to the smc91111 driver, detailed description(s) follow: 1) adds I/O functions (SMC_inb, SMC_outb, SMC_inw, SMC_outw, SMC_insw, SMC_outsw ) since some hardware will not work with the macro I/O (Logic LH7A400). 2) backs out/modifies a recent change putting calls to getenv and setenv in 'smc_get_ethaddr'. 3) restores CTL_DEFAULT definition to the register default and or's CTL_AUTO_RELEASE in smc_reset. 4) removes packet number and ptr register 'saving and restoral'. You don't have to do this unless you're changing these in an interrupt handler. This driver is polled. 5) adds proper handling of tx interrupt status and autorelease Description: ------------ 1) Using the I/O macros on the Logic LH7A400 SDK does not work and puts the MAC in an unknown state. Symptoms being data being shifted on the wire, packets being sent twice, MAC unable to free packets. Receive works just fine while all this is going on. It seems multiple word writes are happening to fast for the SMC while all other access modes work fine. It could be the IO function calls add just enough delay to make the SMC happy. Its not my hardware and our board will be different so I didn't want to spend any more time on this. No code is added for boards that don't enable the functions. This is done by defining 'CONFIG_SMC_USE_IOFUNCS' in the board config. 2) I don't think there should be calls to environment functions from the ethernet driver. The value being read is already passed into the function in the board info structure. If you haven't set an ethernet address in your environment this will be all zeros. If you have set an address in your environment it will be in the board info struct. If either of these is not true, your board is not set up correctly. I don't want a driver changing my environment, period. Changing the board info ethaddr value is fine but don't touch the environment. I've modified the code to use the value in board info, and modify that same value if needed. 3) Autorelease is NOT the control register default 4) again, this driver is polled not interrupt driven, no need to save/restore these registers 5) Moved tx interrupt status handling to the poll4int function. If autorelease not enabled we only care about IM_TX_INT and must free packets on either success or failure. If autorelease enabled we have to look for IM_TX_EMPTY_INT or IM_TX_INT...the former indicates tx was successfull, the latter indicates an error. In error case the packet must still be freed manually. ----- Paul Ruhland (pruhland(a)microwavedata.com) Software Engineer Microwave Data Systems, Inc. Rochester, NY 14620

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[U-Boot-Users] Single ARM Toolchain?
by Allen Curtis 11 May '04

11 May '04

I have created several versions of ARM cross-compiler toolchains but have not discovered a configuration that works with both "u-boot" and Linux 2.6. Using crosstool-0.27: GCC 2.95.3, BINUTILS 2.14.90.0.8, GLIBC 2.2.5 - builds the Linux kernel but not U-Boot GCC 2.95.3, BINUTILS 2.11.2, GLIBC 2.1.3 - builds U-Boot but not 2.6 Linux kernel (.incbin support) The newest GCC I can build on my system is 3.2 since my host compiler is 2.96. I have searched the archives and found that this is a common question. Unfortunately I did not find a definitive answer. TIA __________________________________ Do you Yahoo!? Win a $20,000 Career Makeover at Yahoo! HotJobs http://hotjobs.sweepstakes.yahoo.com/careermakeover

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[U-Boot-Users] Machine Check Exception on Motorola MPC823FADS
by George Florea 11 May '04

11 May '04

Hi, I am having trouble running U-Boot. The compilation went smooth using ELDK on my Linux box: make distclean make FADS823_config make all Afterwards I uploaded the image (tried with both the .bin and S-REC images) using CodeWarrior's Flash Programmer but the only thing I managed to get was some error messages. The first one was this "Machine Check Exception" which caught my attention, so I figured I compiled for the wrong hardware. So I tweaked some defines but got the same results. Does anyone know how to solve this or maybe have some tips for me? Thank you, George Florea __________________________________ Do you Yahoo!? Win a $20,000 Career Makeover at Yahoo! HotJobs http://hotjobs.sweepstakes.yahoo.com/careermakeover

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[U-Boot-Users] Bootp on PXA255 and resume from sleep
by Matej Kupljen 11 May '04

11 May '04

Hi all, I am using U-Boot 1.0.2 on our custom platform which is based on the PXA255 and we use SMSC LAN91c96 ethernet chip. When I use "bootp" all I get are timeouts. I checked the code and I found the problem is in the udelay() located in the cpu/pxa/interrupts.c bootp calls NetLoop (in net.c), which calls BootpRequest (bootp.c) which then calls NetSetTimeOut. This function retrives the current value of the counter OSCR and stores it in the timeStart variable. Then the NetLoop enters the Main packet reception loop. During the packet sending in smc_send_packet the udelay() is used. This function, when called, resets the value of timer (OSCR = 0). At the end of the Main packet reception loop, the timout is tested, using the current value of the timer and the value stored, when the NetSetTimeout was called. The problem is, that the current value of the timer is smaller (due to udelay, which resets the OSCR) then the stored value (timeStart) and we always get a timeout. I modified the udelay_masked in the cpu/pxa/interrupts.c to this: void udelay_masked (unsigned long usec) { ulong tmo; tmo = usec / 1000; tmo *= CFG_HZ; tmo /= 1000; #ifdef _DO_NOT_RESET_TIMER_ ulong tms; tms = get_timer_masked(); while((get_timer_masked() - tms) < tmo) /* NOP */; #else reset_timer_masked (); while (tmo >= get_timer_masked ()) /*NOP*/; #endif } When I use this code, the bootp works as excpected. Has anyone else had problems like this? The second question is about implementing resume from sleep. Has anybody implemented it? Where is the best place to check if this is reset due to Hardware reset or due to WakeUp event? In memsetup.S? Thanks and best regards, Matej

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