January 2004 - U-Boot

[U-Boot-Users] FW: PATCH: Another mpc8xx watchdog driver !!
by Eli Brin 07 Jan '04

07 Jan '04

-----Original Message----- From: Eli Brin Sent: Wednesday, January 07, 2004 9:46 AM To: 'Robin Gilks' Subject: RE: PATCH: Another mpc8xx watchdog driver !! Dear Robin, >Gosh - egg on face. Got mixed up with the PIT which usually uses a 32KHz >crystal as does the RTC on the mpc860. Well, we don't have a crystal on >the PIT so that (as well as the non-existant RTC) is not available!! >This is what comes from trying to rely on memory alone with 1358 pages >of mpc866 manual :-)) Our target doesn't have a 32 KHz crystal, and the WDT (DENX) works OK. Out target MPC855T uses only a 50MHz oscillator. The u-boot and Linux configuration is the same as the TQM8xx, we just added: #define CONFIG_8XX_GCLK_FREQ 50000000 in the u-boot configuration. All our applications register with the WDT and it works OK. Best regards, Eli Brin

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Re: [U-Boot-Users] Re: [uClinux-dev] u-boot pre-loader and bdm helper files for M5282EVB
by liang a lei 06 Jan '04

06 Jan '04

>mcf5xxx.S:72: Error: operands mismatch -- statement `move.l sp,al' ignored it's "a1"(a-one) or "al", do you have typing mistake > >Also what goes the -r option mean in > >m68k-elf-gcc -r -o mcf5xxx.o mcf5xxx.s "-r(elocation)" means object file mcf5xxx.o will be able to be relocated

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[U-Boot-Users] Re: [uClinux-dev] u-boot pre-loader and bdm helper files for M5282EVB
by Stuart Wood 06 Jan '04

06 Jan '04

Bernhard, How did you adapt the templet files so they could compile under gcc? Specifically the assembly files. I'm trying to use the modified templet files provided by Arrow for their M5282ARB board, but the assembler gives errors like; mcf5xxx.S:72: Error: operands mismatch -- statement `move.l sp,al' ignored Also what goes the -r option mean in m68k-elf-gcc -r -o mcf5xxx.o mcf5xxx.s Thanks for any help. Stuart Wood On Tuesday 30 December 2003 11:25 am, Bernhard Kuhn wrote: > Attached, you will find the pre-bootloader and the bdm related > helper files as described in doc/README.coldfire for the M5282EVB. > > Please note that some files in the attached tarballs are taken from > the "MCF5282/MCF5280 processor initalization templates" package > provided by Motorola at

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[U-Boot-Users] U-Boot and the Xilinx ML300 board - questions
by Mike Wellington 06 Jan '04

06 Jan '04

Hi- I have a Xilinx ML300 board with Virtex-II Pro FPGA. The FPGA has a PowerPC 405 CPU core inside it. I have downloaded the latest U-Boot source and see no support for it. 1) Does anyone know of a U-Boot port to this board? I see some support for the Xilinx ML2 but I think that is a fairly different board. -- =mike wellington wellington(a)lucent.com

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RE: [U-Boot-Users] OMAP1510 Innovator kit booting questions
by Woodruff, Richard 06 Jan '04

06 Jan '04

Hi Grigory, When I ported the delay functions to OMAP/925 from the 920 tree there were (and still are) a few bugs which showed themselves when the Innovator port was first done. (I use a different board and didn't run into the bugs until more recently). The person which worked with the Innovator choose to put in hard delays instead of taking the time to find the bugs (probably didn't have time). At some point I also ran into the bugs and was able to allot time to fix them and posted a patch. Now that the bugs are hopefully fixed the old code should be removed. I don't have an Innovator handy at the moment to validate and submit a patch but I think it should be done. One side note is I also changed the period of the clock in my local include/configs/xxxx.h file such that it was less likely to overflow in normal use. What is there by default is ok, just not optimal. Regards, Richard W. -----Original Message----- From: Grigory A. [mailto:Ryhor@tut.by] Sent: Monday, January 05, 2004 7:16 PM To: Woodruff, Richard Cc: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] OMAP1510 Innovator kit booting questions Hello Richard, WR> In cpu/arm925/interrupts.c. Remove the hard coded delay loops which are WR> wrapped with INNOVATOROMAP1510. This enables the code which will use ARM WR> timers (which are driven by the 12MHz reference / by a factor in the header WR> file). This should provide constant time irrespective to your cpu dpll WR> speed. This is what I use in (though not with innovator). WR> This will fix some problems, and it "might" fix your problem. It will WR> probably make your boot speed correct, but it still sounds like some clock WR> is not set properly. I have a bit more fixed up dpll setup code which I WR> will get around to sending in sometime. WR> Regards, WR> Richard W. Yes - it is work - now all is correct. I've removed (commented) these wrapped lines and seconds came to normal duration. What was a reason to put this delay loops? Best regards, Grigory mailto:Ryhor@tut.by

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RE: [U-Boot-Users] OMAP1510 Innovator kit booting questions
by Woodruff, Richard 06 Jan '04

06 Jan '04

In cpu/arm925/interrupts.c. Remove the hard coded delay loops which are wrapped with INNOVATOROMAP1510. This enables the code which will use ARM timers (which are driven by the 12MHz reference / by a factor in the header file). This should provide constant time irrespective to your cpu dpll speed. This is what I use in (though not with innovator). This will fix some problems, and it "might" fix your problem. It will probably make your boot speed correct, but it still sounds like some clock is not set properly. I have a bit more fixed up dpll setup code which I will get around to sending in sometime. Regards, Richard W. -----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net] On Behalf Of Grigory A. Sent: Friday, December 26, 2003 7:06 PM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] OMAP1510 Innovator kit booting questions 2. Next - I am using autoboot mode with 3-5 seconds of bootdelay. But 1 u-boot seconds is approximately 15-20 of real seconds. Yes - this is board specific - maybe some clock setup missed - (by me?) or PLL settings - so could someone help me with it? Only that I have changed - I've switched to use UART2 for serial communication - it is working well - I don't think that it has got any influence to board speed. Thanks for answers. -- Best regards, Grigory mailto:Ryhor@tut.by ------------------------------------------------------- This SF.net email is sponsored by: IBM Linux Tutorials. Become an expert in LINUX or just sharpen your skills. Sign up for IBM's Free Linux Tutorials. Learn everything from the bash shell to sys admin. Click now! http://ads.osdn.com/?ad_id=1278&alloc_id=3371&op=click _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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RE:[U-Boot-Users] U-Boot Not Loading Successfully
by SAM SONG 05 Jan '04

05 Jan '04

Date: Wed, 31 Dec 2003 13:21:29 -0800 (PST) From: Jeff Stevens <jsteve17(a)yahoo.com> To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] U-Boot Not Loading Successfully I am porting U-Boot over to a new product and am having some difficulty getting U-Boot to load successfully. I have placed our board on a logic analyzer and found (based on System.map) that U-Boot seems to crash in cpu/mpc8xx/cpu_init.c in function cpu_init_f at lines: memctl->memc_br0 = CFG_BR0_PRELIM; memctl->memc_or0 = CFG_OR0_PRELIM; Here is my board configuration: CPU: MPC855T FLASH: AMD AM29LV040B (512kB 8-bit on CS0) SDRAM: Micron MT48LC4M32 (16MB 32-bit on CS2) NVRAM: Simtek STK14C88 (32kB 8-bit on CS4) The board is set to have the IMMR come up at 0xFF000000 (on hard reset), and that is what I have CFG_IMMR set to in my board configuration file. Could this be a problem with the placement of the IMMR. I previously had the IMMR at 0x00000000 on hard reset and then moved it to 0xFA200000 with CFG_IMMR, which had the same effect. Or, could this be an issue with my BR0 and OR0 settings? --------------------------------------------------- Both settings on CFG_IMMR are OK.Only you set CFG_IMMR on 0xFFF80000 would have some problems.I guess your trouble don't relate with CFG_IMMR settings. --------------------------------------------------- I read something in that file before those two lines above, which talked about CFG_OR0_REMAP, but didn't quite understand it. Should I be using this? Here are my BRx, ORx settings: #define FLASH_BASE_PRELIM 0xFFF80000 #define CFG_PRELIM_OR_AM 0xFFFF0000 #define CFG_OR_TIMING_FLASH (OR_CSNT_SAM | OR_ACS_DIV4 | OR_BI | OR_SCY_3_CLK | OR_TRLX | OR_EHTR) ----------------------------------------------- Pls tell us the FLASH SPEED or we cannot check the OR0 configuration for you.Meanwhile,what's your reset vector prefix?0x0000 or 0xfff0? ------------------------------------------------ #define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) #define CFG_BR0_PRELIM ((FLASH_BASE_PRELIM & BR_BA_MSK) | (BR_PS_8 & BR_PS_MSK) | BR_V) #define SDRAM_BASE_PRELIM 0x00000000 #define SDRAM_MAX_SIZE 0x01000000 #define CFG_OR_TIMING_SDRAM (OR_G5LA | OR_G5LS) #define CFG_OR2_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_SDRAM ) #define CFG_BR2_PRELIM ((SDRAM_BASE_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V ) #define CFG_NVRAM_BASE 0xFA000000 #define CFG_OR4_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) #define CFG_BR4_PRELIM ((CFG_NVRAM_BASE & BR_BA_MSK) | (BR_PS_8 & BR_PS_MSK) | BR_V | OR_EHTR) I would appreciate anyones input, since I'm not too familiar with the U-Boot beyond the board specific files. Thanks in advance! ------------------------------------------ Best regards, SAM __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com

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[U-Boot-Users] Some puzzles on dram_size()
by SAM SONG 05 Jan '04

05 Jan '04

Hi, Sorry for sending the same topic mail again.Pls delet the former mail with the same topic for my mistaken operation. When porting u-boot on LITE_DW,I found that the following code in RPXlite.c couldn't get through.I traced the code by BDI2000 and DDD and knew that the problem perhaps was save[32].In the "for" cycle,the dimension of save[] must beyond 32 limit by [maxsize/sizeof(long)]/2.I changed save[] dimension to big enough but still in vain.I don't know why.Finally,I masked the following code and booted successfully.How does the following code work normally?If I masked the code,is there any potential danger? ulong save[32]; for (cnt = maxsize/sizeof(long); cnt > 0; cnt >>= 1) { addr = base + cnt; /* pointer arith! */ save[i++] = *addr; *addr = ~cnt; } /* write 0 to base address */ addr = base; save[i] = *addr; *addr = 0; /* check at base address */ if ((val = *addr) != 0) { *addr = save[i]; return (0); } for (cnt = 1; cnt <= maxsize/sizeof(long); cnt <<= 1) { addr = base + cnt; /* pointer arith! */ val = *addr; *addr = save[--i]; if (val != (~cnt)) { return (cnt * sizeof(long)); } } Best regards, Sam Song __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com

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[U-Boot-Users] Testing a cross compiler for a mpc8540 cpu
by Matthew S. McClintock 05 Jan '04

05 Jan '04

Does anyone know a good way to test to see if a cross compiler is working? I have what I believe to be a cross compiler for a mpc8540 cpu. However I am not sure if its working. I can compile u-boot with the compiler but that does not tell me much since u-boot does not support the board I am using specifically. I really don't want to go forward working on getting u-boot to run on this board only to find out of compiler is broken. Anyone have any ideas? Thanks -- Matthew S. McClintock <mattsm(a)arlut.utexas.edu>

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[U-Boot-Users] Compatibility - Cogent CSB335 � ARM720T on Sharp LH79520
by Himansu Doshi 05 Jan '04

05 Jan '04

Hi all, Can U-boot be configured for the cogent csb335 board which has the ARM720T core integrated on Sharp LH79520? Thanks _________________________________________________________________ Games, MMS cards, ringtones. Operator logos, picture messages & more. http://server1.msn.co.in/sp03/mobilesms/ Jazz up your mobile!

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