September 2024 - U-Boot

[PATCH v1] i2c: muxes: pca954x: Add MAX735x/MAX736x support
by bigunclemax＠gmail.com 21 Oct '24

21 Oct '24

From: Maksim Kiselev <bigunclemax(a)gmail.com> Add support for the following Maxim chips using the existing PCA954x driver: - MAX7356 - MAX7357 - MAX7358 - MAX7367 - MAX7368 - MAX7369 All added Maxim chips behave like the PCA954x, where a single SMBUS byte write selects up to 8 channels to be bridged to the primary bus. Tested using the MAX7358. Signed-off-by: Maksim Kiselev <bigunclemax(a)gmail.com> --- Hi, friends! I have a custom board with MAX7358 GPIO expander. This patch is the port of Linux commit: > 81694437b6eb i2c: muxes: pca954x: Add MAX735x/MAX736x support Best wishes, Maksim. drivers/i2c/muxes/Kconfig | 5 +++++ drivers/i2c/muxes/pca954x.c | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig index 323c4fbe9c..cd5579aa55 100644 --- a/drivers/i2c/muxes/Kconfig +++ b/drivers/i2c/muxes/Kconfig @@ -36,6 +36,11 @@ config I2C_MUX_PCA954x device. Supported chips are PCA9543, PCA9544, PCA9546, PCA9547, PCA9548 and PCA9646. + It's also compatible to Maxims MAX735x I2C switch chips, which are controlled + as the NXP PCA9548 and the MAX736x chips that act like the PCA9544. + This includes the: + MAX7356, MAX7357, MAX7358, MAX7367, MAX7368 and MAX7369 + config I2C_MUX_GPIO tristate "GPIO-based I2C multiplexer" depends on I2C_MUX && DM_GPIO diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c index 795288fe2e..9dd2697270 100644 --- a/drivers/i2c/muxes/pca954x.c +++ b/drivers/i2c/muxes/pca954x.c @@ -14,6 +14,12 @@ #include <asm-generic/gpio.h> enum pca_type { + MAX7356, + MAX7357, + MAX7358, + MAX7367, + MAX7368, + MAX7369, PCA9543, PCA9544, PCA9546, @@ -39,6 +45,31 @@ struct pca954x_priv { }; static const struct chip_desc chips[] = { + [MAX7356] = { + .muxtype = pca954x_isswi, + .width = 8, + }, + [MAX7357] = { + .muxtype = pca954x_isswi, + .width = 8, + }, + [MAX7358] = { + .muxtype = pca954x_isswi, + .width = 8, + }, + [MAX7367] = { + .muxtype = pca954x_isswi, + .width = 4, + }, + [MAX7368] = { + .muxtype = pca954x_isswi, + .width = 4, + }, + [MAX7369] = { + .enable = 0x4, + .muxtype = pca954x_ismux, + .width = 4, + }, [PCA9543] = { .muxtype = pca954x_isswi, .width = 2, @@ -102,6 +133,12 @@ static const struct i2c_mux_ops pca954x_ops = { }; static const struct udevice_id pca954x_ids[] = { + { .compatible = "maxim,max7356", .data = MAX7356 }, + { .compatible = "maxim,max7357", .data = MAX7357 }, + { .compatible = "maxim,max7358", .data = MAX7358 }, + { .compatible = "maxim,max7367", .data = MAX7367 }, + { .compatible = "maxim,max7368", .data = MAX7368 }, + { .compatible = "maxim,max7369", .data = MAX7369 }, { .compatible = "nxp,pca9543", .data = PCA9543 }, { .compatible = "nxp,pca9544", .data = PCA9544 }, { .compatible = "nxp,pca9546", .data = PCA9546 }, -- 2.45.2

2 2

[PATCH] rockchip: clk: add UART0 clock getter/setter
by Lukasz Czechowski 21 Oct '24

21 Oct '24

Add dedicated getter and setter for SCLK_UART0_PMU. This allows the driver to correctly handle UART0 clocks, and thus it fixes the issues with UART0 not working in case DEBUG_UART is disabled. Unlike other Rockchip SoCs, i.e. rk3399, in the PX30 the default clock source for UART is GPLL, instead of external oscillator. If the DEBUG_UART is enabled, the clock source is changed in board_debug_uart_init function to 24Mhz oscillator, which also matches the fallback value obtained from DT node. In case the DEBUG_UART is disabled, the UART clock source remains default, and the DM serial driver wrongly configures the baud rate, resulting in broken communication. By implementing the UART clock getter/setter, the serial driver can probe the actual configuration and corectly configure itself. The DEBUG_UART settings now should not affect it. The driver supports GPLL and 24M oscillator. NPLL and USBPHY480M sources, that are managed by CRU, are not yet handled, as likely they won't be used in real scenarios. Signed-off-by: Lukasz Czechowski <lukasz.czechowski(a)thaumatec.com> --- arch/arm/include/asm/arch-rockchip/cru_px30.h | 7 ++ drivers/clk/rockchip/clk_px30.c | 107 ++++++++++++++++++ 2 files changed, 114 insertions(+) diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h index b66277fc7f3..504459bd93d 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_px30.h +++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h @@ -464,5 +464,12 @@ enum { UART0_CLK_SEL_UART0_FRAC, UART0_DIVNP5_SHIFT = 0, UART0_DIVNP5_MASK = 0x1f << UART0_DIVNP5_SHIFT, + + /* CRU_PMU_CLKSEL5_CON */ + CLK_UART_FRAC_NUMERATOR_SHIFT = 16, + CLK_UART_FRAC_NUMERATOR_MASK = 0xffff << CLK_UART_FRAC_NUMERATOR_SHIFT, + CLK_UART_FRAC_DENOMINATOR_SHIFT = 0, + CLK_UART_FRAC_DENOMINATOR_MASK = + 0xffff << CLK_UART_FRAC_DENOMINATOR_SHIFT, }; #endif diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c index 2875c152b20..64f1a335cb0 100644 --- a/drivers/clk/rockchip/clk_px30.c +++ b/drivers/clk/rockchip/clk_px30.c @@ -1589,6 +1589,107 @@ static ulong px30_pmuclk_set_gpll_rate(struct px30_pmuclk_priv *priv, ulong hz) return priv->gpll_hz; } +static ulong px30_pmu_uart0_get_clk(struct px30_pmuclk_priv *priv) +{ + struct px30_pmucru *pmucru = priv->pmucru; + u32 clk_uart0_div_con; + u32 clk_uart0_pll_sel; + u32 clk_uart0_sel; + u32 con; + ulong pll_rate; + ulong clk_uart0; + + con = readl(&pmucru->pmu_clksel_con[3]); + clk_uart0_div_con = bitfield_extract_by_mask(con, UART0_DIV_CON_MASK); + clk_uart0_pll_sel = bitfield_extract_by_mask(con, UART0_PLL_SEL_MASK); + + switch (clk_uart0_pll_sel) { + case UART0_PLL_SEL_GPLL: + pll_rate = px30_pmuclk_get_gpll_rate(priv); + break; + case UART0_PLL_SEL_24M: + pll_rate = OSC_HZ; + break; + case UART0_PLL_SEL_480M: + case UART0_PLL_SEL_NPLL: + /* usbphy480M and NPLL clocks, generated by CRU, are not supported yet */ + default: + return -ENOENT; + } + + clk_uart0 = DIV_TO_RATE(pll_rate, clk_uart0_div_con); + con = readl(&pmucru->pmu_clksel_con[4]); + clk_uart0_sel = bitfield_extract_by_mask(con, UART0_CLK_SEL_MASK); + + switch (clk_uart0_sel) { + case UART0_CLK_SEL_UART0: + return clk_uart0; + case UART0_CLK_SEL_UART0_NP5:{ + u32 clk_uart0_divnp5_div_con; + + clk_uart0_divnp5_div_con = + bitfield_extract_by_mask(con, UART0_DIVNP5_MASK); + return DIV_TO_RATE((2 * clk_uart0), + (2 * clk_uart0_divnp5_div_con + 3)); + } + case UART0_CLK_SEL_UART0_FRAC:{ + u32 fracdiv, n, m; + + fracdiv = readl(&pmucru->pmu_clksel_con[5]); + n = bitfield_extract_by_mask(fracdiv, + CLK_UART_FRAC_NUMERATOR_MASK); + m = bitfield_extract_by_mask(fracdiv, + CLK_UART_FRAC_DENOMINATOR_MASK); + return (u64) clk_uart0 * n / m; + } + default: + return -ENOENT; + } +} + +static ulong px30_pmu_uart0_set_clk(struct px30_pmuclk_priv *priv, ulong rate) +{ + struct px30_pmucru *pmucru = priv->pmucru; + ulong gpll_rate; + u32 clk_uart0_div_con; + u32 clk_uart0_pll_sel; + u32 clk_uart0_sel; + ulong m = 0, n = 0; + + gpll_rate = px30_pmuclk_get_gpll_rate(priv); + if (gpll_rate % rate == 0) { + clk_uart0_pll_sel = UART0_PLL_SEL_GPLL; + clk_uart0_sel = UART0_CLK_SEL_UART0; + clk_uart0_div_con = DIV_ROUND_UP(priv->gpll_hz, rate); + } else if (rate == OSC_HZ) { + clk_uart0_pll_sel = UART0_PLL_SEL_24M; + clk_uart0_sel = UART0_CLK_SEL_UART0; + clk_uart0_div_con = 1; + } else { + clk_uart0_pll_sel = UART0_PLL_SEL_GPLL; + clk_uart0_sel = UART0_CLK_SEL_UART0_FRAC; + clk_uart0_div_con = 1; + rational_best_approximation(rate, priv->gpll_hz, + GENMASK(16 - 1, 0), + GENMASK(16 - 1, 0), &m, &n); + } + + rk_clrsetreg(&pmucru->pmu_clksel_con[3], + UART0_PLL_SEL_MASK | UART0_DIV_CON_MASK, + clk_uart0_pll_sel << UART0_PLL_SEL_SHIFT | + (clk_uart0_div_con - 1)); + rk_clrsetreg(&pmucru->pmu_clksel_con[4], UART0_CLK_SEL_MASK, + clk_uart0_sel << UART0_CLK_SEL_SHIFT); + if (m && n) { + u32 fracdiv; + + fracdiv = m << CLK_UART_FRAC_NUMERATOR_SHIFT | n; + writel(fracdiv, &pmucru->pmu_clksel_con[5]); + } + + return px30_pmu_uart0_get_clk(priv); +} + static ulong px30_pmuclk_get_rate(struct clk *clk) { struct px30_pmuclk_priv *priv = dev_get_priv(clk->dev); @@ -1602,6 +1703,9 @@ static ulong px30_pmuclk_get_rate(struct clk *clk) case PCLK_PMU_PRE: rate = px30_pclk_pmu_get_pmuclk(priv); break; + case SCLK_UART0_PMU: + rate = px30_pmu_uart0_get_clk(priv); + break; default: return -ENOENT; } @@ -1622,6 +1726,9 @@ static ulong px30_pmuclk_set_rate(struct clk *clk, ulong rate) case PCLK_PMU_PRE: ret = px30_pclk_pmu_set_pmuclk(priv, rate); break; + case SCLK_UART0_PMU: + ret = px30_pmu_uart0_set_clk(priv, rate); + break; default: return -ENOENT; } -- 2.43.0

4 7

[PATCH v2] arm: dts: rockchip: fix dts for Radxa ROCK 4C+
by FUKAUMI Naoki 21 Oct '24

21 Oct '24

ROCK Pi 4 series and ROCK 4C+ cannot share .dtsi file because 4C+ is different board. add rk3399-rock-pi-4-u-boot.dtsi contents and remove dependency of it. no functional change is intended. Fixes: 71a95e2efd30 ("arm: dts: rockchip: add Radxa ROCK 4C+") Suggested-by: Dragan Simic <dsimic(a)manjaro.org> Signed-off-by: FUKAUMI Naoki <naoki(a)radxa.com> --- Changes in v2: - reword commit message --- arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi index 5ec15a845c1..50dae5cb5ef 100644 --- a/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi @@ -1,8 +1,10 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// SPDX-License-Identifier: GPL-2.0+ /* + * Copyright (C) 2019 Jagan Teki <jagan(a)amarulasolutions.com> * Copyright (c) 2023 Radxa Limited */ -#include "rk3399-rock-pi-4-u-boot.dtsi" +#include "rk3399-u-boot.dtsi" +#include "rk3399-sdram-lpddr4-100.dtsi" &pcfg_pull_none_18ma { bootph-pre-ram; @@ -14,6 +16,12 @@ bootph-some-ram; }; +&sdhci { + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; +}; + &spi1 { status = "okay"; @@ -25,3 +33,7 @@ spi-max-frequency = <10000000>; }; }; + +&vdd_log { + regulator-init-microvolt = <950000>; +}; -- 2.43.0

2 1

[PATCH v2 1/2] configs: rockchip: enable gpio-leds driver for Radxa boards
by FUKAUMI Naoki 21 Oct '24

21 Oct '24

Basically, Radxa's boards are intended to turn LEDs on at U-Boot. enable gpio-leds driver and led command. Signed-off-by: FUKAUMI Naoki <naoki(a)radxa.com> --- Changes in v2: - none --- configs/radxa-cm3-io-rk3566_defconfig | 2 ++ configs/radxa-e25-rk3568_defconfig | 2 ++ configs/rock-3a-rk3568_defconfig | 2 ++ configs/rock-4c-plus-rk3399_defconfig | 2 ++ configs/rock-4se-rk3399_defconfig | 2 ++ configs/rock-pi-4-rk3399_defconfig | 2 ++ configs/rock-pi-4c-rk3399_defconfig | 2 ++ configs/rock-pi-e-rk3328_defconfig | 2 ++ configs/rock-pi-e-v3-rk3328_defconfig | 2 ++ configs/rock-pi-s-rk3308_defconfig | 2 ++ configs/rock5a-rk3588s_defconfig | 2 ++ configs/rock5b-rk3588_defconfig | 2 ++ 12 files changed, 24 insertions(+) diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig index 48c8fcf5a66..9d8a59dfcbf 100644 --- a/configs/radxa-cm3-io-rk3566_defconfig +++ b/configs/radxa-cm3-io-rk3566_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y diff --git a/configs/radxa-e25-rk3568_defconfig b/configs/radxa-e25-rk3568_defconfig index 496fee0e0a4..314c3e18908 100644 --- a/configs/radxa-e25-rk3568_defconfig +++ b/configs/radxa-e25-rk3568_defconfig @@ -44,6 +44,8 @@ CONFIG_DWC_AHCI=y CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig index 66ac2f6d7aa..f07ae545ac5 100644 --- a/configs/rock-3a-rk3568_defconfig +++ b/configs/rock-3a-rk3568_defconfig @@ -52,6 +52,8 @@ CONFIG_AHCI_PCI=y CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y diff --git a/configs/rock-4c-plus-rk3399_defconfig b/configs/rock-4c-plus-rk3399_defconfig index 80dc44986e7..018926cead8 100644 --- a/configs/rock-4c-plus-rk3399_defconfig +++ b/configs/rock-4c-plus-rk3399_defconfig @@ -44,6 +44,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DFU_MMC=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y diff --git a/configs/rock-4se-rk3399_defconfig b/configs/rock-4se-rk3399_defconfig index f52d4bf9913..4a31bc3cc58 100644 --- a/configs/rock-4se-rk3399_defconfig +++ b/configs/rock-4se-rk3399_defconfig @@ -48,6 +48,8 @@ CONFIG_AHCI_PCI=y CONFIG_DFU_MMC=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index e71c4588b94..95a60335a43 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -49,6 +49,8 @@ CONFIG_AHCI_PCI=y CONFIG_DFU_MMC=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index 14373933a34..9a03474a22a 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -49,6 +49,8 @@ CONFIG_AHCI_PCI=y CONFIG_DFU_MMC=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index 5cc54af3ca5..9d4b2c32971 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -53,6 +53,8 @@ CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY_REALTEK=y diff --git a/configs/rock-pi-e-v3-rk3328_defconfig b/configs/rock-pi-e-v3-rk3328_defconfig index 4c6cc634bd6..c82baceedfe 100644 --- a/configs/rock-pi-e-v3-rk3328_defconfig +++ b/configs/rock-pi-e-v3-rk3328_defconfig @@ -54,6 +54,8 @@ CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY_REALTEK=y diff --git a/configs/rock-pi-s-rk3308_defconfig b/configs/rock-pi-s-rk3308_defconfig index e450a061802..de45d295fd5 100644 --- a/configs/rock-pi-s-rk3308_defconfig +++ b/configs/rock-pi-s-rk3308_defconfig @@ -38,6 +38,8 @@ CONFIG_CLK=y # CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig index c09e6655f02..6017a1cfecf 100644 --- a/configs/rock5a-rk3588s_defconfig +++ b/configs/rock5a-rk3588s_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index fc118cea7ba..c664999626b 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -54,6 +54,8 @@ CONFIG_SPL_CLK=y # CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y -- 2.43.0

2 3

[PATCH v6 00/12] efi: Add a test for EFI bootmeth
by Simon Glass 18 Oct '24

18 Oct '24

The test coverage for the EFI bootmeth is incomplete since it does not actually boot the application. This series creates a simple test for this purpose. It includes a few patches to make this work: - ANSI output from the EFI loader confusing the unit-testing checker - Hang in sandbox virtio due to EFI probing all block devices Other necessary fixes have been split out into two other series. Changes in v6: - Expand the debug messages to be more descriptive - Drop the patch to disable sandbox virtio blk with EFI - Add new patch to disable the sandbox virtio blk device - Deal with sandbox CONFIG_LOGF_FUNC - Rebase on -next - Drop patches previously applied - Drop mention of helloworld since it is no-longer used by this test Changes in v5: - Drop the Fixes tag Changes in v4: - Add efi_loader tag to some patches - Split out non-EFI patches into a different series Changes in v3: - Drop the extra- rules since scripts/Makefile.lib takes care of it - Add new patch to drop crt0/relocal extra- rules - Put back the Linaro copyright accidentally removed Changes in v2: - Reword commit message - Use 'Firmware vendor' instead of just 'Vendor' - Add many new patches to resolve all the outstanding test issues Simon Glass (12): efi_loader: Rename and move CMD_BOOTEFI_HELLO_COMPILE efi: arm: x86: riscv: Drop crt0/relocal extra- rules efi_loader: Shorten the app rules efi_loader: Shorten the app rules further efi_loader: Show the vendor in helloworld efi: Use the same filename for all sandbox builds bootstd: Add debugging for efi bootmeth efi_loader: Disable ANSI output for tests efi_loader: Add a test app sandbox: virtio: Disable the sandbox virtio blk device test: efi: boot: Set up an image suitable for EFI testing test: efi: boot: Add a test for the efi bootmeth arch/Kconfig | 3 +- arch/arm/lib/Makefile | 8 ---- arch/riscv/lib/Makefile | 4 -- arch/sandbox/dts/test.dts | 2 +- arch/x86/lib/Makefile | 16 ------- boot/bootmeth_efi.c | 11 ++++- cmd/Kconfig | 14 +----- configs/octeontx2_95xx_defconfig | 2 +- configs/octeontx2_96xx_defconfig | 2 +- configs/octeontx_81xx_defconfig | 2 +- configs/octeontx_83xx_defconfig | 2 +- doc/develop/uefi/uefi.rst | 2 +- include/efi_default_filename.h | 24 +--------- include/efi_loader.h | 21 ++++++++- lib/efi_loader/Kconfig | 22 +++++++++ lib/efi_loader/Makefile | 47 ++++++------------- lib/efi_loader/efi_console.c | 26 +++++++---- lib/efi_loader/helloworld.c | 3 ++ lib/efi_loader/testapp.c | 68 ++++++++++++++++++++++++++++ test/boot/bootdev.c | 18 +++++++- test/boot/bootflow.c | 65 +++++++++++++++++++++++++- test/py/tests/bootstd/flash1.img.xz | Bin 0 -> 5016 bytes test/py/tests/test_efi_fit.py | 2 +- test/py/tests/test_efi_loader.py | 2 +- test/py/tests/test_ut.py | 52 ++++++++++++++++++--- 25 files changed, 294 insertions(+), 124 deletions(-) create mode 100644 lib/efi_loader/testapp.c create mode 100644 test/py/tests/bootstd/flash1.img.xz -- 2.43.0

5 34

[PATCH 1/3] x86: coreboot: Update the timestamp code to use sysinfo
by Simon Glass 18 Oct '24

18 Oct '24

Rather than using a special variable, get the timestamp info from the coreboot sysinfo struct. Return a proper error as well. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- arch/x86/cpu/coreboot/timestamp.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c index ec4003c4e77..681191d85bb 100644 --- a/arch/x86/cpu/coreboot/timestamp.c +++ b/arch/x86/cpu/coreboot/timestamp.c @@ -6,13 +6,12 @@ */ #include <bootstage.h> +#include <errno.h> #include <asm/arch/timestamp.h> #include <asm/cb_sysinfo.h> #include <asm/u-boot-x86.h> #include <linux/compiler.h> -static struct timestamp_table *ts_table __section(".data"); - void timestamp_init(void) { timestamp_add_now(TS_U_BOOT_INITTED); @@ -20,6 +19,8 @@ void timestamp_init(void) void timestamp_add(enum timestamp_id id, uint64_t ts_time) { + const struct sysinfo_t *info = cb_get_sysinfo(); + struct timestamp_table *ts_table = info->tstamp_table; struct timestamp_entry *tse; if (!ts_table || (ts_table->num_entries == ts_table->max_entries)) @@ -37,13 +38,15 @@ void timestamp_add_now(enum timestamp_id id) int timestamp_add_to_bootstage(void) { + const struct sysinfo_t *info = cb_get_sysinfo(); + const struct timestamp_table *ts_table = info->tstamp_table; uint i; if (!ts_table) - return -1; + return -ENOENT; for (i = 0; i < ts_table->num_entries; i++) { - struct timestamp_entry *tse = &ts_table->entries[i]; + const struct timestamp_entry *tse = &ts_table->entries[i]; const char *name = NULL; switch (tse->entry_id) { -- 2.34.1

3 10

[PATCH] Extend usage for OF_OVERLAY_LIST beyond SPL
by Jan Kiszka 18 Oct '24

18 Oct '24

From: Jan Kiszka <jan.kiszka(a)siemens.com> Allow to use OF_OVERLAY_LIST also for the case that the overlays just need be built, e.g. when they will be picked up by binman as artifacts of the final U-Boot image. The IOT2050 boards have such a need when switching to OF_UPSTREAM. Signed-off-by: Jan Kiszka <jan.kiszka(a)siemens.com> --- While waiting for the merge of v6.12-rc1-dts and while seeing related but different attempts to address the overlay topic. See the patch in use here: https://github.com/siemens/u-boot/commits/jan/iot2050 dts/Kconfig | 4 ++-- scripts/Makefile.dts | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/dts/Kconfig b/dts/Kconfig index 569d4be338e..7ea4fd5a79b 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -226,11 +226,11 @@ config OF_LIST config OF_OVERLAY_LIST string "List of device tree overlays to include for DT control" - depends on SPL_LOAD_FIT_APPLY_OVERLAY help This option specifies a list of device tree overlays to use for DT control. This option can then be used by a FIT generator to include - the overlays in the FIT image. + the overlays in the FIT image or by binman when assembling an image + that uses overlays during DT fixup. choice prompt "OF LIST compression" diff --git a/scripts/Makefile.dts b/scripts/Makefile.dts index 790f3c508f1..dc181240a21 100644 --- a/scripts/Makefile.dts +++ b/scripts/Makefile.dts @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ dtb-y += $(patsubst %,%.dtb,$(subst ",,$(CONFIG_DEFAULT_DEVICE_TREE) $(CONFIG_OF_LIST) $(CONFIG_SPL_OF_LIST))) +dtb-y += $(patsubst %,%.dtbo,$(subst ",,$(CONFIG_OF_OVERLAY_LIST))) ifeq ($(CONFIG_OF_UPSTREAM_BUILD_VENDOR),y) ifeq ($(CONFIG_ARM64),y) -- 2.43.0

4 3

[PATCH 1/2] video: Allow querying the font size
by Simon Glass 18 Oct '24

18 Oct '24

All the font size to be queried using the 'font size' command. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- cmd/font.c | 17 +++++++++-------- doc/usage/cmd/font.rst | 6 ++++-- test/cmd/font.c | 9 +++++++++ 3 files changed, 22 insertions(+), 10 deletions(-) diff --git a/cmd/font.c b/cmd/font.c index cb39c88063f..c7fe2a70a49 100644 --- a/cmd/font.c +++ b/cmd/font.c @@ -56,9 +56,6 @@ static int do_font_size(struct cmd_tbl *cmdtp, int flag, int argc, uint size; int ret; - if (argc != 2) - return CMD_RET_USAGE; - if (uclass_first_device_err(UCLASS_VIDEO_CONSOLE, &dev)) return CMD_RET_FAILURE; ret = vidconsole_get_font_size(dev, &font_name, &size); @@ -67,12 +64,16 @@ static int do_font_size(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_FAILURE; } - size = dectoul(argv[1], NULL); + if (argc < 2) { + printf("%d\n", size); + } else { + size = dectoul(argv[1], NULL); - ret = vidconsole_select_font(dev, font_name, size); - if (ret) { - printf("Failed (error %d)\n", ret); - return CMD_RET_FAILURE; + ret = vidconsole_select_font(dev, font_name, size); + if (ret) { + printf("Failed (error %d)\n", ret); + return CMD_RET_FAILURE; + } } return 0; diff --git a/doc/usage/cmd/font.rst b/doc/usage/cmd/font.rst index 8ba149d7599..fea0df3f745 100644 --- a/doc/usage/cmd/font.rst +++ b/doc/usage/cmd/font.rst @@ -10,7 +10,7 @@ Synopis font list font select <name> [<size>] - font size <size> + font size [<size>] Description ----------- @@ -31,7 +31,7 @@ This selects a new font and optionally changes the size. font size ~~~~~~~~~ -This changes the font size only. +This changes the font size only. With no argument it shows the current size. Examples -------- @@ -41,6 +41,8 @@ Examples => font list nimbus_sans_l_regular cantoraone_regular + => font size + 30 => font size 40 => font select cantoraone_regular 20 => diff --git a/test/cmd/font.c b/test/cmd/font.c index 1fe05c1ead5..9c1eebf799e 100644 --- a/test/cmd/font.c +++ b/test/cmd/font.c @@ -60,10 +60,19 @@ static int font_test_base(struct unit_test_state *uts) ut_assertok(vidconsole_get_font_size(dev, &name, &size)); ut_asserteq_str("cantoraone_regular", name); ut_asserteq(40, size); + ut_assertok(ut_check_console_end(uts)); + + ut_assertok(run_command("font size", 0)); + ut_assert_nextline("40"); + ut_assertok(ut_check_console_end(uts)); ut_assertok(run_command("font size 30", 0)); ut_assertok(ut_check_console_end(uts)); + ut_assertok(run_command("font size", 0)); + ut_assert_nextline("30"); + ut_assertok(ut_check_console_end(uts)); + ut_assertok(vidconsole_get_font_size(dev, &name, &size)); ut_asserteq_str("cantoraone_regular", name); ut_asserteq(30, size); -- 2.34.1

5 7

[PATCH] x86: Make default_print_cpuinfo be a weak alias for print_cpuinfo
by Tom Rini 18 Oct '24

18 Oct '24

While a few SoCs have a unique print_cpuinfo function, a number of them just use default_print_cpuinfo. Make default_print_cpuinfo have a weak alias to provie print_cpuinfo. Signed-off-by: Tom Rini <trini(a)konsulko.com> --- This will make re-using arch/x86/cpu/efi/ as a generic set of support code for U-Boot as EFI payload/app a little bit easier. Cc: Simon Glass <sjg(a)chromium.org> Cc: Bin Meng <bmeng.cn(a)gmail.com> --- arch/x86/cpu/coreboot/coreboot.c | 5 ----- arch/x86/cpu/cpu.c | 2 ++ arch/x86/cpu/efi/app.c | 5 ----- arch/x86/cpu/efi/payload.c | 5 ----- arch/x86/cpu/slimbootloader/slimbootloader.c | 5 ----- arch/x86/cpu/tangier/tangier.c | 5 ----- 6 files changed, 2 insertions(+), 25 deletions(-) diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index 82fe4c71cd27..5c8d32ff6acd 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -44,11 +44,6 @@ int checkcpu(void) return 0; } -int print_cpuinfo(void) -{ - return default_print_cpuinfo(); -} - static void board_final_init(void) { /* diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index ce55efc454bf..5090f5cad746 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -165,6 +165,8 @@ char *cpu_get_name(char *name) return ptr; } +int print_cpuinfo(void) __attribute__((weak, alias("default_print_cpuinfo"))); + int default_print_cpuinfo(void) { printf("CPU: %s, vendor %s, device %xh\n", diff --git a/arch/x86/cpu/efi/app.c b/arch/x86/cpu/efi/app.c index f754489784a7..0eea9e2b0975 100644 --- a/arch/x86/cpu/efi/app.c +++ b/arch/x86/cpu/efi/app.c @@ -19,11 +19,6 @@ int checkcpu(void) return 0; } -int print_cpuinfo(void) -{ - return default_print_cpuinfo(); -} - void board_final_init(void) { } diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c index 708bfbe7ee48..2bf4fefc19e6 100644 --- a/arch/x86/cpu/efi/payload.c +++ b/arch/x86/cpu/efi/payload.c @@ -144,11 +144,6 @@ int checkcpu(void) return 0; } -int print_cpuinfo(void) -{ - return default_print_cpuinfo(); -} - /* Find any available tables and copy them to a safe place */ int reserve_arch(void) { diff --git a/arch/x86/cpu/slimbootloader/slimbootloader.c b/arch/x86/cpu/slimbootloader/slimbootloader.c index ec5b87cfd63f..1f98db1f7c77 100644 --- a/arch/x86/cpu/slimbootloader/slimbootloader.c +++ b/arch/x86/cpu/slimbootloader/slimbootloader.c @@ -55,8 +55,3 @@ int checkcpu(void) { return 0; } - -int print_cpuinfo(void) -{ - return default_print_cpuinfo(); -} diff --git a/arch/x86/cpu/tangier/tangier.c b/arch/x86/cpu/tangier/tangier.c index 1e2f6cc8b700..35bbecbf8479 100644 --- a/arch/x86/cpu/tangier/tangier.c +++ b/arch/x86/cpu/tangier/tangier.c @@ -20,8 +20,3 @@ int checkcpu(void) { return 0; } - -int print_cpuinfo(void) -{ - return default_print_cpuinfo(); -} -- 2.34.1

2 1

[PATCH 0/6] x86: Correct timer overflow and add msr/cpuid commands
by Simon Glass 18 Oct '24

18 Oct '24

This series corrects an overflow of the timer which happens on QEMU on newer hardware. It also adds commands to read/write CPU ID registers and machine-status registers (MSRs). Simon Glass (6): x86: Show the CPU vendor in bdinfo x86: Ensure the CPU identity exists for timer init x86: Avoid timer-clock overflow x86: Sync up tsc_timer with Linux x86: Add a cpuid command x86: Add msr command arch/x86/cpu/i386/cpu.c | 99 +++++++++++++++++++------------ arch/x86/cpu/x86_64/cpu.c | 6 ++ arch/x86/include/asm/u-boot-x86.h | 17 ++++++ arch/x86/lib/bdinfo.c | 7 ++- cmd/x86/Makefile | 2 +- cmd/x86/cpuid.c | 37 ++++++++++++ cmd/x86/msr.c | 52 ++++++++++++++++ doc/usage/cmd/cpuid.rst | 68 +++++++++++++++++++++ doc/usage/cmd/msr.rst | 61 +++++++++++++++++++ doc/usage/index.rst | 2 + drivers/timer/tsc_timer.c | 18 +++++- test/cmd/Makefile | 1 + test/cmd/cpuid.c | 22 +++++++ test/cmd/msr.c | 38 ++++++++++++ 14 files changed, 387 insertions(+), 43 deletions(-) create mode 100644 cmd/x86/cpuid.c create mode 100644 cmd/x86/msr.c create mode 100644 doc/usage/cmd/cpuid.rst create mode 100644 doc/usage/cmd/msr.rst create mode 100644 test/cmd/cpuid.c create mode 100644 test/cmd/msr.c -- 2.34.1

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