August 2024 - U-Boot

[PATCH] cmd: bcb: Fix segfault on invalid block device
by Mattijs Korpershoek 06 Aug '24

06 Aug '24

When blk_get_dev() fails, block NULL and gets de-referenced in the error path by a printf(), resulting in a crash. This can be reproduced on sandbox with: $ ./u-boot --command "bcb load mmc 0 0" Fix the message by using the functions arguments (iface, devnum) instead. Note: partition (being a global static initialized) can be used safely. This issue has been reported by coverity [1] [1] https://lore.kernel.org/all/20240723141844.GF989285@bill-the-cat/ Fixes: dfeb4f0d7935 ("cmd: bcb: extend BCB C API to allow read/write the fields") Signed-off-by: Mattijs Korpershoek <mkorpershoek(a)baylibre.com> --- cmd/bcb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cmd/bcb.c b/cmd/bcb.c index fe6d6cb2c381..97a96c009641 100644 --- a/cmd/bcb.c +++ b/cmd/bcb.c @@ -172,8 +172,8 @@ static int __bcb_initialize(const char *iface, int devnum, const char *partp) return CMD_RET_SUCCESS; err_read_fail: - printf("Error: %d %d:%s read failed (%d)\n", block->uclass_id, - block->devnum, partition->name, ret); + printf("Error: %s %d:%s read failed (%d)\n", iface, devnum, + partition->name, ret); __bcb_reset(); return CMD_RET_FAILURE; } --- base-commit: f659ba43837e5ae5a35fdff3736c8e13f9062abd change-id: 20240724-bcb-crash-a491e603612d Best regards, -- Mattijs Korpershoek <mkorpershoek(a)baylibre.com>

2 2

[PATCH v2] config: Add 'update_bootimg' command to update flash.bin on Phytec's imx8mm
by Lukasz Majewski 06 Aug '24

06 Aug '24

This command allows easy update on SD card or eMMC of the flash.bin generated (with binman) during u-boot build. Signed-off-by: Lukasz Majewski <lukma(a)denx.de> --- Changes for v2: - Remove 'update_mmc_part' variable - Change path for hostname - Use full version of dhcp command (${loadaddr} added) --- include/configs/phycore_imx8mm.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index ce6dc87c69..361e665676 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -29,6 +29,16 @@ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ "mmcpart=1\0" \ "mmcroot=2\0" \ + "update_offset=0x42\0" \ + "update_filename=flash.bin\0" \ + "hostname=/srv/tftp/\0" \ + "update_bootimg=" \ + "mmc dev ${mmcdev} ; " \ + "if dhcp ${loadaddr} ${hostname}/${update_filename} ; then " \ + "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ + "setexpr fw_sz ${fw_sz} + 1 ; " \ + "mmc write ${loadaddr} ${update_offset} ${fw_sz} ; " \ + "fi\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} " \ "root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw\0" \ -- 2.39.2

2 2

[PATCH] arm: dts: rockchip: sort usbdp_phy nodes for Radxa ROCK 5B
by FUKAUMI Naoki 06 Aug '24

06 Aug '24

sort nodes alphanumerically. no functional change is intended. Signed-off-by: FUKAUMI Naoki <naoki(a)radxa.com> --- arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi index 8e318e624a8..fabbd717b61 100644 --- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi @@ -47,11 +47,11 @@ status = "okay"; }; -&usbdp_phy1 { +&usbdp_phy0 { status = "okay"; }; -&usbdp_phy0 { +&usbdp_phy1 { status = "okay"; }; -- 2.43.0

1 1

[ANN] U-Boot v2024.10-rc2 released
by Tom Rini 06 Aug '24

06 Aug '24

Hey all, It's release day and here is -rc2. I think I still have a few things that I'll see if look OK to sneak in to master rather than waiting, at this point. But mostly things for next. Which will be re-synced with current top of tree shortly. In terms of a changelog, git log --merges v2024.10-rc1..v2024.10-rc2 contains what I've pulled but as always, better PR messages and tags will provide better results here. I hope to remain on schedule and that means the rest of the rcs every other Monday, and with final release on Monday, October 7th, 2024. Thanks all! -- Tom

1 0

[PATCH v9 7/8] rockchip: Ensure memory size is available in RK3399 SPL
by Simon Glass 06 Aug '24

06 Aug '24

At present gd->ram_size is 0 in SPL, meaning that it is not possible to enable the cache. Correct this by always populating the RAM size correctly. This increases code size by about 500 bytes in SPL, since it must call the rather large rockchip_sdram_size() function. Signed-off-by: Simon Glass <sjg(a)chromium.org> Reviewed-by: Quentin Schulz <quentin.schulz(a)cherry.de> --- Changes in v9: - Avoid adding rockchip_sdram_size() to TPL even when RAM is inited Changes in v3: - Cut the patch down to bare bones Changes in v2: - Add new patch to correct memory size in SPL drivers/ram/rockchip/sdram_rk3399.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index ef9a1824b2b..58f3745ffa5 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -3142,19 +3142,25 @@ static int rk3399_dmc_init(struct udevice *dev) static int rk3399_dmc_probe(struct udevice *dev) { + struct dram_info *priv = dev_get_priv(dev); + #if defined(CONFIG_TPL_BUILD) || \ (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) if (rk3399_dmc_init(dev)) return 0; -#else - struct dram_info *priv = dev_get_priv(dev); - - priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); - debug("%s: pmugrf = %p\n", __func__, priv->pmugrf); - priv->info.base = CFG_SYS_SDRAM_BASE; - priv->info.size = - rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg2); #endif + /* + * There is no point in checking the SDRAM size in TPL as it is not + * used, so avoid the code size increment. + */ + if (!IS_ENABLED(CONFIG_TPL_BUILD)) { + priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); + debug("%s: pmugrf = %p\n", __func__, priv->pmugrf); + priv->info.base = CFG_SYS_SDRAM_BASE; + priv->info.size = rockchip_sdram_size( + (phys_addr_t)&priv->pmugrf->os_reg2); + } + return 0; } -- 2.34.1

2 2

[PATCH v7 0/8] Bug-fixes for a few boards
by Simon Glass 06 Aug '24

06 Aug '24

This series includes fixes to get some rockchip and nvidia boards working again. It also drops the broken Beaglebone Black config and provides a devicetree fix for coral (x86). Note that since this series fixes bugs, it is targeted at -master Changes in v7: - Reword the comment Changes in v5: - Move setting of pmugrf into the probe() function - Drop patches previously applied Changes in v4: - Drop Fixes tag - Fix 'stating' typo - Move Binman size feature to a separate series Changes in v3: - Use BLOBLIST instead of OF_BLOBLIST - Cut the patch down to bare bones - Split out the refactoring into a separate patch Changes in v2: - Use 'phase' instead of 'stage' - Add new patch to correct memory size in SPL - Drop patch "regulator: rk8xx: Fix incorrect parameter" - Rewrite boneblack patch to onstead drop the target and update docs Simon Glass (8): mkeficapsule: Add a --version argument binman: Collect the version number for mkeficapsule binman: Deal with mkeficapsule being missing binman: Return failure when a usage() message is generated binman: Keep the efi_capsule input file fdt: Correct condition for bloblist existing rockchip: Ensure memory size is available in RK3399 SPL rockchip: Avoid #ifdefs in RK3399 SPL doc/mkeficapsule.1 | 4 ++++ drivers/ram/rockchip/sdram_rk3399.c | 35 ++++++++++++++--------------- lib/fdtdec.c | 12 ++++++++-- tools/binman/btool/mkeficapsule.py | 3 ++- tools/binman/etype/efi_capsule.py | 5 ++++- tools/mkeficapsule.c | 10 +++++++-- 6 files changed, 45 insertions(+), 24 deletions(-) -- 2.34.1

3 12

uboot eth_initialize
by Claudio Spinelli (Nokia) 05 Aug '24

05 Aug '24

I am having a problem in uboot with eth_initialize() function on my target. My target is based on Intel Arria10. All the uboot source code, that I have seen, seem to assume that there is a PHY device attached to the cpu emac0. On my target I do not have a PHY attached to the emac0, but there is a direct connection to a Marvell 88E6321 at port 5 which is RGMII. So I have RGMII to RGMII from Marvell switch to cpu arria10 emac0 . When u-boot code in common/board_r.c calls : static int initr_net(void) { puts("Net: "); eth_initialize(); I get : Could not get PHY for ethernet@ff800000: addr -1 and then "No Ethernet found" I am trying to figure out what changes I need to make to current uboot to make it work. How do I tell you uboot that there is an ethernet switch connected and not a phy . Any hints would be appreciated. Does you have any uboot source code that use such implementation? Thanks Claudio

1 0

[PATCH v1 0/1] board: tegra: convert boards to text env
by Svyatoslav Ryhel 05 Aug '24

05 Aug '24

Move env stuff into dedicated files in boards (1st stage). U-Boot CI passed, boards I own work fine, tests are welcomed. Svyatoslav Ryhel (1): board: tegra: convert tegra-based boards to text env board/asus/grouper/grouper.env | 15 +++ .../asus/transformer-t20/transformer-t20.env | 16 ++++ .../transformer-t30/configs/tf600t.config | 1 + board/asus/transformer-t30/tf600t.env | 16 ++++ .../asus/transformer-t30/transformer-t30.env | 16 ++++ board/htc/endeavoru/endeavoru.env | 13 +++ .../ideapad-yoga-11/ideapad-yoga-11.env | 16 ++++ board/lg/x3-t30/configs/p880.config | 1 + board/lg/x3-t30/configs/p895.config | 1 + board/lg/x3-t30/p880.env | 14 +++ board/lg/x3-t30/p895.env | 13 +++ board/microsoft/surface-rt/surface-rt.env | 14 +++ board/nvidia/cardhu/cardhu.env | 2 + board/nvidia/p2771-0000/p2771-0000.env | 22 +++++ board/nvidia/p3450-0000/p3450-0000.env | 7 ++ board/toradex/apalis-tk1/apalis_tk1.env | 45 +++++++++ board/toradex/apalis_t30/apalis_t30.env | 9 ++ board/toradex/colibri_t20/colibri_t20.env | 3 + board/toradex/colibri_t30/colibri_t30.env | 9 ++ board/wexler/qc750/qc750.env | 14 +++ configs/apalis-tk1_defconfig | 1 + configs/apalis_t30_defconfig | 1 + configs/cardhu_defconfig | 1 + configs/colibri_t20_defconfig | 1 + configs/colibri_t30_defconfig | 1 + configs/endeavoru_defconfig | 1 + configs/grouper_common_defconfig | 1 + configs/ideapad-yoga-11_defconfig | 1 + configs/p2771-0000-000_defconfig | 1 + configs/p3450-0000_defconfig | 1 + configs/qc750_defconfig | 1 + configs/surface-rt_defconfig | 1 + configs/transformer_t20_defconfig | 1 + configs/transformer_t30_defconfig | 1 + include/configs/apalis-tk1.h | 58 ------------ include/configs/apalis_t30.h | 12 --- include/configs/cardhu.h | 4 - include/configs/colibri_t20.h | 11 --- include/configs/colibri_t30.h | 12 --- include/configs/endeavoru.h | 43 --------- include/configs/grouper.h | 45 --------- include/configs/ideapad-yoga-11.h | 58 ------------ include/configs/p2771-0000.h | 20 ---- include/configs/p3450-0000.h | 13 --- include/configs/qc750.h | 42 --------- include/configs/surface-rt.h | 18 ---- include/configs/transformer-common.h | 91 ------------------- include/configs/transformer-t20.h | 4 +- include/configs/transformer-t30.h | 6 +- include/configs/x3-t30.h | 44 --------- include/env/nvidia/prod_upd.env | 59 ++++++++++++ 51 files changed, 326 insertions(+), 475 deletions(-) create mode 100644 board/asus/grouper/grouper.env create mode 100644 board/asus/transformer-t20/transformer-t20.env create mode 100644 board/asus/transformer-t30/tf600t.env create mode 100644 board/asus/transformer-t30/transformer-t30.env create mode 100644 board/htc/endeavoru/endeavoru.env create mode 100644 board/lenovo/ideapad-yoga-11/ideapad-yoga-11.env create mode 100644 board/lg/x3-t30/p880.env create mode 100644 board/lg/x3-t30/p895.env create mode 100644 board/microsoft/surface-rt/surface-rt.env create mode 100644 board/nvidia/cardhu/cardhu.env create mode 100644 board/nvidia/p2771-0000/p2771-0000.env create mode 100644 board/nvidia/p3450-0000/p3450-0000.env create mode 100644 board/toradex/apalis-tk1/apalis_tk1.env create mode 100644 board/toradex/apalis_t30/apalis_t30.env create mode 100644 board/toradex/colibri_t20/colibri_t20.env create mode 100644 board/toradex/colibri_t30/colibri_t30.env create mode 100644 board/wexler/qc750/qc750.env delete mode 100644 include/configs/transformer-common.h create mode 100644 include/env/nvidia/prod_upd.env -- 2.43.0

3 12

[PATCH] soc: zynqmp: Add support for zu1eg_lr device
by Michal Simek 05 Aug '24

05 Aug '24

There is new chip coming which is using new _lr suffix that's why record it in the list to enable bitstream in bit format loading. Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- drivers/soc/soc_xilinx_zynqmp.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/drivers/soc/soc_xilinx_zynqmp.c index a2d5b82fd34d..0c45c781fef4 100644 --- a/drivers/soc/soc_xilinx_zynqmp.c +++ b/drivers/soc/soc_xilinx_zynqmp.c @@ -44,6 +44,7 @@ enum { ZYNQMP_VARIANT_DR_SE = BIT(4), ZYNQMP_VARIANT_EG_SE = BIT(5), ZYNQMP_VARIANT_TEG = BIT(6), + ZYNQMP_VARIANT_EG_LR = BIT(7), }; struct zynqmp_device { @@ -64,6 +65,11 @@ static const struct zynqmp_device zynqmp_devices[] = { .device = 1, .variants = ZYNQMP_VARIANT_EG, }, + { + .id = 0x04689093, + .device = 1, + .variants = ZYNQMP_VARIANT_EG_LR, + }, { .id = 0x04711093, .device = 2, @@ -300,6 +306,8 @@ static int soc_xilinx_zynqmp_detect_machine(struct udevice *dev, u32 idcode, strlcat(priv->machine, "eg", sizeof(priv->machine)); } else if (device->variants & ZYNQMP_VARIANT_EG_SE) { strlcat(priv->machine, "eg_SE", sizeof(priv->machine)); + } else if (device->variants & ZYNQMP_VARIANT_EG_LR) { + strlcat(priv->machine, "eg_LR", sizeof(priv->machine)); } else if (device->variants & ZYNQMP_VARIANT_DR) { strlcat(priv->machine, "dr", sizeof(priv->machine)); } else if (device->variants & ZYNQMP_VARIANT_DR_SE) { -- 2.43.0

1 1

[PATCH] ARM: zynq: Add support for 7z010_lr and 7z020_lr
by Michal Simek 05 Aug '24

05 Aug '24

Add support for *_lr SOCs. Without this change chips are not going to be properly identified and bitstream programming won't work. Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- arch/arm/mach-zynq/cpu.c | 2 ++ include/zynqpl.h | 6 ++++++ 2 files changed, 8 insertions(+) diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c index c75e453d5730..5b6d765099d4 100644 --- a/arch/arm/mach-zynq/cpu.c +++ b/arch/arm/mach-zynq/cpu.c @@ -36,9 +36,11 @@ static const struct { } zynq_fpga_descs[] = { ZYNQ_DESC(7Z007S), ZYNQ_DESC(7Z010), + ZYNQ_DESC(7Z010_LR), ZYNQ_DESC(7Z012S), ZYNQ_DESC(7Z014S), ZYNQ_DESC(7Z015), + ZYNQ_DESC(7Z020_LR), ZYNQ_DESC(7Z020), ZYNQ_DESC(7Z030), ZYNQ_DESC(7Z035), diff --git a/include/zynqpl.h b/include/zynqpl.h index d7dc064585ea..08d067d87572 100644 --- a/include/zynqpl.h +++ b/include/zynqpl.h @@ -20,9 +20,11 @@ extern struct xilinx_fpga_op zynq_op; #define XILINX_ZYNQ_XC7Z007S 0x3 #define XILINX_ZYNQ_XC7Z010 0x2 +#define XILINX_ZYNQ_XC7Z010_LR 0x4 #define XILINX_ZYNQ_XC7Z012S 0x1c #define XILINX_ZYNQ_XC7Z014S 0x8 #define XILINX_ZYNQ_XC7Z015 0x1b +#define XILINX_ZYNQ_XC7Z020_LR 0x9 #define XILINX_ZYNQ_XC7Z020 0x7 #define XILINX_ZYNQ_XC7Z030 0xc #define XILINX_ZYNQ_XC7Z035 0x12 @@ -32,9 +34,11 @@ extern struct xilinx_fpga_op zynq_op; /* Device Image Sizes */ #define XILINX_XC7Z007S_SIZE 16669920/8 #define XILINX_XC7Z010_SIZE 16669920/8 +#define XILINX_XC7Z010_LR_SIZE 16669920/8 #define XILINX_XC7Z012S_SIZE 28085344/8 #define XILINX_XC7Z014S_SIZE 32364512/8 #define XILINX_XC7Z015_SIZE 28085344/8 +#define XILINX_XC7Z020_LR_SIZE 32364512/8 #define XILINX_XC7Z020_SIZE 32364512/8 #define XILINX_XC7Z030_SIZE 47839328/8 #define XILINX_XC7Z035_SIZE 106571232/8 @@ -44,9 +48,11 @@ extern struct xilinx_fpga_op zynq_op; /* Device Names */ #define XILINX_XC7Z007S_NAME "7z007s" #define XILINX_XC7Z010_NAME "7z010" +#define XILINX_XC7Z010_LR_NAME "xc7z010_lr" #define XILINX_XC7Z012S_NAME "7z012s" #define XILINX_XC7Z014S_NAME "7z014s" #define XILINX_XC7Z015_NAME "7z015" +#define XILINX_XC7Z020_LR_NAME "xa7z020_lr" #define XILINX_XC7Z020_NAME "7z020" #define XILINX_XC7Z030_NAME "7z030" #define XILINX_XC7Z035_NAME "7z035" -- 2.43.0

1 1