July 2024 - U-Boot

[PATCH v4 00/21] qcom: rpmh core and regulator support
by Caleb Connolly 10 Jul '24

10 Jul '24

This series introduces support for the RPMh (Resource Power Manager (hardened)) co-processor and associated regulator driver found on most modern Qualcomm platforms (since ~2017). Even though most regulators are controlled via SPMI, the specific regions on the PMICs for controlling the regulators are restricted and can't be accessed by the Applications Processor (AP/HLOS). Instead, these resources are proxied via the RPMh where they can be voted on by multiple subsystems (Linux, the modem, and the other DSPs). This is done for security (to protect clocks, power domains, and regulators that are specifically relevant for the trustzone) as well as to simplify the management of shared peripherals and to allow for handover of peripherals like the USB controller. For U-Boot, our main concern is the regulators. Since all regulators on the system are controlled via the RPMh, it is necessary to support it to enable USB VBUS on some platforms, and may be needed for other peripherals in the future. Communicating with the RPMh additional requires accessing the cmd-db shared memory region, this contains key/value maps to determine the address of specific resources on the RPMh. Introduce support for the cmd-db, the RPMh framework, and some of the regulators that are necessary to enable USB VBUS on the RB5 development board. These drivers are taken from Linux, then modified and simplified for U-Boot. The original Linux drivers contain heavy optimisations related to multithreading and asynchronous probing, as well as support for idle and suspend states which we don't need to deal with here. This unused code is removed before finally adjusting the drivers to properly build for U-Boot and use its device model. The U-Boot version of the driver supports a single ACTIVE_ONLY TCS and waits for it to be cleared after use. We don't support programming low power states. --- Changes in v4: - Denote original Linux version in bitmap.h patch - Rebased on Linux 6.10-rc6 and re-apply U-Boot changes preserving git history. Allowing for future changes to the Linux drivers to be ported over more easily. - Add missing check to wait for the TCS to be cleared after use (seems we were just racing the RPMh before, oops!). - Fix missing n_modes in pmic5_pldo regulator. - Link to v3: https://lore.kernel.org/r/20240708-b4-qcom-rpmh-v3-0-846cc6c5b728@linaro.org Changes in v3: - Don't call dm_scan_fdt_dev(), since DM core will scan. - Link to v2: https://lore.kernel.org/r/20240708-b4-qcom-rpmh-v2-0-8bc765606e56@linaro.org Changes in v2: - Implement Neil's suggestions and fixes for SM8[56]50 - Slightly refactor cmd_db_init() for better abstraction. - Improve logging (printf -> log_err/dev_err) - Add missing error check in rpmh_regulators_bind() - Link to v1: https://lore.kernel.org/r/20240617-b4-qcom-rpmh-v1-0-bd2336923e0a@linaro.org --- Caleb Connolly (21): linux/bitmap.h: add bitmap_empty helper soc: qcom: import rpmh and cmd-db drivers from Linux soc: qcom: cmd-db: adjust headers for U-Boot soc: qcom: cmd-db: drop unused functions soc: qcom: cmd-db: replace cmd_db_ready() with cmd_db_init() soc: qcom: cmd-db: adjust for U-Boot API soc: qcom: rpmh-rsc: drop unused multi-threading and non-active TCS support soc: qcom: rpmh-rsc: adjust headers for U-Boot soc: qcom: rpmh-rsc: adjust probe for U-Boot soc: qcom: rpmh-rsc: remaining U-Boot API changes soc: qcom: rpmh: adjust headers for U-Boot soc: qcom: rpmh: drop unused functions soc: qcom: rpmh: U-Boot API changes power: regulator: import qcom-rpmh-regulator from Linux power: regulator: adjust headers for U-Boot power: regulator: qcom-rpmh-regulator: port over lineage_range helpers power: regulator: adjust structs for U-Boot power: regulator: qcom-rpmh-regulator: remove unused regulators power: regulator: qcom-rpmh-regulator: port ops to U-Boot power: regulator: qcom-rpmh-regulator: adjust probe for U-Boot qcom_defconfig: enable rpmh regulators configs/qcom_defconfig | 5 + drivers/power/regulator/Kconfig | 8 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/qcom-rpmh-regulator.c | 544 ++++++++++++++++++++++++++ drivers/soc/Kconfig | 1 + drivers/soc/Makefile | 1 + drivers/soc/qcom/Kconfig | 27 ++ drivers/soc/qcom/Makefile | 4 + drivers/soc/qcom/cmd-db.c | 213 ++++++++++ drivers/soc/qcom/rpmh-internal.h | 138 +++++++ drivers/soc/qcom/rpmh-rsc.c | 518 ++++++++++++++++++++++++ drivers/soc/qcom/rpmh.c | 110 ++++++ include/linux/bitmap.h | 8 + include/soc/qcom/cmd-db.h | 33 ++ include/soc/qcom/rpmh.h | 28 ++ include/soc/qcom/tcs.h | 81 ++++ 16 files changed, 1720 insertions(+) --- change-id: 20240611-b4-qcom-rpmh-fcfd32ac2940 base-commit: 50adc932e7aa34e6d9c738ec13ed09382a9d109a // Caleb (they/them)

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[PATCH v3 0/4] alist: Implement a pointer list / array of structs
by Simon Glass 10 Jul '24

10 Jul '24

This data structure provides a list of pointers / array of structures. I was planning to use it for the lmb restructure, to allow it to support any number of entries, but then I gave up on it. There are quite a few places in U-Boot where such a list would be useful, since it supports growing the array. The series includes a patch to convert an existing function to use this. It adds a little under 300 bytes of code with Thumb2. Example: struct my_struct obj; struct my_struct *ptr = alist_add(&lst, &obj, struct my_struct); // now ptr is in the list [1] https://patchwork.ozlabs.org/project/uboot/list/?series=371258&state=* Changes in v3: - Add prototype for alist_expand_by() - Update for alist_add() API change Changes in v2: - Fix 'typeee' typo - Make alist_get_ptr() take a const alist * - Make alist_add() take a struct rather than a pointer - Declare alist_expand_by() as static Simon Glass (4): malloc: Support testing with realloc() lib: Handle a special case with str_to_list() alist: Add support for an allocated pointer list lib: Convert str_to_list() to use alist common/dlmalloc.c | 4 + include/alist.h | 214 ++++++++++++++++++++++++++++++++++++++++++++++ lib/Makefile | 1 + lib/alist.c | 147 +++++++++++++++++++++++++++++++ lib/strto.c | 33 ++++--- test/lib/Makefile | 1 + test/lib/alist.c | 197 ++++++++++++++++++++++++++++++++++++++++++ test/str_ut.c | 4 +- 8 files changed, 584 insertions(+), 17 deletions(-) create mode 100644 include/alist.h create mode 100644 lib/alist.c create mode 100644 test/lib/alist.c -- 2.34.1

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[PATCH v2 0/4] alist: Implement a pointer list / array of structs
by Simon Glass 10 Jul '24

10 Jul '24

This data structure provides a list of pointers / array of structures. I was planning to use it for the lmb restructure, to allow it to support any number of entries, but then I gave up on it. There are quite a few places in U-Boot where such a list would be useful, since it supports growing the array. The series includes a patch to convert an existing function to use this. It adds a little under 300 bytes of code with Thumb2. Example: struct my_struct obj; struct my_struct *ptr = alist_add(&lst, &obj, struct my_struct); // now ptr is in the list [1] https://patchwork.ozlabs.org/project/uboot/list/?series=371258&state=* Changes in v2: - Fix 'typeee' typo - Make alist_get_ptr() take a const alist * - Make alist_add() take a struct rather than a pointer - Declare alist_expand_by() as static Simon Glass (4): malloc: Support testing with realloc() lib: Handle a special case with str_to_list() alist: Add support for an allocated pointer list lib: Convert str_to_list() to use alist common/dlmalloc.c | 4 + include/alist.h | 205 ++++++++++++++++++++++++++++++++++++++++++++++ lib/Makefile | 1 + lib/alist.c | 154 ++++++++++++++++++++++++++++++++++ lib/strto.c | 33 ++++---- test/lib/Makefile | 1 + test/lib/alist.c | 197 ++++++++++++++++++++++++++++++++++++++++++++ test/str_ut.c | 4 +- 8 files changed, 582 insertions(+), 17 deletions(-) create mode 100644 include/alist.h create mode 100644 lib/alist.c create mode 100644 test/lib/alist.c -- 2.34.1

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[PATCH v3 1/1] bloblist: Fix bloblist convention checking.
by Levi Yun 10 Jul '24

10 Jul '24

According to recently firmware handsoff spec [1]'s "Register usage at handoff boundary", Transfer List's signature value was changed from 0x40_b10b (3 bytes) to 4a0f_b10b (4 bytes). As updating of TL's signature, register value of x1/r1 should be: In aarch32's r1 value should be R1[23:0]: set to the TL signature (4a0f_b10b -> masked range value: 0f_b10b) R1[31:24]: version of the register convention == 1 and In aarch64's x1 value should be X1[31:0]: set to the TL signature (4a0f_b10b) X1[39:32]: version of the register convention == 1 X1[63:40]: MBZ (See the [2] and [3]). This patch fix problems: 1. breaking X1 value with updated specification in aarch64 - change of length of signature field. 2. previous error value set in R1 in arm32. - length of signature should be 24, but it uses 32bit signature. [1] https://github.com/FirmwareHandoff/firmware_handoff [2] https://github.com/FirmwareHandoff/firmware_handoff/issues/32 [3] https://github.com/FirmwareHandoff/firmware_handoff/commit/5aa7aa1d3a1db752… Signed-off-by: Levi Yun <yeoreum.yun(a)arm.com> --- v3: - Restore arch/arm/lib/xferlist.c. v2: - Modify commit message. - Remove wrong swaping check in xferlist_from_boot_arg(). common/bloblist.c | 11 ++++++++++- include/bloblist.h | 5 ++++- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/common/bloblist.c b/common/bloblist.c index 11d6422b69..2008ab4d25 100644 --- a/common/bloblist.c +++ b/common/bloblist.c @@ -576,7 +576,16 @@ int bloblist_maybe_init(void) int bloblist_check_reg_conv(ulong rfdt, ulong rzero, ulong rsig) { - if (rzero || rsig != (BLOBLIST_MAGIC | BLOBLIST_REGCONV_VER) || + ulong version = BLOBLIST_REGCONV_VER; + ulong sigval; + + sigval = (IS_ENABLED(CONFIG_64BIT)) ? + ((BLOBLIST_MAGIC & ((1UL << BLOBLIST_REGCONV_SHIFT_64) - 1)) | + ((version & BLOBLIST_REGCONV_MASK) << BLOBLIST_REGCONV_SHIFT_64)) : + ((BLOBLIST_MAGIC & ((1UL << BLOBLIST_REGCONV_SHIFT_32) - 1)) | + ((version & BLOBLIST_REGCONV_MASK) << BLOBLIST_REGCONV_SHIFT_32)); + + if (rzero || rsig != sigval || rfdt != (ulong)bloblist_find(BLOBLISTT_CONTROL_FDT, 0)) { gd->bloblist = NULL; /* Reset the gd bloblist pointer */ return -EIO; diff --git a/include/bloblist.h b/include/bloblist.h index 7fbdd622bc..f4849f22a0 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -83,7 +83,10 @@ enum { * Register convention version should be placed into a higher byte * https://github.com/FirmwareHandoff/firmware_handoff/issues/32 */ - BLOBLIST_REGCONV_VER = 1 << 24, + BLOBLIST_REGCONV_SHIFT_64 = 32, + BLOBLIST_REGCONV_SHIFT_32 = 24, + BLOBLIST_REGCONV_MASK = 0xff, + BLOBLIST_REGCONV_VER = 1, BLOBLIST_BLOB_ALIGN_LOG2 = 3, BLOBLIST_BLOB_ALIGN = 1 << BLOBLIST_BLOB_ALIGN_LOG2, -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}

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[PATCH 0/6] Extend SOM detection
by Daniel Schultz 10 Jul '24

10 Jul '24

This patchset extends PHYTEC's SOM detection for the K3 platforms. It adds generic support to apply overlays via the extension framework inside the overlays.env file. Additionally, the K3 mmc boot environment applies these overlays now. It also adds the 'extension_board_scan' hook to the K3 board code and adds all missing configs in the phyCORE-AM62x and -AM64x A53 defconfigs. Daniel Schultz (6): include: env: phytec: overlays: Add extension command include: env: phytec: k3_mmc: Apply extension overlays board: phytec: common: k3: Add SOM detection overlays board: phytec: common: Kconfig: Enable SUPPORT_EXTENSION_SCAN configs: phytec_am62x_a53_defconfig: Set CONFIG_CMD_EXTENSION configs: phycore_am64x_a53_defconfig: Enable SOM detection board/phytec/common/Kconfig | 2 ++ board/phytec/common/k3/board.c | 45 +++++++++++++++++++++++++++++ configs/phycore_am62x_a53_defconfig | 1 + configs/phycore_am64x_a53_defconfig | 2 ++ include/env/phytec/k3_mmc.env | 1 + include/env/phytec/overlays.env | 20 +++++++++++++ 6 files changed, 71 insertions(+) -- 2.25.1

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[PATCH] bloblist: Fix bloblist convention checking.
by Levi Yun 09 Jul '24

09 Jul '24

According to recently firmware handsoff spec [1]'s "Register usage at handoff boundary", Transfer List's signature value was changed from 0x40_b10b (3 bytes) to 4a0f_b10b (4 bytes). As updating of TL's signature, register value of x1/r1 should be: In aarch32's r1 value should be R1[23:0]: TL signature (4a0f_b10b->masked range value: 0f_b10b) R1[31:24]: version of the register convention == 1 and In aarch64's x1 value should be X1[31:0]: TL signature (4a0f_b10b) X1[39:32]: version of the register convention == 1 X1[63:40]: MBZ (See the [2] and [3]). Also, according to architecture, the convention is slight different: In aarch32: R0: MBZ R1: see above R2: Compatibility location for passing a platform description devicetree R3: tl_base_pa In aarch64: X0: Compatibility location for passing a platform description devicetree X1: see above X2: MBZ X3: tl_base_pa This patch fix problems: 1. breaking X1 value with updated specification in aarch64 - change of length of signature field. 2. previous error value set in R1 in arm32. - length of signature should be 24, but it uses 32bit signature. 3. according to architecture, check register convetion differently. [1] https://github.com/FirmwareHandoff/firmware_handoff [2] https://github.com/FirmwareHandoff/firmware_handoff/issues/32 [3] https://github.com/FirmwareHandoff/firmware_handoff/commit/5aa7aa1d3a1db752… Signed-off-by: Levi Yun <yeoreum.yun(a)arm.com> --- arch/arm/lib/xferlist.c | 8 +++++--- common/bloblist.c | 11 ++++++++++- include/bloblist.h | 5 ++++- 3 files changed, 19 insertions(+), 5 deletions(-) diff --git a/arch/arm/lib/xferlist.c b/arch/arm/lib/xferlist.c index f9c5d88bd4..a6349293bd 100644 --- a/arch/arm/lib/xferlist.c +++ b/arch/arm/lib/xferlist.c @@ -12,12 +12,14 @@ int xferlist_from_boot_arg(ulong addr, ulong size) { int ret; - ret = bloblist_check(saved_args[3], size); + if (IS_ENABLED(CONFIG_64BIT)) + ret = bloblist_check_reg_conv(saved_args[0], saved_args[2], saved_args[1]); + else + ret = bloblist_check_reg_conv(saved_args[2], saved_args[0], saved_args[1]); if (ret) return ret; - ret = bloblist_check_reg_conv(saved_args[0], saved_args[2], - saved_args[1]); + ret = bloblist_check(saved_args[3], size); if (ret) return ret; diff --git a/common/bloblist.c b/common/bloblist.c index 11d6422b69..2008ab4d25 100644 --- a/common/bloblist.c +++ b/common/bloblist.c @@ -576,7 +576,16 @@ int bloblist_maybe_init(void) int bloblist_check_reg_conv(ulong rfdt, ulong rzero, ulong rsig) { - if (rzero || rsig != (BLOBLIST_MAGIC | BLOBLIST_REGCONV_VER) || + ulong version = BLOBLIST_REGCONV_VER; + ulong sigval; + + sigval = (IS_ENABLED(CONFIG_64BIT)) ? + ((BLOBLIST_MAGIC & ((1UL << BLOBLIST_REGCONV_SHIFT_64) - 1)) | + ((version & BLOBLIST_REGCONV_MASK) << BLOBLIST_REGCONV_SHIFT_64)) : + ((BLOBLIST_MAGIC & ((1UL << BLOBLIST_REGCONV_SHIFT_32) - 1)) | + ((version & BLOBLIST_REGCONV_MASK) << BLOBLIST_REGCONV_SHIFT_32)); + + if (rzero || rsig != sigval || rfdt != (ulong)bloblist_find(BLOBLISTT_CONTROL_FDT, 0)) { gd->bloblist = NULL; /* Reset the gd bloblist pointer */ return -EIO; diff --git a/include/bloblist.h b/include/bloblist.h index 7fbdd622bc..f4849f22a0 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -83,7 +83,10 @@ enum { * Register convention version should be placed into a higher byte * https://github.com/FirmwareHandoff/firmware_handoff/issues/32 */ - BLOBLIST_REGCONV_VER = 1 << 24, + BLOBLIST_REGCONV_SHIFT_64 = 32, + BLOBLIST_REGCONV_SHIFT_32 = 24, + BLOBLIST_REGCONV_MASK = 0xff, + BLOBLIST_REGCONV_VER = 1, BLOBLIST_BLOB_ALIGN_LOG2 = 3, BLOBLIST_BLOB_ALIGN = 1 << BLOBLIST_BLOB_ALIGN_LOG2, -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}

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[PATCH v2] bloblist: Fix bloblist convention checking.
by Levi Yun 09 Jul '24

09 Jul '24

According to recently firmware handsoff spec [1]'s "Register usage at handoff boundary", Transfer List's signature value was changed from 0x40_b10b (3 bytes) to 4a0f_b10b (4 bytes). As updating of TL's signature, register value of x1/r1 should be: In aarch32's r1 value should be R1[23:0]: set to the TL signature (4a0f_b10b -> masked range value: 0f_b10b) R1[31:24]: version of the register convention == 1 and In aarch64's x1 value should be X1[31:0]: set to the TL signature (4a0f_b10b) X1[39:32]: version of the register convention == 1 X1[63:40]: MBZ (See the [2] and [3]). This patch fix problems: 1. breaking X1 value with updated specification in aarch64 - change of length of signature field. 2. previous error value set in R1 in arm32. - length of signature should be 24, but it uses 32bit signature. [1] https://github.com/FirmwareHandoff/firmware_handoff [2] https://github.com/FirmwareHandoff/firmware_handoff/issues/32 [3] https://github.com/FirmwareHandoff/firmware_handoff/commit/5aa7aa1d3a1db752… Signed-off-by: Levi Yun <yeoreum.yun(a)arm.com> --- v2: - Modify commit message. - Remove wrong swaping check in xferlist_from_boot_arg(). arch/arm/lib/xferlist.c | 5 ++--- common/bloblist.c | 11 ++++++++++- include/bloblist.h | 5 ++++- 3 files changed, 16 insertions(+), 5 deletions(-) diff --git a/arch/arm/lib/xferlist.c b/arch/arm/lib/xferlist.c index f9c5d88bd4..c0b1e33f96 100644 --- a/arch/arm/lib/xferlist.c +++ b/arch/arm/lib/xferlist.c @@ -12,12 +12,11 @@ int xferlist_from_boot_arg(ulong addr, ulong size) { int ret; - ret = bloblist_check(saved_args[3], size); + ret = bloblist_check_reg_conv(saved_args[0], saved_args[2], saved_args[1]); if (ret) return ret; - ret = bloblist_check_reg_conv(saved_args[0], saved_args[2], - saved_args[1]); + ret = bloblist_check(saved_args[3], size); if (ret) return ret; diff --git a/common/bloblist.c b/common/bloblist.c index 11d6422b69..2008ab4d25 100644 --- a/common/bloblist.c +++ b/common/bloblist.c @@ -576,7 +576,16 @@ int bloblist_maybe_init(void) int bloblist_check_reg_conv(ulong rfdt, ulong rzero, ulong rsig) { - if (rzero || rsig != (BLOBLIST_MAGIC | BLOBLIST_REGCONV_VER) || + ulong version = BLOBLIST_REGCONV_VER; + ulong sigval; + + sigval = (IS_ENABLED(CONFIG_64BIT)) ? + ((BLOBLIST_MAGIC & ((1UL << BLOBLIST_REGCONV_SHIFT_64) - 1)) | + ((version & BLOBLIST_REGCONV_MASK) << BLOBLIST_REGCONV_SHIFT_64)) : + ((BLOBLIST_MAGIC & ((1UL << BLOBLIST_REGCONV_SHIFT_32) - 1)) | + ((version & BLOBLIST_REGCONV_MASK) << BLOBLIST_REGCONV_SHIFT_32)); + + if (rzero || rsig != sigval || rfdt != (ulong)bloblist_find(BLOBLISTT_CONTROL_FDT, 0)) { gd->bloblist = NULL; /* Reset the gd bloblist pointer */ return -EIO; diff --git a/include/bloblist.h b/include/bloblist.h index 7fbdd622bc..f4849f22a0 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -83,7 +83,10 @@ enum { * Register convention version should be placed into a higher byte * https://github.com/FirmwareHandoff/firmware_handoff/issues/32 */ - BLOBLIST_REGCONV_VER = 1 << 24, + BLOBLIST_REGCONV_SHIFT_64 = 32, + BLOBLIST_REGCONV_SHIFT_32 = 24, + BLOBLIST_REGCONV_MASK = 0xff, + BLOBLIST_REGCONV_VER = 1, BLOBLIST_BLOB_ALIGN_LOG2 = 3, BLOBLIST_BLOB_ALIGN = 1 << BLOBLIST_BLOB_ALIGN_LOG2, -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}

1 0

[PATCH 0/6] Resubmit series "zlib: Address CVE-2016-9841"
by Christophe Leroy 09 Jul '24

09 Jul '24

This series reapplies the series that was merged by commit 4914263c9a14 ("Merge patch series "zlib: Address CVE-2016-9841"") but then reverted by commit bbacdd3ef776 ("Revert "Merge patch series "zlib: Address CVE-2016-9841""") due to boot failure on powerpc/8xx platform induced by the removal of the necessary optimatisation brought by commit cd514aeb996e ("zlib: Optimize decompression"). In addition to the previous version, this series adds patch 3 to fix inflate_fast() with post incremendation and removes the deletion of commit cd514aeb996e ("zlib: Optimize decompression") by patch 4. It also adds patch 5 which contains changes split out of patch 4 because they are unrelated to the description of the patch. CI passed on https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/21518 Christophe Leroy (1): zlib: Fix inflate_fast() when POSTINC macro is set Michal Simek (5): zlib: Rename this variable to here (current decoding table entry) zlib: Rename write variable to wnext (window write index) zlib: Port fix for CVE-2016-9841 to U-Boot zlib: Misc unrelated updates zlib: Remove incorrect ZLIB_VERSION include/u-boot/zlib.h | 16 ++--- lib/gzip.c | 2 +- lib/zlib/deflate.c | 13 +--- lib/zlib/inffast.c | 147 +++++++++++++++++++----------------------- lib/zlib/inflate.c | 31 ++++----- lib/zlib/inflate.h | 2 +- lib/zlib/zlib.h | 1 - lib/zlib/zutil.c | 1 - 8 files changed, 90 insertions(+), 123 deletions(-) -- 2.44.0

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[PATCH] include/fastboot.h: add missing types.h include
by Caleb Connolly 09 Jul '24

09 Jul '24

Fixes a compile error when building with only the TCP fastboot implementation. Signed-off-by: Caleb Connolly <caleb.connolly(a)linaro.org> --- include/fastboot.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/fastboot.h b/include/fastboot.h index 2ca1b907a54d..b106d6177493 100644 --- a/include/fastboot.h +++ b/include/fastboot.h @@ -11,8 +11,10 @@ */ #ifndef _FASTBOOT_H_ #define _FASTBOOT_H_ +#include <linux/types.h> + #define FASTBOOT_VERSION "0.4" /* * Signals u-boot fastboot code to send multiple responses by -- 2.45.0

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[PATCH] configs: am62x_evm_a53_defconfig: Remove CONFIG_SYS_BOOTM_LEN
by Kamlesh Gurudasani 09 Jul '24

09 Jul '24

Increase the maximum size of the buffer that is used to decompress the OS image in to. If image size is greater than the buffer, boot will fail with following error, "Error: inflate() returned -5" "gzip compressed: uncompress error -1" Default limit for ARM64 platforms is 0x4000000, remove CONFIG_SYS_BOOTM_LEN=0x8000000, so that it follows default limit. Signed-off-by: Kamlesh Gurudasani <kamlesh(a)ti.com> --- configs/am62x_evm_a53_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index ca993b427b..dfa5ecc847 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -32,7 +32,6 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTSTD_FULL=y -CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_BOOTCOMMAND="run findfdt; run envboot; bootflow scan -lb" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x58000 --- base-commit: fd46ea0e701920eb205c2bce9d527bf0dec10b59 change-id: 20240708-remove-bootm-len-ab4e46039656 Best regards, -- Kamlesh Gurudasani <kamlesh(a)ti.com>

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