July 2024 - U-Boot

[RFC PATCH 0/4] lmb: Tweaks as discussed
by Simon Glass 01 Aug '24

01 Aug '24

This series adds a few tweaks to Sugosh's lmb series to show: - save/restore of test stage - putting lmb in a struct - small code-size improvement Simon Glass (4): lmb: Put internal details in a struct lmb: Tighten up the code in lmb_add_region_flags() lmb: Split init into two functions lmb: Ensure that tests don't change lmb state common/board_r.c | 4 +- include/lmb.h | 53 +++++++------ lib/lmb.c | 193 +++++++++++++++++++--------------------------- test/cmd/bdinfo.c | 8 +- test/lmb_ut.c | 54 +++++++++---- 5 files changed, 154 insertions(+), 158 deletions(-) -- 2.34.1

2 9

[PATCH 0/6] efi: Start tidying up memory management
by Simon Glass 01 Aug '24

01 Aug '24

We have been discussing the state of EFI memory management for some years so I thought it might be best to send a short series showing some of the issues we have talked about. This one just deals with memory allocation. It provides a way to detect EFI 'page allocations' when U-Boot' malloc() should be used. It should help us to clean up this area of U-Boot. It also updates EFI to use U-Boot memory allocation for the pool. Most functions use that anyway and it is much more efficient. It also avoids allocating things 'in space' in conflict with the loaded images. This series also includes a little patch to show more information in the index for the EFI pages. Note that this series is independent from Sugosh's lmb series[1], although I believe it will point the way to simplifying some of the later patches in that series. Overall, some issues which should be resolved are: - allocation inconsistency, e.g. efi_add_protocol() uses malloc() but efi_dp_dup() does not (this series makes a start) - change efi_bl_init() to register events later, when the devices are actually used - rather than efi_set_bootdev(), provide a bootstd way to take note of the device images came from and allow EFI to query that when needed - EFI_LOADER_BOUNCE_BUFFER - can use U-Boot bounce buffers? Minor questions on my mind: - is unaligned access useful? Is there a performance penalty? - API confusion about whether something is an address or a pointer [1] https://patchwork.ozlabs.org/project/uboot/list/?series=416441 Simon Glass (6): doc: Show more information in efi index efi: Convert device_path allocation to use malloc() efi: Allow monitoring of page allocations efi: Avoid pool allocation in efi_get_memory_map_alloc() efi: Use malloc() for the EFI pool efi: Show the location of the bounce buffer doc/develop/uefi/index.rst | 2 +- include/efi_loader.h | 24 ++++ lib/efi_loader/efi_bootbin.c | 10 ++ lib/efi_loader/efi_device_path.c | 43 ++++--- lib/efi_loader/efi_device_path_to_text.c | 2 +- lib/efi_loader/efi_memory.c | 148 +++++++++++------------ lib/efi_loader/efi_setup.c | 7 ++ 7 files changed, 133 insertions(+), 103 deletions(-) -- 2.34.1

5 44

[PATCH v2 1/1] net: dwc_eth_qos: mdio: Implement clause 45
by Philip Oberfichtner 01 Aug '24

01 Aug '24

Bevor this commit, only clause 22 access was possible. After this commit, clause 45 direct access will available as well. Note that there is a slight change of behavior: Before this commit, the C45E bit was set to whatever value was left in the register from the previous access. After this commit, we adopt the common practice of discerning C45 from C22 using the devad argument. Signed-off-by: Philip Oberfichtner <pro(a)denx.de> --- Notes: Attention: There is a slight change of behavior introduced by this commit (see commit message). Please test and review if this works for everybody. My implementation is tested on an Intel Elkhart lake SOC, patch submitted here: https://patchwork.ozlabs.org/project/uboot/list/?series=405358 Changes in V2: - Use FIELD_PREP() instead of manual '<<' shifting - Fix whitespace errors drivers/net/dwc_eth_qos.c | 66 ++++++++++++++++++++++++++------------- drivers/net/dwc_eth_qos.h | 9 +++--- 2 files changed, 49 insertions(+), 26 deletions(-) diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index cb329e0cef..6bc9b8fca4 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -51,6 +51,7 @@ #include <asm/arch/clock.h> #include <asm/mach-imx/sys_proto.h> #endif +#include <linux/bitfield.h> #include <linux/delay.h> #include <linux/printk.h> @@ -184,6 +185,25 @@ static int eqos_mdio_wait_idle(struct eqos_priv *eqos) 1000000, true); } +/* Bitmask common for mdio_read and mdio_write */ +#define EQOS_MDIO_BITFIELD(pa, rda, cr) \ + FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_PA_MASK, pa) | \ + FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_RDA_MASK, rda) | \ + FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_CR_MASK, cr) | \ + EQOS_MAC_MDIO_ADDRESS_GB + +static u32 eqos_mdio_bitfield(struct eqos_priv *eqos, int addr, int devad, int reg) +{ + int cr = eqos->config->config_mac_mdio; + bool c22 = devad == MDIO_DEVAD_NONE ? true : false; + + if (c22) + return EQOS_MDIO_BITFIELD(addr, reg, cr); + else + return EQOS_MDIO_BITFIELD(addr, devad, cr) | + EQOS_MAC_MDIO_ADDRESS_C45E; +} + static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad, int mdio_reg) { @@ -201,15 +221,17 @@ static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad, } val = readl(&eqos->mac_regs->mdio_address); - val &= EQOS_MAC_MDIO_ADDRESS_SKAP | - EQOS_MAC_MDIO_ADDRESS_C45E; - val |= (mdio_addr << EQOS_MAC_MDIO_ADDRESS_PA_SHIFT) | - (mdio_reg << EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT) | - (eqos->config->config_mac_mdio << - EQOS_MAC_MDIO_ADDRESS_CR_SHIFT) | - (EQOS_MAC_MDIO_ADDRESS_GOC_READ << - EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT) | - EQOS_MAC_MDIO_ADDRESS_GB; + val &= EQOS_MAC_MDIO_ADDRESS_SKAP; + + val |= eqos_mdio_bitfield(eqos, mdio_addr, mdio_devad, mdio_reg) | + FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_GOC_MASK, + EQOS_MAC_MDIO_ADDRESS_GOC_READ); + + if (val & EQOS_MAC_MDIO_ADDRESS_C45E) { + writel(FIELD_PREP(EQOS_MAC_MDIO_DATA_RA_MASK, mdio_reg), + &eqos->mac_regs->mdio_data); + } + writel(val, &eqos->mac_regs->mdio_address); udelay(eqos->config->mdio_wait); @@ -232,7 +254,8 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad, int mdio_reg, u16 mdio_val) { struct eqos_priv *eqos = bus->priv; - u32 val; + u32 v_addr; + u32 v_data; int ret; debug("%s(dev=%p, addr=%x, reg=%d, val=%x):\n", __func__, eqos->dev, @@ -244,20 +267,19 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad, return ret; } - writel(mdio_val, &eqos->mac_regs->mdio_data); + v_addr = readl(&eqos->mac_regs->mdio_address); + v_addr &= EQOS_MAC_MDIO_ADDRESS_SKAP; - val = readl(&eqos->mac_regs->mdio_address); - val &= EQOS_MAC_MDIO_ADDRESS_SKAP | - EQOS_MAC_MDIO_ADDRESS_C45E; - val |= (mdio_addr << EQOS_MAC_MDIO_ADDRESS_PA_SHIFT) | - (mdio_reg << EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT) | - (eqos->config->config_mac_mdio << - EQOS_MAC_MDIO_ADDRESS_CR_SHIFT) | - (EQOS_MAC_MDIO_ADDRESS_GOC_WRITE << - EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT) | - EQOS_MAC_MDIO_ADDRESS_GB; - writel(val, &eqos->mac_regs->mdio_address); + v_addr |= eqos_mdio_bitfield(eqos, mdio_addr, mdio_devad, mdio_reg) | + FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_GOC_MASK, + EQOS_MAC_MDIO_ADDRESS_GOC_WRITE); + + v_data = mdio_val; + if (v_addr & EQOS_MAC_MDIO_ADDRESS_C45E) + v_data |= FIELD_PREP(EQOS_MAC_MDIO_DATA_RA_MASK, mdio_reg); + writel(v_data, &eqos->mac_regs->mdio_data); + writel(v_addr, &eqos->mac_regs->mdio_address); udelay(eqos->config->mdio_wait); ret = eqos_mdio_wait_idle(eqos); diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h index 8b3d0d464d..a06390a698 100644 --- a/drivers/net/dwc_eth_qos.h +++ b/drivers/net/dwc_eth_qos.h @@ -79,19 +79,20 @@ struct eqos_mac_regs { #define EQOS_MAC_HW_FEATURE3_ASP_SHIFT 28 #define EQOS_MAC_HW_FEATURE3_ASP_MASK 0x3 -#define EQOS_MAC_MDIO_ADDRESS_PA_SHIFT 21 -#define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT 16 -#define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT 8 +#define EQOS_MAC_MDIO_ADDRESS_PA_MASK GENMASK(25, 21) +#define EQOS_MAC_MDIO_ADDRESS_RDA_MASK GENMASK(20, 16) +#define EQOS_MAC_MDIO_ADDRESS_CR_MASK GENMASK(11, 8) #define EQOS_MAC_MDIO_ADDRESS_CR_100_150 1 #define EQOS_MAC_MDIO_ADDRESS_CR_20_35 2 #define EQOS_MAC_MDIO_ADDRESS_CR_250_300 5 #define EQOS_MAC_MDIO_ADDRESS_SKAP BIT(4) -#define EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT 2 +#define EQOS_MAC_MDIO_ADDRESS_GOC_MASK GENMASK(3, 2) #define EQOS_MAC_MDIO_ADDRESS_GOC_READ 3 #define EQOS_MAC_MDIO_ADDRESS_GOC_WRITE 1 #define EQOS_MAC_MDIO_ADDRESS_C45E BIT(1) #define EQOS_MAC_MDIO_ADDRESS_GB BIT(0) +#define EQOS_MAC_MDIO_DATA_RA_MASK GENMASK(31, 16) #define EQOS_MAC_MDIO_DATA_GD_MASK 0xffff #define EQOS_MTL_REGS_BASE 0xd00 -- 2.39.2

3 2

[PATCH v3] net/tftp: make tftpput working with servers that do not use OACK
by Mikhail Kshevetskiy 01 Aug '24

01 Aug '24

Option Acknowledgment (OACK) is an extension of TFTP protocol (see rfc2347). Not all tftp servers implements it. For example it does not supported by tftpd server from debian-11 (https://packages.debian.org/bullseye/tftpd). Starting the "tftpput $loadaddr $size out_file" command with such server will results in the following packets flow: 192.168.27.3 192.168.27.1 TFTP Write Request, ... 192.168.27.1 192.168.27.3 TFTP Acknowledgement, Block: 0 192.168.27.3 192.168.27.1 TFTP Write Request, ... 192.168.27.1 192.168.27.3 TFTP Acknowledgement, Block: 0 192.168.27.3 192.168.27.1 TFTP Write Request, ... 192.168.27.1 192.168.27.3 TFTP Acknowledgement, Block: 0 192.168.27.1 192.168.27.3 TFTP Acknowledgement, Block: 0 192.168.27.1 192.168.27.3 TFTP Acknowledgement, Block: 0 ... so, no data transfer happening. Here is a packets flow for tftp-server with OACK support (tftpd-hpa: https://packages.debian.org/stable/tftpd-hpa) 192.168.27.3 192.168.27.1 TFTP Write Request, ... 192.168.27.1 192.168.27.3 TFTP Option Acknowledgement, ... 192.168.27.3 192.168.27.1 TFTP Data Packet, Block: 1 192.168.27.1 192.168.27.3 TFTP Acknowledgement, Block: 1 192.168.27.3 192.168.27.1 TFTP Data Packet, Block: 2 192.168.27.1 192.168.27.3 TFTP Acknowledgement, Block: 2 and this time data transfer starts normally. As we can see there is no OACK packet in the first case. Investigating an isssue we'll find out: 1) tftp_start() sets tftp_state = STATE_SEND_WRQ; 2) on OACK tftp_handler() sets tftp_state = STATE_DATA; and send a first DATA packet. 3) on ACK tftp_handler() will call a tftp_send() function. tftp_send() will * tftpd with OACK support: Current state is STATE_DATA, so transmittion of data packet will happen. * tftpd without OACK support Current state is STATE_SEND_WRQ, so retransmission of WRQ packet will happen. Thus tftpd-server will retransmit an ACK. This will repeats until timeout happens. According to RFC1350 this is wrong. We should start data transfer instead of WRQ retransmission. This patch fix an issue, so tftpput works fine with both types of servers. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy(a)iopsys.eu> --- v2 change: * add more bug details v3 change: * provide detailed analysis of an issue. --- net/tftp.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/net/tftp.c b/net/tftp.c index 6b16bdcbe4c..0b72134fbdb 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -493,8 +493,15 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, tftp_prev_block = tftp_cur_block; tftp_cur_block = (unsigned short)(block + 1); update_block_number(); - if (ack_ok) + if (ack_ok) { + if (block == 0 && + tftp_state == STATE_SEND_WRQ){ + /* connection's first ACK */ + tftp_state = STATE_DATA; + tftp_remote_port = src; + } tftp_send(); /* Send next data block */ + } } } #endif -- 2.39.2

2 1

[PATCH] net: remove duplicate eth_env_set_enetaddr_by_index() declaration
by A. Sverdlin 01 Aug '24

01 Aug '24

From: Alexander Sverdlin <alexander.sverdlin(a)siemens.com> eth_env_set_enetaddr_by_index() declaration is duplicated in eth_internal.h and net.h, but all units including eth_internal.h already include net.h. Remove the superfluous declaration. Signed-off-by: Alexander Sverdlin <alexander.sverdlin(a)siemens.com> --- net/eth_internal.h | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/net/eth_internal.h b/net/eth_internal.h index 0b829a8d388..cb302c157b5 100644 --- a/net/eth_internal.h +++ b/net/eth_internal.h @@ -11,22 +11,6 @@ /* Do init that is common to driver model and legacy networking */ void eth_common_init(void); -/** - * eth_env_set_enetaddr_by_index() - set the MAC address environment variable - * - * This sets up an environment variable with the given MAC address (@enetaddr). - * The environment variable to be set is defined by <@base_name><@index>addr. - * If @index is 0 it is omitted. For common Ethernet this means ethaddr, - * eth1addr, etc. - * - * @base_name: Base name for variable, typically "eth" - * @index: Index of interface being updated (>=0) - * @enetaddr: Pointer to MAC address to put into the variable - * Return: 0 if OK, other value on error - */ -int eth_env_set_enetaddr_by_index(const char *base_name, int index, - uchar *enetaddr); - int eth_mac_skip(int index); void eth_current_changed(void); void eth_set_dev(struct udevice *dev); -- 2.45.2

2 1

[PATCH v8 8/8] rockchip: Avoid #ifdefs in RK3399 SPL
by Simon Glass 01 Aug '24

01 Aug '24

The code here is confusing due to large blocks which are #ifdefed out. Add a function phase_sdram_init() which returns whether SDRAM init should happen in the current phase, using that as needed to control the code flow. This increases code size by about 500 bytes in SPL when the cache is on, since it must call the rather large rockchip_sdram_size() function. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v8: - Include ROCKCHIP_EXTERNAL_TPL in the condition - Put the non-dcache change back into patch 5 Changes in v5: - Move setting of pmugrf into the probe() function - Drop the non-dcache optimisation, since the cache should normally be on - Drop patches previously applied Changes in v4: - Fix 'stating' typo - Move Binman size feature to a separate series Changes in v3: - Split out the refactoring into a separate patch Changes in v2: - Drop patch "regulator: rk8xx: Fix incorrect parameter" - Rewrite boneblack patch to onstead drop the target and update docs drivers/ram/rockchip/sdram_rk3399.c | 35 +++++++++++++++-------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index bc79c034808..611e30cbe52 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -13,6 +13,7 @@ #include <log.h> #include <ram.h> #include <regmap.h> +#include <spl.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru.h> @@ -63,8 +64,6 @@ struct chan_info { }; struct dram_info { -#if defined(CONFIG_TPL_BUILD) || \ - (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) u32 pwrup_srefresh_exit[2]; struct chan_info chan[2]; struct clk ddr_clk; @@ -75,7 +74,6 @@ struct dram_info { struct rk3399_pmusgrf_regs *pmusgrf; struct rk3399_ddr_cic_regs *cic; const struct sdram_rk3399_ops *ops; -#endif struct ram_info info; struct rk3399_pmugrf_regs *pmugrf; }; @@ -92,9 +90,6 @@ struct sdram_rk3399_ops { struct rk3399_sdram_params *params); }; -#if defined(CONFIG_TPL_BUILD) || \ - (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) - struct rockchip_dmc_plat { #if CONFIG_IS_ENABLED(OF_PLATDATA) struct dtd_rockchip_rk3399_dmc dtplat; @@ -191,6 +186,19 @@ struct io_setting { }, }; +/** + * phase_sdram_init() - Check if this is the phase where SDRAM init happens + * + * Returns: true to do SDRAM init in this phase, false to not + */ +static bool phase_sdram_init(void) +{ + return spl_phase() == PHASE_TPL || + (!IS_ENABLED(CONFIG_TPL) && + !IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL) && + !spl_in_proper()); +} + static struct io_setting * lpddr4_get_io_settings(const struct rk3399_sdram_params *params, u32 mr5) { @@ -3024,7 +3032,7 @@ static int rk3399_dmc_of_to_plat(struct udevice *dev) struct rockchip_dmc_plat *plat = dev_get_plat(dev); int ret; - if (!CONFIG_IS_ENABLED(OF_REAL)) + if (!CONFIG_IS_ENABLED(OF_REAL) || !phase_sdram_init()) return 0; ret = dev_read_u32_array(dev, "rockchip,sdram-params", @@ -3093,7 +3101,6 @@ static int rk3399_dmc_init(struct udevice *dev) priv->cic = syscon_get_first_range(ROCKCHIP_SYSCON_CIC); priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU); - priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); priv->pmusgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF); priv->pmucru = rockchip_get_pmucru(); priv->cru = rockchip_get_cru(); @@ -3138,19 +3145,16 @@ static int rk3399_dmc_init(struct udevice *dev) return 0; } -#endif static int rk3399_dmc_probe(struct udevice *dev) { struct dram_info *priv = dev_get_priv(dev); -#if defined(CONFIG_TPL_BUILD) || \ - (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) - if (rk3399_dmc_init(dev)) - return 0; -#endif priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); debug("%s: pmugrf = %p\n", __func__, priv->pmugrf); + if (phase_sdram_init() && rk3399_dmc_init(dev)) + return 0; + priv->info.base = CFG_SYS_SDRAM_BASE; priv->info.size = rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg2); @@ -3181,10 +3185,7 @@ U_BOOT_DRIVER(dmc_rk3399) = { .id = UCLASS_RAM, .of_match = rk3399_dmc_ids, .ops = &rk3399_dmc_ops, -#if defined(CONFIG_TPL_BUILD) || \ - (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) .of_to_plat = rk3399_dmc_of_to_plat, -#endif .probe = rk3399_dmc_probe, .priv_auto = sizeof(struct dram_info), #if defined(CONFIG_TPL_BUILD) || \ -- 2.34.1

2 2

[PATCH v2] doc: document the pwm command
by Emil Kronborg 01 Aug '24

01 Aug '24

Signed-off-by: Emil Kronborg <emil.kronborg(a)protonmail.com> --- Changes in v2: - Fixed 'pwm enable' appearing twice in the examples section. - Rebased on top of master. doc/usage/cmd/pwm.rst | 80 +++++++++++++++++++++++++++++++++++++++++++ doc/usage/index.rst | 1 + 2 files changed, 81 insertions(+) create mode 100644 doc/usage/cmd/pwm.rst diff --git a/doc/usage/cmd/pwm.rst b/doc/usage/cmd/pwm.rst new file mode 100644 index 000000000000..3562e50280e6 --- /dev/null +++ b/doc/usage/cmd/pwm.rst @@ -0,0 +1,80 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +.. index:: + single: pwm (command) + +pwm command +=========== + +Synopsis +-------- + +:: + + pwm invert <pwm_dev_num> <channel> <polarity> - invert polarity + pwm config <pwm_dev_num> <channel> <period_ns> <duty_ns> - config PWM + pwm enable <pwm_dev_num> <channel> - enable PWM output + pwm disable <pwm_dev_num> <channel> - disable PWM output + + +Description +----------- + +The ``pwm`` command is used to access and configure PWM (Pulse Width Modulation) +signals. For all subcommands, the following arguments are common: + +pwm_dev_num + device number + +channel + channel on chosen device + +pwm invert +---------- + +The signal's active and inactive states are swapped. + +pwm config +---------- + +Configure the period and duty cycle in nanoseconds. + +pwm enable +---------- + +Enable output on the configured device and channel. + +pwm disable +----------- + +Disable output on the configured device and channel. + +Examples +-------- + +Configure device 0 channel 0 to 50 kHz period and 70% duty cycle:: + + => pwm config 0 0 20000 14000 + +Enable output on the configured device and channel:: + + => pwm enable 0 0 20000 14000 + +Disable output on the configured device and channel:: + + => pwm disable 0 0 20000 14000 + +Invert the signal on the configured device and channel:: + + => pwm invert 0 0 1 + +Configuration +------------- + +The ``pwm`` command is only available if CONFIG_CMD_PWM=y. + +Return value +------------ + +If the command succeeds, the return value ``$?`` is set to 0. If an error occurs, the +return value ``$?`` is set to 1. diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 49b354e6ffd2..1adab5283950 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -92,6 +92,7 @@ Shell commands cmd/pinmux cmd/printenv cmd/pstore + cmd/pwm cmd/qfw cmd/read cmd/reset base-commit: 8877bc51a8a4d921ba2f163208b8b1a57ba47c18 -- 2.46.0

2 2

[PATCH v2] cmd: led: fix led command usage for the LED_SW_BLINK enabled case
by Mikhail Kshevetskiy 01 Aug '24

01 Aug '24

CONFIG_LED_BLINK and CONFIG_LED_SW_BLINK can be defined independently. Led blinking works if any (or both) of them is enabled. Unfortunately the led command help does not display blinking option if only CONFIG_LED_SW_BLINK is enabled. This is definitely wrong. This patch fix an issue. Changes v2: * patch description added Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy(a)iopsys.eu> Reviewed-by: Simon Glass <sjg(a)chromium.org> --- cmd/led.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/led.c b/cmd/led.c index 2f786f34c67..91fb856ee59 100644 --- a/cmd/led.c +++ b/cmd/led.c @@ -118,7 +118,7 @@ int do_led(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return 0; } -#ifdef CONFIG_LED_BLINK +#if defined(CONFIG_LED_BLINK) || defined(CONFIG_LED_SW_BLINK) #define BLINK "|blink [blink-freq in ms]" #else #define BLINK "" -- 2.39.2

2 1

[GIT PULL] u-boot-video/video-20240731
by Anatolij Gustschin 01 Aug '24

01 Aug '24

Hi Tom, please pull video driver updates. CI: https://source.denx.de/u-boot/custodians/u-boot-video/-/pipelines/21823 Thanks, Anatolij The following changes since commit 8877bc51a8a4d921ba2f163208b8b1a57ba47c18: Merge patch series "led: implement software blinking" (2024-07-30 14:31:24 -0600) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-video.git tags/video-20240731 for you to fetch changes up to 521d377f7852c037e338c66756982084b1cb0132: sandbox: Drop video-sync in serial driver (2024-07-31 16:56:06 +0200) ---------------------------------------------------------------- - improve video sync performance with background syncing (cyclic) - fix dropping characters when pasting commands over the UART - enable background syncing by default for boards using VIDEO - make sandbox video more responsive ---------------------------------------------------------------- Simon Glass (5): cyclic: Add a symbol for SPL video: Move last_sync to private data video: Use cyclic to handle video sync sandbox: Increase cyclic CPU-time limit sandbox: Drop video-sync in serial driver common/Kconfig | 9 +++++++ common/Makefile | 2 +- drivers/serial/sandbox.c | 2 -- drivers/video/Kconfig | 35 ++++++++++++++++++++++++++ drivers/video/video-uclass.c | 52 ++++++++++++++++++++++++++++++++------- drivers/watchdog/Kconfig | 2 ++ include/asm-generic/global_data.h | 2 +- include/cyclic.h | 5 ++-- include/video.h | 2 ++ 9 files changed, 96 insertions(+), 15 deletions(-)

2 1

[PATCH 0/5] board: rockchip: Add Radxa ZERO 3W/3E
by Jonas Karlman 01 Aug '24

01 Aug '24

This series add support for the RK3566 based Radxa ZERO 3W/3E boards. rk_board_late_init() and board_fit_config_name_match() has been implemented to set fdtfile env var and load correct FIT config based on what board is detected at runtime. Features tested on a ZERO 3W 8GB v1.11: - SD-card boot - eMMC boot - USB gadget - USB host Features tested on a ZERO 3E 4GB v1.2: - SD-card boot - Ethernet - USB gadget - USB host This series depends on the following patch for a clean apply: - board: rockchip: add Radxa ROCK 3 Model C [1] [1] https://patchwork.ozlabs.org/patch/1963177/ FUKAUMI Naoki (1): arm64: dts: rockchip: fix mmc aliases for Radxa ZERO 3E/3W Jonas Karlman (3): arm64: dts: rockchip: Add Radxa ZERO 3W/3E dm: adc: Add SPL_ADC Kconfig symbol for use of ADC in SPL board: rockchip: Add Radxa ZERO 3W/3E Trevor Woerner (1): arm64: dts: rockchip: add gpio-line-names to radxa-zero-3 arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi | 11 + arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi | 11 + arch/arm/mach-rockchip/rk3568/Kconfig | 6 + board/radxa/zero3-rk3566/Kconfig | 12 + board/radxa/zero3-rk3566/MAINTAINERS | 6 + board/radxa/zero3-rk3566/Makefile | 3 + board/radxa/zero3-rk3566/zero3-rk3566.c | 59 ++ configs/radxa-zero-3-rk3566_defconfig | 85 +++ doc/board/rockchip/rockchip.rst | 1 + drivers/Makefile | 2 +- drivers/adc/Kconfig | 4 + .../arm64/rockchip/rk3566-radxa-zero-3.dtsi | 531 ++++++++++++++++++ .../arm64/rockchip/rk3566-radxa-zero-3e.dts | 52 ++ .../arm64/rockchip/rk3566-radxa-zero-3w.dts | 92 +++ 14 files changed, 874 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi create mode 100644 arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi create mode 100644 board/radxa/zero3-rk3566/Kconfig create mode 100644 board/radxa/zero3-rk3566/MAINTAINERS create mode 100644 board/radxa/zero3-rk3566/Makefile create mode 100644 board/radxa/zero3-rk3566/zero3-rk3566.c create mode 100644 configs/radxa-zero-3-rk3566_defconfig create mode 100644 dts/upstream/src/arm64/rockchip/rk3566-radxa-zero-3.dtsi create mode 100644 dts/upstream/src/arm64/rockchip/rk3566-radxa-zero-3e.dts create mode 100644 dts/upstream/src/arm64/rockchip/rk3566-radxa-zero-3w.dts -- 2.45.2

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