May 2024 - U-Boot

[PATCH] arm: rockchip: using generic capsule update mechanism
by Weizhao Ouyang 17 Jul '24

17 Jul '24

Currently Rockchip's capsule update mechanism only accepts capsules in form of a mmc partition, but a generic capsule update mechanism should be used to satisfy the universal requirements. Signed-off-by: Weizhao Ouyang <o451686892(a)gmail.com> --- arch/arm/mach-rockchip/board.c | 153 ------------------ board/radxa/rockpi4-rk3399/rockpi4-rk3399.c | 166 +++++++++++++++++++- 2 files changed, 158 insertions(+), 161 deletions(-) diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index cd226844b6..73fbb3f58c 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -35,155 +35,6 @@ #include <asm/arch-rockchip/periph.h> #include <power/regulator.h> -#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && IS_ENABLED(CONFIG_EFI_PARTITION) - -#define DFU_ALT_BUF_LEN SZ_1K - -static struct efi_fw_image *fw_images; - -static bool updatable_image(struct disk_partition *info) -{ - int i; - bool ret = false; - efi_guid_t image_type_guid; - - uuid_str_to_bin(info->type_guid, image_type_guid.b, - UUID_STR_FORMAT_GUID); - - for (i = 0; i < update_info.num_images; i++) { - if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) { - ret = true; - break; - } - } - - return ret; -} - -static void set_image_index(struct disk_partition *info, int index) -{ - int i; - efi_guid_t image_type_guid; - - uuid_str_to_bin(info->type_guid, image_type_guid.b, - UUID_STR_FORMAT_GUID); - - for (i = 0; i < update_info.num_images; i++) { - if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) { - fw_images[i].image_index = index; - break; - } - } -} - -static int get_mmc_desc(struct blk_desc **desc) -{ - int ret; - struct mmc *mmc; - struct udevice *dev; - - /* - * For now the firmware images are assumed to - * be on the SD card - */ - ret = uclass_get_device(UCLASS_MMC, 1, &dev); - if (ret) - return -1; - - mmc = mmc_get_mmc_dev(dev); - if (!mmc) - return -ENODEV; - - if ((ret = mmc_init(mmc))) - return ret; - - *desc = mmc_get_blk_desc(mmc); - if (!*desc) - return -1; - - return 0; -} - -void set_dfu_alt_info(char *interface, char *devstr) -{ - const char *name; - bool first = true; - int p, len, devnum, ret; - char buf[DFU_ALT_BUF_LEN]; - struct disk_partition info; - struct blk_desc *desc = NULL; - - ret = get_mmc_desc(&desc); - if (ret) { - log_err("Unable to get mmc desc\n"); - return; - } - - memset(buf, 0, sizeof(buf)); - name = blk_get_uclass_name(desc->uclass_id); - devnum = desc->devnum; - len = strlen(buf); - - len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, - "%s %d=", name, devnum); - - for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) { - if (part_get_info(desc, p, &info)) - continue; - - /* Add entry to dfu_alt_info only for updatable images */ - if (updatable_image(&info)) { - if (!first) - len += snprintf(buf + len, - DFU_ALT_BUF_LEN - len, ";"); - - len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, - "%s%d_%s part %d %d", - name, devnum, info.name, devnum, p); - first = false; - } - } - - log_debug("dfu_alt_info => %s\n", buf); - env_set("dfu_alt_info", buf); -} - -__weak void rockchip_capsule_update_board_setup(void) -{ -} - -static void gpt_capsule_update_setup(void) -{ - int p, i, ret; - struct disk_partition info; - struct blk_desc *desc = NULL; - - fw_images = update_info.images; - rockchip_capsule_update_board_setup(); - - ret = get_mmc_desc(&desc); - if (ret) { - log_err("Unable to get mmc desc\n"); - return; - } - - for (p = 1, i = 1; p <= MAX_SEARCH_PARTITIONS; p++) { - if (part_get_info(desc, p, &info)) - continue; - - /* - * Since we have a GPT partitioned device, the updatable - * images could be stored in any order. Populate the - * image_index at runtime. - */ - if (updatable_image(&info)) { - set_image_index(&info, i); - i++; - } - } -} -#endif /* CONFIG_EFI_HAVE_CAPSULE_SUPPORT && CONFIG_EFI_PARTITION */ - __weak int rk_board_late_init(void) { return 0; @@ -193,10 +44,6 @@ int board_late_init(void) { setup_boot_mode(); -#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && IS_ENABLED(CONFIG_EFI_PARTITION) - gpt_capsule_update_setup(); -#endif - return rk_board_late_init(); } diff --git a/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c b/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c index a533128b92..01c3b7d5a2 100644 --- a/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c +++ b/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c @@ -4,22 +4,132 @@ */ #include <dm.h> +#include <mmc.h> +#include <part.h> #include <efi_loader.h> #define ROCKPI4_UPDATABLE_IMAGES 2 -#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) -static struct efi_fw_image fw_images[ROCKPI4_UPDATABLE_IMAGES] = {0}; +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && IS_ENABLED(CONFIG_EFI_PARTITION) + +#define DFU_ALT_BUF_LEN SZ_1K + +static struct efi_fw_image *fw_images = {0}; +static struct efi_fw_image fw_images_d[ROCKPI4_UPDATABLE_IMAGES] = {0}; struct efi_capsule_update_info update_info = { .num_images = ROCKPI4_UPDATABLE_IMAGES, - .images = fw_images, + .images = fw_images_d, }; -#endif +static bool updatable_image(struct disk_partition *info) +{ + int i; + bool ret = false; + efi_guid_t image_type_guid; + + uuid_str_to_bin(info->type_guid, image_type_guid.b, + UUID_STR_FORMAT_GUID); + + for (i = 0; i < update_info.num_images; i++) { + if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) { + ret = true; + break; + } + } + + return ret; +} + +static void set_image_index(struct disk_partition *info, int index) +{ + int i; + efi_guid_t image_type_guid; + + uuid_str_to_bin(info->type_guid, image_type_guid.b, + UUID_STR_FORMAT_GUID); + + for (i = 0; i < update_info.num_images; i++) { + if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) { + fw_images[i].image_index = index; + break; + } + } +} + +static int get_mmc_desc(struct blk_desc **desc) +{ + int ret; + struct mmc *mmc; + struct udevice *dev; + + /* + * For now the firmware images are assumed to + * be on the SD card + */ + ret = uclass_get_device(UCLASS_MMC, 1, &dev); + if (ret) + return -1; + + mmc = mmc_get_mmc_dev(dev); + if (!mmc) + return -ENODEV; + + ret = mmc_init(mmc); + if (ret) + return ret; + + *desc = mmc_get_blk_desc(mmc); + if (!*desc) + return -1; + + return 0; +} + +void set_dfu_alt_info(char *interface, char *devstr) +{ + const char *name; + bool first = true; + int p, len, devnum, ret; + char buf[DFU_ALT_BUF_LEN]; + struct disk_partition info; + struct blk_desc *desc = NULL; + + ret = get_mmc_desc(&desc); + if (ret) { + log_err("Unable to get mmc desc\n"); + return; + } + + memset(buf, 0, sizeof(buf)); + name = blk_get_uclass_name(desc->uclass_id); + devnum = desc->devnum; + len = strlen(buf); + + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s %d=", name, devnum); + + for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) { + if (part_get_info(desc, p, &info)) + continue; + + /* Add entry to dfu_alt_info only for updatable images */ + if (updatable_image(&info)) { + if (!first) + len += snprintf(buf + len, + DFU_ALT_BUF_LEN - len, ";"); + + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s%d_%s part %d %d", + name, devnum, info.name, devnum, p); + first = false; + } + } + + log_debug("dfu_alt_info => %s\n", buf); + env_set("dfu_alt_info", buf); +} -#ifndef CONFIG_SPL_BUILD -#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && IS_ENABLED(CONFIG_EFI_PARTITION) static bool board_is_rockpi_4b(void) { return of_machine_is_compatible("radxa,rockpi4b"); @@ -30,7 +140,7 @@ static bool board_is_rockpi_4c(void) return of_machine_is_compatible("radxa,rockpi4c"); } -void rockchip_capsule_update_board_setup(void) +static void rockchip_capsule_update_board_setup(void) { if (board_is_rockpi_4b()) { efi_guid_t idbldr_image_type_guid = @@ -54,5 +164,45 @@ void rockchip_capsule_update_board_setup(void) fw_images[1].fw_name = u"ROCKPI4C-UBOOT"; } } + +static void gpt_capsule_update_setup(void) +{ + int p, i, ret; + struct disk_partition info; + struct blk_desc *desc = NULL; + + fw_images = update_info.images; + rockchip_capsule_update_board_setup(); + + ret = get_mmc_desc(&desc); + if (ret) { + log_err("Unable to get mmc desc\n"); + return; + } + + for (p = 1, i = 1; p <= MAX_SEARCH_PARTITIONS; p++) { + if (part_get_info(desc, p, &info)) + continue; + + /* + * Since we have a GPT partitioned device, the updatable + * images could be stored in any order. Populate the + * image_index at runtime. + */ + if (updatable_image(&info)) { + set_image_index(&info, i); + i++; + } + } +} #endif /* CONFIG_EFI_HAVE_CAPSULE_SUPPORT && CONFIG_EFI_PARTITION */ -#endif /* !CONFIG_SPL_BUILD */ + +int rk_board_late_init(void) +{ +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && IS_ENABLED(CONFIG_EFI_PARTITION) + gpt_capsule_update_setup(); +#endif + + return 0; +} + -- 2.40.1

2 1

[PATCH 0/9] rockchip: pinctrl: Minor fixes and add support for pinmux status cmd
by Jonas Karlman 16 Jul '24

16 Jul '24

This series includes some minor fixes, cleanup and add support for using the pinmux status cmd. Following is an example on a Radxa ROCK 5A (RK3588S): => pinmux dev pinctrl dev: pinctrl => pinmux status GPIO0_A0 : gpio GPIO0_A1 : func-2 GPIO0_A2 : gpio GPIO0_A3 : gpio GPIO0_A4 : func-1 GPIO0_A5 : func-2 GPIO0_A6 : gpio GPIO0_A7 : gpio GPIO0_B0 : gpio GPIO0_B1 : gpio GPIO0_B2 : gpio GPIO0_B3 : gpio GPIO0_B4 : gpio GPIO0_B5 : func-10 GPIO0_B6 : func-10 GPIO0_B7 : gpio [...] and on a ASUS TinkerBoard R2.0 (RK3288W): => pinmux dev pinctrl dev: pinctrl => pinmux status [...] GPIO2_C6 : gpio GPIO2_C7 : gpio GPIO2_D0 : unrouted GPIO2_D1 : unrouted GPIO2_D2 : unrouted GPIO2_D3 : unrouted GPIO2_D4 : unrouted GPIO2_D5 : unrouted GPIO2_D6 : unrouted GPIO2_D7 : unrouted GPIO3_A0 : func-2 GPIO3_A1 : func-2 [...] Patch 1-3 are minor fixes so that correct pinmux status is reported. Patch 4 refactor to use syscon_regmap_lookup_by_phandle() helper. Patch 6 refactor to get pinctrl device from gpio-ranges prop. Patch 5 and 7 change to use pinctrl pin offset instead of bank num to get current pinmux. Patch 8 add required ops for use of the pinmux status cmd. Patch 9 add gpio-ranges props for remaining RK SoCs, this is strictly not needed for pinmux status cmd to function. However, the change to not require the pin controller offset to be 32 aligned was required to add gpio-ranges props for RK3288. This series depends on the "rockchip: Add gpio request() ops and drop PCIe reset-gpios workaround" [1] series. [1] https://patchwork.ozlabs.org/cover/1934100/ Jonas Karlman (9): pinctrl: rockchip: rk3188: Fix support for IOMUX_GPIO_ONLY flag pinctrl: rockchip: rv1126: Fix support for IOMUX_L_SOURCE_PMU flag pinctrl: rockchip: rk3588: Fix support for rockchip_get_mux() pinctrl: rockchip: Use syscon_regmap_lookup_by_phandle() pinctrl: rockchip: Update get_gpio_mux() ops gpio: rockchip: Get pinctrl device from gpio-ranges prop gpio: rockchip: Use pinctrl pin offset to get_gpio_mux() pinctrl: rockchip: Add pinmux status related ops rockchip: gpio: Add gpio-ranges props arch/arm/dts/rk3036-u-boot.dtsi | 12 ++ arch/arm/dts/rk3066a-u-boot.dtsi | 3 +- arch/arm/dts/rk3128-u-boot.dtsi | 16 ++ arch/arm/dts/rk322x-u-boot.dtsi | 16 ++ arch/arm/dts/rk3288-u-boot.dtsi | 33 ++++ arch/arm/dts/rk3308-u-boot.dtsi | 20 +++ arch/arm/dts/rk3328-u-boot.dtsi | 13 ++ arch/arm/dts/rk3368-u-boot.dtsi | 16 ++ arch/arm/dts/rk3399-u-boot.dtsi | 20 +++ arch/arm/dts/rv1108-u-boot.dtsi | 16 ++ arch/arm/dts/rv1126-u-boot.dtsi | 14 ++ drivers/gpio/rk_gpio.c | 44 +++-- .../pinctrl/rockchip/pinctrl-rockchip-core.c | 151 ++++++++++++++---- 13 files changed, 322 insertions(+), 52 deletions(-) -- 2.43.2

2 20

[PATCH 0/4] rockchip: Add gpio request() ops and drop PCIe reset-gpios workaround
by Jonas Karlman 16 Jul '24

16 Jul '24

This series add gpio request() and pinctrl gpio_request_enable() ops so that a gpio requested pin automatically use gpio pinmux and U-Boot behaves more similar to Linux kernel. With the gpio and pinctrl ops implemented this series also remove a PCIe reset-gpios related device lock-up workaround from board u-boot.dtsi. PX30, RK3066, RK3188, RK356x and RK3588 are the only SoCs that currently define gpio-ranges props and is affected by this series. A follow up series adding support for the pinmux status cmd will also add gpio-ranges props for remaining RK SoCs. Jonas Karlman (4): pinctrl: rockchip: Add gpio_request_enable() ops gpio: rockchip: Add request() ops rockchip: rk3568-rock-3a: Drop PCIe reset-gpios workaround rockchip: rk3568-radxa-e25: Drop PCIe reset-gpios workaround arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi | 12 ------- arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 12 ------- drivers/gpio/rk_gpio.c | 10 ++++++ .../pinctrl/rockchip/pinctrl-rockchip-core.c | 31 +++++++++++++++++++ 4 files changed, 41 insertions(+), 24 deletions(-) -- 2.43.2

4 21

[PATCH RFC v2 00/23] Enable display cpuinfo to get the reset cause
by Anand Moon 16 Jul '24

16 Jul '24

All the Rockchip SoC support reset cauee like POR_RST, GLB_RST, TSADC_RST, WD_RST by reading the clock reset unit register. V2: with the feedback from Jonas Karlman and Quentin Schulz drop the inply for CONFIG_DISPLAY_CPUINFO as it defaault enabled. re-organized the code. As pointed only as of now RK3328, RK3399 supports this feature for POR and RST. On RK3568 and RK3588 SoC it only return POR, for all the case of reboot and poweroff. I have tried to debug this issue, found Clock Reset Unit will bind to rockchip_sysreset to determine the reset cause. if there is ant input on this please share. I have update two new patches from u-boot-radxa, but with no success. [0] https://elixir.bootlin.com/u-boot/v2024.07-rc3/source/drivers/clk/rockchip/… # dm tree # RK3568 clk 5 [ + ] rockchip_rk3588_cru |-- clock-controller@fd7c0000 sysreset 0 [ ] rockchip_sysreset | |-- sysreset reset 0 [ + ] rockchip_reset | `-- reset [1] https://elixir.bootlin.com/u-boot/v2024.07-rc3/source/drivers/clk/rockchip/… # dm tree # RK3588 clk 5 [ + ] rockchip_rk3588_cru |-- clock-controller@fd7c0000 sysreset 0 [ ] rockchip_sysreset | |-- sysreset reset 0 [ ] rockchip_reset | `-- reset Tested on Rock64, Rock-3a, Rock-5b boards. I have update few Rockchip SoC to verify this feature, Only Build to since I dont have the hardware. Thanks -Anand Anand Moon (21): rockchip: RK3328: Read the reset cause from clock reset unit for RK3328 SoC rockchip: RK3328: Enable display cpuinfo support on all boards rockchip: RK3399: Read the reset cause from clock reset unit for RK3399 SoC rockchip: RK3399: Enable display cpuinfo support on all boards arm: rockchip: Enable display cpuinfo to be build with SPL_BUILD rockchip: RK3568: Read the reset cause from clock reset unit for RK356x SoC rockchip: RK3568: Enable display cpuinfo support on all boards rockchip: RK3588: Read the reset cause from clock reset unit for RK3588 SoC rockchip: RK3588: Enable display cpuinfo support on all boards rockchip: PX30: Read the reset cause from clock reset unit for PX30 SoC rockchip: PX30: Enable display cpuinfo support on all boards rockchip: RK3288: Read the reset cause from clock reset unit for RK3288 SoC rockchip: RK3288: Enable display cpuinfo support on all boards rockchip: RK3308: Read the reset cause from clock reset unit for RK3308 SoC rockchip: RK3308: Enable display cpuinfo support on all boards rockchip: RK3368: Read the reset cause from clock reset unit for RK3368 SoC rockchip: RK3368: Enable display cpuinfo support on all boards rockchip: RV1108: Read the reset cause from clock reset unit for RV1108 SoC rockchip: RV1108: Enable display cpuinfo support on all boards rockchip: RV1126: Read the reset cause from clock reset unit for RV1126 SoC rockchip: RV1126: Enable display cpuinfo support on all boards Andy Yan (1): sysreset: rockchip: use dev_read_addr_ptr get cru base Kever Yang (1): sysreset: rockchip: use fst reset for ARM64 SOC arch/arm/include/asm/arch-rockchip/cru.h | 14 +++++++++++++ arch/arm/mach-rockchip/Makefile | 3 --- arch/arm/mach-rockchip/cpu-info.c | 20 +++++++++++++++++++ configs/anbernic-rgxx3-rk3566_defconfig | 1 - configs/bpi-r2-pro-rk3568_defconfig | 1 - configs/chromebit_mickey_defconfig | 1 - configs/chromebook_bob_defconfig | 1 - configs/chromebook_jerry_defconfig | 1 - configs/chromebook_kevin_defconfig | 1 - configs/chromebook_minnie_defconfig | 1 - configs/chromebook_speedy_defconfig | 1 - configs/coolpi-4b-rk3588s_defconfig | 1 - configs/coolpi-cm5-evb-rk3588_defconfig | 1 - configs/elgin-rv1108_defconfig | 1 - configs/evb-px30_defconfig | 1 - configs/evb-px5_defconfig | 1 - configs/evb-rk3308_defconfig | 1 - configs/evb-rk3328_defconfig | 1 - configs/evb-rk3568_defconfig | 1 - configs/evb-rk3588_defconfig | 1 - configs/evb-rv1108_defconfig | 1 - configs/firefly-px30_defconfig | 1 - configs/geekbox_defconfig | 1 - configs/generic-rk3568_defconfig | 1 - configs/generic-rk3588_defconfig | 1 - configs/jaguar-rk3588_defconfig | 1 - configs/lion-rk3368_defconfig | 1 - configs/lubancat-2-rk3568_defconfig | 1 - configs/nanopc-t6-rk3588_defconfig | 1 - configs/nanopi-r2c-plus-rk3328_defconfig | 1 - configs/nanopi-r2c-rk3328_defconfig | 1 - configs/nanopi-r2s-rk3328_defconfig | 1 - configs/nanopi-r5c-rk3568_defconfig | 1 - configs/nanopi-r5s-rk3568_defconfig | 1 - configs/neu2-io-rv1126_defconfig | 1 - configs/neu6a-io-rk3588_defconfig | 1 - configs/neu6b-io-rk3588_defconfig | 1 - configs/odroid-m1-rk3568_defconfig | 1 - configs/orangepi-5-plus-rk3588_defconfig | 1 - configs/orangepi-5-rk3588s_defconfig | 1 - configs/orangepi-r1-plus-lts-rk3328_defconfig | 1 - configs/orangepi-r1-plus-rk3328_defconfig | 1 - configs/pinetab2-rk3566_defconfig | 1 - configs/px30-core-ctouch2-of10-px30_defconfig | 1 - configs/px30-core-ctouch2-px30_defconfig | 1 - configs/px30-core-edimm2.2-px30_defconfig | 1 - configs/quartz64-a-rk3566_defconfig | 1 - configs/quartz64-b-rk3566_defconfig | 1 - configs/quartzpro64-rk3588_defconfig | 1 - configs/radxa-cm3-io-rk3566_defconfig | 1 - configs/radxa-e25-rk3568_defconfig | 1 - configs/ringneck-px30_defconfig | 1 - configs/roc-cc-rk3308_defconfig | 1 - configs/roc-cc-rk3328_defconfig | 1 - configs/rock-3a-rk3568_defconfig | 1 - configs/rock-pi-e-rk3328_defconfig | 1 - configs/rock-pi-s-rk3308_defconfig | 1 - configs/rock5a-rk3588s_defconfig | 1 - configs/rock5b-rk3588_defconfig | 1 - configs/rock64-rk3328_defconfig | 1 - configs/sheep-rk3368_defconfig | 1 - configs/sonoff-ihost-rv1126_defconfig | 1 - configs/soquartz-blade-rk3566_defconfig | 1 - configs/soquartz-cm4-rk3566_defconfig | 1 - configs/soquartz-model-a-rk3566_defconfig | 1 - configs/toybrick-rk3588_defconfig | 1 - configs/turing-rk1-rk3588_defconfig | 1 - drivers/sysreset/sysreset_rockchip.c | 9 +++++++-- 68 files changed, 41 insertions(+), 69 deletions(-) -- 2.44.0

4 37

[PATCH] sandbox: enable support for the unlz4 command
by Jonathan Liu 15 Jul '24

15 Jul '24

This does not work with sandbox at present. Fix it up to use map_sysmem() to convert an address to a pointer. Signed-off-by: Jonathan Liu <net147(a)gmail.com> --- cmd/unlz4.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/cmd/unlz4.c b/cmd/unlz4.c index 5f20838e899..4b66794a72c 100644 --- a/cmd/unlz4.c +++ b/cmd/unlz4.c @@ -7,6 +7,7 @@ #include <common.h> #include <command.h> #include <env.h> +#include <mapmem.h> #include <u-boot/lz4.h> static int do_unlz4(struct cmd_tbl *cmdtp, int flag, int argc, @@ -26,7 +27,7 @@ static int do_unlz4(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_USAGE; } - ret = ulz4fn((void *)src, src_len, (void *)dst, &dst_len); + ret = ulz4fn(map_sysmem(src, 0), src_len, map_sysmem(dst, dst_len), &dst_len); if (ret) { printf("Uncompressed err :%d\n", ret); return 1; -- 2.44.0

2 2

[PATCH] global_data.h: drop write-only field dm_root_f
by Rasmus Villemoes 15 Jul '24

15 Jul '24

The dm_root_f field seems to be entirely write-only and hence redundant, unless 'git grep' fails to find some access generated via preprocessor token concatenation or similar. Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- common/board_r.c | 3 +-- include/asm-generic/global_data.h | 4 ---- test/dm/core.c | 1 - 3 files changed, 1 insertion(+), 7 deletions(-) diff --git a/common/board_r.c b/common/board_r.c index da0b80f24ff..fd263f4a0a8 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -230,8 +230,7 @@ static int initr_dm(void) oftree_reset(); - /* Save the pre-reloc driver model and start a new one */ - gd->dm_root_f = gd->dm_root; + /* Drop the pre-reloc driver model and start a new one */ gd->dm_root = NULL; #ifdef CONFIG_TIMER gd->timer = NULL; diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index fcc3c6e14ca..aa336d63e3a 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -195,10 +195,6 @@ struct global_data { * @dm_root: root instance for Driver Model */ struct udevice *dm_root; - /** - * @dm_root_f: pre-relocation root instance - */ - struct udevice *dm_root_f; /** * @uclass_root_s: * head of core tree when uclasses are not in read-only memory. diff --git a/test/dm/core.c b/test/dm/core.c index 7f3f8d183bc..34e5c163b98 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -1007,7 +1007,6 @@ static int dm_test_uclass_before_ready(struct unit_test_state *uts) ut_assertok(uclass_get(UCLASS_TEST, &uc)); gd->dm_root = NULL; - gd->dm_root_f = NULL; memset(&gd->uclass_root, '\0', sizeof(gd->uclass_root)); ut_asserteq_ptr(NULL, uclass_find(UCLASS_TEST)); -- 2.40.1.1.g1c60b9335d

2 2

[PATCH] arm: dts: mvebu: Migrate to upstream DT for Synology DS116 (Armada 385) board
by Tony Dinh 15 Jul '24

15 Jul '24

Enable OF_UPSTREAM to use upstream DT and add marvell/ prefix to the DEFAULT_DEVICE_TREE in DS116 defconfig. Remove current DTS in arch/arm/dts/ directory. Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- arch/arm/dts/Makefile | 1 - arch/arm/dts/armada-385-synology-ds116.dts | 291 --------------------- configs/ds116_defconfig | 3 +- 3 files changed, 2 insertions(+), 293 deletions(-) delete mode 100644 arch/arm/dts/armada-385-synology-ds116.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a5c82ebf7a..75f7e616b4 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -155,7 +155,6 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-385-atl-x530.dtb \ armada-385-atl-x530DP.dtb \ armada-385-db-88f6820-amc.dtb \ - armada-385-synology-ds116.dtb \ armada-385-thecus-n2350.dtb \ armada-385-turris-omnia.dtb \ armada-388-clearfog.dtb \ diff --git a/arch/arm/dts/armada-385-synology-ds116.dts b/arch/arm/dts/armada-385-synology-ds116.dts deleted file mode 100644 index 82a0373f7f..0000000000 --- a/arch/arm/dts/armada-385-synology-ds116.dts +++ /dev/null @@ -1,291 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) -/* - * Device Tree file for Synology DS116 NAS - * - * Copyright (C) 2017 Willy Tarreau <w(a)1wt.eu> - */ - -/dts-v1/; -#include "armada-385.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Synology DS116"; - compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x40000000>; /* 1 GB */ - }; - - soc { - ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 - MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 - MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 - MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 - MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; - - internal-regs { - i2c@11000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "okay"; - clock-frequency = <100000>; - - eeprom@57 { - compatible = "atmel,24c64"; - reg = <0x57>; - }; - }; - - serial@12000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; - }; - - serial@12100 { - /* A PIC16F1829 is connected to uart1 at 9600 bps, - * and takes single-character orders : - * "1" : power off // already handled by the poweroff node - * "2" : short beep - * "3" : long beep - * "4" : turn the power LED ON - * "5" : flash the power LED - * "6" : turn the power LED OFF - * "7" : turn the status LED OFF - * "8" : turn the status LED ON - * "9" : flash the status LED - * "A" : flash the motherboard LED (D8) - * "B" : turn the motherboard LED OFF - * "C" : hard reset - */ - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pins>; - status = "okay"; - }; - - poweroff@12100 { - compatible = "synology,power-off"; - reg = <0x12100 0x100>; - clocks = <&coreclk 0>; - }; - - ethernet@70000 { - pinctrl-names = "default"; - phy = <&phy0>; - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <0>; - status = "okay"; - }; - - mdio@72004 { - pinctrl-names = "default"; - pinctrl-0 = <&mdio_pins>; - - phy0: ethernet-phy@1 { - reg = <1>; - }; - }; - - sata@a8000 { - pinctrl-names = "default"; - pinctrl-0 = <&sata0_pins>; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - sata0: sata-port@0 { - reg = <0>; - target-supply = <&reg_5v_sata0>; - }; - }; - - bm@c8000 { - status = "okay"; - }; - - usb3@f0000 { - usb-phy = <&usb3_0_phy>; - status = "okay"; - }; - - usb3@f8000 { - usb-phy = <&usb3_1_phy>; - status = "okay"; - }; - }; - - bm-bppi { - status = "okay"; - }; - - gpio-fan { - compatible = "gpio-fan"; - gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>, - <&gpio1 17 GPIO_ACTIVE_HIGH>, - <&gpio1 16 GPIO_ACTIVE_HIGH>; - gpio-fan,speed-map = < 0 0 - 1500 1 - 2500 2 - 3000 3 - 3400 4 - 3700 5 - 3900 6 - 4000 7>; - #cooling-cells = <2>; - }; - - gpio-leds { - compatible = "gpio-leds"; - - /* The green part is on gpio0.20 which is also used by - * sata0, and accesses to SATA disk 0 make it blink so it - * doesn't need to be declared here. - */ - orange { - gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; - label = "ds116:orange:disk"; - default-state = "off"; - }; - }; - }; - - usb3_0_phy: usb3_0_phy { - compatible = "usb-nop-xceiv"; - vcc-supply = <&reg_usb3_0_vbus>; - #phy-cells = <0>; - }; - - usb3_1_phy: usb3_1_phy { - compatible = "usb-nop-xceiv"; - vcc-supply = <&reg_usb3_1_vbus>; - #phy-cells = <0>; - }; - - reg_usb3_0_vbus: usb3-vbus0 { - compatible = "regulator-fixed"; - regulator-name = "usb3-vbus0"; - pinctrl-names = "default"; - pinctrl-0 = <&xhci0_vbus_pins>; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; - }; - - reg_usb3_1_vbus: usb3-vbus1 { - compatible = "regulator-fixed"; - regulator-name = "usb3-vbus1"; - pinctrl-names = "default"; - pinctrl-0 = <&xhci1_vbus_pins>; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>; - }; - - reg_sata0: pwr-sata0 { - compatible = "regulator-fixed"; - regulator-name = "pwr_en_sata0"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - enable-active-high; - regulator-boot-on; - gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>; - }; - - reg_5v_sata0: v5-sata0 { - compatible = "regulator-fixed"; - regulator-name = "v5.0-sata0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&reg_sata0>; - }; - - reg_12v_sata0: v12-sata0 { - compatible = "regulator-fixed"; - regulator-name = "v12.0-sata0"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - vin-supply = <&reg_sata0>; - }; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins>; - status = "okay"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "macronix,mx25l6405d", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <50000000>; - m25p,fast-read; - - /* Note: there is a redboot partition table despite u-boot - * being used. The names presented here are the same as those - * found in the FIS directory. There is also a small device - * tree in the last 64kB of the RedBoot partition which is not - * enumerated. The MAC address and the serial number are listed - * in the "vendor" partition. - */ - partition@0 { - label = "RedBoot"; - reg = <0x00000000 0x000f0000>; - read-only; - }; - - partition@c0000 { - label = "zImage"; - reg = <0x000f0000 0x002d0000>; - }; - - partition@390000 { - label = "rd.gz"; - reg = <0x003c0000 0x00410000>; - }; - - partition@7d0000 { - label = "vendor"; - reg = <0x007d0000 0x00010000>; - read-only; - }; - - partition@7e0000 { - label = "RedBoot config"; - reg = <0x007e0000 0x00010000>; - read-only; - }; - - partition@7f0000 { - label = "FIS directory"; - reg = <0x007f0000 0x00010000>; - read-only; - }; - }; -}; - -&pinctrl { - /* use only one pin for UART1, as mpp20 is used by sata0 */ - uart1_pins: uart-pins-1 { - marvell,pins = "mpp19"; - marvell,function = "ua1"; - }; - - xhci0_vbus_pins: xhci0_vbus_pins { - marvell,pins = "mpp58"; - marvell,function = "gpio"; - }; - xhci1_vbus_pins: xhci1_vbus_pins { - marvell,pins = "mpp59"; - marvell,function = "gpio"; - }; -}; diff --git a/configs/ds116_defconfig b/configs/ds116_defconfig index 1fc7380216..bcc5f00fe5 100644 --- a/configs/ds116_defconfig +++ b/configs/ds116_defconfig @@ -16,7 +16,7 @@ CONFIG_SF_DEFAULT_SPEED=50000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x7E0000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_DEFAULT_DEVICE_TREE="armada-385-synology-ds116" +CONFIG_DEFAULT_DEVICE_TREE="marvell/armada-385-synology-ds116" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 @@ -56,6 +56,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:1m(u-boot),7040k(kernel),64k(u-boot-env),-(data)" +CONFIG_OF_UPSTREAM=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y -- 2.39.2

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[PATCH] arm: sunxi: add support for I2C1 on V3s-based SoCs
by Tobias Schramm 15 Jul '24

15 Jul '24

Previously enabling I2C1 when using a V3s-based SoC had no effect. Set pinmux on PE21 and PE22 to I2C1 function when enabling I2C1 on V3s-based SoCs. Signed-off-by: Tobias Schramm <t.schramm(a)manjaro.org> --- board/sunxi/board.c | 4 ++++ include/sunxi_gpio.h | 1 + 2 files changed, 5 insertions(+) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 1313b01dce..df2faba3e5 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -98,6 +98,10 @@ void i2c_init_board(void) sunxi_gpio_set_cfgpin(SUNXI_GPH(16), SUN6I_GPH_TWI1); sunxi_gpio_set_cfgpin(SUNXI_GPH(17), SUN6I_GPH_TWI1); clock_twi_onoff(1, 1); +#elif defined(CONFIG_MACH_SUN8I_V3S) + sunxi_gpio_set_cfgpin(SUNXI_GPE(21), SUN8I_V3S_GPE_TWI1); + sunxi_gpio_set_cfgpin(SUNXI_GPE(22), SUN8I_V3S_GPE_TWI1); + clock_twi_onoff(1, 1); #elif defined(CONFIG_MACH_SUN8I) sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1); sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1); diff --git a/include/sunxi_gpio.h b/include/sunxi_gpio.h index db3742c039..175b13a887 100644 --- a/include/sunxi_gpio.h +++ b/include/sunxi_gpio.h @@ -113,6 +113,7 @@ enum sunxi_gpio_number { #define SUN4I_GPB_TWI1 2 #define SUN5I_GPB_TWI1 2 #define SUN8I_V3S_GPB_TWI0 2 +#define SUN8I_V3S_GPE_TWI1 3 #define SUN4I_GPB_UART0 2 #define SUN5I_GPB_UART0 2 #define SUN8I_GPB_UART2 2 -- 2.30.2

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[PATCH v2 0/2] sunxi, usb: UDC/DM gadget model support
by Sam Edwards 15 Jul '24

15 Jul '24

Happy Thursday, U-Boot list! Here is attempt 2 at making this USB controller driver compatible with DM's gadget model, following what most of the other musb variants do. v2 removes the unwanted printfs in the probe func, per feedback from Marek. I received no other feedback against v1 of this patch. Cheers, Sam Sam Edwards (2): usb: musb-new: sunxi: remove unwanted printfs usb: musb-new: sunxi: make compatible with UDC/DM gadget model drivers/usb/musb-new/sunxi.c | 52 +++++++++++++++++++++--------------- 1 file changed, 31 insertions(+), 21 deletions(-) -- 2.39.2

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[RFC] usb: xhci: Some USB devices fail to initialize
by Elena Popa 14 Jul '24

14 Jul '24

Hello, We've noticed that, at least, on the i.MX8M* platforms, some USB devices (especially USB2.0 sticks) fail to initialize with one of the following errors: - scanning bus usb@38200000 for devices... Device not responding to set address. USB device not accepting new address (error=80000000) - scanning bus usb@38200000 for devices... WARN halted endpoint, queueing URB anyway. Unexpected XHCI event TRB, skipping... (fcf1a5f0 00000000 13000000 01008401) BUG at drivers/usb/host/xhci-ring.c:530/abort_td()! BUG! resetting ... It seems to be a timing problem, since if we enable the debug messages, the USB device initializes correctly. We found out that if we add a small delay of 5 milliseconds at the beginning of the _xhci_submit_control_msg() function from the drivers/usb/host/xhci.c file, all devices initialize properly. Essentially, each control message is delayed by 5ms. We tried a smaller delay (1ms), but it is not enough. static int _xhci_submit_control_msg(struct usb_device *udev, unsigned long pipe, void *buffer, int length, struct devrequest *setup, int root_portnr) { + mdelay(5); struct xhci_ctrl *ctrl = xhci_get_ctrl(udev); int ret = 0; ... } We went a little further, and this delay seems to only be necessary for the requests of type: - USB_REQ_GET_STATUS (for the communication with the root) - USB_REQ_GET_DESCRIPTOR ( for the communication with the device) I don't have too much know-how about the USB, so I would appreciate your opinion related to this issue, and how can we find the root cause. I found several reports on the internet with the same problem on other boards. Maybe some of the USB timing specs are not implemented correctly? U-Boot is maybe sending control messages too aggressively? If you give me some suggestions of where to look, I could do some debugging myself. Of course, since printing debug messages makes the initialization work, complicates the debugging. Thank you, Elena

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