April 2024 - U-Boot

[GIT PULL] Please pull u-boot-dfu-next-20240402
by Mattijs Korpershoek 03 Apr '24

03 Apr '24

Hi Tom, Here are some developments for next including: - Implement Qualcomm wrapper for dwc3 - Multiple sector size support for UMS - CDC ACM gadget initialization fix - Refactor board code from dwc3 to prepare better interrupt support - Bugfix for for qcom-smmu when compiling with -DDEBUG The CI job is at https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/20143 Thanks, Mattijs Note: sorry for the noise, I forgot to include u-boot list in the first email. The following changes since commit e50cb36cb5e772d5bbd30d070faedf7323406364: Merge branch '2024-03-19-assorted-updates' into next (2024-03-20 08:39:05 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-dfu.git tags/u-boot-dfu-next-20240402 for you to fetch changes up to 12ac51cdb788b9f8e50cbc4fa3681102882ade33: usb: udc: dwc3: Fold dwc3_uboot_handle_interrupt into dm_usb_gadget_handle_interrupts (2024-04-02 09:08:07 +0200) ---------------------------------------------------------------- u-boot-dfu-next-20240402 - Implement Qualcomm wrapper for dwc3 - Multiple sector size support for UMS - CDC ACM gadget initialization fix - Refactor board code from dwc3 to prepare better interrupt support - Bugfix for for qcom-smmu when compiling with -DDEBUG ---------------------------------------------------------------- Caleb Connolly (4): usb: dwc3-generic: implement Qualcomm wrapper usb: gadget: CDC ACM: call usb_gadget_initialize usb: gadget: UMS: support multiple sector sizes iommu: qcom-smmu: fix debugging Marek Vasut (2): usb: udc: dwc3: Fold board dm_usb_gadget_handle_interrupts() into DWC3 gadget usb: udc: dwc3: Fold dwc3_uboot_handle_interrupt into dm_usb_gadget_handle_interrupts board/purism/librem5/spl.c | 6 --- board/samsung/common/exynos5-dt.c | 6 --- board/st/stih410-b2260/board.c | 6 --- board/ti/am43xx/board.c | 11 ---- cmd/usb_mass_storage.c | 4 -- drivers/iommu/qcom-hyp-smmu.c | 2 +- drivers/usb/dwc3/core.c | 26 ++++++--- drivers/usb/dwc3/dwc3-generic.c | 81 +++++++++++++++++++++++++++- drivers/usb/dwc3/dwc3-omap.c | 4 +- drivers/usb/gadget/f_acm.c | 9 ++++ drivers/usb/gadget/f_mass_storage.c | 102 ++++++++++++++++++++---------------- drivers/usb/gadget/storage_common.c | 12 +++-- include/dwc3-omap-uboot.h | 1 - include/dwc3-uboot.h | 2 +- include/usb_mass_storage.h | 1 - 15 files changed, 178 insertions(+), 95 deletions(-)

2 1

[GIT PULL] Please pull u-boot-dfu-20240402
by Mattijs Korpershoek 03 Apr '24

03 Apr '24

Hi Tom, Here are some fixes for master including: - Fix #if logic in android_ab command - Fix ANDROID_AB_BACKUP_OFFSET in android_ab The CI job is at https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/20142 Thanks, Mattijs The following changes since commit 425dc46a2c8ebe6d1a5a7d2d7ac5506aa7783409: Merge tag 'u-boot-imx-master-20240330' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx (2024-03-30 14:07:37 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-dfu.git tags/u-boot-dfu-20240402 for you to fetch changes up to 7a0cfb87672f727b089844dc635bef01d512816f: android_ab: Fix ANDROID_AB_BACKUP_OFFSET (2024-04-02 09:09:58 +0200) ---------------------------------------------------------------- u-boot-dfu-20240402 - Fix #if logic in android_ab command - Fix ANDROID_AB_BACKUP_OFFSET in android_ab ---------------------------------------------------------------- Colin McAllister (2): android_ab: Add missing semicolon android_ab: Fix ANDROID_AB_BACKUP_OFFSET boot/android_ab.c | 97 ++++++++++++++++++++++++++----------------------------- 1 file changed, 45 insertions(+), 52 deletions(-)

2 1

[PATCH] board: rockchip: Add Indiedroid Nova
by Chris Morgan 03 Apr '24

03 Apr '24

From: Chris Morgan <macromorgan(a)hotmail.com> The Indiedroid Nova is a Rockchip RK3588S based SBC from Indiedroid. Specifications: Rockchip RK3588S SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 4/8/16GB memory LPDDR4x Mali G610MC4 GPU Optional eMMC 2x USB 2.0, 2x USB 3.0, 1x USB 3.0 C port with DP Alt 1x MIPI-CSI Port (4-lane or 2x 2-lane) 1x MIPI-DSI 4-lane connector 1x Micro HDMI 2.1 output, 1x DP 1.4 output Gigabit Ethernet Realtek RTL8821CS WiFi 4 pin debug UART connector 40 pin GPIO header Size: 85mm x 56mm (Raspberry Pi Form Factor) Kernel commit: 3900160e164b ("arm64: dts: rockchip: Add Indiedroid Nova board") Signed-off-by: Chris Morgan <macromorgan(a)hotmail.com> --- arch/arm/dts/Makefile | 1 + .../dts/rk3588s-indiedroid-nova-u-boot.dtsi | 11 + arch/arm/dts/rk3588s-indiedroid-nova.dts | 853 ++++++++++++++++++ arch/arm/mach-rockchip/rk3588/Kconfig | 7 + board/indiedroid/nova/Kconfig | 15 + board/indiedroid/nova/MAINTAINERS | 8 + configs/indiedroid-nova-rk3588s_defconfig | 106 +++ include/configs/indiedroid-nova.h | 15 + 8 files changed, 1016 insertions(+) create mode 100644 arch/arm/dts/rk3588s-indiedroid-nova-u-boot.dtsi create mode 100644 arch/arm/dts/rk3588s-indiedroid-nova.dts create mode 100644 board/indiedroid/nova/Kconfig create mode 100644 board/indiedroid/nova/MAINTAINERS create mode 100644 configs/indiedroid-nova-rk3588s_defconfig create mode 100644 include/configs/indiedroid-nova.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index b102ffb5f6..0af2986610 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -194,6 +194,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \ rk3588-edgeble-neu6a-io.dtb \ rk3588-edgeble-neu6b-io.dtb \ rk3588-evb1-v10.dtb \ + rk3588s-indiedroid-nova.dtb \ rk3588-nanopc-t6.dtb \ rk3588s-orangepi-5.dtb \ rk3588-orangepi-5-plus.dtb \ diff --git a/arch/arm/dts/rk3588s-indiedroid-nova-u-boot.dtsi b/arch/arm/dts/rk3588s-indiedroid-nova-u-boot.dtsi new file mode 100644 index 0000000000..16ded31fa5 --- /dev/null +++ b/arch/arm/dts/rk3588s-indiedroid-nova-u-boot.dtsi @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Collabora Ltd. + */ + +#include "rk3588-u-boot.dtsi" +#include <dt-bindings/usb/pd.h> + +&rng { + status = "okay"; +}; diff --git a/arch/arm/dts/rk3588s-indiedroid-nova.dts b/arch/arm/dts/rk3588s-indiedroid-nova.dts new file mode 100644 index 0000000000..253f163960 --- /dev/null +++ b/arch/arm/dts/rk3588s-indiedroid-nova.dts @@ -0,0 +1,853 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/usb/pd.h> +#include "rk3588s.dtsi" + +/ { + model = "Indiedroid Nova"; + compatible = "indiedroid,nova", "rockchip,rk3588s"; + + adc-keys-0 { + compatible = "adc-keys"; + io-channel-names = "buttons"; + io-channels = <&saradc 0>; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + button-boot { + label = "boot"; + linux,code = <KEY_PROG1>; + press-threshold-microvolt = <18000>; + }; + }; + + adc-keys-1 { + compatible = "adc-keys"; + io-channel-names = "buttons"; + io-channels = <&saradc 1>; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + button-recovery { + label = "recovery"; + linux,code = <KEY_PROG2>; + press-threshold-microvolt = <18000>; + }; + }; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; + mmc2 = &sdio; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clock-names = "ext_clock"; + clocks = <&rtc_hym8563>; + pinctrl-0 = <&wifi_enable_h>; + pinctrl-names = "default"; + post-power-on-delay-ms = <200>; + reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>; + }; + + sound { + compatible = "audio-graph-card"; + label = "rockchip,es8388-codec"; + widgets = "Microphone", "Mic Jack", + "Headphone", "Headphones"; + routing = "LINPUT2", "Mic Jack", + "Headphones", "LOUT1", + "Headphones", "ROUT1"; + dais = <&i2s0_8ch_p0>; + }; + + vbus5v0_typec: vbus5v0-typec-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&typec5v_pwren>; + pinctrl-names = "default"; + regulator-name = "vbus5v0_typec"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; + + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <1100000>; + regulator-name = "vcc_1v1_nldo_s3"; + vin-supply = <&vcc5v0_sys>; + }; + + /* Regulator is enabled whenever vcc_1v8_s0 is above 1.6v */ + vcc_3v3_s0: vcc-3v3-s0-regulator { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "vcc_3v3_s0"; + vin-supply = <&vcc_3v3_s3>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "vcc5v0_sys"; + }; + + vcc5v0_usb: vcc5v0-usb-regulator { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "vcc5v0_usb"; + vin-supply = <&vcc5v0_usbdcin>; + }; + + vcc5v0_usbdcin: vcc5v0-usbdcin-regulator { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "vcc5v0_usbdcin"; + }; +}; + +&combphy0_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +/* + * Add labels for each GPIO pin exposed on the 40 pin header. Note that + * voltage of each GPIO pin could be either 3.3v or 1.8v (as noted by + * label). + */ +&gpio0 { + gpio-line-names = /* GPIO0 A0-A7 */ + "", "", "", "", + "", "", "", "", + /* GPIO0 B0-B7 */ + "", "", "", "", + "", "", "", "", + /* GPIO0 C0-C7 */ + "", "", "", "", + "", "", "", "", + /* GPIO0 D0-D7 */ + "HEADER_12_1v8", "", "", "HEADER_24_1v8", + "", "", "", ""; +}; + +&gpio1 { + gpio-line-names = /* GPIO1 A0-A7 */ + "HEADER_27_3v3", "", "", "", + "HEADER_29_1v8", "", "HEADER_7_1v8", "", + /* GPIO1 B0-B7 */ + "", "HEADER_31_1v8", "HEADER_33_1v8", "", + "HEADER_11_1v8", "HEADER_13_1v8", "", "", + /* GPIO1 C0-C7 */ + "", "HEADER_28_3v3", "", "", + "", "", "", "", + /* GPIO1 D0-D7 */ + "", "", "", "", + "", "", "HEADER_5_3v3", "HEADER_3_3v3"; +}; + +&gpio3 { + gpio-line-names = /* GPIO3 A0-A7 */ + "", "", "", "", + "", "", "", "", + /* GPIO3 B0-B7 */ + "HEADER_16_1v8", "HEADER_18_1v8", "", "", + "", "", "", "HEADER_19_1v8", + /* GPIO3 C0-C7 */ + "HEADER_21_1v8", "HEADER_23_1v8", "", "HEADER_26_1v8", + "HEADER_15_1v8", "HEADER_22_1v8", "", "", + /* GPIO3 D0-D7 */ + "", "", "", "", + "", "", "", ""; +}; + +&gpio4 { + gpio-line-names = /* GPIO4 A0-A7 */ + "", "", "HEADER_37_3v3", "HEADER_8_3v3", + "HEADER_10_3v3", "", "HEADER_32_3v3", "HEADER_35_3v3", + /* GPIO4 B0-B7 */ + "", "", "", "HEADER_40_3v3", + "HEADER_38_3v3", "HEADER_36_3v3", "", "", + /* GPIO4 C0-C7 */ + "", "", "", "", + "", "", "", "", + /* GPIO4 D0-D7 */ + "", "", "", "", + "", "", "", ""; +}; + +&i2c0 { + pinctrl-0 = <&i2c0m2_xfer>; + pinctrl-names = "default"; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1050000>; + regulator-min-microvolt = <550000>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-ramp-delay = <2300>; + fcs,suspend-voltage-selector = <1>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1050000>; + regulator-min-microvolt = <550000>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-ramp-delay = <2300>; + fcs,suspend-voltage-selector = <1>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c2 { + status = "okay"; + + vdd_npu_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <950000>; + regulator-min-microvolt = <550000>; + regulator-name = "vdd_npu_s0"; + regulator-ramp-delay = <2300>; + fcs,suspend-voltage-selector = <1>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c6 { + pinctrl-0 = <&i2c6m3_xfer>; + status = "okay"; + + fusb302: typec-portc@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&usbc0_int>; + pinctrl-names = "default"; + vbus-supply = <&vbus5v0_typec>; + + connector { + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB-C"; + power-role = "dual"; + try-power-role = "sink"; + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>; + op-sink-microwatt = <1000000>; + }; + }; + + rtc_hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "hym8563"; + interrupt-parent = <&gpio0>; + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&hym8563_int>; + pinctrl-names = "default"; + wakeup-source; + }; +}; + +&i2c7 { + pinctrl-0 = <&i2c7m0_xfer>; + status = "okay"; + + es8388: audio-codec@11 { + compatible = "everest,es8388"; + reg = <0x11>; + assigned-clock-rates = <12288000>; + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; + AVDD-supply = <&vcc_3v3_s3>; + clock-names = "mclk"; + clocks = <&cru I2S0_8CH_MCLKOUT>; + DVDD-supply = <&vcc_1v8_s3>; + HPVDD-supply = <&vcc_3v3_s3>; + PVDD-supply = <&vcc_1v8_s3>; + #sound-dai-cells = <0>; + + port { + es8388_p0_0: endpoint { + remote-endpoint = <&i2s0_8ch_p0_0>; + }; + }; + }; +}; + +&i2s0_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_lrck + &i2s0_mclk + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdo0>; + status = "okay"; + + i2s0_8ch_p0: port { + i2s0_8ch_p0_0: endpoint { + dai-format = "i2s"; + mclk-fs = <256>; + remote-endpoint = <&es8388_p0_0>; + }; + }; +}; + +&pcie2x1l2 { + pinctrl-0 = <&rtl8111_perstb>; + pinctrl-names = "default"; + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&pinctrl { + bluetooth-pins { + bt_reset: bt-reset { + rockchip,pins = + <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_dev: bt-wake-dev { + rockchip,pins = + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_host: bt-wake-host { + rockchip,pins = + <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + ethernet-pins { + rtl8111_perstb: rtl8111-perstb { + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + hym8563 { + + hym8563_int: hym8563-int { + rockchip,pins = + <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = + <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb-typec { + usbc0_int: usbc0-int { + rockchip,pins = + <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + typec5v_pwren: typec5v-pwren { + rockchip,pins = + <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&saradc { + vref-supply = <&vcca_1v8_s0>; + status = "okay"; +}; + +/* HS400 modes seemed to cause io errors. */ +&sdhci { + bus-width = <8>; + no-mmc-hs400; + no-sd; + no-sdio; + non-removable; + vmmc-supply = <&vcc_3v3_s0>; + vqmmc-supply = <&vcc_1v8_s3>; + status = "okay"; +}; + +&sdio { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + disable-wp; + keep-power-in-suspend; + max-frequency = <100000000>; + mmc-pwrseq = <&sdio_pwrseq>; + no-mmc; + no-sd; + non-removable; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vcc_1v8_s3>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + no-sdio; + no-mmc; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + +&spi2 { + #address-cells = <1>; + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + num-cs = <1>; + pinctrl-0 = <&spi2m2_pins>, <&spi2m2_cs0>; + pinctrl-names = "default"; + #size-cells = <0>; + status = "okay"; + + pmic@0 { + compatible = "rockchip,rk806"; + reg = <0x0>; + #gpio-cells = <2>; + gpio-controller; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + pinctrl-names = "default"; + spi-max-frequency = <1000000>; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc5v0_sys>; + vcc6-supply = <&vcc5v0_sys>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc5v0_sys>; + vcc9-supply = <&vcc5v0_sys>; + vcc10-supply = <&vcc5v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc5v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc5v0_sys>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: dcdc-reg1 { + regulator-boot-on; + regulator-enable-ramp-delay = <400>; + regulator-max-microvolt = <950000>; + regulator-min-microvolt = <550000>; + regulator-name = "vdd_gpu_s0"; + regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <950000>; + regulator-min-microvolt = <550000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_cpu_lit_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_logic_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <750000>; + regulator-min-microvolt = <675000>; + regulator-name = "vdd_logic_s0"; + regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <950000>; + regulator-min-microvolt = <550000>; + regulator-name = "vdd_vdenc_s0"; + regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <850000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_ddr_s0"; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <1100000>; + regulator-name = "vdd2_ddr_s3"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <2000000>; + regulator-min-microvolt = <2000000>; + regulator-name = "vdd_2v0_pldo_s3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "vcc_3v3_s3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <600000>; + regulator-min-microvolt = <600000>; + regulator-name = "vddq_ddr_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "vcc_1v8_s3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "vcc_1v8_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_1v8_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "vcca_1v8_s0"; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdda_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1200000>; + regulator-min-microvolt = <1200000>; + regulator-name = "vdda_1v2_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "vcca_3v3_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + regulator-name = "vccio_sd_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3_pldo6: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "vcc_1v8_s3_pldo6"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <750000>; + regulator-min-microvolt = <750000>; + regulator-name = "vdd_0v75_s3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdda_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <850000>; + regulator-min-microvolt = <850000>; + regulator-name = "vdda_ddr_pll_s0"; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + avdd_0v75_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <750000>; + regulator-min-microvolt = <750000>; + regulator-name = "avdd_0v75_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdda_0v85_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + /* Schematics show not in use */ + nldo-reg5 { + }; + }; + }; +}; + +&tsadc { + status = "okay"; +}; + +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + phy-supply = <&vcc5v0_usb>; + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_usb>; + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; + +/* DMA seems to interfere with bluetooth device normal operation. */ +&uart9 { + pinctrl-0 = <&uart9m2_xfer>, <&uart9m2_ctsn>, <&uart9m2_rtsn>; + pinctrl-names = "default"; + /delete-property/ dma-names; + /delete-property/ dmas; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "realtek,rtl8821cs-bt", + "realtek,rtl8723bs-bt"; + device-wake-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + host-wake-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&bt_reset>, <&bt_wake_dev>, <&bt_wake_host>; + pinctrl-names = "default"; + }; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host2_xhci { + status = "okay"; +}; diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index a2193fbd41..d8aad0ea54 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -51,6 +51,12 @@ config TARGET_NANOPCT6_RK3588 Power: 5.5*2.1mm DC Jack, 12VDC input Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case) +config TARGET_RK3588_INDIEDROID_NOVA + bool "Indiedroid Nova RK3588" + select BOARD_LATE_INIT + help + Indiedroid Nova is a Rockchip RK3588s based SBC by Indiedroid. + config TARGET_RK3588_NEU6 bool "Edgeble Neural Compute Module 6(Neu6) SoM" select BOARD_LATE_INIT @@ -169,6 +175,7 @@ config SYS_MALLOC_F_LEN source board/edgeble/neural-compute-module-6/Kconfig source board/friendlyelec/nanopc-t6-rk3588/Kconfig +source board/indiedroid/nova/Kconfig source board/pine64/quartzpro64-rk3588/Kconfig source board/turing/turing-rk1-rk3588/Kconfig source board/rockchip/evb_rk3588/Kconfig diff --git a/board/indiedroid/nova/Kconfig b/board/indiedroid/nova/Kconfig new file mode 100644 index 0000000000..d652eec46f --- /dev/null +++ b/board/indiedroid/nova/Kconfig @@ -0,0 +1,15 @@ +if TARGET_RK3588_INDIEDROID_NOVA + +config SYS_BOARD + default "nova" + +config SYS_VENDOR + default "indiedroid" + +config SYS_CONFIG_NAME + default "indiedroid-nova" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/indiedroid/nova/MAINTAINERS b/board/indiedroid/nova/MAINTAINERS new file mode 100644 index 0000000000..4adc6ee1a9 --- /dev/null +++ b/board/indiedroid/nova/MAINTAINERS @@ -0,0 +1,8 @@ +INDIEDROID-NOVA-RK3588 +M: Chris Morgan <macromorgan(a)hotmail.com> +S: Maintained +F: board/indiedroid/nova +F: include/configs/indiedroid-nova.h +F: configs/indiedroid-nova-rk3588_defconfig +F: arch/arm/dts/rk3588s-indiedroid-nova.dts +F: arch/arm/dts/rk3588s-indiedroid-nova-u-boot.dtsi diff --git a/configs/indiedroid-nova-rk3588s_defconfig b/configs/indiedroid-nova-rk3588s_defconfig new file mode 100644 index 0000000000..efcca7b49e --- /dev/null +++ b/configs/indiedroid-nova-rk3588s_defconfig @@ -0,0 +1,106 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x00a00000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=10 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 +CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SF_DEFAULT_MODE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rk3588s-indiedroid-nova" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_TARGET_RK3588_INDIEDROID_NOVA=y +CONFIG_SPL_STACK=0x400000 +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-indiedroid-nova.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +# CONFIG_SPI_FLASH is not set +CONFIG_SF_DEFAULT_BUS=5 +CONFIG_PHYLIB=y +CONFIG_RTL8169=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_LAN75XX=y +CONFIG_USB_ETHER_LAN78XX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_PRODUCT_NUM=0x350b +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/include/configs/indiedroid-nova.h b/include/configs/indiedroid-nova.h new file mode 100644 index 0000000000..c74e5022f6 --- /dev/null +++ b/include/configs/indiedroid-nova.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2022 Collabora Ltd. + */ + +#ifndef __INDIEDROID_NOVA_H +#define __INDIEDROID_NOVA_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include <configs/rk3588_common.h> + +#endif /* __INDIEDROID_NOVA_H */ -- 2.34.1

2 1

[PATCH v2 0/3] Introduce mtdblock device
by Alexey Romanov 03 Apr '24

03 Apr '24

Hello! This series adds support for the mtdblock device, which allows to read/write data block by block. For example, it can now be used for BCB or Android AB command: $ bcb load mtd 0 part_name Tested only on SPI NAND, so bind is made only for SPI NAND drivers. --- Changes V1 -> V2 [1]: - Drop patch [2]. - Add warning if bind NAND mtdblock device. - Move documentation of mtdblock implementation from commit message to the source code. - Remove __maybe_unused from mtd partition functions description. - Use blk_enabled() instead of #ifdefs. Links: - [1] https://lore.kernel.org/all/20240227100441.1811047-1-avromanov@salutedevice… - [2] https://lore.kernel.org/all/20240227100441.1811047-5-avromanov@salutedevice… Alexey Romanov (3): disk: support MTD partitions drivers: introduce mtdblock abstraction spinand: bind mtdblock disk/part.c | 5 +- drivers/block/blk-uclass.c | 1 + drivers/mtd/Kconfig | 1 + drivers/mtd/Makefile | 1 + drivers/mtd/mtdblock.c | 227 ++++++++++++++++++++++++++++++++++++ drivers/mtd/mtdpart.c | 69 +++++++++++ drivers/mtd/nand/spi/core.c | 20 ++++ include/linux/mtd/mtd.h | 12 ++ include/part.h | 2 + 9 files changed, 337 insertions(+), 1 deletion(-) create mode 100644 drivers/mtd/mtdblock.c -- 2.34.1

3 8

[PATCH v4 0/5] Introduce ICSSG Ethernet driver
by MD Danish Anwar 03 Apr '24

03 Apr '24

Introduce ICSSG PRUETH support in uboot. The ICSSG driver is used in TI AM654 SR2.0. The ICSSG PRU Sub-system runs on EMAC firmware. This series Introduces support for ICSSG driver in uboot. This series has been tested on AM65x SR2.0, and the ICSSG interface is able to ping / dhcp and boot kernel using tftp in uboot. To use ICSSG2 ethernet, the ICSSG firmware needs to be loaded to PRU RPROC cores and RPROC cores need to be booted with the firmware. This step is done inside driver similar to kernel. The remoteproc driver uses request_fw_into_buf() API from fs-loader driver to load and start rproc with the required firmwares. This series only introduces driver files. The device tree and config changes to enable ICSSG driver will be introduced later. This is v4 of the series [1]. Changes from v3 [3] to v4: *) Dropped the dependncy patches and posted them seprately. *) Dropped the DTS and config patches, will post them seprately. *) Modified patch 4/5 to have multi port independent MAC mode support. *) Rebased the series on latest u-boot/next. Changes from v2 [2] to v3: *) No functional changes. *) Rebased the series on latest u-boot/next. *) Dropped the RFC tag. Changes from v1 [1] to v2: *) Modified the driver to load the firmware inside the driver only instead of loading the firmware using commands at u-boot prompt. Added patch 3/16 for this. *) Rebased the series on the latest u-boot/next. *) Modified conf-0 configuration in k3-am65x-binman.dtsi as suggested by Roger. *) Dropped patch [4] as the patch is no longer needed. *) Added patch 2/15 to modify fs-loader driver to use fw_storage_interface env instead of storage_interface and keep the env storage_interface as fallback as suggested by Roger. *) Added patch 15/15 to set default values to env fw_storage_interface and fw_dev_part. [1] https://lore.kernel.org/all/20231219103418.3445886-1-danishanwar@ti.com/ [2] https://lore.kernel.org/all/20240111070611.342701-1-danishanwar@ti.com/ [3] https://lore.kernel.org/all/20240124064930.1787929-1-danishanwar@ti.com/ [4] https://lore.kernel.org/all/20231219103418.3445886-16-danishanwar@ti.com/ Thanks and Regards, MD Danish Anwar MD Danish Anwar (5): net: ti: icssg: Add Firmware Interface for ICSSG Ethernet driver. net: ti: icssg: Add Firmware config and classification APIs. net: ti: icssg: Add icssg queues APIs and macros net: ti: icssg: Add ICSSG ethernet driver net: ti: icssg: Add support sending FDB command to update rx_flow_id arch/arm/mach-k3/common.c | 11 + drivers/net/ti/Kconfig | 13 + drivers/net/ti/Makefile | 1 + drivers/net/ti/icss_mii_rt.h | 192 +++++++++ drivers/net/ti/icssg_classifier.c | 376 ++++++++++++++++ drivers/net/ti/icssg_config.c | 474 ++++++++++++++++++++ drivers/net/ti/icssg_config.h | 195 +++++++++ drivers/net/ti/icssg_prueth.c | 691 ++++++++++++++++++++++++++++++ drivers/net/ti/icssg_prueth.h | 97 +++++ drivers/net/ti/icssg_queues.c | 51 +++ drivers/net/ti/icssg_switch_map.h | 209 +++++++++ 11 files changed, 2310 insertions(+) create mode 100644 drivers/net/ti/icss_mii_rt.h create mode 100644 drivers/net/ti/icssg_classifier.c create mode 100644 drivers/net/ti/icssg_config.c create mode 100644 drivers/net/ti/icssg_config.h create mode 100644 drivers/net/ti/icssg_prueth.c create mode 100644 drivers/net/ti/icssg_prueth.h create mode 100644 drivers/net/ti/icssg_queues.c create mode 100644 drivers/net/ti/icssg_switch_map.h base-commit: 8ef8dcc54a0d507912ee57e15a541c5cebcfca76 -- 2.34.1

2 10

[PATCH v5 00/16] Qualcomm platform USB support
by Caleb Connolly 03 Apr '24

03 Apr '24

This series enables USB on Qualcomm SDM845 platforms and lays the foundation for future SoCs as well. It introduces two new high-speed PHY drivers, one for SDM845 and one for an upcoming platform. The SDM845 clock driver gains support for configuring the USB clocks, and the GPIO driver is updated to use .set_flags which fixes a strange bug where GPIOs would also be configured as input. Support for super-speed USB modes is not currently available, however configuring the device to be high-speed only requires modifications to DT. To improve compatibility with upstream DT, we switch Qualcomm platforms over to OF_LIVE and apply fixups to the tree to remove references to the super-speed phy, as well as configure the Qualcomm glue for high-speed only mode. The db845c requires a vbus-supply to be hooked up for its usb type-A port. A U-Boot dtsi file is added to configure this. With these patches, it is now also possible to run U-Boot on some SDM845 phones like the OnePlus 6 using a dtb from Linux, and access the U-Boot shell via the CDC ACM USB serial gadget. This series depends on the ("Qualcomm DWC3 USB support") series [1], as well as Volodymyrs patches enabling power domain support [2]. A feature branch based on qcom-next with the necessary dependencies for testing the Dragonboard845c can be found at [3]. [1]: https://lore.kernel.org/u-boot/20240320-b4-qcom-usb-v4-0-41be480172e1@linar… [2]: https://lore.kernel.org/u-boot/20240311213334.3567389-1-volodymyr_babchuk@e… [3]: https://git.codelinaro.org/linaro/qcomlt/u-boot/-/tree/b4/qcom-livetree --- Changes in v5: - Call regulators_enable_boot_on() during board_init() and don't use the vbus-supply property anymore. This is slightly more aligned with upstream. - Minor checkpatch fixes - Link to v4: https://lore.kernel.org/r/20240320-b4-qcom-livetree-v4-0-d867ab1f06c2@linar… Changes in v4: - Fix defconfig. - Mark db845c vbus regulator always-on to fix a bug in Linux. - Add a timer in qcom_of_fixup_nodes() so the boot time impact can be easily measured. - Drop unused macros from femto v2 phy, general cleanup, remove custom set/clrbits impl. - Rename "7nm" phy driver to "femto-v2" to match Linux, also fix copyright. - Use set/clrbits() in qusb2 phy driver. - Link to v3: https://lore.kernel.org/r/20240319-b4-qcom-livetree-v3-0-e1b38d9b4fa4@linar… Changes in v3: - Add back missing gadget options to qcom_defconfig (thanks Neil) - Link to v2: https://lore.kernel.org/r/20240315-b4-qcom-livetree-v2-0-ab635774b2dc@linar… Changes in v2: - Fix incorrect order of NULL/0 parameters to of_write_prob() in fixup_qcom_dwc3() - Move fixup_usb_nodes() to a separate file in preparation for future additions. - Add missing break to switch case in sdm845_clk_enable() - Remove rogue return statement in msm_gpio_set_flags() - Rebase on Volodymyrs power domain patches. - Link to v1: https://lore.kernel.org/r/20240131-b4-qcom-livetree-v1-0-4071c0787db0@linar… --- Bhupesh Sharma (2): phy: qcom: add Qualcomm QUSB2 USB PHY driver phy: qcom: Add SNPS femto v2 USB HS phy Caleb Connolly (14): mailmap: update Bhupesh's email address mach-snapdragon: disable power-domains for pre-reloc drivers clk/qcom: use offsets for RCG registers clk/qcom: sdm845: add gdscs clk/qcom: sdm845: add USB clocks gpio: msm_gpio: add .set_flags op serial: msm-geni: support livetree mach-snapdragon: fixup USB nodes mach-snapdragon: fixup power-domains mach-snapdragon: call regulators_enable_boot_on() dts: sdm845-db845c: add u-boot fixups qcom_defconfig: enable livetree qcom_defconfig: enable USB usb: gadget: UMS: fix 64-bit division on ARM32 .mailmap | 1 + arch/arm/dts/sdm845-db845c-u-boot.dtsi | 9 + arch/arm/mach-snapdragon/Makefile | 1 + arch/arm/mach-snapdragon/board.c | 5 + arch/arm/mach-snapdragon/of_fixup.c | 155 +++++++++++ arch/arm/mach-snapdragon/qcom-priv.h | 20 ++ configs/qcom_defconfig | 53 ++-- drivers/clk/qcom/clock-apq8016.c | 39 +-- drivers/clk/qcom/clock-apq8096.c | 28 +- drivers/clk/qcom/clock-qcom.c | 24 +- drivers/clk/qcom/clock-qcom.h | 16 +- drivers/clk/qcom/clock-qcs404.c | 122 ++------- drivers/clk/qcom/clock-sdm845.c | 61 +++-- drivers/gpio/msm_gpio.c | 27 +- drivers/phy/qcom/Kconfig | 15 ++ drivers/phy/qcom/Makefile | 2 + drivers/phy/qcom/phy-qcom-qusb2.c | 429 ++++++++++++++++++++++++++++++ drivers/phy/qcom/phy-qcom-snps-femto-v2.c | 207 ++++++++++++++ drivers/serial/serial_msm_geni.c | 15 +- drivers/usb/gadget/f_mass_storage.c | 13 +- 20 files changed, 1001 insertions(+), 241 deletions(-) --- base-commit: 0d08018d01afaddcee8dd1f1929a48577684110c // Caleb (they/them)

4 32

[PATCH v2 1/3] mmc: Convert hs400_tuning flag from u8 to bool
by Marek Vasut 03 Apr '24

03 Apr '24

This hs400_tuning is a flag, make it bool. No functional change. This will be useful in the following patch, which adds another more generic flag, where the compiler can better use the space now reserved for the u8 to store more flags in it. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Hai Pham <hai.pham.ud(a)renesas.com> Cc: Jaehoon Chung <jh80.chung(a)samsung.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Paul Barker <paul.barker.ct(a)bp.renesas.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Sean Anderson <seanga2(a)gmail.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh(a)renesas.com> --- V2: Use bool var:1; --- drivers/mmc/mmc.c | 4 ++-- include/mmc.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 83f9ae8bb7d..07d87c993a6 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -2027,9 +2027,9 @@ static int mmc_select_hs400(struct mmc *mmc) mmc_set_clock(mmc, mmc->tran_speed, false); /* execute tuning if needed */ - mmc->hs400_tuning = 1; + mmc->hs400_tuning = true; err = mmc_execute_tuning(mmc, MMC_CMD_SEND_TUNING_BLOCK_HS200); - mmc->hs400_tuning = 0; + mmc->hs400_tuning = false; if (err) { debug("tuning failed\n"); return err; diff --git a/include/mmc.h b/include/mmc.h index 2b9a6aa8ee0..afca123b386 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -736,7 +736,7 @@ struct mmc { * accessing the boot partitions */ u32 quirks; - u8 hs400_tuning; + bool hs400_tuning:1; enum bus_mode user_speed_mode; /* input speed mode from user */ }; -- 2.43.0

2 5

[PATCH] mmc: renesas-sdhi: Stop transmission in case tuning block transfer fails
by Marek Vasut 03 Apr '24

03 Apr '24

The current code uses the state of tuning block received by SCC to determine whether or not to send transmission stop command. This is not correct. Use the state of tuning block transfer to determine whether or not to send transmission stop command instead, because the transmission stop command has to be sent in case the tuning block transfer failed. This requires two changes, separate variable to store and check the state of tuning block received by SCC, and another separate variable to store and check return value from transmission stop command. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Hai Pham <hai.pham.ud(a)renesas.com> Cc: Jaehoon Chung <jh80.chung(a)samsung.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Paul Barker <paul.barker.ct(a)bp.renesas.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Sean Anderson <seanga2(a)gmail.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh(a)renesas.com> --- drivers/mmc/renesas-sdhi.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 316b75b35fe..c4d0733b621 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -568,8 +568,8 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) struct mmc *mmc = upriv->mmc; unsigned int tap_num; unsigned int taps = 0; - int i, ret = 0; - u32 caps; + int i, ret = 0, sret; + u32 caps, reg; /* Only supported on Renesas RCar */ if (!(priv->caps & TMIO_SD_CAP_RCAR_UHS)) @@ -612,8 +612,8 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) if (ret == 0) taps |= BIT(i); - ret = renesas_sdhi_compare_scc_data(priv); - if (ret == 0) + reg = renesas_sdhi_compare_scc_data(priv); + if (reg == 0) priv->smpcmp |= BIT(i); mdelay(1); @@ -624,9 +624,9 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) * eMMC. */ if (ret && (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200)) { - ret = mmc_send_stop_transmission(mmc, false); - if (ret < 0) - dev_dbg(dev, "Tuning abort fail (%d)\n", ret); + sret = mmc_send_stop_transmission(mmc, false); + if (sret < 0) + dev_dbg(dev, "Tuning abort fail (%d)\n", sret); } } -- 2.43.0

3 2

[PATCH] mmc: tmio: Check INFO1 for completion during DMA transfer
by Marek Vasut 03 Apr '24

03 Apr '24

In case a CRC error occurs during DMA transfer, the transfer completion flag is not set in TMIO_SD_DMA_INFO1 and the transfer would eventually time out. The timeout could be very long in case the transfer consists of a large amount of blocks, the base timeout is 10 seconds and every block adds 100 us more. In case a CRC error does occur, a completion flag is set in a different register, TMIO_SD_INFO1. Use this other completion flag to detect DMA transfer ended and stop waiting for TMIO_SD_DMA_INFO1 completion flag. This reduces the lengthy timeout in case of an error. The unconditional check of TMIO_SD_DMA_INFO2 register for DMA related errors must not be skipped in any case to actually recognize the DMA error and report it. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Hai Pham <hai.pham.ud(a)renesas.com> Cc: Jaehoon Chung <jh80.chung(a)samsung.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Paul Barker <paul.barker.ct(a)bp.renesas.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Sean Anderson <seanga2(a)gmail.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh(a)renesas.com> --- drivers/mmc/tmio-common.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c index 890c496b535..719c4830bc3 100644 --- a/drivers/mmc/tmio-common.c +++ b/drivers/mmc/tmio-common.c @@ -299,7 +299,13 @@ static int tmio_sd_dma_wait_for_irq(struct udevice *dev, u32 flag, struct tmio_sd_priv *priv = dev_get_priv(dev); long wait = 1000000 + 10 * blocks; - while (!(tmio_sd_readl(priv, TMIO_SD_DMA_INFO1) & flag)) { + for (;;) { + if (tmio_sd_readl(priv, TMIO_SD_DMA_INFO1) & flag) + break; + + if (tmio_sd_readl(priv, TMIO_SD_INFO1) & TMIO_SD_INFO1_CMP) + break; + if (wait-- < 0) { dev_err(dev, "timeout during DMA\n"); return -ETIMEDOUT; -- 2.43.0

3 2

[PATCH] mmc: arm_pl180_mmci: Rely on DM
by Linus Walleij 03 Apr '24

03 Apr '24

The PL180/MMCI driver is implied to use CONFIG_DM and the ARM defconfigs such as configs/vexpress_ca9x4_defconfig will get it as well. With a simple oneline to default to not being the v2 variant, the original ARM MMCI variant works fine with the driver as well. The IP version actually needs to be read out from a register on the ARM versions, but we will simply assume we are running on the original hardware if arm,primecell-periphid is not explicitly specified in the device tree. Drop the !CONFIG_DM code and depend on DM_MMC. Tested on the Versatile Express CA9x4 board. Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- drivers/mmc/Kconfig | 1 + drivers/mmc/arm_pl180_mmci.c | 66 ++------------------------------------------ 2 files changed, 3 insertions(+), 64 deletions(-) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 17618c3bdcc1..59716c3966e5 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -79,6 +79,7 @@ config MMC_SPI_CRC_ON config ARM_PL180_MMCI bool "ARM AMBA Multimedia Card Interface and compatible support" + depends on DM_MMC help This selects the ARM(R) AMBA(R) PrimeCell Multimedia Card Interface (PL180, PL181 and compatible) support. diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c index 5cf5502ed545..2666b65362bc 100644 --- a/drivers/mmc/arm_pl180_mmci.c +++ b/drivers/mmc/arm_pl180_mmci.c @@ -18,6 +18,7 @@ #include <malloc.h> #include <mmc.h> #include <dm/device_compat.h> +#include <dm.h> #include <asm/io.h> #include <asm-generic/gpio.h> @@ -25,8 +26,6 @@ #include "arm_pl180_mmci.h" #include <linux/delay.h> -#ifdef CONFIG_DM_MMC -#include <dm.h> #define MMC_CLOCK_MAX 48000000 #define MMC_CLOCK_MIN 400000 @@ -34,7 +33,6 @@ struct arm_pl180_mmc_plat { struct mmc_config cfg; struct mmc mmc; }; -#endif static int wait_for_command_end(struct mmc *dev, struct mmc_cmd *cmd) { @@ -358,65 +356,6 @@ static int host_set_ios(struct mmc *dev) return 0; } -#ifndef CONFIG_DM_MMC -/* MMC uses open drain drivers in the enumeration phase */ -static int mmc_host_reset(struct mmc *dev) -{ - struct pl180_mmc_host *host = dev->priv; - - writel(host->pwr_init, &host->base->power); - - return 0; -} - -static const struct mmc_ops arm_pl180_mmci_ops = { - .send_cmd = host_request, - .set_ios = host_set_ios, - .init = mmc_host_reset, -}; - -/* - * mmc_host_init - initialize the mmc controller. - * Set initial clock and power for mmc slot. - * Initialize mmc struct and register with mmc framework. - */ - -int arm_pl180_mmci_init(struct pl180_mmc_host *host, struct mmc **mmc) -{ - u32 sdi_u32; - - writel(host->pwr_init, &host->base->power); - writel(host->clkdiv_init, &host->base->clock); - udelay(CLK_CHANGE_DELAY); - - /* Disable mmc interrupts */ - sdi_u32 = readl(&host->base->mask0) & ~SDI_MASK0_MASK; - writel(sdi_u32, &host->base->mask0); - - host->cfg.name = host->name; - host->cfg.ops = &arm_pl180_mmci_ops; - - /* TODO remove the duplicates */ - host->cfg.host_caps = host->caps; - host->cfg.voltages = host->voltages; - host->cfg.f_min = host->clock_min; - host->cfg.f_max = host->clock_max; - if (host->b_max != 0) - host->cfg.b_max = host->b_max; - else - host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; - - *mmc = mmc_create(&host->cfg, host); - if (!*mmc) - return -1; - debug("registered mmc interface number is:%d\n", - (*mmc)->block_dev.devnum); - - return 0; -} -#endif - -#ifdef CONFIG_DM_MMC static void arm_pl180_mmc_init(struct pl180_mmc_host *host) { u32 sdi_u32; @@ -477,7 +416,7 @@ static int arm_pl180_mmc_probe(struct udevice *dev) host->version2 = true; break; default: - host->version2 = true; + host->version2 = false; /* ARM variant */ } gpio_request_by_name(dev, "cd-gpios", 0, &host->cd_gpio, GPIOD_IS_IN); @@ -561,4 +500,3 @@ U_BOOT_DRIVER(arm_pl180_mmc) = { .priv_auto = sizeof(struct pl180_mmc_host), .plat_auto = sizeof(struct arm_pl180_mmc_plat), }; -#endif --- base-commit: 0101a2ffe125911ebf89172b495f5ff14f2fd058 change-id: 20240208-uboot-vexpress-ca9-127bd6b163df Best regards, -- Linus Walleij <linus.walleij(a)linaro.org>

2 1