March 2024 - U-Boot

[PATCH] lds: align u-boot-nodtb with 8 bytes boundary
by Eugen Hristev 29 Jan '25

29 Jan '25

Newer DTC require that the DTB start address is aligned at 8 bytes. In the u-boot.bin case, the u-boot-nodtb.bin is concatenated with the DTB, but there is no alignment/padding to the next 8byte aligned address. This causes the board to fail booting, because the FDT will claim that the DTB inside u-boot.bin is not a valid DTB, it will fail with -FDT_ERR_ALIGNMENT. To solve this, have the u-boot binary `_end` aligned with 8 bytes. The objcopy in the Makefile will create the u-boot-nodtb.bin and it has to be truncated to 8 bytes to correspond to the u-boot.map file which will have the `_end` aligned to 8 bytes. The lds files which use devicetrees have been changed to align the `_end` tag with 8 bytes. This patch is also a prerequisite to have the possibility to update the dtc inside u-boot to newer versions (1.6.1+) Signed-off-by: Eugen Hristev <eugen.hristev(a)microchip.com> --- Hi, I could not test all affected boards, it's an impossible task. I tried this on at91 boards which I have, and ran the CI on denx. I cannot guarantee that no other boards are affected, so this patch is a bit of an RFC. If the u-boot-nodtb.bin does not have the size equal with the corresponding one in u-boot.map, the binary_size_check will fail at build time with something like this: u-boot.map shows a binary size of 502684 but u-boot-nodtb.bin shows 502688 Thanks, Eugen Makefile | 2 ++ arch/arm/cpu/armv8/u-boot.lds | 4 ++-- arch/arm/cpu/u-boot-spl.lds | 1 + arch/arm/cpu/u-boot.lds | 1 + arch/arm/lib/elf_arm_efi.lds | 5 +++++ arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 2 +- arch/arm/mach-at91/armv7/u-boot-spl.lds | 2 +- arch/arm/mach-zynq/u-boot-spl.lds | 2 +- arch/mips/cpu/u-boot.lds | 2 +- arch/sandbox/cpu/u-boot.lds | 6 ++++++ arch/sh/cpu/u-boot.lds | 2 ++ board/ti/am335x/u-boot.lds | 1 + tools/binman/test/u_boot_binman_embed.lds | 2 +- 13 files changed, 25 insertions(+), 7 deletions(-) diff --git a/Makefile b/Makefile index 9d84f96481..b4d387bcce 100644 --- a/Makefile +++ b/Makefile @@ -1317,6 +1317,8 @@ endif u-boot-nodtb.bin: u-boot FORCE $(call if_changed,objcopy_uboot) +# Make sure the size is 8 byte-aligned. + @truncate -s %8 $@ $(BOARD_SIZE_CHECK) u-boot.ldr: u-boot diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds index 8fe4682dd2..e5fa4ef95c 100644 --- a/arch/arm/cpu/armv8/u-boot.lds +++ b/arch/arm/cpu/armv8/u-boot.lds @@ -145,10 +145,10 @@ SECTIONS *(.__rel_dyn_end) } - _end = .; - . = ALIGN(8); + _end = .; + .bss_start : { KEEP(*(.__bss_start)); } diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds index fb2189d50d..732ed42db1 100644 --- a/arch/arm/cpu/u-boot-spl.lds +++ b/arch/arm/cpu/u-boot-spl.lds @@ -55,6 +55,7 @@ SECTIONS .end : { + . = ALIGN(8); *(.__end) } diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index f25f72b2e0..274e1a7d30 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -193,6 +193,7 @@ SECTIONS .end : { + . = ALIGN(8); *(.__end) } diff --git a/arch/arm/lib/elf_arm_efi.lds b/arch/arm/lib/elf_arm_efi.lds index 767ebda635..f3867021d3 100644 --- a/arch/arm/lib/elf_arm_efi.lds +++ b/arch/arm/lib/elf_arm_efi.lds @@ -54,6 +54,11 @@ SECTIONS .rel.data : { *(.rel.data) *(.rel.data*) } _data_size = . - _etext; + .end : { + . = ALIGN(8); + *(.__end) + } + /DISCARD/ : { *(.rel.reloc) *(.eh_frame) diff --git a/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds b/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds index 1a8bf94dee..d7e5d81ecc 100644 --- a/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds +++ b/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds @@ -31,7 +31,7 @@ SECTIONS . = ALIGN(4); __u_boot_list : { KEEP(*(SORT(__u_boot_list*))) } > .sram - . = ALIGN(4); + . = ALIGN(8); __image_copy_end = .; .end : diff --git a/arch/arm/mach-at91/armv7/u-boot-spl.lds b/arch/arm/mach-at91/armv7/u-boot-spl.lds index 6ca725fc4c..2a0a1b4b86 100644 --- a/arch/arm/mach-at91/armv7/u-boot-spl.lds +++ b/arch/arm/mach-at91/armv7/u-boot-spl.lds @@ -38,7 +38,7 @@ SECTIONS . = ALIGN(4); __u_boot_list : { KEEP(*(SORT(__u_boot_list*))) } > .sram - . = ALIGN(4); + . = ALIGN(8); __image_copy_end = .; .end : diff --git a/arch/arm/mach-zynq/u-boot-spl.lds b/arch/arm/mach-zynq/u-boot-spl.lds index 8c18d3f91f..c0320dbe1e 100644 --- a/arch/arm/mach-zynq/u-boot-spl.lds +++ b/arch/arm/mach-zynq/u-boot-spl.lds @@ -41,7 +41,7 @@ SECTIONS KEEP(*(SORT(__u_boot_list*))); } > .sram - . = ALIGN(4); + . = ALIGN(8); _image_binary_end = .; diff --git a/arch/mips/cpu/u-boot.lds b/arch/mips/cpu/u-boot.lds index 9a4ebcd151..182e9bc6e5 100644 --- a/arch/mips/cpu/u-boot.lds +++ b/arch/mips/cpu/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS . += CONFIG_MIPS_RELOCATION_TABLE_SIZE - 4; } - . = ALIGN(4); + . = ALIGN(8); _end = .; .bss __rel_start (OVERLAY) : { diff --git a/arch/sandbox/cpu/u-boot.lds b/arch/sandbox/cpu/u-boot.lds index ba8dee50c7..3fbca6d248 100644 --- a/arch/sandbox/cpu/u-boot.lds +++ b/arch/sandbox/cpu/u-boot.lds @@ -51,6 +51,12 @@ SECTIONS *(.dynsym) __dyn_sym_end = .; } + + .end : + { + . = ALIGN(8); + *(.__end) + } } INSERT BEFORE .data; diff --git a/arch/sh/cpu/u-boot.lds b/arch/sh/cpu/u-boot.lds index d360eea7eb..226f50b19c 100644 --- a/arch/sh/cpu/u-boot.lds +++ b/arch/sh/cpu/u-boot.lds @@ -74,6 +74,8 @@ SECTIONS KEEP(*(SORT(__u_boot_list*))); } >ram + . = ALIGN(8); + PROVIDE (__init_end = .); PROVIDE (reloc_dst_end = .); PROVIDE (_end = .); diff --git a/board/ti/am335x/u-boot.lds b/board/ti/am335x/u-boot.lds index 087dee8bb2..deb9098a90 100644 --- a/board/ti/am335x/u-boot.lds +++ b/board/ti/am335x/u-boot.lds @@ -118,6 +118,7 @@ SECTIONS .end : { + . = ALIGN(8); *(.__end) } diff --git a/tools/binman/test/u_boot_binman_embed.lds b/tools/binman/test/u_boot_binman_embed.lds index e213fa8a84..93c0ae6aed 100644 --- a/tools/binman/test/u_boot_binman_embed.lds +++ b/tools/binman/test/u_boot_binman_embed.lds @@ -18,7 +18,7 @@ SECTIONS *(.text*) } - . = ALIGN(4); + . = ALIGN(8); .data : { dtb_embed_begin = .; KEEP(*(.mydtb)); -- 2.25.1

8 26

[PATCH v2] mmc: Remove alignment hole for cmdidx in struct mmc_cmd
by Jonas Karlman 27 Jan '25

27 Jan '25

The alignment hole caused by cmdidx in struct mmc_cmd cause strange issues together with the peephole2 optimization on Amlogic SoCs. Following was observed while working on SPL support for Amlogic SoCs. sd_get_capabilities() normally issue a CMD55 followed by a CMD51. However, on at least Amlogic S905 (Cortex-A53) and S905X3 (Cortex-A55), CMD55 was instead followed by CMD8 (and a few reties) in SPL. Code from the call site: cmd.cmdidx = SD_CMD_APP_SEND_SCR; // 51 ... data.blocksize = 8; ... err = mmc_send_cmd_retry(mmc, &cmd, &data, 3); Running the code with MMC_TRACE enabled shows: CMD_SEND:55 ARG 0x50480000 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:8 ARG 0x00000000 RET -110 Removing the alignment hole by changing cmdidx from ushort to uint or building with -fno-peephole2 flag seem to resolve this issue. CMD_SEND:55 ARG 0x50480000 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:51 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000920 Same issue was observed building U-Boot with gcc 8 - 13. Remove this alignment hole by changing cmdidx from ushort to uint. Signed-off-by: Jonas Karlman <jonas(a)kwiboo.se> --- Changes in v2: - Drop use of -fno-peephole2 flag Link to RFC: https://patchwork.ozlabs.org/patch/1841495/ --- include/mmc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/mmc.h b/include/mmc.h index 1022db3ffa7c..031ea0fb3545 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -413,7 +413,7 @@ struct mmc_cid { }; struct mmc_cmd { - ushort cmdidx; + uint cmdidx; uint resp_type; uint cmdarg; uint response[4]; -- 2.43.0

4 5

[PATCH] usb: dwc3-generic: Fix build errors when USB_DWC3_GADGET is disabled
by Jonas Karlman 07 Jan '25

07 Jan '25

Build fail with the following error when DM_USB_GADGET is enabled and USB_DWC3_GADGET is disabled: dwc3/dwc3-generic.o: in function `dm_usb_gadget_handle_interrupts': dwc3/dwc3-generic.c:201:(.text.dm_usb_gadget_handle_interrupts+0x10): undefined reference to `dwc3_gadget_uboot_handle_interrupt' Build also fail with the following error when USB_GADGET_DWC2_OTG + DM_USB_GADGET is enabled and USB_DWC3_GADGET is disabled: gadget/dwc2_udc_otg.o: in function `dm_usb_gadget_handle_interrupts': gadget/dwc2_udc_otg.c:947: multiple definition of `dm_usb_gadget_handle_interrupts'; dwc3/dwc3-generic.o:dwc3/dwc3-generic.c:197: first defined here Fix this by checking for USB_DWC3_GADGET in addition to DM_USB_GADGET. Signed-off-by: Jonas Karlman <jonas(a)kwiboo.se> --- drivers/usb/dwc3/dwc3-generic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index 6fb2de8a5ace..891d01957619 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -192,7 +192,7 @@ static int dwc3_generic_of_to_plat(struct udevice *dev) return 0; } -#if CONFIG_IS_ENABLED(DM_USB_GADGET) +#if IS_ENABLED(CONFIG_USB_DWC3_GADGET) && CONFIG_IS_ENABLED(DM_USB_GADGET) int dm_usb_gadget_handle_interrupts(struct udevice *dev) { struct dwc3_generic_priv *priv = dev_get_priv(dev); @@ -435,7 +435,7 @@ static int dwc3_glue_bind_common(struct udevice *parent, ofnode node) if (!dr_mode) dr_mode = usb_get_dr_mode(node); - if (CONFIG_IS_ENABLED(DM_USB_GADGET) && + if (IS_ENABLED(CONFIG_USB_DWC3_GADGET) && CONFIG_IS_ENABLED(DM_USB_GADGET) && (dr_mode == USB_DR_MODE_PERIPHERAL || dr_mode == USB_DR_MODE_OTG)) { debug("%s: dr_mode: OTG or Peripheral\n", __func__); driver = "dwc3-generic-peripheral"; -- 2.43.0

4 16

[PATCH] usb: dwc3-of-simple: Remove Amlogic and Rockchip compatible
by Jonas Karlman 07 Jan '25

07 Jan '25

Remove the rockchip,rk3399-dwc3 compatible from the dwc3-of-simple driver now that all boards have changed to use the dwc3-generic driver. Also remove the amlogic,meson-gxl-dwc3 compatible, it is no longer in use by any device tree in mainline linux or U-Boot. Signed-off-by: Jonas Karlman <jonas(a)kwiboo.se> --- drivers/usb/host/dwc3-of-simple.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/usb/host/dwc3-of-simple.c b/drivers/usb/host/dwc3-of-simple.c index f9df59d2e5d7..de1797d02ec0 100644 --- a/drivers/usb/host/dwc3-of-simple.c +++ b/drivers/usb/host/dwc3-of-simple.c @@ -90,8 +90,6 @@ static int dwc3_of_simple_remove(struct udevice *dev) } static const struct udevice_id dwc3_of_simple_ids[] = { - { .compatible = "amlogic,meson-gxl-dwc3" }, - { .compatible = "rockchip,rk3399-dwc3" }, { .compatible = "ti,dwc3" }, { } }; -- 2.43.0

4 3

[PATCH 00/10] Make bootph tags transistive to parents
by Simon Glass 19 Dec '24

19 Dec '24

The bootph binding[1] is defined such that if a tag is present in a subnode then it is supposed to apply to the parent node as well. This series aligned U-Boot with that binding. It also includes a few clean-ups. [1] https://github.com/devicetree-org/dt-schema/blob/main/dtschema/ schemas/bootph.yaml Simon Glass (10): x86: coral: Align bootph SPI-flash subnodes with parent fdtgrep: Tidy up a few type warnings and comments fdtgrep: Correct ordering of flags fdtgrep: Correct references to fdt_find_regions() fdtgrep: Tidy up comment for h_include() fdtgrep: Simplify code to inverting the match fdtgrep: Move property checking into a function sandbox: Correct SPL condition for building devicetree fdtgrep: Allow propagating properties up to supernodes Makefile: Use the fdtgrep -u flag arch/x86/dts/chromebook_coral.dts | 6 +- scripts/Makefile.lib | 2 +- scripts/Makefile.spl | 2 +- tools/fdtgrep.c | 123 ++++++++++++++++++++---------- 4 files changed, 87 insertions(+), 46 deletions(-) -- 2.43.0.472.g3155946c3a-goog

4 26

[PATCH] clk: Propagate clk_set_rate() if CLK_SET_PARENT_RATE present
by Sam Protsenko 13 Dec '24

13 Dec '24

Sometimes clocks provided to a consumer might not have .set_rate operation (like gate or mux clocks), but have CLK_SET_PARENT_RATE flag set. In that case it's usually possible to find a parent up the tree which is capable of setting the rate (div, pll, etc). Implement a simple lookup procedure for such cases, to traverse the clock tree until .set_rate capable parent is found, and use that parent to actually change the rate. The search will stop once the first .set_rate capable clock is found, which is usually enough to handle most cases. Signed-off-by: Sam Protsenko <semen.protsenko(a)linaro.org> --- drivers/clk/clk-uclass.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index ed6e60bc4841..755f05f34669 100644 --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c @@ -571,8 +571,20 @@ ulong clk_set_rate(struct clk *clk, ulong rate) return 0; ops = clk_dev_ops(clk->dev); - if (!ops->set_rate) - return -ENOSYS; + /* Try to find parents which can set rate */ + while (!ops->set_rate) { + struct clk *parent; + + if (!(clk->flags & CLK_SET_RATE_PARENT)) + return -ENOSYS; + + parent = clk_get_parent(clk); + if (IS_ERR_OR_NULL(parent) || !clk_valid(parent)) + return -ENODEV; + + clk = parent; + ops = clk_dev_ops(clk->dev); + } /* get private clock struct used for cache */ clk_get_priv(clk, &clkp); -- 2.39.2

5 16

[PATCH] nand: Add a watch command
by Miquel Raynal 02 Dec '24

02 Dec '24

This is a debug command to monitor the retention state of the data on the array. The command needs a duplication of the mtd_read_oob() function to actually return the maximum number of bitflips encountered while reading the page. We could write a specific implementation for the Sunxi driver but this is probably enough. nand watch <off> <size> - check an area for bitflips nand watch.part <part> - check a partition for bitflips nand watch.chip - check the whole device for bitflips The output may be a bit verbose and could look like: => nand watch.chip device 0 whole chip size adjusted to 0xff60000 (5 bad blocks) NAND watch for bitflips in area 0x0-0xff60000: Page 0 (0x00000000) -> error -74 Page 1 (0x00000800) -> error -74 Page 2 (0x00001000) -> error -74 Page 3 (0x00001800) -> error -74 Page 4 (0x00002000) -> error -74 Page 5 (0x00002800) -> error -74 Page 6 (0x00003000) -> error -74 Page 7 (0x00003800) -> error -74 Page 8 (0x00004000) -> error -74 Page 9 (0x00004800) -> error -74 Page 10 (0x00005000) -> error -74 Page 11 (0x00005800) -> error -74 Page 12 (0x00006000) -> error -74 Page 13 (0x00006800) -> error -74 Page 14 (0x00007000) -> error -74 Page 15 (0x00007800) -> error -74 Page 16 (0x00008000) -> error -74 Page 17 (0x00008800) -> error -74 Page 18 (0x00009000) -> error -74 Page 19 (0x00009800) -> error -74 Page 20 (0x0000a000) -> error -74 Page 21 (0x0000a800) -> error -74 Page 22 (0x0000b000) -> error -74 Page 23 (0x0000b800) -> error -74 Page 1110 (0x0022b000) -> up to 1 bf/chunk Page 1122 (0x00231000) -> up to 1 bf/chunk Page 1132 (0x00236000) -> up to 1 bf/chunk Page 1362 (0x002a9000) -> up to 1 bf/chunk Page 4990 (0x009bf000) -> up to 1 bf/chunk Page 5728 (0x00b30000) -> up to 1 bf/chunk Page 7116 (0x00de6000) -> up to 1 bf/chunk Page 7160 (0x00dfc000) -> up to 1 bf/chunk Page 7494 (0x00ea3000) -> up to 1 bf/chunk Page 10842 (0x0152d000) -> up to 1 bf/chunk Page 11614 (0x016af000) -> up to 1 bf/chunk Page 11970 (0x01761000) -> up to 1 bf/chunk Page 12536 (0x0187c000) -> up to 1 bf/chunk Page 12687 (0x018c7800) -> up to 1 bf/chunk Page 14298 (0x01bed000) -> up to 1 bf/chunk Page 18268 (0x023ae000) -> up to 1 bf/chunk Page 18760 (0x024a4000) -> up to 1 bf/chunk Page 21440 (0x029e0000) -> up to 1 bf/chunk Page 22336 (0x02ba0000) -> up to 1 bf/chunk Page 22592 (0x02c20000) -> up to 1 bf/chunk Page 23872 (0x02ea0000) -> up to 1 bf/chunk Page 27584 (0x035e0000) -> up to 1 bf/chunk Page 35008 (0x04460000) -> up to 1 bf/chunk Page 37184 (0x048a0000) -> up to 1 bf/chunk Page 41728 (0x05180000) -> up to 1 bf/chunk Page 42176 (0x05260000) -> up to 1 bf/chunk Page 43200 (0x05460000) -> up to 1 bf/chunk Page 43328 (0x054a0000) -> up to 1 bf/chunk Page 45376 (0x058a0000) -> up to 1 bf/chunk Page 47040 (0x05be0000) -> up to 1 bf/chunk Page 47552 (0x05ce0000) -> up to 1 bf/chunk Page 49344 (0x06060000) -> up to 1 bf/chunk Page 49856 (0x06160000) -> up to 1 bf/chunk Page 62784 (0x07aa0000) -> up to 1 bf/chunk Page 65153 (0x07f40800) -> up to 1 bf/chunk Page 65228 (0x07f66000) -> up to 1 bf/chunk Page 65382 (0x07fb3000) -> up to 1 bf/chunk Page 98624 (0x0c0a0000) -> up to 1 bf/chunk Page 101952 (0x0c720000) -> up to 1 bf/chunk Page 107584 (0x0d220000) -> up to 1 bf/chunk Page 118208 (0x0e6e0000) -> up to 1 bf/chunk Page 126656 (0x0f760000) -> up to 1 bf/chunk Page 127680 (0x0f960000) -> up to 1 bf/chunk Page 129920 (0x0fdc0000) -> up to 1 bf/chunk Maximum number of bitflips: 1 Pages with bitflips: 44/130752 It is also possible to reduce the output with the .quiet suffix in order to just show the summary. => nand watch.chip device 0 whole chip size adjusted to 0xff60000 (5 bad blocks) NAND watch for bitflips in area 0x0-0xff60000: Maximum number of bitflips: 1 Pages with bitflips: 44/130752 Signed-off-by: Miquel Raynal <miquel.raynal(a)bootlin.com> --- Hello, I recently came across a batch of NANDs with a lot of "natural" bitflips so in order to easily and objectively characterize how unstable these parts were, I wrote this little tool which was pretty handy to have in U-Boot. I believe it can be useful for others as well, so here is the patch. Cheers, Miquèl cmd/Kconfig | 5 ++ cmd/nand.c | 103 ++++++++++++++++++++++++++++++++++++++++ drivers/mtd/mtdcore.c | 22 +++++++++ include/linux/mtd/mtd.h | 1 + 4 files changed, 131 insertions(+) diff --git a/cmd/Kconfig b/cmd/Kconfig index 451baa3ecac..0524328d373 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1384,6 +1384,11 @@ config CMD_NAND_TORTURE help NAND torture support. +config CMD_NAND_WATCH + bool "nand watch" + help + NAND watch bitflip support. + endif # CMD_NAND config CMD_NVME diff --git a/cmd/nand.c b/cmd/nand.c index 71b8f964429..3bf67f5b65e 100644 --- a/cmd/nand.c +++ b/cmd/nand.c @@ -231,6 +231,54 @@ free_dat: return ret; } +#ifdef CONFIG_CMD_NAND_WATCH +static int nand_watch_bf(struct mtd_info *mtd, ulong off, ulong size, bool quiet) +{ + unsigned int max_bf = 0, pages_wbf = 0; + unsigned int first_page, pages, i; + struct mtd_oob_ops ops = {}; + u_char *buf; + int ret; + + buf = memalign(ARCH_DMA_MINALIGN, mtd->writesize); + if (!buf) { + puts("No memory for page buffer\n"); + return 1; + } + + first_page = off / mtd->writesize; + pages = size / mtd->writesize; + + ops.datbuf = buf; + ops.len = mtd->writesize; + for (i = first_page; i < first_page + pages; i++) { + ulong addr = mtd->writesize * i; + ret = mtd_read_oob_bf(mtd, addr, &ops); + if (ret < 0) { + if (quiet) + continue; + + printf("Page %7d (0x%08lx) -> error %d\n", + i, addr, ret); + } else if (ret) { + max_bf = max(max_bf, (unsigned int)ret); + pages_wbf++; + if (quiet) + continue; + printf("Page %7d (0x%08lx) -> up to %2d bf/chunk\n", + i, addr, ret); + } + } + + printf("Maximum number of bitflips: %u\n", max_bf); + printf("Pages with bitflips: %u/%u\n", pages_wbf, pages); + + free(buf); + + return 0; +} +#endif + /* ------------------------------------------------------------------------- */ static int set_dev(int dev) @@ -778,6 +826,55 @@ static int do_nand(struct cmd_tbl *cmdtp, int flag, int argc, return ret == 0 ? 0 : 1; } +#ifdef CONFIG_CMD_NAND_WATCH + if (strncmp(cmd, "watch", 5) == 0) { + int args = 2; + + if (cmd[5]) { + if (!strncmp(&cmd[5], ".part", 5)) { + args = 1; + } else if (!strncmp(&cmd[5], ".chip", 5)) { + args = 0; + } else { + goto usage; + } + } + + if (cmd[10]) + if (!strncmp(&cmd[10], ".quiet", 6)) + quiet = true; + + if (argc != 2 + args) + goto usage; + + ret = mtd_arg_off_size(argc - 2, argv + 2, &dev, &off, &size, + &maxsize, MTD_DEV_TYPE_NAND, mtd->size); + if (ret) + return ret; + + /* size is unspecified */ + if (argc < 4) + adjust_size_for_badblocks(&size, off, dev); + + if ((off & (mtd->writesize - 1)) || + (size & (mtd->writesize - 1))) { + printf("Attempt to read non page-aligned data\n"); + return -EINVAL; + } + + ret = set_dev(dev); + if (ret) + return ret; + + mtd = get_nand_dev_by_index(dev); + + printf("\nNAND watch for bitflips in area 0x%llx-0x%llx:\n", + off, off + size); + + return nand_watch_bf(mtd, off, size, quiet); + } +#endif + #ifdef CONFIG_CMD_NAND_TORTURE if (strcmp(cmd, "torture") == 0) { loff_t endoff; @@ -943,6 +1040,12 @@ U_BOOT_LONGHELP(nand, "nand erase.chip [clean] - erase entire chip'\n" "nand bad - show bad blocks\n" "nand dump[.oob] off - dump page\n" +#ifdef CONFIG_CMD_NAND_WATCH + "nand watch <off> <size> - check an area for bitflips\n" + "nand watch.part <part> - check a partition for bitflips\n" + "nand watch.chip - check the whole device for bitflips\n" + "\t\t.quiet - Query only the summary, not the details\n" +#endif #ifdef CONFIG_CMD_NAND_TORTURE "nand torture off - torture one block at offset\n" "nand torture off [size] - torture blocks from off to off+size\n" diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c index aa78d41a55e..2baf92a9056 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -1126,6 +1126,28 @@ int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops) } EXPORT_SYMBOL_GPL(mtd_read_oob); +/* This is a bare copy of mtd_read_oob returning the actual number of bitflips */ +int mtd_read_oob_bf(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops) +{ + int ret_code; + ops->retlen = ops->oobretlen = 0; + if (!mtd->_read_oob) + return -EOPNOTSUPP; + /* + * In cases where ops->datbuf != NULL, mtd->_read_oob() has semantics + * similar to mtd->_read(), returning a non-negative integer + * representing max bitflips. In other cases, mtd->_read_oob() may + * return -EUCLEAN. In all cases, perform similar logic to mtd_read(). + */ + ret_code = mtd->_read_oob(mtd, from, ops); + if (unlikely(ret_code < 0)) + return ret_code; + if (mtd->ecc_strength == 0) + return 0; /* device lacks ecc */ + return ret_code; +} +EXPORT_SYMBOL_GPL(mtd_read_oob_bf); + int mtd_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops) { diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 09f52698877..28afbb86ea9 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -413,6 +413,7 @@ int mtd_panic_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops); +int mtd_read_oob_bf(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops); int mtd_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops); int mtd_get_fact_prot_info(struct mtd_info *mtd, size_t len, size_t *retlen, -- 2.34.1

2 2

[PATCH 1/4] virtio: blk: introduce virtio-block erase support
by Dmitrii Merkurev 26 Nov '24

26 Nov '24

Co-developed-by: Cody Schuffelen <schuffelen(a)google.com> Signed-off-by: Cody Schuffelen <schuffelen(a)google.com> Signed-off-by: Dmitrii Merkurev <dimorinny(a)google.com> Cc: Tuomas Tynkkynen <tuomas.tynkkynen(a)iki.fi> Cc: Simon Glass <sjg(a)chromium.org> Cc: Mattijs Korpershoek <mkorpershoek(a)baylibre.com> Cc: Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org> --- drivers/virtio/virtio_blk.c | 91 +++++++++++++++++++++++++++++++------ drivers/virtio/virtio_blk.h | 47 +++++++++++++++++++ 2 files changed, 124 insertions(+), 14 deletions(-) diff --git a/drivers/virtio/virtio_blk.c b/drivers/virtio/virtio_blk.c index 9581058286..225b65c4d1 100644 --- a/drivers/virtio/virtio_blk.c +++ b/drivers/virtio/virtio_blk.c @@ -19,30 +19,82 @@ struct virtio_blk_priv { struct virtqueue *vq; }; +static const u32 feature[] = { + VIRTIO_BLK_F_WRITE_ZEROES +}; + +static void virtio_blk_init_header_sg(struct udevice *dev, u64 sector, u32 type, + struct virtio_blk_outhdr *out_hdr, struct virtio_sg *sg) +{ + const bool sector_is_needed = type == VIRTIO_BLK_T_IN || + type == VIRTIO_BLK_T_OUT; + + out_hdr->type = cpu_to_virtio32(dev, type); + out_hdr->sector = cpu_to_virtio64(dev, sector_is_needed ? sector : 0); + + sg->addr = out_hdr; + sg->length = sizeof(*out_hdr); +} + +static void virtio_blk_init_write_zeroes_sg(struct udevice *dev, u64 sector, lbaint_t blkcnt, + struct virtio_blk_discard_write_zeroes *wz, + struct virtio_sg *sg) +{ + wz->sector = cpu_to_virtio64(dev, sector); + wz->num_sectors = cpu_to_virtio32(dev, blkcnt); + wz->flags = cpu_to_virtio32(dev, 0); + + sg->addr = wz; + sg->length = sizeof(*wz); +} + +static void virtio_blk_init_status_sg(u8 *status, struct virtio_sg *sg) +{ + sg->addr = status; + sg->length = sizeof(*status); +} + +static void virtio_blk_init_data_sg(void *buffer, lbaint_t blkcnt, struct virtio_sg *sg) +{ + sg->addr = buffer; + sg->length = blkcnt * 512; +} + static ulong virtio_blk_do_req(struct udevice *dev, u64 sector, lbaint_t blkcnt, void *buffer, u32 type) { struct virtio_blk_priv *priv = dev_get_priv(dev); + struct virtio_blk_outhdr out_hdr; + struct virtio_blk_discard_write_zeroes wz_hdr; unsigned int num_out = 0, num_in = 0; + struct virtio_sg hdr_sg, wz_sg, data_sg, status_sg; struct virtio_sg *sgs[3]; u8 status; int ret; - struct virtio_blk_outhdr out_hdr = { - .type = cpu_to_virtio32(dev, type), - .sector = cpu_to_virtio64(dev, sector), - }; - struct virtio_sg hdr_sg = { &out_hdr, sizeof(out_hdr) }; - struct virtio_sg data_sg = { buffer, blkcnt * 512 }; - struct virtio_sg status_sg = { &status, sizeof(status) }; - + virtio_blk_init_header_sg(dev, sector, type, &out_hdr, &hdr_sg); sgs[num_out++] = &hdr_sg; - if (type & VIRTIO_BLK_T_OUT) - sgs[num_out++] = &data_sg; - else - sgs[num_out + num_in++] = &data_sg; - + switch (type) { + case VIRTIO_BLK_T_IN: + case VIRTIO_BLK_T_OUT: + virtio_blk_init_data_sg(buffer, blkcnt, &data_sg); + if (type & VIRTIO_BLK_T_OUT) + sgs[num_out++] = &data_sg; + else + sgs[num_out + num_in++] = &data_sg; + break; + + case VIRTIO_BLK_T_WRITE_ZEROES: + virtio_blk_init_write_zeroes_sg(dev, sector, blkcnt, &wz_hdr, &wz_sg); + sgs[num_out++] = &wz_sg; + break; + + default: + return -EINVAL; + } + + virtio_blk_init_status_sg(&status, &status_sg); sgs[num_out + num_in++] = &status_sg; log_debug("dev=%s, active=%d, priv=%p, priv->vq=%p\n", dev->name, device_active(dev), priv, priv->vq); @@ -76,6 +128,15 @@ static ulong virtio_blk_write(struct udevice *dev, lbaint_t start, VIRTIO_BLK_T_OUT); } +static ulong virtio_blk_erase(struct udevice *dev, lbaint_t start, + lbaint_t blkcnt) +{ + if (!virtio_has_feature(dev, VIRTIO_BLK_F_WRITE_ZEROES)) + return -EOPNOTSUPP; + + return virtio_blk_do_req(dev, start, blkcnt, NULL, VIRTIO_BLK_T_WRITE_ZEROES); +} + static int virtio_blk_bind(struct udevice *dev) { struct virtio_dev_priv *uc_priv = dev_get_uclass_priv(dev->parent); @@ -105,7 +166,8 @@ static int virtio_blk_bind(struct udevice *dev) desc->bdev = dev; /* Indicate what driver features we support */ - virtio_driver_features_init(uc_priv, NULL, 0, NULL, 0); + virtio_driver_features_init(uc_priv, feature, ARRAY_SIZE(feature), + NULL, 0); return 0; } @@ -132,6 +194,7 @@ static int virtio_blk_probe(struct udevice *dev) static const struct blk_ops virtio_blk_ops = { .read = virtio_blk_read, .write = virtio_blk_write, + .erase = virtio_blk_erase, }; U_BOOT_DRIVER(virtio_blk) = { diff --git a/drivers/virtio/virtio_blk.h b/drivers/virtio/virtio_blk.h index 8d8e02fa2e..b37ba264df 100644 --- a/drivers/virtio/virtio_blk.h +++ b/drivers/virtio/virtio_blk.h @@ -17,6 +17,8 @@ #define VIRTIO_BLK_F_BLK_SIZE 6 /* Block size of disk is available */ #define VIRTIO_BLK_F_TOPOLOGY 10 /* Topology information is available */ #define VIRTIO_BLK_F_MQ 12 /* Support more than one vq */ +#define VIRTIO_BLK_F_DISCARD 13 /* Discard is supported */ +#define VIRTIO_BLK_F_WRITE_ZEROES 14 /* Write zeroes is supported */ /* Legacy feature bits */ #ifndef VIRTIO_BLK_NO_LEGACY @@ -65,6 +67,39 @@ struct __packed virtio_blk_config { /* number of vqs, only available when VIRTIO_BLK_F_MQ is set */ __u16 num_queues; + + /* the next 3 entries are guarded by VIRTIO_BLK_F_DISCARD */ + /* + * The maximum discard sectors (in 512-byte sectors) for + * one segment. + */ + __u32 max_discard_sectors; + /* + * The maximum number of discard segments in a + * discard command. + */ + __u32 max_discard_seg; + /* Discard commands must be aligned to this number of sectors. */ + __u32 discard_sector_alignment; + + /* the next 3 entries are guarded by VIRTIO_BLK_F_WRITE_ZEROES */ + /* + * The maximum number of write zeroes sectors (in 512-byte sectors) in + * one segment. + */ + __u32 max_write_zeroes_sectors; + /* + * The maximum number of segments in a write zeroes + * command. + */ + __u32 max_write_zeroes_seg; + /* + * Set if a VIRTIO_BLK_T_WRITE_ZEROES request may result in the + * deallocation of one or more of the sectors. + */ + __u8 write_zeroes_may_unmap; + + __u8 unused1[3]; }; /* @@ -93,6 +128,9 @@ struct __packed virtio_blk_config { /* Get device ID command */ #define VIRTIO_BLK_T_GET_ID 8 +/* Write zeroes command */ +#define VIRTIO_BLK_T_WRITE_ZEROES 13 + #ifndef VIRTIO_BLK_NO_LEGACY /* Barrier before this op */ #define VIRTIO_BLK_T_BARRIER 0x80000000 @@ -112,6 +150,15 @@ struct virtio_blk_outhdr { __virtio64 sector; }; +struct virtio_blk_discard_write_zeroes { + /* discard/write zeroes start sector */ + __virtio64 sector; + /* number of discard/write zeroes sectors */ + __virtio32 num_sectors; + /* flags for this range */ + __virtio32 flags; +}; + #ifndef VIRTIO_BLK_NO_LEGACY struct virtio_scsi_inhdr { __virtio32 errors; -- 2.44.0.278.ge034bb2e1d-goog

4 11

[PATCH] mtd: spi-nor: Add support for Macronix flash part
by Tejas Bhumkar 15 Nov '24

15 Nov '24

Added support for Macronix OSPI flash parts MX25UM51345G and MX66UM2G45G, with initial testing conducted on the Tenzing-se1 board using STR mode for basic erase, write, and readback operations. Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar(a)amd.com> --- drivers/mtd/spi/spi-nor-ids.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index f86e7ff8e5..a08f105549 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -267,6 +267,8 @@ const struct flash_info spi_nor_ids[] = { { INFO("mx66l2g45g", 0xc2201c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx25l1633e", 0xc22415, 0, 64 * 1024, 32, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SECT_4K) }, { INFO("mx25r6435f", 0xc22817, 0, 64 * 1024, 128, SECT_4K) }, + { INFO("mx25um51345g", 0xc2813a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_4B_OPCODES) }, + { INFO("mx66um2g45g", 0xc2803c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_4B_OPCODES) }, { INFO("mx66uw2g345gx0", 0xc2943c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx66lm1g45g", 0xc2853b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx25lm51245g", 0xc2853a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, -- 2.37.6

4 3

[PATCH] mtd: spi-nor: Clear Winbond SR3 WPS bit on boot
by Marek Vasut 24 Oct '24

24 Oct '24

Some Winbond SPI NORs have special SR3 register which is used among other things to control whether non-standard "Individual Block/Sector Write Protection" (WPS bit) locking scheme is activated. This non-standard locking scheme is not supported by either U-Boot or Linux SPI NOR stack so make sure it is disabled, otherwise the SPI NOR may appear locked for no obvious reason. This SR3 WPS appears e.g. on W25Q16FW which has the same ID as W25Q16DW, but the W25Q16DW does not implement the SR3 WPS bit. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: Hai Pham <hai.pham.ud(a)renesas.com> Cc: Heinrich Schuchardt <xypron.glpk(a)gmx.de> Cc: Jagan Teki <jagan(a)amarulasolutions.com> Cc: Johann Neuhauser <jneuhauser(a)dh-electronics.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Takahiro Kuwano <Takahiro.Kuwano(a)infineon.com> Cc: Venkatesh Yadav Abbarapu <venkatesh.abbarapu(a)amd.com> Cc: Vignesh R <vigneshr(a)ti.com> --- drivers/mtd/spi/spi-nor-core.c | 47 ++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 5 ++++ 2 files changed, 52 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 9a1801ba93d..68dee57258d 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -544,6 +544,24 @@ static int read_cr(struct spi_nor *nor) } #endif +/** + * read_sr3() - Read status register 3 unique to newer Winbond flashes + * @nor: pointer to a 'struct spi_nor' + */ +static int read_sr3(struct spi_nor *nor) +{ + int ret; + u8 val; + + ret = nor->read_reg(nor, SPINOR_OP_RDSR3, &val, 1); + if (ret < 0) { + dev_dbg(nor->dev, "error %d reading SR3\n", ret); + return ret; + } + + return val; +} + /* * Write status register 1 byte * Returns negative if error occurred. @@ -554,6 +572,17 @@ static int write_sr(struct spi_nor *nor, u8 val) return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1); } +/** + * write_sr3() - Write status register 3 unique to newer Winbond flashes + * @nor: pointer to a 'struct spi_nor' + * @val: value to be written into SR3 + */ +static int write_sr3(struct spi_nor *nor, u8 val) +{ + nor->cmd_buf[0] = val; + return nor->write_reg(nor, SPINOR_OP_WRSR3, nor->cmd_buf, 1); +} + /* * Set write enable latch with Write Enable command. * Returns negative if error occurred. @@ -3890,6 +3919,24 @@ static int spi_nor_init(struct spi_nor *nor) write_enable(nor); write_sr(nor, 0); spi_nor_wait_till_ready(nor); + + /* + * Some Winbond SPI NORs have special SR3 register which is + * used among other things to control whether non-standard + * "Individual Block/Sector Write Protection" (WPS bit) + * locking scheme is activated. This non-standard locking + * scheme is not supported by either U-Boot or Linux SPI + * NOR stack so make sure it is disabled, otherwise the + * SPI NOR may appear locked for no obvious reason. + */ + if (JEDEC_MFR(nor->info) == SNOR_MFR_WINBOND) { + err = read_sr3(nor); + if (err > 0 && err & SR3_WPS) { + write_enable(nor); + write_sr3(nor, err & ~SR3_WPS); + write_disable(nor); + } + } } if (nor->quad_enable) { diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 2861b73edbc..ceb32e3906f 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -45,6 +45,8 @@ #define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */ #define SPINOR_OP_RDSR2 0x3f /* Read status register 2 */ #define SPINOR_OP_WRSR2 0x3e /* Write status register 2 */ +#define SPINOR_OP_RDSR3 0x15 /* Read status register 3 */ +#define SPINOR_OP_WRSR3 0x11 /* Write status register 3 */ #define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */ #define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */ #define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */ @@ -185,6 +187,9 @@ /* Status Register 2 bits. */ #define SR2_QUAD_EN_BIT7 BIT(7) +/* Status Register 3 bits. */ +#define SR3_WPS BIT(2) + /* For Cypress flash. */ #define SPINOR_OP_RD_ANY_REG 0x65 /* Read any register */ #define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */ -- 2.43.0

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