February 2024 - U-Boot

[PATCH v2] arm: mach-k3: Refactor QoS settings
by Aradhya Bhatia 01 Mar '24

01 Mar '24

Refactor common QoS code into a new common header file, and the soc specific setup_qos functions into a common API. Rename $(soc)_qos_count and $(soc)_qos_data variables to qos_count and qos_data. When QoS settings of more SoCs are added, only one pair will be defined at a time, based on the config SOC_K3_$(soc). This refactoring has been done for 2 major purposes. - The auto-generated $(soc)_qos_data.c and $(soc)_qos.h files cannot have any code that is specific to any bootloader. Those files have to remain agnostic of different bootloader implementations and their header files. - The existing implementation was less than ideal and would have enabled multiple $(soc)_qos_count and $(soc)_qos_data variables for all SoC variants. Signed-off-by: Aradhya Bhatia <a-bhatia1(a)ti.com> --- Change Log: - new in v2: - Move K3_QOS config to the r5/Kconfig. Previous versions: - v1: https://lore.kernel.org/all/20240206085610.3226136-1-a-bhatia1@ti.com/ --- arch/arm/mach-k3/am62a7_init.c | 14 ------------ arch/arm/mach-k3/common.c | 12 ++++++++++ arch/arm/mach-k3/common.h | 8 +++++++ arch/arm/mach-k3/include/mach/hardware.h | 9 -------- arch/arm/mach-k3/include/mach/k3-qos.h | 22 +++++++++++++++++++ arch/arm/mach-k3/r5/Kconfig | 8 +++++++ arch/arm/mach-k3/r5/am62ax/Makefile | 2 +- .../{include/mach => r5/am62ax}/am62a_qos.h | 0 .../{am62a_qos_data.c => am62a_qos_uboot.c} | 9 ++++---- 9 files changed, 56 insertions(+), 28 deletions(-) create mode 100644 arch/arm/mach-k3/include/mach/k3-qos.h rename arch/arm/mach-k3/{include/mach => r5/am62ax}/am62a_qos.h (100%) rename arch/arm/mach-k3/r5/am62ax/{am62a_qos_data.c => am62a_qos_uboot.c} (85%) diff --git a/arch/arm/mach-k3/am62a7_init.c b/arch/arm/mach-k3/am62a7_init.c index d72e19936b9b..080274e3af58 100644 --- a/arch/arm/mach-k3/am62a7_init.c +++ b/arch/arm/mach-k3/am62a7_init.c @@ -69,20 +69,6 @@ static void ctrl_mmr_unlock(void) mmr_unlock(PADCFG_MMR1_BASE, 1); } -#if (IS_ENABLED(CONFIG_CPU_V7R)) -static void setup_qos(void) -{ - u32 i; - - for (i = 0; i < am62a_qos_count; i++) - writel(am62a_qos_data[i].val, (uintptr_t)am62a_qos_data[i].reg); -} -#else -static void setup_qos(void) -{ -} -#endif - void board_init_f(ulong dummy) { struct udevice *dev; diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index f411366778f0..b54f2ddc4729 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -28,6 +28,8 @@ #include <elf.h> #include <soc.h> +#include <asm/arch/k3-qos.h> + #if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF) enum { IMAGE_ID_ATF, @@ -595,3 +597,13 @@ int misc_init_r(void) void __weak do_board_detect(void) { } + +#if (IS_ENABLED(CONFIG_K3_QOS)) +void setup_qos(void) +{ + u32 i; + + for (i = 0; i < qos_count; i++) + writel(qos_data[i].val, (uintptr_t)qos_data[i].reg); +} +#endif diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index e9db9fbfb63d..53aa186b31a4 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -45,3 +45,11 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size); struct ti_sci_handle *get_ti_sci_handle(void); void do_board_detect(void); void ti_secure_image_check_binary(void **p_image, size_t *p_size); + +#if (IS_ENABLED(CONFIG_K3_QOS)) +void setup_qos(void); +#else +static inline void setup_qos(void) +{ +} +#endif diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h index a1a9dfbde66c..52ef82e70b07 100644 --- a/arch/arm/mach-k3/include/mach/hardware.h +++ b/arch/arm/mach-k3/include/mach/hardware.h @@ -30,7 +30,6 @@ #ifdef CONFIG_SOC_K3_AM62A7 #include "am62a_hardware.h" -#include "am62a_qos.h" #endif /* Assuming these addresses and definitions stay common across K3 devices */ @@ -97,12 +96,4 @@ struct rom_extended_boot_data { u32 num_components; }; -struct k3_qos_data { - u32 reg; - u32 val; -}; - -extern struct k3_qos_data am62a_qos_data[]; -extern u32 am62a_qos_count; - #endif /* _ASM_ARCH_HARDWARE_H_ */ diff --git a/arch/arm/mach-k3/include/mach/k3-qos.h b/arch/arm/mach-k3/include/mach/k3-qos.h new file mode 100644 index 000000000000..e00e1de5b9cb --- /dev/null +++ b/arch/arm/mach-k3/include/mach/k3-qos.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Quality of Service (QoS) Configuration Header File + * + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ + */ +#ifndef _K3_QOS_H_ +#define _K3_QOS_H_ + +#include <linux/kernel.h> + +struct k3_qos_data { + u32 reg; + u32 val; +}; + +#if (IS_ENABLED(CONFIG_K3_QOS)) +extern struct k3_qos_data qos_data[]; +extern u32 qos_count; +#endif + +#endif /* _K3_QOS_H_ */ diff --git a/arch/arm/mach-k3/r5/Kconfig b/arch/arm/mach-k3/r5/Kconfig index ae79f8ff6cde..940a6dc4f4d0 100644 --- a/arch/arm/mach-k3/r5/Kconfig +++ b/arch/arm/mach-k3/r5/Kconfig @@ -1,6 +1,14 @@ config K3_LOAD_SYSFW bool +config K3_QOS + bool "Enable Quality of Service (QoS) Settings for TI K3 SoCs" + default y if SOC_K3_AM62A7 + help + This option enables the R5 SPL to apply QoS settings for various + HW controllers inside the TI K3 SoCs. The files for QoS settings are + generated from Sysconfig and k3-resource-partitioning tools. + config K3_SYSFW_IMAGE_NAME string "File name of SYSFW firmware and configuration blob" depends on K3_LOAD_SYSFW diff --git a/arch/arm/mach-k3/r5/am62ax/Makefile b/arch/arm/mach-k3/r5/am62ax/Makefile index 02a941805e9a..e4e55ce5c7dd 100644 --- a/arch/arm/mach-k3/r5/am62ax/Makefile +++ b/arch/arm/mach-k3/r5/am62ax/Makefile @@ -4,4 +4,4 @@ obj-y += clk-data.o obj-y += dev-data.o -obj-y += am62a_qos_data.o +obj-y += am62a_qos_uboot.o diff --git a/arch/arm/mach-k3/include/mach/am62a_qos.h b/arch/arm/mach-k3/r5/am62ax/am62a_qos.h similarity index 100% rename from arch/arm/mach-k3/include/mach/am62a_qos.h rename to arch/arm/mach-k3/r5/am62ax/am62a_qos.h diff --git a/arch/arm/mach-k3/r5/am62ax/am62a_qos_data.c b/arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c similarity index 85% rename from arch/arm/mach-k3/r5/am62ax/am62a_qos_data.c rename to arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c index 38db4f2f5c8e..9a82944d5fe9 100644 --- a/arch/arm/mach-k3/r5/am62ax/am62a_qos_data.c +++ b/arch/arm/mach-k3/r5/am62ax/am62a_qos_uboot.c @@ -5,10 +5,11 @@ * * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ -#include <asm/arch/hardware.h> -#include "common.h" -struct k3_qos_data am62a_qos_data[] = { +#include <asm/arch/k3-qos.h> +#include "am62a_qos.h" + +struct k3_qos_data qos_data[] = { /* modules_qosConfig0 - 1 endpoints, 4 channels */ { .reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 0, @@ -43,4 +44,4 @@ struct k3_qos_data am62a_qos_data[] = { }, }; -uint32_t am62a_qos_count = sizeof(am62a_qos_data) / sizeof(am62a_qos_data[0]); +u32 qos_count = ARRAY_SIZE(qos_data); base-commit: e8f2404e093daf6cc3ac2b3233e3c6770d13e371 -- 2.34.1

3 3

[PATCH] pylibfdt: Fix "invalid escape sequence '\w'" in setup.py
by Tom Rini 01 Mar '24

01 Mar '24

From: Florian Schmaus <flo(a)geekplace.eu> Once u-boot's build system invokes python3 scripts/dtc/pylibfdt/setup.py --quiet build_ext --inplace it may fail with scripts/dtc/pylibfdt/setup.py:40: SyntaxWarning: invalid escape sequence '\w' RE_KEY_VALUE = re.compile('(?P<key>\w+) *(?P<plus>[+])?= *(?P<value>.*)$') depending on the used Python version. Explicitly mark the regex string as raw string to avoid the warning. Signed-off-by: Florian Schmaus <flo(a)geekplace.eu> --- scripts/dtc/pylibfdt/setup.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/dtc/pylibfdt/setup.py b/scripts/dtc/pylibfdt/setup.py index 8baae08770ca..c6fe5a6a446f 100755 --- a/scripts/dtc/pylibfdt/setup.py +++ b/scripts/dtc/pylibfdt/setup.py @@ -37,7 +37,7 @@ long_description = fh.read() # Decodes a Makefile assignment line into key and value (and plus for +=) -RE_KEY_VALUE = re.compile('(?P<key>\w+) *(?P<plus>[+])?= *(?P<value>.*)$') +RE_KEY_VALUE = re.compile(r'(?P<key>\w+) *(?P<plus>[+])?= *(?P<value>.*)$') def get_top_builddir(): if '--top-builddir' in sys.argv:

2 2

[PATCH 1/1] dtoc: avoid invalid escape sequence '\s'
by Heinrich Schuchardt 01 Mar '24

01 Mar '24

\s is not a valid escape sequence in strings. Mark regular expressions with r''. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- tools/dtoc/src_scan.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/tools/dtoc/src_scan.py b/tools/dtoc/src_scan.py index 3bef59d616..2437200a42 100644 --- a/tools/dtoc/src_scan.py +++ b/tools/dtoc/src_scan.py @@ -291,8 +291,8 @@ class Scanner: """ structs = {} - re_struct = re.compile('^struct ([a-z0-9_]+) {$') - re_asm = re.compile('../arch/[a-z0-9]+/include/asm/(.*)') + re_struct = re.compile(r'^struct ([a-z0-9_]+) {$') + re_asm = re.compile(r'../arch/[a-z0-9]+/include/asm/(.*)') prefix = '' for line in buff.splitlines(): # Handle line continuation @@ -470,8 +470,8 @@ class Scanner: re_of_match = re.compile( r'\.of_match\s*=\s*(of_match_ptr$)?([a-z0-9_]+)([^,]*),') - re_phase = re.compile('^\s*DM_PHASE\((.*)$.*$') - re_hdr = re.compile('^\s*DM_HEADER$(.*)$.*$') + re_phase = re.compile(r'^\s*DM_PHASE$(.*)$.*$') + re_hdr = re.compile(r'^\s*DM_HEADER$(.*)$.*$') re_alias = re.compile(r'DM_DRIVER_ALIAS$\s*(\w+)\s*,\s*(\w+)\s*$') # Matches the struct name for priv, plat -- 2.43.0

2 1

[PATCH v2 0/7] toradex: fix reset and hardware detection regressions
by Francesco Dolcini 01 Mar '24

01 Mar '24

From: Francesco Dolcini <francesco.dolcini(a)toradex.com> This series fixes two regressions affecting multiple Toradex boards (i.MX, TI and TEGRA based) and targets the current master, e.g. v2024.04 release. U-Boot `reset` command is broken on all Tordex i.MX6* based SoMs since v2023.07, this series fixes it enabling the `wdt-reboot` driver. Since v2024.04-rc1 reading the Toradex configuration block is not working properly anymore, the serial number and the hardware version are not read correctly, preventing the board from functioning correctly (wrong mac address, wrong DT, ...). This is fixed by reading the config block in `EVT_SETTINGS_R` and adding a toradex sysinfo driver. In addition to that, we now use a random mac address in case the config block is invalid. Reported-by: Sahaj Sarup <sahaj.sarup(a)linaro.org> Closes: https://lore.kernel.org/all/CAKZ1LvM45MB8N0CqgU+C7i9=Bjb6kqNTxWo2Tv407HKLWt… Reported-by: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> Closes: https://lore.kernel.org/all/e40ed93bd8f371ec56b8fc451dcb458f3ce6dcba.camel@… Reported-by: Francesco Dolcini <francesco(a)dolcini.it> Closes: https://lore.kernel.org/all/ZY2ZDWAQuTlRjV9H@francesco-nb/ v2: - add Marcel acked and tested-by - remove CONFIG_NET_RANDOM_ETHADDR from verdin-am62_r5_defconfig v1: https://lore.kernel.org/all/20240220182926.101161-1-francesco@dolcini.it/ Emanuele Ghidoli (6): toradex: Fix recursive call to checkboard toradex: Remove not necessary model prints from checkboard() toradex: common: Use SETTINGS_R event to read toradex config block arm: dts: Refactor device trees using "&{/aliases}" syntax toradex: common: Add sysinfo driver toradex: common: Use random mac address if toradex config block is missing Parth Pancholi (1): toradex: imx6*: fix reset using wdt-reboot driver arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi | 6 + arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi | 6 + .../dts/imx6dl-colibri-eval-v3-u-boot.dtsi | 28 +++- arch/arm/dts/imx6q-apalis-eval-u-boot.dtsi | 36 +++-- .../dts/imx6ull-colibri-eval-v3-u-boot.dtsi | 14 ++ .../arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi | 14 +- .../dts/imx8mm-verdin-wifi-dev-u-boot.dtsi | 16 +- .../dts/imx8mp-verdin-wifi-dev-u-boot.dtsi | 16 +- .../dts/k3-am625-verdin-wifi-dev-u-boot.dtsi | 4 + arch/arm/dts/tegra124-apalis-u-boot.dtsi | 12 ++ arch/arm/dts/tegra20-colibri-u-boot.dtsi | 12 ++ arch/arm/dts/tegra30-apalis-u-boot.dtsi | 12 ++ arch/arm/dts/tegra30-colibri-u-boot.dtsi | 12 ++ .../arm/dts/vf610-colibri-eval-v3-u-boot.dtsi | 4 + board/toradex/apalis-imx8/apalis-imx8.c | 10 -- board/toradex/apalis-tk1/apalis-tk1.c | 7 - board/toradex/apalis_imx6/apalis_imx6.c | 21 --- board/toradex/apalis_t30/apalis_t30.c | 8 - .../toradex/colibri-imx6ull/colibri-imx6ull.c | 7 - board/toradex/colibri-imx8x/colibri-imx8x.c | 10 -- board/toradex/colibri_imx6/colibri_imx6.c | 20 --- board/toradex/colibri_imx7/colibri_imx7.c | 8 - board/toradex/colibri_t20/colibri_t20.c | 10 -- board/toradex/colibri_t30/colibri_t30.c | 7 - board/toradex/colibri_vf/colibri_vf.c | 10 -- board/toradex/common/Kconfig | 1 + board/toradex/common/tdx-common.c | 137 +++++++++++++----- board/toradex/common/tdx-common.h | 1 - configs/apalis-imx8_defconfig | 1 + configs/apalis-tk1_defconfig | 1 + configs/apalis_imx6_defconfig | 4 + configs/apalis_t30_defconfig | 1 + configs/colibri-imx6ull-emmc_defconfig | 4 + configs/colibri-imx6ull_defconfig | 4 + configs/colibri-imx8x_defconfig | 1 + configs/colibri_imx6_defconfig | 4 + configs/colibri_imx7_defconfig | 1 + configs/colibri_imx7_emmc_defconfig | 1 + configs/colibri_t20_defconfig | 1 + configs/colibri_t30_defconfig | 1 + configs/colibri_vf_defconfig | 1 + configs/verdin-am62_a53_defconfig | 1 + configs/verdin-imx8mm_defconfig | 1 + configs/verdin-imx8mp_defconfig | 1 + 44 files changed, 283 insertions(+), 194 deletions(-) create mode 100644 arch/arm/dts/tegra124-apalis-u-boot.dtsi create mode 100644 arch/arm/dts/tegra20-colibri-u-boot.dtsi create mode 100644 arch/arm/dts/tegra30-apalis-u-boot.dtsi create mode 100644 arch/arm/dts/tegra30-colibri-u-boot.dtsi -- 2.39.2

3 9

[PATCH v5 00/39] Qualcomm generic board support
by Caleb Connolly 01 Mar '24

01 Mar '24

Historically, Qualcomm boards in U-Boot have all had their own board/qualcomm/xyz directory, their own CONFIG_TARGET_XYZ option, their own hardcoded sysmap-xyz.c file, and their own U-Boot specific devicetree with little/no compatibility with upstream DT. This series makes a few final prepatory changes, and then replaces almost all of the board specific code with generic alternatives. The end result is that all Qualcomm boards both current and future (with the exception of the db410c and db820c) can be supported by a single U-Boot binary by just providing the correct DT. New boards can be added without introducing any addition mach/ or board/ code or config options. Due to the nature of this change, the patch ("mach-snapdragon: generalise board support") has become pretty big, I tried a few different ways to represent this in git history, but the other methods (e.g. adding a stub "generic" target and removing it again) were more confusing and made for much messier git history. The current patch is mostly atomic, but requires regenerating the config. The QCS404 EVB board had some code to enable the USB VBUS regulator, this is dropped in favour of a adding a new vbus-supply property to the dwc3-generic driver. This will also be used by the dragonboard845c in a future patch. This handles the common case of a board requiring some regulator be enabled for USB host mode. A more detailed description of the changes is below. == Memory map == The memory map was historically hardcoded into U-Boot, this meant that U-Boot had to be built for a specific variant of a device. This is changed to instead read the memory map from the DT /memory node. Additionally, most boards mapped addresss 0x0 as valid, as a result if a null pointer access happens then it will cause a bus stall (and board hang). This is fixed so that null pointer accesses will now correctly throw an exception. == DT loading == Previously, boards used the FDT blob embedded into U-Boot (via OF_SEPARATE). However, most Qualcomm boards run U-Boot as a secondary bootloader, so we can instead rely on the first-stage bootloader to populate some useful FDT properties for us (notably the /memory node and KASLR seed) and fetch the DTB that it provides. Combined with the memory map changes above, this let's us entirely avoid configuring the memory map explicitly. == defconfig == Most of the board defconfigs and config headers were quite similar, to simplify maintenance going forward, all the fully generic boards (sdm845 and qcs404-evb so far) are adapted to use the new qcom_defconfig. Going forward, all new Qualcomm boards should be supported by this defconfig. A notable exception is for specific usecases (like U-Boot as the primary bootloader). == The older dragonboards == The db410c and db820c both have some custom board init code, as a result they aren't yet binary compatible. mach-snapdragon is adjusted so that all the necessary config options (e.g. CONFIG_SYS_BOARD) can be set from their defconfigs, this makes it possible to enable support for new boards without introducing additional config options. The db410c can run U-Boot either chainloaded like the other boards, or as a first-stage bootloader replacing aboot. However it was hardcoded to only build for the latter option. This series introduces a new "chainloaded" defconfig to enable easier testing via fastboot. == dynamic environment variables == This series also introduces runtime-allocated load addresses via the lmb allocator. This allows for booting on boards with vastly different memory layouts without any pre-calculation or macro magic in the config header. This feature is based on similar code in mach-apple. The soc, board, and fdtfile environment variables are also generated automatically. Many Qualcomm boards follow a similar scheme for DTB naming such that the name can often be derived from the root compatible properties. This is intended to cover the most common cases and be a simple solution for booting generic distro images without having to explicitly choose the right DTB. The U-Boot DTS can be tweaked if necessary to produce the correct name, the variable can be overwritten, or a bootloader like GRUB can load the devicetree instead. == Upstream DT == All Qualcomm boards have had their devicetree files replaced with the upstream versions. Previous patch series made the necessary driver adjustments to fully support the upstream DT format. All future Qualcomm boards should use upstream DTS by default. Once Sumit's work to import dt-rebasing has been merged, we will drop the imported DT and bindings again. --- I have tested this series on the Dragonboard410c, Dragonboard820c, and Dragonboard845c. Sumit has tested this on the db410c and QCS404 EVB board. --- Changes in v5: - Adjust msm_sdhci clock handling patch to have clearer error handling based on feedback from Dan. - Adjust dwc3 vbus-supply patch to be more readable and handle error paths better based on feedback from Jonas. - Add a helper function for determining if a pin is "special" in the pinctrl/gpio drivers, set special_pins_start for all SoCs and avoid modifying const driver data at runtime. - Add a comment to clarify that the pmic gpio readonly quirk is a workaround and not expected behaviour for the platforms where it's necessary. - Link to v4: https://lore.kernel.org/r/20240215-b4-qcom-common-target-v4-0-ed06355c634a@… Changes in v4: - Drop unreachable return in ehci_usb_of_bind() - Adjust error reporting in msm_sdc_clk_init() to not print ret which will always be 0. - Simplify qcom_pmic_gpio and associated pinctrrl driver. - Fix the bit clock divider on QCS404 (thanks Sumit). - Make QCS404 pinctrl driver compatible with upstream DT. - Fix qcs404_clk_set_rate() return values + move some things that should be in enable. - Optimise reserved memory carveout algorithm and fix the last regions always getting skipped. - Adjust APQ8016 to probe the pinctrl driver pre-relocation so that UART can be initialised. - Stub in support for special pins in the Qualcomm pinctrl driver - we don't support them yet but in most cases they're already configured correctly and can be safely skipped. - Improve readability of sdhci msm_sdc_clk_init() and use log_warning() instead of printf(). - Add missing CONFIG_SAVE_PREV_BL options to qcom_defconfig - Document known issue only affecting qcs404 where in the msm_sdhci driver the xo_board clock somehow becomes associated with the qcom_clock device resulting in qcs404_clk_set_rate() being called for clock id 0. This doesn't seem to cause any issues but has proven somewhat elusive to debug. - Add a link to the APQ8016 TRM in doc/board/qualcomm/dragonboard410c.rst - Link to v3: https://lore.kernel.org/r/20240130-b4-qcom-common-target-v3-0-e523cbf9e556@… Changes in v3: - Remove dragonboard410c.dts file - Introduce generic board_usb_init() function. - Remove db410c specific dead code (smem RAM layout) - Fix pinctrl DT compatibility for msm8916/msm8996 - Reference git tag where DT and headers were taken from Linux. - Adjust ramdisk allocation size to 128M - Improve documentation wording, reference buildman - Fix mapping for reserved regions to avoid speculative pre-fetching - Apply quicksort to memory banks read from DT to ensure ordering - Link to v2: https://lore.kernel.org/r/20231219-b4-qcom-common-target-v2-0-b6dd9704219e@… Changes in v2: - Split DTS changes to reduce patch size. - Import full board DTS files from Linux too, and introduce -u-boot.dtsi files where necessary to make any U-Boot specific changes. - Add a pinctrl driver for qcom PMIC GPIOs - Always enable LINUX_KERNEL_IMAGE_HEADER - Link to v1: https://lore.kernel.org/r/20231121-b4-qcom-common-target-v1-0-9492198e0c15@… To: Neil Armstrong <neil.armstrong(a)linaro.org> To: Sumit Garg <sumit.garg(a)linaro.org> To: Ramon Fried <rfried.dev(a)gmail.com> Cc: Marek Vasut <marex(a)denx.de> To: Dzmitry Sankouski <dsankouski(a)gmail.com> To: Caleb Connolly <caleb.connolly(a)linaro.org> To: Peng Fan <peng.fan(a)nxp.com> To: Jaehoon Chung <jh80.chung(a)samsung.com> To: Rayagonda Kokatanur <rayagonda.kokatanur(a)broadcom.com> To: Lukasz Majewski <lukma(a)denx.de> To: Sean Anderson <seanga2(a)gmail.com> To: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz(a)gmail.com> To: Stephan Gerhold <stephan(a)gerhold.net> Cc: <u-boot(a)lists.denx.de> --- Caleb Connolly (39): arm: init: export prev_bl_fdt_addr usb: dwc3-generic: support external vbus regulator mmc: msm_sdhci: use modern clock handling dt-bindings: drop msm_sdhci binding clk/qcom: use upstream compatible properties clock/qcom: qcs404: fix clk_set_rate serial: msm: add debug UART serial: msm: fix clock handling and pinctrl gpio: qcom_pmic: 1-based GPIOs gpio: qcom_pmic: add a quirk to skip GPIO configuration gpio: qcom_pmic: add pinctrl driver sandbox: dts: fix qcom pmic gpio pinctrl: qcom: stub support for special GPIOs pinctrl: qcom: fix DT compatibility pinctrl: qcom: apq8016: init pre-reloaction board: dragonboard410c: add chainloaded config fragment board: dragonboard410c: upstream DT compat board: dragonboard410c: import board code from mach-snapdragon board: dragonboard820c: use LINUX_KERNEL_IMAGE_HEADER mach-snapdragon: generalise board support mach-snapdragon: dynamic load addresses mach-snapdragon: generate fdtfile automatically mach-snapdragon: carve out no-map regions board: qcs404-evb: drop board code doc: board/qualcomm: document generic targets doc: board/qualcomm: link to APQ8016 TRM dt-bindings: import headers for SDM845 dts: sdm845: import supporting dtsi files dts: sdm845: replace with upstream DTS dt-bindings: import headers for MSM8916 dts: msm8916: import PMIC dtsi files dts: msm8916: replace with upstream DTS dt-bindings: import headers for MSM8996 dts: msm8996: import PMIC dtsi files dts: dragonboard820c: use correct bindings for clocks dts: msm8996: replace with upstream DTS dt-bindings: import headers for qcs404 dts: qcs404-evb: replace with upstream DT MAINTAINERS: Qualcomm: add some missing paths MAINTAINERS | 12 +- arch/arm/Kconfig | 4 + arch/arm/dts/Makefile | 9 +- arch/arm/dts/apq8016-sbc-u-boot.dtsi | 20 + arch/arm/dts/apq8016-sbc.dts | 729 +++ arch/arm/dts/apq8096-db820c-u-boot.dtsi | 14 + arch/arm/dts/apq8096-db820c.dts | 1137 ++++ arch/arm/dts/dragonboard410c-uboot.dtsi | 44 - arch/arm/dts/dragonboard410c.dts | 209 - arch/arm/dts/dragonboard820c-uboot.dtsi | 32 - arch/arm/dts/dragonboard820c.dts | 151 - arch/arm/dts/dragonboard845c-uboot.dtsi | 26 - arch/arm/dts/dragonboard845c.dts | 48 - arch/arm/dts/msm8916-pm8916.dtsi | 157 + arch/arm/dts/msm8916.dtsi | 2702 +++++++++ arch/arm/dts/msm8996.dtsi | 3884 +++++++++++++ arch/arm/dts/pm8916.dtsi | 178 + arch/arm/dts/pm8994.dtsi | 152 + arch/arm/dts/pm8998.dtsi | 130 + arch/arm/dts/pmi8994.dtsi | 65 + arch/arm/dts/pmi8998.dtsi | 98 + arch/arm/dts/pms405.dtsi | 149 + arch/arm/dts/qcs404-evb-4000-u-boot.dtsi | 48 + arch/arm/dts/qcs404-evb-4000.dts | 96 + arch/arm/dts/qcs404-evb-uboot.dtsi | 30 - arch/arm/dts/qcs404-evb.dts | 390 -- arch/arm/dts/qcs404-evb.dtsi | 389 ++ arch/arm/dts/qcs404.dtsi | 1829 ++++++ arch/arm/dts/sdm845-db845c.dts | 1190 ++++ .../arm/dts/sdm845-samsung-starqltechn-u-boot.dtsi | 16 + arch/arm/dts/sdm845-samsung-starqltechn.dts | 460 ++ arch/arm/dts/sdm845-wcd9340.dtsi | 86 + arch/arm/dts/sdm845.dtsi | 5801 +++++++++++++++++++- arch/arm/dts/starqltechn-uboot.dtsi | 27 - arch/arm/dts/starqltechn.dts | 68 - arch/arm/lib/save_prev_bl_data.c | 5 + arch/arm/mach-snapdragon/Kconfig | 95 +- arch/arm/mach-snapdragon/Makefile | 8 +- arch/arm/mach-snapdragon/board.c | 468 ++ arch/arm/mach-snapdragon/dram.c | 99 - arch/arm/mach-snapdragon/include/mach/dram.h | 12 - arch/arm/mach-snapdragon/include/mach/gpio.h | 7 + arch/arm/mach-snapdragon/include/mach/misc.h | 13 - arch/arm/mach-snapdragon/init_sdm845.c | 73 - arch/arm/mach-snapdragon/misc.c | 55 - arch/arm/mach-snapdragon/sysmap-apq8016.c | 31 - arch/arm/mach-snapdragon/sysmap-apq8096.c | 31 - arch/arm/mach-snapdragon/sysmap-qcs404.c | 43 - arch/arm/mach-snapdragon/sysmap-sdm845.c | 31 - arch/sandbox/dts/sandbox.dtsi | 9 +- board/qualcomm/dragonboard410c/Kconfig | 15 - board/qualcomm/dragonboard410c/Makefile | 2 +- .../dragonboard410c/configs/chainloaded.config | 7 + board/qualcomm/dragonboard410c/dragonboard410c.c | 130 +- board/qualcomm/dragonboard820c/Kconfig | 15 - board/qualcomm/dragonboard820c/Makefile | 1 - board/qualcomm/dragonboard820c/dragonboard820c.c | 39 +- board/qualcomm/dragonboard820c/head.S | 33 - board/qualcomm/dragonboard820c/u-boot.lds | 111 - board/qualcomm/dragonboard845c/Kconfig | 12 - board/qualcomm/qcs404-evb/Kconfig | 15 - board/qualcomm/qcs404-evb/Makefile | 6 - board/qualcomm/qcs404-evb/qcs404-evb.c | 62 - configs/dragonboard410c_defconfig | 8 +- configs/dragonboard820c_defconfig | 8 +- configs/dragonboard845c_defconfig | 29 - configs/qcom_defconfig | 67 + configs/qcs404evb_defconfig | 55 - configs/starqltechn_defconfig | 41 - doc/board/qualcomm/board.rst | 125 + doc/board/qualcomm/debugging.rst | 61 + doc/board/qualcomm/dragonboard410c.rst | 2 + doc/board/qualcomm/index.rst | 4 +- doc/board/qualcomm/qcs404.rst | 79 - doc/board/qualcomm/sdm845.rst | 167 - doc/device-tree-bindings/mmc/msm_sdhci.txt | 25 - doc/device-tree-bindings/usb/ehci-msm.txt | 10 - drivers/clk/qcom/clock-apq8016.c | 9 +- drivers/clk/qcom/clock-apq8096.c | 7 +- drivers/clk/qcom/clock-qcs404.c | 25 +- drivers/gpio/msm_gpio.c | 20 + drivers/gpio/qcom_pmic_gpio.c | 277 +- drivers/mmc/msm_sdhci.c | 69 +- drivers/phy/qcom/msm8916-usbh-phy.c | 4 +- drivers/pinctrl/qcom/pinctrl-apq8016.c | 34 +- drivers/pinctrl/qcom/pinctrl-apq8096.c | 21 +- drivers/pinctrl/qcom/pinctrl-ipq4019.c | 5 +- drivers/pinctrl/qcom/pinctrl-qcom.c | 12 + drivers/pinctrl/qcom/pinctrl-qcs404.c | 64 +- drivers/pinctrl/qcom/pinctrl-sdm845.c | 5 +- drivers/serial/Kconfig | 8 + drivers/serial/serial_msm.c | 62 +- drivers/usb/dwc3/dwc3-generic.c | 24 +- drivers/usb/host/ehci-msm.c | 22 +- include/configs/dragonboard845c.h | 20 - include/configs/qcom.h | 21 + include/configs/qcs404-evb.h | 20 - include/configs/sdm845.h | 26 - include/dt-bindings/arm/coresight-cti-dt.h | 37 + include/dt-bindings/clock/qcom,camcc-sdm845.h | 116 + include/dt-bindings/clock/qcom,dispcc-sdm845.h | 56 + include/dt-bindings/clock/qcom,gcc-msm8916.h | 179 + include/dt-bindings/clock/qcom,gcc-msm8996.h | 362 ++ include/dt-bindings/clock/qcom,gpucc-sdm845.h | 24 + include/dt-bindings/clock/qcom,lpass-sdm845.h | 15 + include/dt-bindings/clock/qcom,mmcc-msm8996.h | 295 + include/dt-bindings/clock/qcom,rpmcc.h | 174 + include/dt-bindings/clock/qcom,rpmh.h | 37 + include/dt-bindings/clock/qcom,turingcc-qcs404.h | 15 + include/dt-bindings/clock/qcom,videocc-sdm845.h | 35 + include/dt-bindings/dma/qcom-gpi.h | 11 + include/dt-bindings/firmware/qcom,scm.h | 39 + include/dt-bindings/iio/qcom,spmi-vadc.h | 300 + include/dt-bindings/interconnect/qcom,msm8916.h | 100 + .../dt-bindings/interconnect/qcom,msm8996-cbf.h | 12 + include/dt-bindings/interconnect/qcom,msm8996.h | 163 + include/dt-bindings/interconnect/qcom,osm-l3.h | 15 + include/dt-bindings/interconnect/qcom,sdm845.h | 150 + include/dt-bindings/phy/phy-qcom-qmp.h | 20 + include/dt-bindings/phy/phy-qcom-qusb2.h | 37 + include/dt-bindings/pinctrl/qcom,pmic-gpio.h | 164 + include/dt-bindings/pinctrl/qcom,pmic-mpp.h | 106 + include/dt-bindings/power/qcom-rpmpd.h | 412 ++ .../dt-bindings/regulator/qcom,rpmh-regulator.h | 36 + include/dt-bindings/reset/qcom,gcc-msm8916.h | 100 + include/dt-bindings/reset/qcom,sdm845-aoss.h | 17 + include/dt-bindings/reset/qcom,sdm845-pdc.h | 22 + include/dt-bindings/soc/qcom,apr.h | 28 + include/dt-bindings/soc/qcom,rpmh-rsc.h | 14 + include/dt-bindings/sound/apq8016-lpass.h | 9 + include/dt-bindings/sound/qcom,lpass.h | 46 + include/dt-bindings/sound/qcom,q6afe.h | 9 + include/dt-bindings/sound/qcom,q6asm.h | 26 + include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h | 234 + include/dt-bindings/sound/qcom,wcd9335.h | 15 + include/init.h | 11 + 136 files changed, 24033 insertions(+), 2652 deletions(-) --- base-commit: 1a66a7768af7e8106c2cd93a19f4013877fb85ae // Caleb (they/them)

2 44

[PATCH] test: dm: add button_cmd test
by Caleb Connolly 01 Mar '24

01 Mar '24

Add a test for the button_cmd feature. This validates that commands can be mapped to two buttons, that the correct command runs based on which button is pressed, that only 1 command is run, and that no command runs if button_cmd_0_name is wrong or unset. CONFIG_BUTTON is now enabled automatically and was removed when running save_defconfig. Signed-off-by: Caleb Connolly <caleb.connolly(a)linaro.org> --- configs/sandbox_defconfig | 2 +- test/dm/button.c | 96 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 97 insertions(+), 1 deletion(-) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index a8df5e635b26..93b52f2de5cf 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -10,6 +10,7 @@ CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x00100000 CONFIG_SYS_MEMTEST_END=0x00101000 +CONFIG_BUTTON_CMD=y CONFIG_FIT=y CONFIG_FIT_RSASSA_PSS=y CONFIG_FIT_CIPHER=y @@ -166,7 +167,6 @@ CONFIG_DM_BOOTCOUNT=y CONFIG_DM_BOOTCOUNT_RTC=y CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y CONFIG_DM_BOOTCOUNT_SYSCON=y -CONFIG_BUTTON=y CONFIG_BUTTON_ADC=y CONFIG_BUTTON_GPIO=y CONFIG_CLK=y diff --git a/test/dm/button.c b/test/dm/button.c index 3318668df25a..830d96fbef34 100644 --- a/test/dm/button.c +++ b/test/dm/button.c @@ -131,3 +131,99 @@ static int dm_test_button_keys_adc(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_button_keys_adc, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* Test of the button uclass using the button_gpio driver */ +static int dm_test_button_cmd(struct unit_test_state *uts) +{ + struct udevice *btn1_dev, *btn2_dev, *gpio; + const char *envstr; + +#define BTN1_GPIO 3 +#define BTN2_GPIO 4 +#define BTN1_PASS_VAR "test_button_cmds_0" +#define BTN2_PASS_VAR "test_button_cmds_1" + + /* + * Buttons 1 and 2 are connected to gpio_a gpios 3 and 4 respectively. + * set the GPIOs to known values and then check that the appropriate + * commands are run when invoking process_button_cmds(). + */ + ut_assertok(uclass_get_device(UCLASS_BUTTON, 1, &btn1_dev)); + ut_assertok(uclass_get_device(UCLASS_BUTTON, 2, &btn2_dev)); + ut_assertok(uclass_get_device(UCLASS_GPIO, 1, &gpio)); + + /* + * Map a command to button 1 and check that it process_button_cmds() + * runs it if called with button 1 pressed. + */ + ut_assertok(env_set("button_cmd_0_name", "button1")); + ut_assertok(env_set("button_cmd_0", "env set " BTN1_PASS_VAR " PASS")); + ut_assertok(sandbox_gpio_set_value(gpio, BTN1_GPIO, 1)); + /* Sanity check that the button is actually pressed */ + ut_asserteq(BUTTON_ON, button_get_state(btn1_dev)); + process_button_cmds(); + ut_assertnonnull((envstr = env_get(BTN1_PASS_VAR))); + ut_asserteq_str(envstr, "PASS"); + + /* Clear result */ + ut_assertok(env_set(BTN1_PASS_VAR, NULL)); + + /* + * Map a command for button 2, press it, check that only the command + * for button 1 runs because it comes first and is also pressed. + */ + ut_assertok(env_set("button_cmd_1_name", "button2")); + ut_assertok(env_set("button_cmd_1", "env set " BTN2_PASS_VAR " PASS")); + ut_assertok(sandbox_gpio_set_value(gpio, BTN2_GPIO, 1)); + ut_asserteq(BUTTON_ON, button_get_state(btn2_dev)); + process_button_cmds(); + /* Check that button 1 triggered again */ + ut_assertnonnull((envstr = env_get(BTN1_PASS_VAR))); + ut_asserteq_str(envstr, "PASS"); + /* And button 2 didn't */ + ut_assertnull(env_get(BTN2_PASS_VAR)); + + /* Clear result */ + ut_assertok(env_set(BTN1_PASS_VAR, NULL)); + + /* + * Release button 1 and check that the command for button 2 is run + */ + ut_assertok(sandbox_gpio_set_value(gpio, BTN1_GPIO, 0)); + process_button_cmds(); + ut_assertnull(env_get(BTN1_PASS_VAR)); + /* Check that the command for button 2 ran */ + ut_assertnonnull((envstr = env_get(BTN2_PASS_VAR))); + ut_asserteq_str(envstr, "PASS"); + + /* Clear result */ + ut_assertok(env_set(BTN2_PASS_VAR, NULL)); + + /* + * Unset "button_cmd_0_name" and check that no commands run even + * with both buttons pressed. + */ + ut_assertok(env_set("button_cmd_0_name", NULL)); + /* Press button 1 (button 2 is already pressed )*/ + ut_assertok(sandbox_gpio_set_value(gpio, BTN1_GPIO, 1)); + ut_asserteq(BUTTON_ON, button_get_state(btn1_dev)); + process_button_cmds(); + ut_assertnull(env_get(BTN1_PASS_VAR)); + ut_assertnull(env_get(BTN2_PASS_VAR)); + + /* + * Check that no command is run if the button name is wrong. + */ + ut_assertok(env_set("button_cmd_0_name", "invalid_button")); + process_button_cmds(); + ut_assertnull(env_get(BTN1_PASS_VAR)); + ut_assertnull(env_get(BTN2_PASS_VAR)); + +#undef BTN1_PASS_VAR +#undef BTN2_PASS_VAR +#undef BTN1_GPIO +#undef BTN2_GPIO + + return 0; +} +DM_TEST(dm_test_button_cmd, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- 2.43.1

2 1

[PATCH v2 1/1] net: ti: am65-cpsw-nuss: Remove incorrect RGMII_ID bit functionality
by Ken Sloat 01 Mar '24

01 Mar '24

The CPSW implementations on the AM6x platforms do not support the selectable RGMII TX clk delay functionality via the RGMII_ID_MODE bit as the earlier platforms did. While it is possible to write the bit, according to various TI AM6x datasheets, reference manuals, hardware design guides and TI forum posts from TI, this bit is "not timed, tested or characterized. RGMII_ID is enabled by default." The driver implementation today however, will incorrectly set this bit whenever the interface mode is in RGMII_ID or RGMII_TXID. Since disabling the delay (bit=1) is not supported by TI, this bit should always be written as 0. See: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1… https://www.ti.com/lit/pdf/spruiv7 (Rev. B Figure 14-1717) https://www.ti.com/lit/gpn/am625 (Rev. B Figure 7-31 Note A) https://www.ti.com/lit/an/sprad05b/sprad05b.pdf (Rev. B Section 7.4) Signed-off-by: Ken Sloat <ken.s(a)variscite.com> --- Notes: Changes in v2: -Explicitly clear RGMII_ID bit in all cases -Clarify commit message based on items in v1 review drivers/net/ti/am65-cpsw-nuss.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c index 6da018c0f9..0836da1583 100644 --- a/drivers/net/ti/am65-cpsw-nuss.c +++ b/drivers/net/ti/am65-cpsw-nuss.c @@ -250,13 +250,13 @@ out: #define AM65_GMII_SEL_MODE_SGMII 3 #define AM65_GMII_SEL_RGMII_IDMODE BIT(4) +#define AM6X_GMII_SEL_MODE_SEL_MASK GENMASK(2, 0) static int am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv, phy_interface_t phy_mode) { struct udevice *dev = priv->dev; u32 offset, reg, phandle; - bool rgmii_id = false; fdt_addr_t gmii_sel; u32 mode = 0; ofnode node; @@ -296,7 +296,6 @@ static int am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv, case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_TXID: mode = AM65_GMII_SEL_MODE_RGMII; - rgmii_id = true; break; case PHY_INTERFACE_MODE_SGMII: @@ -313,15 +312,16 @@ static int am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv, break; }; - if (rgmii_id) - mode |= AM65_GMII_SEL_RGMII_IDMODE; + /* RGMII_ID_MODE = 1 is not supported */ + reg &= ~AM65_GMII_SEL_RGMII_IDMODE; + reg &= ~AM6X_GMII_SEL_MODE_SEL_MASK; + reg |= mode; - reg = mode; dev_dbg(dev, "gmii_sel PHY mode: %u, new gmii_sel: %08x\n", phy_mode, reg); writel(reg, gmii_sel); - reg = readl(gmii_sel); + reg = AM6X_GMII_SEL_MODE_SEL_MASK & readl(gmii_sel); if (reg != mode) { dev_err(dev, "gmii_sel PHY mode NOT SET!: requested: %08x, gmii_sel: %08x\n", -- 2.34.1

3 2

[RFC PATCH 0/6] Clean up arm linker scripts
by Ilias Apalodimas 01 Mar '24

01 Mar '24

The arm linker scripts had a mix of symbols and C defined variables in an effort to emit relative references instead of absolute ones e.g [0]. This has led to confusion over the years, ending up with mixed section definitions. Some sections being defined with overlays and different definitions between v7 and v8 architectures. For example __efi_runtime_rel_start/end is defined as a linker symbol for armv8 and a C variable in armv7. I am not sure if this used to be a compiler bug, but linker scripts nowadays can emit relative references, as long as the symbol definition is contained within the section definition. So let's switch most of the C defined variables and clean up the arm sections.c file. There's still a few symbols remaining -- __secure_start/end, __secure_stack_start/end and __end which can be cleaned up in a followup series. The resulting binary (tested in QEMU v7/v8) had no size differences apart from the emited sections and object types of those variables. I've also added prints throughout the U-Boot init sequence. The offsets and delta for 'end - start' section sizes is unchanged. For example on QEMU v8: $~ ./scripts/bloat-o-meter u-boot u-boot.new add/remove: 0/0 grow/shrink: 0/0 up/down: 0/0 (0) Function old new delta Total: Before=798861, After=798861, chg +0.00% $~ readelf -sW u-boot | grep bss_s 12: 00000000001029b8 0 SECTION LOCAL DEFAULT 12 .bss_start 8088: 0000000000000018 0 NOTYPE GLOBAL DEFAULT 1 _bss_start_ofs 8376: 00000000001029b8 0 OBJECT GLOBAL DEFAULT 12 __bss_start $~ readelf -sW u-boot.new | grep bss_s 8085: 0000000000000018 0 NOTYPE GLOBAL DEFAULT 1 _bss_start_ofs 8373: 00000000001029b8 0 NOTYPE GLOBAL DEFAULT 12 __bss_start For QEMU v7 the differences are a bit bigger but only affect the variables placed in the .bss section because that was defined as an OVERLAY in the existing linker script. For example: $~ nm u-boot | grep tftp_prev_block 000ca0dc ? tftp_prev_block $~ nm u-boot.new | grep tftp_prev_block 000e0a5c b tftp_prev_block -----> The symbol is now placed into .bss It's worth noting that since the efi regions are affected by the change, booting with EFI is preferable while testing. Booting the kernel only should be enough since the efi stub and the kernel proper do request boottime and runtime services respectively. Something along the lines of > virtio scan && load virtio 0 $kernel_addr_r Image && bootefi $kernel_addr_r will work for QEMU aarch64. Tested platforms: - QEMU aarch64 - Xilinx kv260 kria starter kit & zynq - QEMU armv7 - STM32MP157C-DK2 [0] commit 3ebd1cbc49f0 ("arm: make __bss_start and __bss_end__ compiler-generated") Ilias Apalodimas (6): arm: baltos: remove custom linker script arm: clean up v7 and v8 linker scripts for bss_start/end arm: fix __efi_runtime_rel_start/end definitions arm: clean up v7 and v8 linker scripts for __rel_dyn_start/end arm: fix __efi_runtime_start/end definitions arm: move image_copy_start/end to linker symbols arch/arm/cpu/armv8/u-boot-spl.lds | 14 +-- arch/arm/cpu/armv8/u-boot.lds | 45 ++------ arch/arm/cpu/u-boot.lds | 74 +++---------- arch/arm/lib/sections.c | 10 -- arch/arm/mach-rockchip/u-boot-tpl-v8.lds | 22 +--- arch/arm/mach-zynq/u-boot.lds | 72 +++--------- board/qualcomm/dragonboard820c/u-boot.lds | 41 ++----- board/vscom/baltos/u-boot.lds | 128 ---------------------- include/asm-generic/sections.h | 3 + lib/efi_loader/efi_runtime.c | 1 + 10 files changed, 58 insertions(+), 352 deletions(-) delete mode 100644 board/vscom/baltos/u-boot.lds -- 2.37.2

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[PATCH 00/10] Add initial support for IPQ9574 based boards
by Varadarajan Narayanan 01 Mar '24

01 Mar '24

These patches introduce the initial support code needed for the QTI IPQ9574 SoC and RDP433 board. SoC : QTI IPQ9574 RAM : 2GB DDR4 Flash : eMMC 8GB WiFi : 1 x 2.4GHz, 1 x 5GHz, 1 x 6GHz New to both patman and posting to U-Boot. Please let me know if something is not correct, will try to rectify to the best of my abilities. Thanks Varada Varadarajan Narayanan (10): mach-snapdragon: Add support for IPQ9574 mach-snapdragon: ipq9574: Add SMEM defines needed for IPQ9574 clk/qcom: Add support for clock registers in IPQ9574 clk/qcom: Include IPQ9574 mach-snapdragon: Update gd->ram_size in msm_fixup_memory pinctrl: qcom: Add support for 'pull-down' pinctrl: qcom: Include IPQ9574 mmc: msm_sdhci: Handle different vendor cap register offsets mmc: msm_sdhci: Reset clocks before reconfiguration board: qualcomm: Add support for IPQ9574 RDP433 arch/arm/dts/Makefile | 2 + arch/arm/dts/ipq9574-default.dts | 167 +++ arch/arm/dts/ipq9574-rdp433-mht-phy.dts | 208 +++ arch/arm/dts/ipq9574.dtsi | 771 ++++++++++ arch/arm/mach-snapdragon/Kconfig | 15 + arch/arm/mach-snapdragon/Makefile | 1 + arch/arm/mach-snapdragon/dram.c | 10 +- .../include/mach/sysmap-ipq9574.h | 252 ++++ arch/arm/mach-snapdragon/init_ipq9574.c | 81 + board/qualcomm/ipq9574/Kconfig | 15 + board/qualcomm/ipq9574/Makefile | 4 + board/qualcomm/ipq9574/board_init.c | 326 ++++ board/qualcomm/ipq9574/ipq9574.c | 170 +++ board/qualcomm/ipq9574/ipq9574.h | 75 + board/qualcomm/ipq9574/u-boot-x32.lds | 250 ++++ board/qualcomm/ipq9574/u-boot-x64.lds | 188 +++ configs/ipq9574_mmc_defconfig | 118 ++ drivers/clk/qcom/Kconfig | 8 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clock-ipq9574.c | 1320 +++++++++++++++++ drivers/clk/qcom/clock-qcom.c | 32 + drivers/clk/qcom/clock-qcom.h | 8 + drivers/mmc/msm_sdhci.c | 21 +- drivers/pinctrl/qcom/Kconfig | 7 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-ipq9574.c | 77 + drivers/pinctrl/qcom/pinctrl-qcom.c | 2 + include/configs/ipq9574.h | 111 ++ include/dt-bindings/clock/gcc-ipq9574.h | 156 ++ include/dt-bindings/net/qti-ipqsoc.h | 20 + include/dt-bindings/pinctrl/pinctrl-ipqsoc.h | 19 + include/dt-bindings/reset/ipq9574-reset.h | 54 + include/smem.h | 78 + 33 files changed, 4563 insertions(+), 5 deletions(-) create mode 100644 arch/arm/dts/ipq9574-default.dts create mode 100644 arch/arm/dts/ipq9574-rdp433-mht-phy.dts create mode 100644 arch/arm/dts/ipq9574.dtsi create mode 100644 arch/arm/mach-snapdragon/include/mach/sysmap-ipq9574.h create mode 100644 arch/arm/mach-snapdragon/init_ipq9574.c create mode 100644 board/qualcomm/ipq9574/Kconfig create mode 100644 board/qualcomm/ipq9574/Makefile create mode 100644 board/qualcomm/ipq9574/board_init.c create mode 100644 board/qualcomm/ipq9574/ipq9574.c create mode 100644 board/qualcomm/ipq9574/ipq9574.h create mode 100644 board/qualcomm/ipq9574/u-boot-x32.lds create mode 100644 board/qualcomm/ipq9574/u-boot-x64.lds create mode 100644 configs/ipq9574_mmc_defconfig create mode 100644 drivers/clk/qcom/clock-ipq9574.c create mode 100644 drivers/pinctrl/qcom/pinctrl-ipq9574.c create mode 100644 include/configs/ipq9574.h create mode 100644 include/dt-bindings/clock/gcc-ipq9574.h create mode 100644 include/dt-bindings/net/qti-ipqsoc.h create mode 100644 include/dt-bindings/pinctrl/pinctrl-ipqsoc.h create mode 100644 include/dt-bindings/reset/ipq9574-reset.h -- 2.34.1

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[PATCH 0/5] riscv: mbv: Enhance MB-V support with also enabling SPL
by Michal Simek 01 Mar '24

01 Mar '24

Hi, enhance MB-V support with SPL configuration to support OpenSBI. All of that changes are out of generic Risc-V support that's why happy to take it via my tree. Please let me know if you want this to take via riscv subtree. Thanks, Michal Michal Simek (5): riscv: mbv: Align addresses with default DT riscv: mbv: Enable REMAKE_ELF by default riscv: mbv: Switch to OF_SEPARATE with fixed address riscv: mbv: Moving little_endian variable to data section riscv: mbv: Enable SPL and binman arch/riscv/dts/xilinx-mbv32.dts | 3 +++ board/xilinx/Kconfig | 1 + board/xilinx/common/board.c | 8 ++++++++ board/xilinx/mbv/Kconfig | 14 ++++++++++++-- board/xilinx/mbv/board.c | 10 ++++++++++ configs/xilinx_mbv32_defconfig | 23 ++++++++++++++++++----- configs/xilinx_mbv32_smode_defconfig | 25 ++++++++++++++++++++----- drivers/serial/serial_xuartlite.c | 2 +- 8 files changed, 73 insertions(+), 13 deletions(-) -- 2.36.1

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