February 2024 - U-Boot

[PATCH 02/60] net: mediatek: add support for adjusting MDIO clock
by Weijie Gao 04 Mar '24

04 Mar '24

User can assign a specific MDC speed to the eth node as follow: &eth { ... phy-mode = "usxgmii"; phy-handle = <&phy8>; mdio { clock-frequency = <10500000>; }; phy8: eth-phy@8 { compatible = "ethernet-phy-id31c3.1c12"; ... }; Signed-off-by: Bo-Cun Chen <bc-bocun.chen(a)mediatek.com> Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- drivers/net/mtk_eth.c | 35 +++++++++++++++++++++++++++++++++++ drivers/net/mtk_eth.h | 7 +++++++ 2 files changed, 42 insertions(+) diff --git a/drivers/net/mtk_eth.c b/drivers/net/mtk_eth.c index 3cfce05845..726aedad3f 100644 --- a/drivers/net/mtk_eth.c +++ b/drivers/net/mtk_eth.c @@ -137,6 +137,7 @@ struct mtk_eth_priv { int force_mode; int speed; int duplex; + int mdc; bool pn_swap; struct phy_device *phydev; @@ -1607,6 +1608,26 @@ static void mtk_eth_fifo_init(struct mtk_eth_priv *priv) mtk_pdma_write(priv, PDMA_RST_IDX_REG, RST_DTX_IDX0 | RST_DRX_IDX0); } +static void mtk_eth_mdc_init(struct mtk_eth_priv *priv) +{ + u32 divider; + + if (priv->mdc == 0) + return; + + divider = min_t(u32, DIV_ROUND_UP(MDC_MAX_FREQ, priv->mdc), MDC_MAX_DIVIDER); + + /* Configure MDC turbo mode */ + if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V3)) + mtk_gmac_rmw(priv, GMAC_MAC_MISC_REG, 0, MISC_MDC_TURBO); + else + mtk_gmac_rmw(priv, GMAC_PPSC_REG, 0, MISC_MDC_TURBO); + + /* Configure MDC divider */ + mtk_gmac_rmw(priv, GMAC_PPSC_REG, PHY_MDC_CFG, + FIELD_PREP(PHY_MDC_CFG, divider)); +} + static int mtk_eth_start(struct udevice *dev) { struct mtk_eth_priv *priv = dev_get_priv(dev); @@ -1803,6 +1824,9 @@ static int mtk_eth_probe(struct udevice *dev) noncached_alloc(priv->soc->rxd_size * NUM_RX_DESC, ARCH_DMA_MINALIGN); + /* Set MDC divider */ + mtk_eth_mdc_init(priv); + /* Set MAC mode */ if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII) mtk_xmac_init(priv); @@ -1881,6 +1905,17 @@ static int mtk_eth_of_to_plat(struct udevice *dev) priv->gmac_id = dev_read_u32_default(dev, "mediatek,gmac-id", 0); + priv->mdc = 0; + subnode = ofnode_find_subnode(dev_ofnode(dev), "mdio"); + if (ofnode_valid(subnode)) { + priv->mdc = ofnode_read_u32_default(subnode, "clock-frequency", 2500000); + if (priv->mdc > MDC_MAX_FREQ || + priv->mdc < MDC_MAX_FREQ / MDC_MAX_DIVIDER) { + printf("error: MDIO clock frequency out of range\n"); + return -EINVAL; + } + } + /* Interface mode is required */ pdata->phy_interface = dev_read_phy_mode(dev); priv->phy_interface = pdata->phy_interface; diff --git a/drivers/net/mtk_eth.h b/drivers/net/mtk_eth.h index 491cac56a8..45229c0f9a 100644 --- a/drivers/net/mtk_eth.h +++ b/drivers/net/mtk_eth.h @@ -180,6 +180,12 @@ enum mkt_eth_capabilities { /* GMAC Registers */ +#define GMAC_PPSC_REG 0x0000 +#define PHY_MDC_CFG GENMASK(29, 24) +#define MDC_TURBO BIT(20) +#define MDC_MAX_FREQ 25000000 +#define MDC_MAX_DIVIDER 63 + #define GMAC_PIAC_REG 0x0004 #define PHY_ACS_ST BIT(31) #define MDIO_REG_ADDR_S 25 @@ -197,6 +203,7 @@ enum mkt_eth_capabilities { #define P1_XGMAC_FORCE_LINK BIT(15) #define GMAC_MAC_MISC_REG 0x0010 +#define MISC_MDC_TURBO BIT(4) #define GMAC_GSW_CFG_REG 0x0080 #define GSWTX_IPG_M 0xF0000 -- 2.34.1

2 1

[PATCH 01/60] arm: dts: mt7988-sd-rfb: add SD pin driving settings
by Weijie Gao 04 Mar '24

04 Mar '24

Set SD pin driving to 4mA Signed-off-by: Dong Huang <dong.huang(a)mediatek.com> Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- arch/arm/dts/mt7988-sd-rfb.dts | 2 ++ arch/arm/dts/mt7988.dtsi | 1 + 2 files changed, 3 insertions(+) diff --git a/arch/arm/dts/mt7988-sd-rfb.dts b/arch/arm/dts/mt7988-sd-rfb.dts index a3df37d252..9aa198b84a 100644 --- a/arch/arm/dts/mt7988-sd-rfb.dts +++ b/arch/arm/dts/mt7988-sd-rfb.dts @@ -87,10 +87,12 @@ pins = "SPI2_CSB", "SPI2_MISO", "SPI2_MOSI", "SPI2_CLK", "SPI2_HOLD"; input-enable; + drive-strength = <MTK_DRIVE_4mA>; }; conf-clk { pins = "SPI2_WP"; + drive-strength = <MTK_DRIVE_4mA>; }; }; }; diff --git a/arch/arm/dts/mt7988.dtsi b/arch/arm/dts/mt7988.dtsi index ac476d5cdd..5c0c5bcfd6 100644 --- a/arch/arm/dts/mt7988.dtsi +++ b/arch/arm/dts/mt7988.dtsi @@ -9,6 +9,7 @@ #include <dt-bindings/clock/mt7988-clk.h> #include <dt-bindings/reset/mt7988-reset.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/mt65xx.h> #include <dt-bindings/phy/phy.h> / { -- 2.34.1

2 1

[PATCH] pinctrl: aspeed: add pass-through pins and siopbi/siopbo
by Ivan Mikhaylov 04 Mar '24

04 Mar '24

Add THRU0-3 and SIOPBI/SIOPBO pin groups/functions. Signed-off-by: Ivan Mikhaylov <fr0st61te(a)gmail.com> --- arch/arm/dts/ast2600.dtsi | 20 ++++++++++++++++ drivers/pinctrl/aspeed/pinctrl_ast2600.c | 30 ++++++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index beabcf14f8..43db80edfe 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -2028,6 +2028,26 @@ groups = "SPI2MOSI"; }; + pinctrl_thru0_default: thru0_default { + function = "THRU0"; + groups = "THRU0"; + }; + + pinctrl_thru1_default: thru1_default { + function = "THRU1"; + groups = "THRU1"; + }; + + pinctrl_thru2_default: thru2_default { + function = "THRU2"; + groups = "THRU2"; + }; + + pinctrl_thru3_default: thru3_default { + function = "THRU3"; + groups = "THRU3"; + }; + pinctrl_timer3_default: timer3_default { function = "TIMER3"; groups = "TIMER3"; diff --git a/drivers/pinctrl/aspeed/pinctrl_ast2600.c b/drivers/pinctrl/aspeed/pinctrl_ast2600.c index 97e8b4ec9b..8a4f9705ca 100644 --- a/drivers/pinctrl/aspeed/pinctrl_ast2600.c +++ b/drivers/pinctrl/aspeed/pinctrl_ast2600.c @@ -267,6 +267,14 @@ static struct aspeed_sig_desc fmcquad_link[] = { { 0x438, GENMASK(5, 4), 0 }, }; +static struct aspeed_sig_desc siopbi_link[] = { + { 0x418, BIT(6), 0 }, +}; + +static struct aspeed_sig_desc siopbo_link[] = { + { 0x418, BIT(5), 0 }, +}; + static struct aspeed_sig_desc spi1_link[] = { { 0x438, GENMASK(13, 11), 0 }, }; @@ -303,6 +311,22 @@ static struct aspeed_sig_desc spi2quad_link[] = { { 0x434, GENMASK(31, 30), 0 }, }; +static struct aspeed_sig_desc thru0_link[] = { + { 0x4bc, GENMASK(25, 24), 0 }, +}; + +static struct aspeed_sig_desc thru1_link[] = { + { 0x4bc, GENMASK(27, 26), 0 }, +}; + +static struct aspeed_sig_desc thru2_link[] = { + { 0x4bc, GENMASK(29, 28), 0 }, +}; + +static struct aspeed_sig_desc thru3_link[] = { + { 0x4bc, GENMASK(31, 30), 0 }, +}; + static struct aspeed_sig_desc fsi1[] = { { 0xd48, GENMASK(21, 20), 0 }, }; @@ -458,6 +482,8 @@ static const struct aspeed_group_config ast2600_groups[] = { { "EMMC", ARRAY_SIZE(emmc_link), emmc_link }, { "EMMCG8", ARRAY_SIZE(emmcg8_link), emmcg8_link }, { "FMCQUAD", ARRAY_SIZE(fmcquad_link), fmcquad_link }, + { "SIOPBI", ARRAY_SIZE(siopbi_link), siopbi_link }, + { "SIOPBO", ARRAY_SIZE(siopbo_link), siopbo_link }, { "SPI1", ARRAY_SIZE(spi1_link), spi1_link }, { "SPI1ABR", ARRAY_SIZE(spi1abr_link), spi1abr_link }, { "SPI1CS1", ARRAY_SIZE(spi1cs1_link), spi1cs1_link }, @@ -467,6 +493,10 @@ static const struct aspeed_group_config ast2600_groups[] = { { "SPI2CS1", ARRAY_SIZE(spi2cs1_link), spi2cs1_link }, { "SPI2CS2", ARRAY_SIZE(spi2cs2_link), spi2cs2_link }, { "SPI2QUAD", ARRAY_SIZE(spi2quad_link), spi2quad_link }, + { "THRU0", ARRAY_SIZE(thru0_link), thru0_link }, + { "THRU1", ARRAY_SIZE(thru1_link), thru1_link }, + { "THRU2", ARRAY_SIZE(thru2_link), thru2_link }, + { "THRU3", ARRAY_SIZE(thru3_link), thru3_link }, { "I2C1", ARRAY_SIZE(i2c1_link), i2c1_link }, { "I2C2", ARRAY_SIZE(i2c2_link), i2c2_link }, { "I2C3", ARRAY_SIZE(i2c3_link), i2c3_link }, -- 2.43.0

2 1

[PATCH 00/19] ARM: renesas: Rename R-Mobile to Renesas
by Marek Vasut 03 Mar '24

03 Mar '24

Rename R-Mobile to Renesas all over the place because the chips are made by Renesas, while only a subset of them is from the R-Mobile line. Marek Vasut (19): ARM: renesas: Drop remnants of R8A7740 support ARM: renesas: Drop unused sh_sdhi.h ARM: renesas: Drop unused mmc.h ARM: renesas: Drop unused pfc-r8a7790.h ARM: renesas: Rename rmobile_get_cpu_type() to renesas_get_cpu_type() ARM: renesas: Rename rmobile_get_cpu_rev_*() to renesas_get_cpu_rev_*() ARM: renesas: Rename RMOBILE_CPU_TYPE_* to RENESAS_CPU_TYPE_* ARM: renesas: Rename rmobile_cpuinfo_idx() to renesas_cpuinfo_idx() ARM: renesas: Rename rmobile_cpuinfo[] to renesas_cpuinfo[] ARM: renesas: Simplify weak symbols ARM: renesas: Rename rmobile_get_prr() to renesas_get_prr() ARM: renesas: Rename ARCH_RMOBILE_BOARD_STRING to ARCH_RENESAS_BOARD_STRING ARM: renesas: Rename CONFIG_ARCH_RMOBILE_EXTRAM_BOOT to CONFIG_RENESAS_EXTRAM_BOOT ARM: renesas: Rename rmobile.h to renesas.h ARM: renesas: Rename ARCH_RMOBILE to ARCH_RENESAS ARM: renesas: Rename arch-/mach-rmobile to arch-/mach-renesas ARM: renesas: Post rename fix ups mmc: renesas-sdhi: Rename rmobile_is_gen3_mmc0() to rcar_is_gen3_mmc0() git-mailrc: Add renesas entry and update rmobile entry MAINTAINERS | 2 +- Makefile | 2 +- arch/arm/Kconfig | 4 +- arch/arm/Makefile | 2 +- .../{mach-rmobile => mach-renesas}/Kconfig | 14 +- .../{mach-rmobile => mach-renesas}/Kconfig.32 | 7 +- .../{mach-rmobile => mach-renesas}/Kconfig.64 | 4 +- .../Kconfig.rcar3 | 0 .../Kconfig.rcar4 | 0 .../Kconfig.rza1 | 0 .../Kconfig.rzg2l | 0 .../Kconfig.rzn1 | 0 .../{mach-rmobile => mach-renesas}/Makefile | 1 - .../{mach-rmobile => mach-renesas}/board.c | 4 +- .../cpu_info-rcar.c | 16 +- .../cpu_info-rzg.c | 0 .../cpu_info-rzg2l.c | 10 +- arch/arm/mach-renesas/cpu_info.c | 144 + .../arm/{mach-rmobile => mach-renesas}/emac.c | 2 +- .../include/mach/boot0.h | 0 arch/arm/mach-renesas/include/mach/gpio.h | 4 + .../include/mach/irqs.h | 0 .../include/mach/r8a7790.h | 4 +- .../include/mach/r8a7791.h | 4 +- .../include/mach/r8a7792.h | 2 +- .../include/mach/r8a7793.h | 4 +- .../include/mach/r8a7794.h | 4 +- .../include/mach/rcar-base.h | 2 +- .../include/mach/rcar-gen3-base.h | 2 +- .../include/mach/rcar-gen4-base.h | 2 +- .../include/mach/rcar-mstp.h | 2 +- arch/arm/mach-renesas/include/mach/renesas.h | 56 + .../include/mach/rzg2l.h | 0 .../include/mach/sys_proto.h | 0 .../lowlevel_init_ca15.S | 2 +- .../lowlevel_init_gen3.S | 0 .../memmap-gen3.c | 0 .../memmap-rzg2l.c | 0 .../psci-r8a779a0.c | 0 arch/arm/mach-rmobile/cpu_info-r8a7740.c | 31 - arch/arm/mach-rmobile/cpu_info.c | 151 - arch/arm/mach-rmobile/include/mach/gpio.h | 9 - arch/arm/mach-rmobile/include/mach/mmc.h | 13 - .../mach-rmobile/include/mach/r8a7740-gpio.h | 572 ---- arch/arm/mach-rmobile/include/mach/r8a7740.h | 274 -- arch/arm/mach-rmobile/include/mach/rmobile.h | 58 - arch/arm/mach-rmobile/include/mach/sh_sdhi.h | 170 -- arch/arm/mach-rmobile/lowlevel_init.S | 72 - arch/arm/mach-rmobile/pfc-r8a7740.c | 2612 ----------------- arch/arm/mach-rmobile/pfc-r8a7790.h | 139 - arch/sh/lib/time.c | 2 +- board/beacon/beacon-rzg2m/Kconfig | 2 +- board/hoperun/hihope-rzg2/Kconfig | 2 +- board/hoperun/hihope-rzg2/hihope-rzg2.c | 2 +- board/renesas/alt/alt.c | 4 +- board/renesas/alt/alt_spl.c | 2 +- board/renesas/alt/qos.c | 8 +- board/renesas/blanche/blanche.c | 6 +- board/renesas/blanche/qos.c | 8 +- board/renesas/condor/Kconfig | 2 +- board/renesas/draak/Kconfig | 2 +- board/renesas/draak/draak.c | 3 +- board/renesas/eagle/Kconfig | 2 +- board/renesas/ebisu/Kconfig | 2 +- board/renesas/falcon/Kconfig | 2 +- board/renesas/falcon/falcon.c | 2 +- board/renesas/gose/gose.c | 3 +- board/renesas/gose/gose_spl.c | 2 +- board/renesas/gose/qos.c | 8 +- board/renesas/grayhawk/Kconfig | 2 +- board/renesas/grayhawk/grayhawk.c | 2 +- board/renesas/koelsch/koelsch.c | 3 +- board/renesas/koelsch/koelsch_spl.c | 2 +- board/renesas/koelsch/qos.c | 8 +- board/renesas/lager/lager.c | 6 +- board/renesas/lager/lager_spl.c | 2 +- board/renesas/lager/qos.c | 10 +- board/renesas/porter/porter.c | 3 +- board/renesas/porter/porter_spl.c | 2 +- board/renesas/porter/qos.c | 8 +- board/renesas/rcar-common/common.c | 2 +- board/renesas/rcar-common/v3-common.c | 2 +- board/renesas/rzg2l/Kconfig | 2 +- board/renesas/salvator-x/Kconfig | 2 +- board/renesas/salvator-x/salvator-x.c | 11 +- board/renesas/silk/qos.c | 8 +- board/renesas/silk/silk.c | 4 +- board/renesas/silk/silk_spl.c | 2 +- board/renesas/spider/Kconfig | 2 +- board/renesas/spider/spider.c | 2 +- board/renesas/stout/qos.c | 10 +- board/renesas/stout/stout.c | 6 +- board/renesas/stout/stout_spl.c | 2 +- board/renesas/ulcb/Kconfig | 2 +- board/renesas/ulcb/ulcb.c | 11 +- board/renesas/v3hsk/Kconfig | 2 +- board/renesas/v3msk/Kconfig | 2 +- board/renesas/whitehawk/Kconfig | 2 +- board/renesas/whitehawk/whitehawk.c | 2 +- board/silinux/ek874/Kconfig | 2 +- configs/alt_defconfig | 4 +- configs/blanche_defconfig | 4 +- configs/gose_defconfig | 4 +- configs/grpeach_defconfig | 2 +- configs/hihope_rzg2_defconfig | 2 +- configs/koelsch_defconfig | 4 +- configs/lager_defconfig | 4 +- configs/porter_defconfig | 4 +- configs/r8a77970_eagle_defconfig | 2 +- configs/r8a77970_v3msk_defconfig | 2 +- configs/r8a77980_condor_defconfig | 2 +- configs/r8a77980_v3hsk_defconfig | 2 +- configs/r8a77990_ebisu_defconfig | 2 +- configs/r8a77995_draak_defconfig | 2 +- configs/r8a779a0_falcon_defconfig | 2 +- configs/r8a779f0_spider_defconfig | 2 +- configs/r8a779g0_whitehawk_defconfig | 2 +- configs/r8a779h0_grayhawk_defconfig | 2 +- configs/rcar3_salvator-x_defconfig | 2 +- configs/rcar3_ulcb_defconfig | 2 +- configs/renesas_rzg2l_smarc_defconfig | 2 +- configs/rzg2_beacon_defconfig | 2 +- configs/rzn1_snarc_defconfig | 2 +- configs/silinux_ek874_defconfig | 2 +- configs/silk_defconfig | 4 +- configs/stout_defconfig | 4 +- doc/git-mailrc | 3 +- drivers/clk/renesas/Kconfig | 2 +- drivers/gpio/Kconfig | 2 +- drivers/i2c/Kconfig | 2 +- drivers/mmc/Kconfig | 4 +- drivers/mmc/renesas-sdhi.c | 74 +- drivers/mmc/sh_mmcif.h | 2 +- drivers/net/ravb.c | 4 +- drivers/pinctrl/Makefile | 2 +- drivers/pinctrl/renesas/Kconfig | 4 +- drivers/pinctrl/renesas/pfc-r8a7790.c | 4 +- drivers/pinctrl/renesas/pfc-r8a7794.c | 4 +- drivers/ram/Makefile | 2 +- drivers/serial/Kconfig | 4 +- drivers/spi/renesas_rpc_spi.c | 10 +- drivers/spi/sh_qspi.c | 2 +- drivers/usb/host/Kconfig | 2 +- include/configs/rcar-gen2-common.h | 2 +- include/configs/rcar-gen3-common.h | 2 +- include/configs/rcar-gen4-common.h | 2 +- include/configs/rzg2l-smarc.h | 2 +- 147 files changed, 439 insertions(+), 4355 deletions(-) rename arch/arm/{mach-rmobile => mach-renesas}/Kconfig (87%) rename arch/arm/{mach-rmobile => mach-renesas}/Kconfig.32 (96%) rename arch/arm/{mach-rmobile => mach-renesas}/Kconfig.64 (56%) rename arch/arm/{mach-rmobile => mach-renesas}/Kconfig.rcar3 (100%) rename arch/arm/{mach-rmobile => mach-renesas}/Kconfig.rcar4 (100%) rename arch/arm/{mach-rmobile => mach-renesas}/Kconfig.rza1 (100%) rename arch/arm/{mach-rmobile => mach-renesas}/Kconfig.rzg2l (100%) rename arch/arm/{mach-rmobile => mach-renesas}/Kconfig.rzn1 (100%) rename arch/arm/{mach-rmobile => mach-renesas}/Makefile (98%) rename arch/arm/{mach-rmobile => mach-renesas}/board.c (71%) rename arch/arm/{mach-rmobile => mach-renesas}/cpu_info-rcar.c (70%) rename arch/arm/{mach-rmobile => mach-renesas}/cpu_info-rzg.c (100%) rename arch/arm/{mach-rmobile => mach-renesas}/cpu_info-rzg2l.c (84%) create mode 100644 arch/arm/mach-renesas/cpu_info.c rename arch/arm/{mach-rmobile => mach-renesas}/emac.c (91%) rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/boot0.h (100%) create mode 100644 arch/arm/mach-renesas/include/mach/gpio.h rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/irqs.h (100%) rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/r8a7790.h (87%) rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/r8a7791.h (95%) rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/r8a7792.h (93%) rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/r8a7793.h (95%) rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/r8a7794.h (87%) rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/rcar-base.h (99%) rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/rcar-gen3-base.h (97%) rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/rcar-gen4-base.h (96%) rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/rcar-mstp.h (97%) create mode 100644 arch/arm/mach-renesas/include/mach/renesas.h rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/rzg2l.h (100%) rename arch/arm/{mach-rmobile => mach-renesas}/include/mach/sys_proto.h (100%) rename arch/arm/{mach-rmobile => mach-renesas}/lowlevel_init_ca15.S (97%) rename arch/arm/{mach-rmobile => mach-renesas}/lowlevel_init_gen3.S (100%) rename arch/arm/{mach-rmobile => mach-renesas}/memmap-gen3.c (100%) rename arch/arm/{mach-rmobile => mach-renesas}/memmap-rzg2l.c (100%) rename arch/arm/{mach-rmobile => mach-renesas}/psci-r8a779a0.c (100%) delete mode 100644 arch/arm/mach-rmobile/cpu_info-r8a7740.c delete mode 100644 arch/arm/mach-rmobile/cpu_info.c delete mode 100644 arch/arm/mach-rmobile/include/mach/gpio.h delete mode 100644 arch/arm/mach-rmobile/include/mach/mmc.h delete mode 100644 arch/arm/mach-rmobile/include/mach/r8a7740-gpio.h delete mode 100644 arch/arm/mach-rmobile/include/mach/r8a7740.h delete mode 100644 arch/arm/mach-rmobile/include/mach/rmobile.h delete mode 100644 arch/arm/mach-rmobile/include/mach/sh_sdhi.h delete mode 100644 arch/arm/mach-rmobile/lowlevel_init.S delete mode 100644 arch/arm/mach-rmobile/pfc-r8a7740.c delete mode 100644 arch/arm/mach-rmobile/pfc-r8a7790.h --- Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Paul Barker <paul.barker.ct(a)bp.renesas.com> Cc: Tom Rini <trini(a)konsulko.com> -- 2.43.0

3 21

[PATCH v1 0/5] TEE: minor cleanup
by Igor Opaniuk 02 Mar '24

02 Mar '24

- Address some spelling errors and typos - Support CMD_OPTEE_RPMB for SANDBOX configurations and add python tests - Remove common.h inclusion for drivers/tee Igor Opaniuk (5): tee: optee: fix description in Kconfig tee: sandbox: fix spelling errors cmd: optee_rpmb: build cmd for sandbox test: py: add optee_rpmb tests tee: remove common.h inclusion cmd/Kconfig | 4 +++- drivers/tee/broadcom/chimp_optee.c | 2 +- drivers/tee/optee/Kconfig | 2 +- drivers/tee/optee/core.c | 1 - drivers/tee/optee/i2c.c | 1 - drivers/tee/optee/rpmb.c | 1 - drivers/tee/optee/supplicant.c | 2 +- drivers/tee/sandbox.c | 10 +++++----- drivers/tee/tee-uclass.c | 1 - test/py/tests/test_optee_rpmb.py | 20 ++++++++++++++++++++ 10 files changed, 31 insertions(+), 13 deletions(-) create mode 100644 test/py/tests/test_optee_rpmb.py -- 2.34.1

7 15

[PATCH v1] cmd: md5sum: use hash_command
by Igor Opaniuk 02 Mar '24

02 Mar '24

From: Igor Opaniuk <igor.opaniuk(a)gmail.com> Drop old implementation and use hash_command() instead, as how it's currently done for crc32 and sha1sum cmds. Test: => md5sum 0x60000000 0x200 md5 for 60000000 ... 600001ff ==> e6bbbe95f5b41996f4a9b9af7bbd4050 Signed-off-by: Igor Opaniuk <igor.opaniuk(a)gmail.com> --- cmd/md5sum.c | 149 ++++----------------------------------------------- 1 file changed, 9 insertions(+), 140 deletions(-) diff --git a/cmd/md5sum.c b/cmd/md5sum.c index 0f0e1d3dd68..618265e8d50 100644 --- a/cmd/md5sum.c +++ b/cmd/md5sum.c @@ -7,7 +7,6 @@ * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. */ -#include <common.h> #include <command.h> #include <env.h> #include <image.h> @@ -15,158 +14,28 @@ #include <u-boot/md5.h> #include <asm/io.h> -/* - * Store the resulting sum to an address or variable - */ -static void store_result(const u8 *sum, const char *dest) -{ - unsigned int i; - - if (*dest == '*') { - u8 *ptr; - - ptr = (u8 *)hextoul(dest + 1, NULL); - for (i = 0; i < 16; i++) - *ptr++ = sum[i]; - } else { - char str_output[33]; - char *str_ptr = str_output; - - for (i = 0; i < 16; i++) { - sprintf(str_ptr, "%02x", sum[i]); - str_ptr += 2; - } - env_set(dest, str_output); - } -} - -#ifdef CONFIG_MD5SUM_VERIFY -static int parse_verify_sum(char *verify_str, u8 *vsum) -{ - if (*verify_str == '*') { - u8 *ptr; - - ptr = (u8 *)hextoul(verify_str + 1, NULL); - memcpy(vsum, ptr, 16); - } else { - unsigned int i; - char *vsum_str; - - if (strlen(verify_str) == 32) - vsum_str = verify_str; - else { - vsum_str = env_get(verify_str); - if (vsum_str == NULL || strlen(vsum_str) != 32) - return 1; - } - - for (i = 0; i < 16; i++) { - char *nullp = vsum_str + (i + 1) * 2; - char end = *nullp; - - *nullp = '\0'; - *(u8 *)(vsum + i) = - hextoul(vsum_str + (i * 2), NULL); - *nullp = end; - } - } - return 0; -} - -int do_md5sum(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +static int do_md5sum(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) { - ulong addr, len; - unsigned int i; - u8 output[16]; - u8 vsum[16]; - int verify = 0; + int flags = HASH_FLAG_ENV; int ac; - char * const *av; - void *buf; + char *const *av; if (argc < 3) return CMD_RET_USAGE; av = argv + 1; ac = argc - 1; - if (strcmp(*av, "-v") == 0) { - verify = 1; + if (IS_ENABLED(CONFIG_MD5SUM_VERIFY) && strcmp(*av, "-v") == 0) { + flags |= HASH_FLAG_VERIFY; av++; ac--; - if (ac < 3) - return CMD_RET_USAGE; } - addr = hextoul(*av++, NULL); - len = hextoul(*av++, NULL); - - buf = map_sysmem(addr, len); - md5_wd(buf, len, output, CHUNKSZ_MD5); - unmap_sysmem(buf); - - if (!verify) { - printf("md5 for %08lx ... %08lx ==> ", addr, addr + len - 1); - for (i = 0; i < 16; i++) - printf("%02x", output[i]); - printf("\n"); - - if (ac > 2) - store_result(output, *av); - } else { - char *verify_str = *av++; - - if (parse_verify_sum(verify_str, vsum)) { - printf("ERROR: %s does not contain a valid md5 sum\n", - verify_str); - return 1; - } - if (memcmp(output, vsum, 16) != 0) { - printf("md5 for %08lx ... %08lx ==> ", addr, - addr + len - 1); - for (i = 0; i < 16; i++) - printf("%02x", output[i]); - printf(" != "); - for (i = 0; i < 16; i++) - printf("%02x", vsum[i]); - printf(" ** ERROR **\n"); - return 1; - } - } - - return 0; -} -#else -static int do_md5sum(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - unsigned long addr, len; - unsigned int i; - u8 output[16]; - void *buf; - - if (argc < 3) - return CMD_RET_USAGE; - - addr = hextoul(argv[1], NULL); - len = hextoul(argv[2], NULL); - - buf = map_sysmem(addr, len); - md5_wd(buf, len, output, CHUNKSZ_MD5); - unmap_sysmem(buf); - - printf("md5 for %08lx ... %08lx ==> ", addr, addr + len - 1); - for (i = 0; i < 16; i++) - printf("%02x", output[i]); - printf("\n"); - - if (argc > 3) - store_result(output, argv[3]); - - return 0; + return hash_command("md5", flags, cmdtp, flag, ac, av); } -#endif -#ifdef CONFIG_MD5SUM_VERIFY +#if IS_ENABLED(CONFIG_MD5SUM_VERIFY) U_BOOT_CMD( md5sum, 5, 1, do_md5sum, "compute MD5 message digest", @@ -182,4 +51,4 @@ U_BOOT_CMD( "address count [[*]sum]\n" " - compute MD5 message digest [save to sum]" ); -#endif +#endif /* IS_ENABLED(CONFIG_MD5SUM_VERIFY) */ -- 2.34.1

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[PATCH 1/2] cli: allow users to disable history if unused at all
by Hanyuan Zhao 02 Mar '24

02 Mar '24

This commit allows user to determine whether to have history recording in command-line. Previously the history data as uninitialized static array would not directly take much space in binary file since it only marks size in the binary. However now it asks to allocate space. By connecting the original CMD_HISTORY flag in Kconfig, users could unset the whole history function, and the memory usage could be eased, if the history function is not used at all. Signed-off-by: Hanyuan Zhao <hanyuan-z(a)qq.com> --- cmd/Kconfig | 1 + common/cli_readline.c | 44 ++++++++++++++++++++++++------------------- 2 files changed, 26 insertions(+), 19 deletions(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index a86b570517..af4dbc95fc 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -184,6 +184,7 @@ config CMD_FWU_METADATA config CMD_HISTORY bool "history" + default y depends on CMDLINE_EDITING help Show the command-line history, i.e. a list of commands that are in diff --git a/common/cli_readline.c b/common/cli_readline.c index 2507be2295..eec6d8b0a2 100644 --- a/common/cli_readline.c +++ b/common/cli_readline.c @@ -67,12 +67,13 @@ static char *delete_char (char *buffer, char *p, int *colp, int *np, int plen) #define CTL_BACKSPACE ('\b') #define DEL ((char)255) #define DEL7 ((char)127) -#define CREAD_HIST_CHAR ('!') #define getcmd_putch(ch) putc(ch) #define getcmd_getch() getchar() #define getcmd_cbeep() getcmd_putch('\a') +#ifdef CONFIG_CMD_HISTORY +#define CREAD_HIST_CHAR ('!') #ifdef CONFIG_SPL_BUILD #define HIST_MAX 3 #define HIST_SIZE 32 @@ -90,14 +91,6 @@ static char *hist_list[HIST_MAX]; #define add_idx_minus_one() ((hist_add_idx == 0) ? hist_max : hist_add_idx-1) -static void getcmd_putchars(int count, int ch) -{ - int i; - - for (i = 0; i < count; i++) - getcmd_putch(ch); -} - static int hist_init(void) { unsigned char *hist; @@ -110,7 +103,7 @@ static int hist_init(void) hist = calloc(HIST_MAX, HIST_SIZE + 1); if (!hist) - return -ENOMEM; + panic("%s: calloc: out of memory!\n", __func__); for (i = 0; i < HIST_MAX; i++) hist_list[i] = hist + (i * (HIST_SIZE + 1)); @@ -192,6 +185,15 @@ void cread_print_hist_list(void) i++; } } +#endif + +static void getcmd_putchars(int count, int ch) +{ + int i; + + for (i = 0; i < count; i++) + getcmd_putch(ch); +} #define BEGINNING_OF_LINE() { \ while (cls->num) { \ @@ -365,6 +367,7 @@ int cread_line_process_ch(struct cli_line_state *cls, char ichar) cls->eol_num--; } break; +#ifdef CONFIG_CMD_HISTORY case CTL_CH('p'): case CTL_CH('n'): if (cls->history) { @@ -394,6 +397,7 @@ int cread_line_process_ch(struct cli_line_state *cls, char ichar) break; } break; +#endif case '\t': if (IS_ENABLED(CONFIG_AUTO_COMPLETE) && cls->cmd_complete) { int num2, col; @@ -490,19 +494,23 @@ static int cread_line(const char *const prompt, char *buf, unsigned int *len, } *len = cls->eol_num; +#ifdef CONFIG_CMD_HISTORY if (buf[0] && buf[0] != CREAD_HIST_CHAR) cread_add_to_hist(buf); hist_cur = hist_add_idx; +#endif return 0; } #else /* !CONFIG_CMDLINE_EDITING */ +#ifdef CONFIG_CMD_HISTORY static inline int hist_init(void) { return 0; } +#endif static int cread_line(const char *const prompt, char *buf, unsigned int *len, int timeout) @@ -640,20 +648,18 @@ int cli_readline_into_buffer(const char *const prompt, char *buffer, char *p = buffer; uint len = CONFIG_SYS_CBSIZE; int rc; - static int initted; +#ifdef CONFIG_CMD_HISTORY + static int hist_initted; +#endif - /* - * History uses a global array which is not - * writable until after relocation to RAM. - * Revert to non-history version if still - * running from flash. - */ if (IS_ENABLED(CONFIG_CMDLINE_EDITING) && (gd->flags & GD_FLG_RELOC)) { - if (!initted) { +#ifdef CONFIG_CMD_HISTORY + if (!hist_initted) { rc = hist_init(); if (rc == 0) - initted = 1; + hist_initted = 1; } +#endif if (prompt) puts(prompt); -- 2.34.1

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[PATCH v2] disk: dos: Add all options for EFI System Partitions
by Peter Robinson 02 Mar '24

02 Mar '24

The EFI spec states that the ESP can be any of FAT12/16/32 but for compatibility doesn't necssarily require the partition to be the EFI partition table ID of 0xef. A number of arm devices will not find their firmware on a FAT partition with an ID of 0xef so also allow the original FAT12/16/32 partition IDs as they are also permissable for an ESP. Signed-off-by: Peter Robinson <pbrobinson(a)gmail.com> --- v2: - Add 0x0c option - Make hex constants consistent - Move from if to switch statement disk/part_dos.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/disk/part_dos.c b/disk/part_dos.c index 567ead7511d..ab855adf347 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -40,10 +40,23 @@ static int get_bootable(dos_partition_t *p) { int ret = 0; - if (p->sys_ind == 0xef) + switch (p->sys_ind){ + case 0x01: ret |= PART_EFI_SYSTEM_PARTITION; - if (p->boot_ind == 0x80) + case 0x06: + ret |= PART_EFI_SYSTEM_PARTITION; + case 0x0b: + ret |= PART_EFI_SYSTEM_PARTITION; + case 0x0c: + ret |= PART_EFI_SYSTEM_PARTITION; + case 0xef: + ret |= PART_EFI_SYSTEM_PARTITION; + case 0x80: ret |= PART_BOOTABLE; + default: + break; + } + return ret; } -- 2.43.2

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[PATCH v3 0/2] SPL EBBR - EFI System Partition support
by Mayuresh Chitale 02 Mar '24

02 Mar '24

This series adds support to locate an EFI System Partition on a disk and boot the next stage from such a parition if found. The next stage image is expected to be under the FIRMWARE directory as described in the EBBR specification [1]. Also update the spl_blk_fs and spl_fat drivers to prefer booting from ESP and fall back to the configured parition in case of a failure. Changes in v3: - Revert fallback change from v2 - Fix part_get_esp signature and header in part.h - Add RB tag Changes in v2: - Rebase on latest next branch - Enable SPL_ESP_BOOT by default - For NVMe boot, remove fallback in case of ESP boot failure Mayuresh Chitale (2): part: Add a function to find ESP partition spl: Add support for booting from ESP common/spl/Kconfig | 8 ++++++ common/spl/spl_blk_fs.c | 60 ++++++++++++++++++++++++++++++----------- common/spl/spl_fat.c | 34 ++++++++++++++++++++--- disk/part.c | 16 +++++++++++ include/part.h | 13 +++++++++ 5 files changed, 111 insertions(+), 20 deletions(-) -- 2.34.1

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[PATCH] arm: dts: k3-am625-verdin-r5: Change CPU frequency to 1000MHz
by Vitor Soares 01 Mar '24

01 Mar '24

From: Vitor Soares <vitor.soares(a)toradex.com> The same U-Boot binary is compatible with multiple Verdin AM62 board variants. However, some of the SoC models can only operate at a maximum speed of 1 GHz. Previously, the boards with lower-speed grades were running at overclocked speeds, leading to kernel complaints about unsupported configurations. To resolve this issue, the operating speed has been decreased to the maximum allowable value across all Verdin AM62 board variants. As a result, there is a regression in overall boot time, increasing by around 200 milliseconds for the faster SoC variant. Signed-off-by: Vitor Soares <vitor.soares(a)toradex.com> --- arch/arm/dts/k3-am625-verdin-r5.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-am625-verdin-r5.dts b/arch/arm/dts/k3-am625-verdin-r5.dts index 305d199678..6b03e7405a 100644 --- a/arch/arm/dts/k3-am625-verdin-r5.dts +++ b/arch/arm/dts/k3-am625-verdin-r5.dts @@ -23,7 +23,7 @@ */ assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>, <&k3_clks 157 20>; assigned-clock-parents = <&k3_clks 61 2>, <0>, <&k3_clks 157 22>; - assigned-clock-rates = <200000000>, <1200000000>, <25000000>; + assigned-clock-rates = <200000000>, <1000000000>, <25000000>; clocks = <&k3_clks 61 0>; power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, -- 2.34.1

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