December 2024 - U-Boot

[ANN] U-Boot v2025.01-rc5 released
by Tom Rini 24 Dec '24

24 Dec '24

Hey all, Once again it's release day and so here's v2025.01-rc5 and I'll update the -next branch soon. At this point, I'm waiting to see if it can be agreed that: https://patchwork.ozlabs.org/project/uboot/patch/20241220143006.1921705-1-v… is safe enough, or if it needs to be further re-worked. That's really all I'm tracking between now and the release. That's not to say others might not be tracking more things, but that's all that's on my radar right now. In terms of a changelog, git log --merges v2025.01-rc4..v2025.01-rc5 As always, more details in pull requests (or the tags referenced by them) will result in more details here. At this point we have one more rc releases to go, next Monday on the 30th, with the final release on the 6th of January, 2025. Thanks all! -- Tom

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[PATCH 1/3] arm64: Convert core type check macros into inline functions
by Marek Vasut 23 Dec '24

23 Dec '24

Turn the core type check macros into inline functions to perform better type checking on them. The inline functions get optimized out in case they are not used. Indent the MIDR_PARTNUM_CORTEX_An macros in preparation for addition of future three-digit cores and use MIDR_PARTNUM_SHIFT in MIDR_PARTNUM_MASK to be consistent. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Biju Das <biju.das.jz(a)bp.renesas.com> Cc: Chris Paterson <chris.paterson2(a)renesas.com> Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj(a)bp.renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Paul Barker <paul.barker.ct(a)bp.renesas.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: u-boot(a)lists.denx.de --- arch/arm/include/asm/armv8/cpu.h | 28 +++++++++++++++++----------- 1 file changed, 17 insertions(+), 11 deletions(-) diff --git a/arch/arm/include/asm/armv8/cpu.h b/arch/arm/include/asm/armv8/cpu.h index 40d54dc85ab..aa1470bb72d 100644 --- a/arch/arm/include/asm/armv8/cpu.h +++ b/arch/arm/include/asm/armv8/cpu.h @@ -3,11 +3,11 @@ * Copyright 2018 NXP */ -#define MIDR_PARTNUM_CORTEX_A35 0xD04 -#define MIDR_PARTNUM_CORTEX_A53 0xD03 -#define MIDR_PARTNUM_CORTEX_A72 0xD08 -#define MIDR_PARTNUM_SHIFT 0x4 -#define MIDR_PARTNUM_MASK (0xFFF << 0x4) +#define MIDR_PARTNUM_CORTEX_A35 0xD04 +#define MIDR_PARTNUM_CORTEX_A53 0xD03 +#define MIDR_PARTNUM_CORTEX_A72 0xD08 +#define MIDR_PARTNUM_SHIFT 0x4 +#define MIDR_PARTNUM_MASK (0xFFF << MIDR_PARTNUM_SHIFT) static inline unsigned int read_midr(void) { @@ -18,9 +18,15 @@ static inline unsigned int read_midr(void) return val; } -#define is_cortex_a35() (((read_midr() & MIDR_PARTNUM_MASK) >> \ - MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A35) -#define is_cortex_a53() (((read_midr() & MIDR_PARTNUM_MASK) >> \ - MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A53) -#define is_cortex_a72() (((read_midr() & MIDR_PARTNUM_MASK) >>\ - MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A72) +#define is_cortex_a(__n) \ + static inline int is_cortex_a##__n(void) \ + { \ + unsigned int midr = read_midr(); \ + midr &= MIDR_PARTNUM_MASK; \ + midr >>= MIDR_PARTNUM_SHIFT; \ + return midr == MIDR_PARTNUM_CORTEX_A##__n; \ + } + +is_cortex_a(35) +is_cortex_a(53) +is_cortex_a(72) -- 2.45.2

5 10

[PATCH 01/16] pinctrl: renesas: Add Kconfig symbol for conditional build of full PFC tables
by Marek Vasut 23 Dec '24

23 Dec '24

By default the pin multiplexing tables used by U-Boot are reduced to keep the size of the bootloader low. This option allows build of full pin multiplexing tables the same way they are included in the Linux kernel. This includes pin multiplexing options for Audio, CAN, CANFD, DU, INTC, INTC-EX, MSIOF, PWM, SSI, for which there is no U-Boot driver. This option is disabled by default. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Hai Pham <hai.pham.ud(a)renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Paul Barker <paul.barker.ct(a)bp.renesas.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: u-boot(a)lists.denx.de --- drivers/pinctrl/renesas/Kconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig index 57e88604aa2..49845b6d8d4 100644 --- a/drivers/pinctrl/renesas/Kconfig +++ b/drivers/pinctrl/renesas/Kconfig @@ -11,6 +11,18 @@ config PINCTRL_PFC both the GPIO definitions and pin control functions for each available multiplex function. +config PINCTRL_PFC_FULL + bool "Renesas pin control drivers (full size)" + depends on PINCTRL_PFC + default n + help + By default the pin multiplexing tables used by U-Boot are reduced + to keep the size of the bootloader low. Enable this option to use + full pin multiplexing tables the same way they are included in the + Linux kernel. This includes pin multiplexing options for Audio, CAN, + CANFD, DU, INTC, INTC-EX, MSIOF, PWM, SSI, for which there is no + U-Boot driver. + config PINCTRL_PFC_R8A7790 bool "Renesas RCar Gen2 R8A7790 pin control driver" depends on PINCTRL_PFC -- 2.45.2

3 17

[GIT PULL] Please pull u-boot-imx-next-20241223
by Fabio Estevam 23 Dec '24

23 Dec '24

Hi Tom, Please pull from u-boot-imx/next, thanks. The following changes since commit 5947cd76acdd65f48f0748af01241cb6c0756fba: Merge branch '2024-12-21-add-arm64-CI-host-support' into next (2024-12-21 12:27:55 -0600) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git tags/u-boot-imx-next-20241223 for you to fetch changes up to 6016960ceb9d3fda591cda94df3841748fb65596: imx: Use per board ddrphy_trained_csr (2024-12-23 08:10:15 -0300) u-boot-imx-next-20241223 ------------------------ CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/23987 - imx8m: Remove global ddrphy_trained_csr as it is a per board configuration. - Add DM_FLAG_ACTIVE_DMA flag for FEC network driver to avoid potential kernel crash. - Miscellaneous improvements for i.MX8M Venice Gateworks platforms. ---------------------------------------------------------------- Meng Li (1): net: fec_mxc: add DM_FLAG_ACTIVE_DMA flag for FEC network driver Peng Fan (1): imx: Use per board ddrphy_trained_csr Tim Harvey (5): spi: mxc_spi: use proper clock for SPI bus drivers: misc: gsc: add support for fan controller drivers: misc: gsc: add support for prescaled imx8m*-venice: define suitable address for SPL_LOAD_FIT_ADDRESS arm: dts: imx8mp-venice-gw7*xx: fix TPM reset arch/arm/dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi | 16 +- arch/arm/dts/imx8mp-venice-gw72xx-2x-u-boot.dtsi | 16 +- arch/arm/dts/imx8mp-venice-gw73xx-2x-u-boot.dtsi | 16 +- arch/arm/include/asm/arch-imx8m/ddr.h | 3 - arch/arm/include/asm/arch-imx9/ddr.h | 3 - configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 + configs/imx8mp_venice_defconfig | 1 + drivers/ddr/imx/phy/Makefile | 2 +- drivers/ddr/imx/phy/ddrphy_csr.c | 732 ----------------------- drivers/ddr/imx/phy/ddrphy_train.c | 3 +- drivers/ddr/imx/phy/helper.c | 8 +- drivers/misc/gsc.c | 4 + drivers/net/fec_mxc.c | 1 + drivers/spi/mxc_spi.c | 14 +- 15 files changed, 46 insertions(+), 775 deletions(-) delete mode 100644 drivers/ddr/imx/phy/ddrphy_csr.c

2 1

[PULL] u-boot-sh/master
by Marek Vasut 23 Dec '24

23 Dec '24

The following changes since commit cfe57427c28763fd94e5bdcf89de9dabca4b1684: Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh (2024-12-21 09:45:30 -0600) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-sh.git master for you to fetch changes up to 70da4f28592d0a2296b27a9126da97cc3b30891e: net: rswitch: Do not register disabled ports as ethernet devices (2024-12-22 22:34:32 +0100) ---------------------------------------------------------------- Marek Vasut (2): ARM: renesas: Consistently enable ENV_OVERWRITE on Renesas R-Car net: rswitch: Do not register disabled ports as ethernet devices configs/renesas_rcar.config | 1 + configs/renesas_rcar2.config | 1 - configs/renesas_rcar3.config | 1 - drivers/net/rswitch.c | 3 +++ 4 files changed, 4 insertions(+), 2 deletions(-)

2 1

[PATCH v2 01/16] pinctrl: renesas: Add Kconfig symbol for conditional build of full PFC tables
by Marek Vasut 23 Dec '24

23 Dec '24

By default the pin multiplexing tables used by U-Boot are reduced to keep the size of the bootloader low. This option allows build of full pin multiplexing tables the same way they are included in the Linux kernel. This includes pin multiplexing options for Audio, CAN, CANFD, DU, INTC, INTC-EX, MSIOF, PWM, SSI, for which there is no U-Boot driver. This option is disabled by default. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Hai Pham <hai.pham.ud(a)renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Paul Barker <paul.barker.ct(a)bp.renesas.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: u-boot(a)lists.denx.de --- V2: Drop default n from the Kconfig option, this is the default --- drivers/pinctrl/renesas/Kconfig | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig index 57e88604aa2..7ced7d784b3 100644 --- a/drivers/pinctrl/renesas/Kconfig +++ b/drivers/pinctrl/renesas/Kconfig @@ -11,6 +11,17 @@ config PINCTRL_PFC both the GPIO definitions and pin control functions for each available multiplex function. +config PINCTRL_PFC_FULL + bool "Renesas pin control drivers (full size)" + depends on PINCTRL_PFC + help + By default the pin multiplexing tables used by U-Boot are reduced + to keep the size of the bootloader low. Enable this option to use + full pin multiplexing tables the same way they are included in the + Linux kernel. This includes pin multiplexing options for Audio, CAN, + CANFD, DU, INTC, INTC-EX, MSIOF, PWM, SSI, for which there is no + U-Boot driver. + config PINCTRL_PFC_R8A7790 bool "Renesas RCar Gen2 R8A7790 pin control driver" depends on PINCTRL_PFC -- 2.45.2

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[PATCH] imx: Use per board ddrphy_trained_csr
by Peng Fan (OSS) 23 Dec '24

23 Dec '24

From: Peng Fan <peng.fan(a)nxp.com> Drop global ddrphy_trained_csr which maybe different with per board ddrphy_trained_csr. DDR TOOL generates ddrphy_trained_csr for each board, using the global ddrphy_trained_csr has risk that values may be not up to date. Signed-off-by: Peng Fan <peng.fan(a)nxp.com> --- arch/arm/include/asm/arch-imx8m/ddr.h | 3 - arch/arm/include/asm/arch-imx9/ddr.h | 3 - drivers/ddr/imx/phy/Makefile | 2 +- drivers/ddr/imx/phy/ddrphy_csr.c | 732 -------------------------- drivers/ddr/imx/phy/ddrphy_train.c | 3 +- drivers/ddr/imx/phy/helper.c | 8 +- 6 files changed, 7 insertions(+), 744 deletions(-) delete mode 100644 drivers/ddr/imx/phy/ddrphy_csr.c diff --git a/arch/arm/include/asm/arch-imx8m/ddr.h b/arch/arm/include/asm/arch-imx8m/ddr.h index 1f81d91977c..5092ccae188 100644 --- a/arch/arm/include/asm/arch-imx8m/ddr.h +++ b/arch/arm/include/asm/arch-imx8m/ddr.h @@ -747,7 +747,4 @@ static inline void reg32setbit(unsigned long addr, u32 bit) #define dwc_ddrphy_apb_rd(addr) \ reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + ddrphy_addr_remap(addr)) -extern struct dram_cfg_param ddrphy_trained_csr[]; -extern uint32_t ddrphy_trained_csr_num; - #endif diff --git a/arch/arm/include/asm/arch-imx9/ddr.h b/arch/arm/include/asm/arch-imx9/ddr.h index 2b22f3a5bea..0dd2d62b9ef 100644 --- a/arch/arm/include/asm/arch-imx9/ddr.h +++ b/arch/arm/include/asm/arch-imx9/ddr.h @@ -141,7 +141,4 @@ static inline void reg32setbit(unsigned long addr, u32 bit) #define dwc_ddrphy_apb_rd(addr) \ reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + ddrphy_addr_remap(addr)) -extern struct dram_cfg_param ddrphy_trained_csr[]; -extern u32 ddrphy_trained_csr_num; - #endif diff --git a/drivers/ddr/imx/phy/Makefile b/drivers/ddr/imx/phy/Makefile index 592d0c6ebad..95c93ba16d5 100644 --- a/drivers/ddr/imx/phy/Makefile +++ b/drivers/ddr/imx/phy/Makefile @@ -5,5 +5,5 @@ # ifdef CONFIG_XPL_BUILD -obj-$(CONFIG_IMX_SNPS_DDR_PHY) += helper.o ddrphy_utils.o ddrphy_train.o ddrphy_csr.o +obj-$(CONFIG_IMX_SNPS_DDR_PHY) += helper.o ddrphy_utils.o ddrphy_train.o endif diff --git a/drivers/ddr/imx/phy/ddrphy_csr.c b/drivers/ddr/imx/phy/ddrphy_csr.c deleted file mode 100644 index 67dd4e7059f..00000000000 --- a/drivers/ddr/imx/phy/ddrphy_csr.c +++ /dev/null @@ -1,732 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2018 NXP - */ - -#include <linux/kernel.h> -#include <asm/arch/ddr.h> - -/* ddr phy trained csr */ -struct dram_cfg_param ddrphy_trained_csr[] = { - { 0x200b2, 0x0 }, - { 0x1200b2, 0x0 }, - { 0x2200b2, 0x0 }, - { 0x200cb, 0x0 }, - { 0x10043, 0x0 }, - { 0x110043, 0x0 }, - { 0x210043, 0x0 }, - { 0x10143, 0x0 }, - { 0x110143, 0x0 }, - { 0x210143, 0x0 }, - { 0x11043, 0x0 }, - { 0x111043, 0x0 }, - { 0x211043, 0x0 }, - { 0x11143, 0x0 }, - { 0x111143, 0x0 }, - { 0x211143, 0x0 }, - { 0x12043, 0x0 }, - { 0x112043, 0x0 }, - { 0x212043, 0x0 }, - { 0x12143, 0x0 }, - { 0x112143, 0x0 }, - { 0x212143, 0x0 }, - { 0x13043, 0x0 }, - { 0x113043, 0x0 }, - { 0x213043, 0x0 }, - { 0x13143, 0x0 }, - { 0x113143, 0x0 }, - { 0x213143, 0x0 }, - { 0x80, 0x0 }, - { 0x100080, 0x0 }, - { 0x200080, 0x0 }, - { 0x1080, 0x0 }, - { 0x101080, 0x0 }, - { 0x201080, 0x0 }, - { 0x2080, 0x0 }, - { 0x102080, 0x0 }, - { 0x202080, 0x0 }, - { 0x3080, 0x0 }, - { 0x103080, 0x0 }, - { 0x203080, 0x0 }, - { 0x4080, 0x0 }, - { 0x104080, 0x0 }, - { 0x204080, 0x0 }, - { 0x5080, 0x0 }, - { 0x105080, 0x0 }, - { 0x205080, 0x0 }, - { 0x6080, 0x0 }, - { 0x106080, 0x0 }, - { 0x206080, 0x0 }, - { 0x7080, 0x0 }, - { 0x107080, 0x0 }, - { 0x207080, 0x0 }, - { 0x8080, 0x0 }, - { 0x108080, 0x0 }, - { 0x208080, 0x0 }, - { 0x9080, 0x0 }, - { 0x109080, 0x0 }, - { 0x209080, 0x0 }, - { 0x10080, 0x0 }, - { 0x110080, 0x0 }, - { 0x210080, 0x0 }, - { 0x10180, 0x0 }, - { 0x110180, 0x0 }, - { 0x210180, 0x0 }, - { 0x11080, 0x0 }, - { 0x111080, 0x0 }, - { 0x211080, 0x0 }, - { 0x11180, 0x0 }, - { 0x111180, 0x0 }, - { 0x211180, 0x0 }, - { 0x12080, 0x0 }, - { 0x112080, 0x0 }, - { 0x212080, 0x0 }, - { 0x12180, 0x0 }, - { 0x112180, 0x0 }, - { 0x212180, 0x0 }, - { 0x13080, 0x0 }, - { 0x113080, 0x0 }, - { 0x213080, 0x0 }, - { 0x13180, 0x0 }, - { 0x113180, 0x0 }, - { 0x213180, 0x0 }, - { 0x10081, 0x0 }, - { 0x110081, 0x0 }, - { 0x210081, 0x0 }, - { 0x10181, 0x0 }, - { 0x110181, 0x0 }, - { 0x210181, 0x0 }, - { 0x11081, 0x0 }, - { 0x111081, 0x0 }, - { 0x211081, 0x0 }, - { 0x11181, 0x0 }, - { 0x111181, 0x0 }, - { 0x211181, 0x0 }, - { 0x12081, 0x0 }, - { 0x112081, 0x0 }, - { 0x212081, 0x0 }, - { 0x12181, 0x0 }, - { 0x112181, 0x0 }, - { 0x212181, 0x0 }, - { 0x13081, 0x0 }, - { 0x113081, 0x0 }, - { 0x213081, 0x0 }, - { 0x13181, 0x0 }, - { 0x113181, 0x0 }, - { 0x213181, 0x0 }, - { 0x100d0, 0x0 }, - { 0x1100d0, 0x0 }, - { 0x2100d0, 0x0 }, - { 0x101d0, 0x0 }, - { 0x1101d0, 0x0 }, - { 0x2101d0, 0x0 }, - { 0x110d0, 0x0 }, - { 0x1110d0, 0x0 }, - { 0x2110d0, 0x0 }, - { 0x111d0, 0x0 }, - { 0x1111d0, 0x0 }, - { 0x2111d0, 0x0 }, - { 0x120d0, 0x0 }, - { 0x1120d0, 0x0 }, - { 0x2120d0, 0x0 }, - { 0x121d0, 0x0 }, - { 0x1121d0, 0x0 }, - { 0x2121d0, 0x0 }, - { 0x130d0, 0x0 }, - { 0x1130d0, 0x0 }, - { 0x2130d0, 0x0 }, - { 0x131d0, 0x0 }, - { 0x1131d0, 0x0 }, - { 0x2131d0, 0x0 }, - { 0x100d1, 0x0 }, - { 0x1100d1, 0x0 }, - { 0x2100d1, 0x0 }, - { 0x101d1, 0x0 }, - { 0x1101d1, 0x0 }, - { 0x2101d1, 0x0 }, - { 0x110d1, 0x0 }, - { 0x1110d1, 0x0 }, - { 0x2110d1, 0x0 }, - { 0x111d1, 0x0 }, - { 0x1111d1, 0x0 }, - { 0x2111d1, 0x0 }, - { 0x120d1, 0x0 }, - { 0x1120d1, 0x0 }, - { 0x2120d1, 0x0 }, - { 0x121d1, 0x0 }, - { 0x1121d1, 0x0 }, - { 0x2121d1, 0x0 }, - { 0x130d1, 0x0 }, - { 0x1130d1, 0x0 }, - { 0x2130d1, 0x0 }, - { 0x131d1, 0x0 }, - { 0x1131d1, 0x0 }, - { 0x2131d1, 0x0 }, - { 0x10068, 0x0 }, - { 0x10168, 0x0 }, - { 0x10268, 0x0 }, - { 0x10368, 0x0 }, - { 0x10468, 0x0 }, - { 0x10568, 0x0 }, - { 0x10668, 0x0 }, - { 0x10768, 0x0 }, - { 0x10868, 0x0 }, - { 0x11068, 0x0 }, - { 0x11168, 0x0 }, - { 0x11268, 0x0 }, - { 0x11368, 0x0 }, - { 0x11468, 0x0 }, - { 0x11568, 0x0 }, - { 0x11668, 0x0 }, - { 0x11768, 0x0 }, - { 0x11868, 0x0 }, - { 0x12068, 0x0 }, - { 0x12168, 0x0 }, - { 0x12268, 0x0 }, - { 0x12368, 0x0 }, - { 0x12468, 0x0 }, - { 0x12568, 0x0 }, - { 0x12668, 0x0 }, - { 0x12768, 0x0 }, - { 0x12868, 0x0 }, - { 0x13068, 0x0 }, - { 0x13168, 0x0 }, - { 0x13268, 0x0 }, - { 0x13368, 0x0 }, - { 0x13468, 0x0 }, - { 0x13568, 0x0 }, - { 0x13668, 0x0 }, - { 0x13768, 0x0 }, - { 0x13868, 0x0 }, - { 0x10069, 0x0 }, - { 0x10169, 0x0 }, - { 0x10269, 0x0 }, - { 0x10369, 0x0 }, - { 0x10469, 0x0 }, - { 0x10569, 0x0 }, - { 0x10669, 0x0 }, - { 0x10769, 0x0 }, - { 0x10869, 0x0 }, - { 0x11069, 0x0 }, - { 0x11169, 0x0 }, - { 0x11269, 0x0 }, - { 0x11369, 0x0 }, - { 0x11469, 0x0 }, - { 0x11569, 0x0 }, - { 0x11669, 0x0 }, - { 0x11769, 0x0 }, - { 0x11869, 0x0 }, - { 0x12069, 0x0 }, - { 0x12169, 0x0 }, - { 0x12269, 0x0 }, - { 0x12369, 0x0 }, - { 0x12469, 0x0 }, - { 0x12569, 0x0 }, - { 0x12669, 0x0 }, - { 0x12769, 0x0 }, - { 0x12869, 0x0 }, - { 0x13069, 0x0 }, - { 0x13169, 0x0 }, - { 0x13269, 0x0 }, - { 0x13369, 0x0 }, - { 0x13469, 0x0 }, - { 0x13569, 0x0 }, - { 0x13669, 0x0 }, - { 0x13769, 0x0 }, - { 0x13869, 0x0 }, - { 0x1008c, 0x0 }, - { 0x11008c, 0x0 }, - { 0x21008c, 0x0 }, - { 0x1018c, 0x0 }, - { 0x11018c, 0x0 }, - { 0x21018c, 0x0 }, - { 0x1108c, 0x0 }, - { 0x11108c, 0x0 }, - { 0x21108c, 0x0 }, - { 0x1118c, 0x0 }, - { 0x11118c, 0x0 }, - { 0x21118c, 0x0 }, - { 0x1208c, 0x0 }, - { 0x11208c, 0x0 }, - { 0x21208c, 0x0 }, - { 0x1218c, 0x0 }, - { 0x11218c, 0x0 }, - { 0x21218c, 0x0 }, - { 0x1308c, 0x0 }, - { 0x11308c, 0x0 }, - { 0x21308c, 0x0 }, - { 0x1318c, 0x0 }, - { 0x11318c, 0x0 }, - { 0x21318c, 0x0 }, - { 0x1008d, 0x0 }, - { 0x11008d, 0x0 }, - { 0x21008d, 0x0 }, - { 0x1018d, 0x0 }, - { 0x11018d, 0x0 }, - { 0x21018d, 0x0 }, - { 0x1108d, 0x0 }, - { 0x11108d, 0x0 }, - { 0x21108d, 0x0 }, - { 0x1118d, 0x0 }, - { 0x11118d, 0x0 }, - { 0x21118d, 0x0 }, - { 0x1208d, 0x0 }, - { 0x11208d, 0x0 }, - { 0x21208d, 0x0 }, - { 0x1218d, 0x0 }, - { 0x11218d, 0x0 }, - { 0x21218d, 0x0 }, - { 0x1308d, 0x0 }, - { 0x11308d, 0x0 }, - { 0x21308d, 0x0 }, - { 0x1318d, 0x0 }, - { 0x11318d, 0x0 }, - { 0x21318d, 0x0 }, - { 0x100c0, 0x0 }, - { 0x1100c0, 0x0 }, - { 0x2100c0, 0x0 }, - { 0x101c0, 0x0 }, - { 0x1101c0, 0x0 }, - { 0x2101c0, 0x0 }, - { 0x102c0, 0x0 }, - { 0x1102c0, 0x0 }, - { 0x2102c0, 0x0 }, - { 0x103c0, 0x0 }, - { 0x1103c0, 0x0 }, - { 0x2103c0, 0x0 }, - { 0x104c0, 0x0 }, - { 0x1104c0, 0x0 }, - { 0x2104c0, 0x0 }, - { 0x105c0, 0x0 }, - { 0x1105c0, 0x0 }, - { 0x2105c0, 0x0 }, - { 0x106c0, 0x0 }, - { 0x1106c0, 0x0 }, - { 0x2106c0, 0x0 }, - { 0x107c0, 0x0 }, - { 0x1107c0, 0x0 }, - { 0x2107c0, 0x0 }, - { 0x108c0, 0x0 }, - { 0x1108c0, 0x0 }, - { 0x2108c0, 0x0 }, - { 0x110c0, 0x0 }, - { 0x1110c0, 0x0 }, - { 0x2110c0, 0x0 }, - { 0x111c0, 0x0 }, - { 0x1111c0, 0x0 }, - { 0x2111c0, 0x0 }, - { 0x112c0, 0x0 }, - { 0x1112c0, 0x0 }, - { 0x2112c0, 0x0 }, - { 0x113c0, 0x0 }, - { 0x1113c0, 0x0 }, - { 0x2113c0, 0x0 }, - { 0x114c0, 0x0 }, - { 0x1114c0, 0x0 }, - { 0x2114c0, 0x0 }, - { 0x115c0, 0x0 }, - { 0x1115c0, 0x0 }, - { 0x2115c0, 0x0 }, - { 0x116c0, 0x0 }, - { 0x1116c0, 0x0 }, - { 0x2116c0, 0x0 }, - { 0x117c0, 0x0 }, - { 0x1117c0, 0x0 }, - { 0x2117c0, 0x0 }, - { 0x118c0, 0x0 }, - { 0x1118c0, 0x0 }, - { 0x2118c0, 0x0 }, - { 0x120c0, 0x0 }, - { 0x1120c0, 0x0 }, - { 0x2120c0, 0x0 }, - { 0x121c0, 0x0 }, - { 0x1121c0, 0x0 }, - { 0x2121c0, 0x0 }, - { 0x122c0, 0x0 }, - { 0x1122c0, 0x0 }, - { 0x2122c0, 0x0 }, - { 0x123c0, 0x0 }, - { 0x1123c0, 0x0 }, - { 0x2123c0, 0x0 }, - { 0x124c0, 0x0 }, - { 0x1124c0, 0x0 }, - { 0x2124c0, 0x0 }, - { 0x125c0, 0x0 }, - { 0x1125c0, 0x0 }, - { 0x2125c0, 0x0 }, - { 0x126c0, 0x0 }, - { 0x1126c0, 0x0 }, - { 0x2126c0, 0x0 }, - { 0x127c0, 0x0 }, - { 0x1127c0, 0x0 }, - { 0x2127c0, 0x0 }, - { 0x128c0, 0x0 }, - { 0x1128c0, 0x0 }, - { 0x2128c0, 0x0 }, - { 0x130c0, 0x0 }, - { 0x1130c0, 0x0 }, - { 0x2130c0, 0x0 }, - { 0x131c0, 0x0 }, - { 0x1131c0, 0x0 }, - { 0x2131c0, 0x0 }, - { 0x132c0, 0x0 }, - { 0x1132c0, 0x0 }, - { 0x2132c0, 0x0 }, - { 0x133c0, 0x0 }, - { 0x1133c0, 0x0 }, - { 0x2133c0, 0x0 }, - { 0x134c0, 0x0 }, - { 0x1134c0, 0x0 }, - { 0x2134c0, 0x0 }, - { 0x135c0, 0x0 }, - { 0x1135c0, 0x0 }, - { 0x2135c0, 0x0 }, - { 0x136c0, 0x0 }, - { 0x1136c0, 0x0 }, - { 0x2136c0, 0x0 }, - { 0x137c0, 0x0 }, - { 0x1137c0, 0x0 }, - { 0x2137c0, 0x0 }, - { 0x138c0, 0x0 }, - { 0x1138c0, 0x0 }, - { 0x2138c0, 0x0 }, - { 0x100c1, 0x0 }, - { 0x1100c1, 0x0 }, - { 0x2100c1, 0x0 }, - { 0x101c1, 0x0 }, - { 0x1101c1, 0x0 }, - { 0x2101c1, 0x0 }, - { 0x102c1, 0x0 }, - { 0x1102c1, 0x0 }, - { 0x2102c1, 0x0 }, - { 0x103c1, 0x0 }, - { 0x1103c1, 0x0 }, - { 0x2103c1, 0x0 }, - { 0x104c1, 0x0 }, - { 0x1104c1, 0x0 }, - { 0x2104c1, 0x0 }, - { 0x105c1, 0x0 }, - { 0x1105c1, 0x0 }, - { 0x2105c1, 0x0 }, - { 0x106c1, 0x0 }, - { 0x1106c1, 0x0 }, - { 0x2106c1, 0x0 }, - { 0x107c1, 0x0 }, - { 0x1107c1, 0x0 }, - { 0x2107c1, 0x0 }, - { 0x108c1, 0x0 }, - { 0x1108c1, 0x0 }, - { 0x2108c1, 0x0 }, - { 0x110c1, 0x0 }, - { 0x1110c1, 0x0 }, - { 0x2110c1, 0x0 }, - { 0x111c1, 0x0 }, - { 0x1111c1, 0x0 }, - { 0x2111c1, 0x0 }, - { 0x112c1, 0x0 }, - { 0x1112c1, 0x0 }, - { 0x2112c1, 0x0 }, - { 0x113c1, 0x0 }, - { 0x1113c1, 0x0 }, - { 0x2113c1, 0x0 }, - { 0x114c1, 0x0 }, - { 0x1114c1, 0x0 }, - { 0x2114c1, 0x0 }, - { 0x115c1, 0x0 }, - { 0x1115c1, 0x0 }, - { 0x2115c1, 0x0 }, - { 0x116c1, 0x0 }, - { 0x1116c1, 0x0 }, - { 0x2116c1, 0x0 }, - { 0x117c1, 0x0 }, - { 0x1117c1, 0x0 }, - { 0x2117c1, 0x0 }, - { 0x118c1, 0x0 }, - { 0x1118c1, 0x0 }, - { 0x2118c1, 0x0 }, - { 0x120c1, 0x0 }, - { 0x1120c1, 0x0 }, - { 0x2120c1, 0x0 }, - { 0x121c1, 0x0 }, - { 0x1121c1, 0x0 }, - { 0x2121c1, 0x0 }, - { 0x122c1, 0x0 }, - { 0x1122c1, 0x0 }, - { 0x2122c1, 0x0 }, - { 0x123c1, 0x0 }, - { 0x1123c1, 0x0 }, - { 0x2123c1, 0x0 }, - { 0x124c1, 0x0 }, - { 0x1124c1, 0x0 }, - { 0x2124c1, 0x0 }, - { 0x125c1, 0x0 }, - { 0x1125c1, 0x0 }, - { 0x2125c1, 0x0 }, - { 0x126c1, 0x0 }, - { 0x1126c1, 0x0 }, - { 0x2126c1, 0x0 }, - { 0x127c1, 0x0 }, - { 0x1127c1, 0x0 }, - { 0x2127c1, 0x0 }, - { 0x128c1, 0x0 }, - { 0x1128c1, 0x0 }, - { 0x2128c1, 0x0 }, - { 0x130c1, 0x0 }, - { 0x1130c1, 0x0 }, - { 0x2130c1, 0x0 }, - { 0x131c1, 0x0 }, - { 0x1131c1, 0x0 }, - { 0x2131c1, 0x0 }, - { 0x132c1, 0x0 }, - { 0x1132c1, 0x0 }, - { 0x2132c1, 0x0 }, - { 0x133c1, 0x0 }, - { 0x1133c1, 0x0 }, - { 0x2133c1, 0x0 }, - { 0x134c1, 0x0 }, - { 0x1134c1, 0x0 }, - { 0x2134c1, 0x0 }, - { 0x135c1, 0x0 }, - { 0x1135c1, 0x0 }, - { 0x2135c1, 0x0 }, - { 0x136c1, 0x0 }, - { 0x1136c1, 0x0 }, - { 0x2136c1, 0x0 }, - { 0x137c1, 0x0 }, - { 0x1137c1, 0x0 }, - { 0x2137c1, 0x0 }, - { 0x138c1, 0x0 }, - { 0x1138c1, 0x0 }, - { 0x2138c1, 0x0 }, - { 0x10020, 0x0 }, - { 0x110020, 0x0 }, - { 0x210020, 0x0 }, - { 0x11020, 0x0 }, - { 0x111020, 0x0 }, - { 0x211020, 0x0 }, - { 0x12020, 0x0 }, - { 0x112020, 0x0 }, - { 0x212020, 0x0 }, - { 0x13020, 0x0 }, - { 0x113020, 0x0 }, - { 0x213020, 0x0 }, - { 0x20072, 0x0 }, - { 0x20073, 0x0 }, - { 0x20074, 0x0 }, - { 0x100aa, 0x0 }, - { 0x110aa, 0x0 }, - { 0x120aa, 0x0 }, - { 0x130aa, 0x0 }, - { 0x20010, 0x0 }, - { 0x120010, 0x0 }, - { 0x220010, 0x0 }, - { 0x20011, 0x0 }, - { 0x120011, 0x0 }, - { 0x220011, 0x0 }, - { 0x100ae, 0x0 }, - { 0x1100ae, 0x0 }, - { 0x2100ae, 0x0 }, - { 0x100af, 0x0 }, - { 0x1100af, 0x0 }, - { 0x2100af, 0x0 }, - { 0x110ae, 0x0 }, - { 0x1110ae, 0x0 }, - { 0x2110ae, 0x0 }, - { 0x110af, 0x0 }, - { 0x1110af, 0x0 }, - { 0x2110af, 0x0 }, - { 0x120ae, 0x0 }, - { 0x1120ae, 0x0 }, - { 0x2120ae, 0x0 }, - { 0x120af, 0x0 }, - { 0x1120af, 0x0 }, - { 0x2120af, 0x0 }, - { 0x130ae, 0x0 }, - { 0x1130ae, 0x0 }, - { 0x2130ae, 0x0 }, - { 0x130af, 0x0 }, - { 0x1130af, 0x0 }, - { 0x2130af, 0x0 }, - { 0x20020, 0x0 }, - { 0x120020, 0x0 }, - { 0x220020, 0x0 }, - { 0x100a0, 0x0 }, - { 0x100a1, 0x0 }, - { 0x100a2, 0x0 }, - { 0x100a3, 0x0 }, - { 0x100a4, 0x0 }, - { 0x100a5, 0x0 }, - { 0x100a6, 0x0 }, - { 0x100a7, 0x0 }, - { 0x110a0, 0x0 }, - { 0x110a1, 0x0 }, - { 0x110a2, 0x0 }, - { 0x110a3, 0x0 }, - { 0x110a4, 0x0 }, - { 0x110a5, 0x0 }, - { 0x110a6, 0x0 }, - { 0x110a7, 0x0 }, - { 0x120a0, 0x0 }, - { 0x120a1, 0x0 }, - { 0x120a2, 0x0 }, - { 0x120a3, 0x0 }, - { 0x120a4, 0x0 }, - { 0x120a5, 0x0 }, - { 0x120a6, 0x0 }, - { 0x120a7, 0x0 }, - { 0x130a0, 0x0 }, - { 0x130a1, 0x0 }, - { 0x130a2, 0x0 }, - { 0x130a3, 0x0 }, - { 0x130a4, 0x0 }, - { 0x130a5, 0x0 }, - { 0x130a6, 0x0 }, - { 0x130a7, 0x0 }, - { 0x2007c, 0x0 }, - { 0x12007c, 0x0 }, - { 0x22007c, 0x0 }, - { 0x2007d, 0x0 }, - { 0x12007d, 0x0 }, - { 0x22007d, 0x0 }, - { 0x400fd, 0x0 }, - { 0x400c0, 0x0 }, - { 0x90201, 0x0 }, - { 0x190201, 0x0 }, - { 0x290201, 0x0 }, - { 0x90202, 0x0 }, - { 0x190202, 0x0 }, - { 0x290202, 0x0 }, - { 0x90203, 0x0 }, - { 0x190203, 0x0 }, - { 0x290203, 0x0 }, - { 0x90204, 0x0 }, - { 0x190204, 0x0 }, - { 0x290204, 0x0 }, - { 0x90205, 0x0 }, - { 0x190205, 0x0 }, - { 0x290205, 0x0 }, - { 0x90206, 0x0 }, - { 0x190206, 0x0 }, - { 0x290206, 0x0 }, - { 0x90207, 0x0 }, - { 0x190207, 0x0 }, - { 0x290207, 0x0 }, - { 0x90208, 0x0 }, - { 0x190208, 0x0 }, - { 0x290208, 0x0 }, - { 0x10062, 0x0 }, - { 0x10162, 0x0 }, - { 0x10262, 0x0 }, - { 0x10362, 0x0 }, - { 0x10462, 0x0 }, - { 0x10562, 0x0 }, - { 0x10662, 0x0 }, - { 0x10762, 0x0 }, - { 0x10862, 0x0 }, - { 0x11062, 0x0 }, - { 0x11162, 0x0 }, - { 0x11262, 0x0 }, - { 0x11362, 0x0 }, - { 0x11462, 0x0 }, - { 0x11562, 0x0 }, - { 0x11662, 0x0 }, - { 0x11762, 0x0 }, - { 0x11862, 0x0 }, - { 0x12062, 0x0 }, - { 0x12162, 0x0 }, - { 0x12262, 0x0 }, - { 0x12362, 0x0 }, - { 0x12462, 0x0 }, - { 0x12562, 0x0 }, - { 0x12662, 0x0 }, - { 0x12762, 0x0 }, - { 0x12862, 0x0 }, - { 0x13062, 0x0 }, - { 0x13162, 0x0 }, - { 0x13262, 0x0 }, - { 0x13362, 0x0 }, - { 0x13462, 0x0 }, - { 0x13562, 0x0 }, - { 0x13662, 0x0 }, - { 0x13762, 0x0 }, - { 0x13862, 0x0 }, - { 0x20077, 0x0 }, - { 0x10001, 0x0 }, - { 0x11001, 0x0 }, - { 0x12001, 0x0 }, - { 0x13001, 0x0 }, - { 0x10040, 0x0 }, - { 0x10140, 0x0 }, - { 0x10240, 0x0 }, - { 0x10340, 0x0 }, - { 0x10440, 0x0 }, - { 0x10540, 0x0 }, - { 0x10640, 0x0 }, - { 0x10740, 0x0 }, - { 0x10840, 0x0 }, - { 0x10030, 0x0 }, - { 0x10130, 0x0 }, - { 0x10230, 0x0 }, - { 0x10330, 0x0 }, - { 0x10430, 0x0 }, - { 0x10530, 0x0 }, - { 0x10630, 0x0 }, - { 0x10730, 0x0 }, - { 0x10830, 0x0 }, - { 0x11040, 0x0 }, - { 0x11140, 0x0 }, - { 0x11240, 0x0 }, - { 0x11340, 0x0 }, - { 0x11440, 0x0 }, - { 0x11540, 0x0 }, - { 0x11640, 0x0 }, - { 0x11740, 0x0 }, - { 0x11840, 0x0 }, - { 0x11030, 0x0 }, - { 0x11130, 0x0 }, - { 0x11230, 0x0 }, - { 0x11330, 0x0 }, - { 0x11430, 0x0 }, - { 0x11530, 0x0 }, - { 0x11630, 0x0 }, - { 0x11730, 0x0 }, - { 0x11830, 0x0 }, - { 0x12040, 0x0 }, - { 0x12140, 0x0 }, - { 0x12240, 0x0 }, - { 0x12340, 0x0 }, - { 0x12440, 0x0 }, - { 0x12540, 0x0 }, - { 0x12640, 0x0 }, - { 0x12740, 0x0 }, - { 0x12840, 0x0 }, - { 0x12030, 0x0 }, - { 0x12130, 0x0 }, - { 0x12230, 0x0 }, - { 0x12330, 0x0 }, - { 0x12430, 0x0 }, - { 0x12530, 0x0 }, - { 0x12630, 0x0 }, - { 0x12730, 0x0 }, - { 0x12830, 0x0 }, - { 0x13040, 0x0 }, - { 0x13140, 0x0 }, - { 0x13240, 0x0 }, - { 0x13340, 0x0 }, - { 0x13440, 0x0 }, - { 0x13540, 0x0 }, - { 0x13640, 0x0 }, - { 0x13740, 0x0 }, - { 0x13840, 0x0 }, - { 0x13030, 0x0 }, - { 0x13130, 0x0 }, - { 0x13230, 0x0 }, - { 0x13330, 0x0 }, - { 0x13430, 0x0 }, - { 0x13530, 0x0 }, - { 0x13630, 0x0 }, - { 0x13730, 0x0 }, - { 0x13830, 0x0 }, -}; - -uint32_t ddrphy_trained_csr_num = ARRAY_SIZE(ddrphy_trained_csr); diff --git a/drivers/ddr/imx/phy/ddrphy_train.c b/drivers/ddr/imx/phy/ddrphy_train.c index 2a2161dec33..1a2d071d6f1 100644 --- a/drivers/ddr/imx/phy/ddrphy_train.c +++ b/drivers/ddr/imx/phy/ddrphy_train.c @@ -90,7 +90,8 @@ int ddr_cfg_phy(struct dram_timing_info *dram_timing) } /* save the ddr PHY trained CSR in memory for low power use */ - ddrphy_trained_csr_save(ddrphy_trained_csr, ddrphy_trained_csr_num); + ddrphy_trained_csr_save(dram_timing->ddrphy_trained_csr, + dram_timing->ddrphy_trained_csr_num); return 0; } diff --git a/drivers/ddr/imx/phy/helper.c b/drivers/ddr/imx/phy/helper.c index c1fc800f191..b0dfc3a0b4f 100644 --- a/drivers/ddr/imx/phy/helper.c +++ b/drivers/ddr/imx/phy/helper.c @@ -181,7 +181,7 @@ void *dram_config_save(struct dram_timing_info *timing_info, unsigned long saved saved_timing->ddrc_cfg_num = timing_info->ddrc_cfg_num; saved_timing->ddrphy_cfg_num = timing_info->ddrphy_cfg_num; - saved_timing->ddrphy_trained_csr_num = ddrphy_trained_csr_num; + saved_timing->ddrphy_trained_csr_num = timing_info->ddrphy_trained_csr_num; saved_timing->ddrphy_pie_num = timing_info->ddrphy_pie_num; /* save the fsp table */ @@ -209,9 +209,9 @@ void *dram_config_save(struct dram_timing_info *timing_info, unsigned long saved /* save the ddrphy csr */ saved_timing->ddrphy_trained_csr = cfg; - for (i = 0; i < ddrphy_trained_csr_num; i++) { - cfg->reg = ddrphy_trained_csr[i].reg; - cfg->val = ddrphy_trained_csr[i].val; + for (i = 0; i < timing_info->ddrphy_trained_csr_num; i++) { + cfg->reg = timing_info->ddrphy_trained_csr[i].reg; + cfg->val = timing_info->ddrphy_trained_csr[i].val; cfg++; } -- 2.35.3

2 1

[v2 PATCH] net: fec_mxc: add DM_FLAG_ACTIVE_DMA flag for FEC network driver
by Meng Li 23 Dec '24

23 Dec '24

From: Meng Li <meng.li(a)windriver.com> When FEC network card works as the prime one in u-boot, and is in active status, kernel might crash during booting up stage, especially working with grub. Because the DMA of FEC is still in active status, and copy data into memory if there is network data received. In this case, if kernel allocated a part of memory that has overlay with the memory used by DMA, kernel memory may be destroyed and cause kernel crashes. Because before kernel boots up really, u-boot dm_remove_devices_flags() can call the remove callback of FEC driver with DM_FLAG_ACTIVE_DMA flag. In fecmxc_remove(), phy power is disabled, so there is no data received. In this way, it makes sure that there is no DMA action, so that avoid kernel crashing occurs. Signed-off-by: Meng Li <Meng.Li(a)windriver.com> --- v2: Fix a typo --- drivers/net/fec_mxc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index d6d5cb52fd..3ac6bd3f3c 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1491,4 +1491,5 @@ U_BOOT_DRIVER(fecmxc_gem) = { .ops = &fecmxc_ops, .priv_auto = sizeof(struct fec_priv), .plat_auto = sizeof(struct eth_pdata), + .flags = DM_FLAG_ACTIVE_DMA, }; -- 2.34.1

2 1

[PATCH v2] arm: dts: imx8mp-venice-gw7*xx: fix TPM reset
by Tim Harvey 23 Dec '24

23 Dec '24

With an IMX8MP based SOM the SPI RST is gpio4_9 instead of gpio1_11. Fix this. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- v2: include additional boards affected by this --- arch/arm/dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi | 16 +++++++--------- arch/arm/dts/imx8mp-venice-gw72xx-2x-u-boot.dtsi | 16 +++++++--------- arch/arm/dts/imx8mp-venice-gw73xx-2x-u-boot.dtsi | 16 +++++++--------- 3 files changed, 21 insertions(+), 27 deletions(-) diff --git a/arch/arm/dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi index 216a7a0d8d7c..a291b7abab62 100644 --- a/arch/arm/dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi @@ -4,15 +4,6 @@ */ #include "imx8mp-venice-gw702x-u-boot.dtsi" -&gpio1 { - tpm_rst { - gpio-hog; - output-high; - gpios = <11 GPIO_ACTIVE_HIGH>; - line-name = "tpm_rst#"; - }; -}; - &gpio4 { dio_1 { gpio-hog; @@ -21,6 +12,13 @@ line-name = "dio1"; }; + tpm_rst { + gpio-hog; + output-high; + gpios = <9 GPIO_ACTIVE_HIGH>; + line-name = "tpm_rst#"; + }; + dio_0 { gpio-hog; input; diff --git a/arch/arm/dts/imx8mp-venice-gw72xx-2x-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-gw72xx-2x-u-boot.dtsi index 525316d11892..bdf5370fcdf6 100644 --- a/arch/arm/dts/imx8mp-venice-gw72xx-2x-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-venice-gw72xx-2x-u-boot.dtsi @@ -4,15 +4,6 @@ */ #include "imx8mp-venice-gw702x-u-boot.dtsi" -&gpio1 { - tpm_rst { - gpio-hog; - output-high; - gpios = <11 GPIO_ACTIVE_HIGH>; - line-name = "tpm_rst#"; - }; -}; - &gpio4 { dio_1 { gpio-hog; @@ -21,6 +12,13 @@ line-name = "dio1"; }; + tpm_rst { + gpio-hog; + output-high; + gpios = <9 GPIO_ACTIVE_HIGH>; + line-name = "tpm_rst#"; + }; + dio_0 { gpio-hog; input; diff --git a/arch/arm/dts/imx8mp-venice-gw73xx-2x-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-gw73xx-2x-u-boot.dtsi index 4d0e9a1e67c5..7e6f66bd9dd9 100644 --- a/arch/arm/dts/imx8mp-venice-gw73xx-2x-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-venice-gw73xx-2x-u-boot.dtsi @@ -10,15 +10,6 @@ reset-post-delay-us = <300000>; }; -&gpio1 { - tpm_rst { - gpio-hog; - output-high; - gpios = <11 GPIO_ACTIVE_HIGH>; - line-name = "tpm_rst#"; - }; -}; - &gpio4 { dio_1 { gpio-hog; @@ -27,6 +18,13 @@ line-name = "dio1"; }; + tpm_rst { + gpio-hog; + output-high; + gpios = <9 GPIO_ACTIVE_HIGH>; + line-name = "tpm_rst#"; + }; + dio_0 { gpio-hog; input; -- 2.25.1

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[PATCH] imx8m*-venice: define suitable address for SPL_LOAD_FIT_ADDRESS
by Tim Harvey 23 Dec '24

23 Dec '24

define a suitable default address for CONFIG_SPL_LOAD_FIT_ADDRESS to make it easier on folks enabling HABv4. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 + configs/imx8mp_venice_defconfig | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index da248e4887e7..5f3c5be90ec6 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -31,6 +31,7 @@ CONFIG_SYS_MEMTEST_END=0x80000000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 44af3e61d5d3..38fc7e7f8255 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_MEMTEST_END=0x80000000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index bf296b13e2be..faf696fdbd1d 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_MEMTEST_END=0x80000000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y -- 2.25.1

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