November 2024 - U-Boot

[PATCH 0/2] pci: Add support for Qualcomm PCIe controller
by Neil Armstrong 22 Jan '25

22 Jan '25

Add support for the DWC PCIe controllers found on the Qualcomm SoCs, it requires introducing pcie_dw_find_capability() to properly configure the Host controller capabilities. Signed-off-by: Neil Armstrong <neil.armstrong(a)linaro.org> --- Neil Armstrong (2): pci: pcie_dw_common: introduce pcie_dw_find_capability() pci: Add support for Qualcomm PCIe controller drivers/pci/Kconfig | 8 + drivers/pci/Makefile | 1 + drivers/pci/pcie_dw_common.c | 42 ++++ drivers/pci/pcie_dw_common.h | 2 + drivers/pci/pcie_dw_qcom.c | 571 +++++++++++++++++++++++++++++++++++++++++++ include/pci.h | 4 + 6 files changed, 628 insertions(+) --- base-commit: 7fe55182d9263a62e18b450c97bdf0b8031e5667 change-id: 20241125-topic-pcie-controller-cf11210bf5b3 Best regards, -- Neil Armstrong <neil.armstrong(a)linaro.org>

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[PATCH 0/4] clk: qcom: add PCIe clocks
by Neil Armstrong 22 Jan '25

22 Jan '25

Add the PCIe clocks for the SM8550, SM8650 and X1E80100 platforms to enable support for PCIe feature. Depends on: - https://lore.kernel.org/all/20241118-topic-x1e80100-clk-v1-0-8841e87ad81f@l… Signed-off-by: Neil Armstrong <neil.armstrong(a)linaro.org> --- Neil Armstrong (4): clk: qcom: add clk_phy_mux_enable() for PCIe PIPE clock clk: qcom: sm8550: add support for PCIe clocks clk: qcom: sm8650: add support for PCIe clocks clk: qcom: x1e80100: add support for PCIe clocks drivers/clk/qcom/clock-qcom.c | 19 ++++++++++++++ drivers/clk/qcom/clock-qcom.h | 2 ++ drivers/clk/qcom/clock-sm8550.c | 36 ++++++++++++++++++++++++++ drivers/clk/qcom/clock-sm8650.c | 36 ++++++++++++++++++++++++++ drivers/clk/qcom/clock-x1e80100.c | 54 +++++++++++++++++++++++++++++++++++++++ 5 files changed, 147 insertions(+) --- base-commit: c7934881aa75d34aea2493322de0a417524ebf4a change-id: 20241125-topic-pcie-clk-8e345d8ace7a Best regards, -- Neil Armstrong <neil.armstrong(a)linaro.org>

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[PATCH] regulator: qcom-rpmh-regulator: add support for pmc8380 regulators
by Neil Armstrong 22 Jan '25

22 Jan '25

Add the PMC8380 regulator data found on the Snapdragon X Elite platforms. The tables are imported from the Linux driver. Signed-off-by: Neil Armstrong <neil.armstrong(a)linaro.org> --- drivers/power/regulator/qcom-rpmh-regulator.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/power/regulator/qcom-rpmh-regulator.c b/drivers/power/regulator/qcom-rpmh-regulator.c index 2dc261d83e3727a5b2f72a5d13c1ef17a9677a8c..70df51b5fa4ee4001b7eff6facc80957ada84391 100644 --- a/drivers/power/regulator/qcom-rpmh-regulator.c +++ b/drivers/power/regulator/qcom-rpmh-regulator.c @@ -536,6 +536,21 @@ static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = { {} }; +static const struct rpmh_vreg_init_data pmc8380_vreg_data[] = { + RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"), + RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"), + RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"), + RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_mv, "vdd-s4"), + RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"), + RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_lv, "vdd-s6"), + RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525_lv, "vdd-s7"), + RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525_lv, "vdd-s8"), + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), + {} +}; + /* probe an individual regulator */ static int rpmh_regulator_probe(struct udevice *dev) { @@ -662,6 +677,10 @@ static const struct udevice_id rpmh_regulator_ids[] = { .compatible = "qcom,pm8550vs-rpmh-regulators", .data = (ulong)pm8550vs_vreg_data, }, + { + .compatible = "qcom,pmc8380-rpmh-regulators", + .data = (ulong)pmc8380_vreg_data, + }, { /* sentinal */ }, }; --- base-commit: 7fe55182d9263a62e18b450c97bdf0b8031e5667 change-id: 20241125-topic-hamoa-pmc8380-rpmh-regulators-2b9460fcd7bd Best regards, -- Neil Armstrong <neil.armstrong(a)linaro.org>

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[PATCH 0/3] pinctrl: qcom: add clk_req functions
by Neil Armstrong 22 Jan '25

22 Jan '25

Add the missing PCIe clk_req functions for the SM8550, SM8650 and X1E80100 TLMM. Depends on: - https://lore.kernel.org/all/20241115-topic-x1e80100-pinctrl-v1-0-35f984226e… Signed-off-by: Neil Armstrong <neil.armstrong(a)linaro.org> --- Neil Armstrong (3): pinctrl: qcom: sm8550: add pcie1_clk_req_n function pinctrl: qcom: sm8650: add pcie[01]_clk_req_n function pinctrl: qcom: x1e80100: add pcie[3456ab]_clk functions drivers/pinctrl/qcom/pinctrl-sm8550.c | 1 + drivers/pinctrl/qcom/pinctrl-sm8650.c | 2 ++ drivers/pinctrl/qcom/pinctrl-x1e80100.c | 5 +++++ 3 files changed, 8 insertions(+) --- base-commit: 7a36c84ff57177ccd3107f62c8d14fa0093e0e76 change-id: 20241125-topic-pcie-pinctrl-77f1c184e73f Best regards, -- Neil Armstrong <neil.armstrong(a)linaro.org>

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[PATCH] button: qcom-pmic: add software debounce
by Caleb Connolly 22 Jan '25

22 Jan '25

This helps with reliability on some platforms. We should probably also configure the hardware debounce timer eventually. Signed-off-by: Caleb Connolly <caleb.connolly(a)linaro.org> --- drivers/button/button-qcom-pmic.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/button/button-qcom-pmic.c b/drivers/button/button-qcom-pmic.c index ad7fed3ddaaa..f9f0948ae095 100644 --- a/drivers/button/button-qcom-pmic.c +++ b/drivers/button/button-qcom-pmic.c @@ -14,8 +14,9 @@ #include <log.h> #include <power/pmic.h> #include <spmi/spmi.h> #include <linux/bitops.h> +#include <time.h> #define REG_TYPE 0x4 #define REG_SUBTYPE 0x5 @@ -30,8 +31,9 @@ struct qcom_pmic_btn_priv { u32 base; u32 status_bit; int code; struct udevice *pmic; + ulong last_release_time; }; #define PON_INT_RT_STS 0x10 #define PON_KPDPWR_N_SET 0 @@ -41,15 +43,23 @@ struct qcom_pmic_btn_priv { static enum button_state_t qcom_pwrkey_get_state(struct udevice *dev) { struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); + bool pressed; + int reg; - int reg = pmic_reg_read(priv->pmic, priv->base + PON_INT_RT_STS); + if (get_timer_us(0) - priv->last_release_time < 25000) + return BUTTON_OFF; + reg = pmic_reg_read(priv->pmic, priv->base + PON_INT_RT_STS); if (reg < 0) return 0; - return (reg & BIT(priv->status_bit)) != 0; + pressed = !!(reg & BIT(priv->status_bit)); + if (!pressed) + priv->last_release_time = get_timer_us(0); + + return pressed; } static int qcom_pwrkey_get_code(struct udevice *dev) { -- 2.47.0

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[PATCH 0/2] pinctrl: add support for X1E80100 TLMM
by Neil Armstrong 22 Jan '25

22 Jan '25

Add support for TLMM in X1E80100, and enable it in qcom_defconfig Signed-off-by: Neil Armstrong <neil.armstrong(a)linaro.org> --- Neil Armstrong (2): pinctrl: qcom: Add X1E80100 pinctrl driver qcom_defconfig: enable X1E80100 pinctrl driver configs/qcom_defconfig | 1 + drivers/pinctrl/qcom/Kconfig | 7 +++ drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-x1e80100.c | 100 ++++++++++++++++++++++++++++++++ 4 files changed, 109 insertions(+) --- base-commit: 56accc56b9aab87ef4809ccc588e1257969cd271 change-id: 20241115-topic-x1e80100-pinctrl-fb69c767b51b Best regards, -- Neil Armstrong <neil.armstrong(a)linaro.org>

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[PATCH] sunxi: pinephone: detect existed magnetometer and fixup dtb
by Andrey Skvortsov 21 Jan '25

21 Jan '25

In newer 1.2 PinePhone board revisions LIS3MDL magnetometer was replaced by AF8133J. They use the same PB1 pin in different modes. LIS3MDL uses it as an gpio input to handle interrupt. AF8133J uses it as an gpio output as a reset signal. It wasn't possible at runtime to enable both device tree nodes and detect supported sensor at probe time. AF8133J has reset pin (PB1) connected to the SoC. By default AF8133J is in a reset state and don't respond to probe request on I2C bus. Extra code would be needed to handle reset signal. Therefore this code uses LIS3MDL magnetometer instead of AF8133J. Introducing new dts 1.2b with AF8133J sensor would require probing in SPL. That would lead to pulling in into SPL I2C controller driver, RSB controller driver, introducing new AXP803 driver to power-up sensors for probe. It's working, but SPL is pretty size-constrained on A64 and doesn't have much space. Therefore fdt fixup is done in U-Boot proper without introducing new board revision and new dts. Signed-off-by: Andrey Skvortsov <andrej.skvortzov(a)gmail.com> Link: https://lore.kernel.org/all/20240908214718.36316-1-andrej.skvortzov@gmail.c… Link: https://lists.denx.de/pipermail/u-boot/2024-February/545700.html --- This patch was discussed previously as RFC. [1] All relevant kernel device-tree changes are merged. [2] 1. https://lists.denx.de/pipermail/u-boot/2024-February/545700.html 2. https://lore.kernel.org/all/20240908214718.36316-1-andrej.skvortzov@gmail.c… board/sunxi/board.c | 23 +++++++++++++++++++++++ configs/pinephone_defconfig | 1 + 2 files changed, 24 insertions(+) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 824c322a0dc..703081b403f 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -14,6 +14,7 @@ #include <dm.h> #include <env.h> #include <hang.h> +#include <i2c.h> #include <image.h> #include <init.h> #include <log.h> @@ -876,6 +877,27 @@ static void bluetooth_dt_fixup(void *blob) "local-bd-address", bdaddr, ETH_ALEN, 1); } +#define PINEPHONE_LIS3MDL_I2C_ADDR 0x1E +#define PINEPHONE_LIS3MDL_I2C_BUS 1 /* I2C1 */ + +static void board_dt_fixup(void *blob) +{ + struct udevice *bus, *dev; + + if (IS_ENABLED(CONFIG_PINEPHONE_DT_SELECTION) && + !fdt_node_check_compatible(blob, 0, "pine64,pinephone-1.2")) { + if (!uclass_get_device_by_seq(UCLASS_I2C, PINEPHONE_LIS3MDL_I2C_BUS, &bus)) { + dm_i2c_probe(bus, PINEPHONE_LIS3MDL_I2C_ADDR, 0, &dev); + fdt_set_status_by_compatible( + blob, "st,lis3mdl-magn", + dev ? FDT_STATUS_OKAY : FDT_STATUS_DISABLED); + fdt_set_status_by_compatible( + blob, "voltafield,af8133j", + dev ? FDT_STATUS_DISABLED : FDT_STATUS_OKAY); + } + } +} + int ft_board_setup(void *blob, struct bd_info *bd) { int __maybe_unused r; @@ -889,6 +911,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) fdt_fixup_ethernet(blob); bluetooth_dt_fixup(blob); + board_dt_fixup(blob); #ifdef CONFIG_VIDEO_DT_SIMPLEFB r = sunxi_simplefb_setup(blob); diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index 9d39204a439..0f9ab0c4662 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_PINEPHONE_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" +CONFIG_SYS_I2C_MVTWSI=y CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y CONFIG_LED_STATUS0=y -- 2.45.2

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[PATCH v2] sunxi: defconfig: Add pstore support for pinephone
by Andrey Skvortsov 20 Jan '25

20 Jan '25

pstore will allow users to catch kernel crashes and report them to developers. Modern (Android) phones have pstore usually enabled to get information about kernel crash, since it's the simplest way to get kernel backtrace on mobile device without serial console. Usually it's enabled by default in distribution kernels like Debian. CONFIG_PSTORE=y CONFIG_PSTORE_RAM=m systemd has service that automatically handles pstore and saves them in /var/lib/pstore for later usage. In general any DRAM address, that isn't overwritten during a boot is suitable for pstore. Range from 0x40000000 - 0x50000000 is heavily used by u-boot for internal use and to load kernel, fdt, fdto, scripts, pxefile and ramdisk later in the boot process. Ramdisk start address is 0x4FF00000, initramfs for kernel with some hacking features and debug info enabled can take more than 100Mb and final address will be around 0x58000000. Address 0x61000000 will most likely not overlap with that. Signed-off-by: Andrey Skvortsov <andrej.skvortzov(a)gmail.com> --- Changes since v1: - updated description with pstore usage details configs/pinephone_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index 9d39204a439..7b80cc3131b 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -10,6 +10,8 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_PINEPHONE_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_CMD_PSTORE=y +CONFIG_CMD_PSTORE_MEM_ADDR=0x61000000 CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y -- 2.45.2

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[PATCH v4 00/15] Make EFI memory allocations synchronous with LMB
by Sughosh Ganu 20 Jan '25

20 Jan '25

This is part two of the series to have the EFI and LMB modules have a coherent view of memory. Part one of this goal was to change the LMB module to have a global and persistent memory map. Those patches have now been applied to the next branch. These patches are changing the EFI memory allocation API's such that they rely on the LMB module to allocate RAM memory. This fixes the current scenario where the EFI memory module has no visibility of the allocations/reservations made by the LMB module. One thing to note here is that this is limited to the RAM memory region, i.e. the EFI_CONVENTIONAL_MEMORY type. Any other memory type that is to be added to the EFI memory map, still gets handled by the EFI memory module. Changes since V3: * Add comments for the LMB_NOOVERWRITE and LMB_NONOTIFY flags * Drop use of is_addr_in_ram() function * Drop use of CONFIG_MEM_MAP_UPDATE_NOTIFY symbol to check if the notification needs to be sent. * s/lmb_notify/lmb_should_notify * Put a check for EFI_LOADER in the lmb_should_notify() function Some test logs to highlight the issue that is being fixed by the series. Without patch series -------------------- lmb_dump_all: memory.count = 0x1 memory[0] [0x40000000-0x820fffff], 0x42100000 bytes flags: none reserved.count = 0x3 reserved[0] [0xe100000-0xeffffff], 0x00f00000 bytes flags: no-map reserved[1] [0x42000000-0x421fffff], 0x00200000 bytes flags: no-map reserved[2] [0x7f77da00-0x820fffff], 0x02982600 bytes flags: no-overwrite => efidebug memmap -- does not show regions allocated by lmb Missing TPMv2 device for EFI_TCG_PROTOCOL Type Start End Attributes ================ ================ ================ ========== CONVENTIONAL 0000000040000000-000000007f751000 WB BOOT DATA 000000007f751000-000000007f756000 WB RUNTIME DATA 000000007f756000-000000007f757000 WB|RT BOOT DATA 000000007f757000-000000007f758000 WB RUNTIME DATA 000000007f758000-000000007f77a000 WB|RT BOOT DATA 000000007f77a000-000000007f781000 WB BOOT CODE 000000007f781000-00000000807b5000 WB RUNTIME DATA 00000000807b5000-00000000807b6000 WB|RT BOOT CODE 00000000807b6000-00000000817c0000 WB RUNTIME CODE 00000000817c0000-00000000817d0000 WB|RT BOOT CODE 00000000817d0000-0000000082100000 WB => Trying to allocate EFI memory with already allocated region succeeds(should fail) --------------------------------------------------------------------------------- => efi_mem alloc 2000 42000000 Address returned 0x42000000 => efidebug memmap Type Start End Attributes ================ ================ ================ ========== CONVENTIONAL 0000000040000000-0000000042000000 WB BOOT DATA 0000000042000000-0000000042002000 WB CONVENTIONAL 0000000042002000-000000007f751000 WB BOOT DATA 000000007f751000-000000007f756000 WB RUNTIME DATA 000000007f756000-000000007f757000 WB|RT BOOT DATA 000000007f757000-000000007f758000 WB RUNTIME DATA 000000007f758000-000000007f77a000 WB|RT BOOT DATA 000000007f77a000-000000007f781000 WB BOOT CODE 000000007f781000-00000000807b5000 WB RUNTIME DATA 00000000807b5000-00000000807b6000 WB|RT BOOT CODE 00000000807b6000-00000000817c0000 WB RUNTIME CODE 00000000817c0000-00000000817d0000 WB|RT BOOT CODE 00000000817d0000-0000000082100000 WB => With patch series ----------------- lmb_dump_all: memory.count = 0x1 memory[0] [0x40000000-0x820fffff], 0x42100000 bytes flags: none reserved.count = 0x4 reserved[0] [0xe100000-0xeffffff], 0x00f00000 bytes flags: no-map reserved[1] [0x42000000-0x421fffff], 0x00200000 bytes flags: no-map reserved[2] [0x7f74f000-0x7f77dfff], 0x0002f000 bytes flags: no-notify, no-overwrite reserved[3] [0x7f77ea00-0x820fffff], 0x02981600 bytes flags: no-overwrite => efidebug memmap Type Start End Attributes ================ ================ ================ ========== BOOT DATA 000000000e100000-000000000f000000 WB CONVENTIONAL 0000000040000000-0000000042000000 WB BOOT DATA 0000000042000000-0000000042200000 WB CONVENTIONAL 0000000042200000-000000007f74e000 WB BOOT DATA 000000007f74e000-000000007f753000 WB RUNTIME DATA 000000007f753000-000000007f754000 WB|RT BOOT DATA 000000007f754000-000000007f755000 WB RUNTIME DATA 000000007f755000-000000007f777000 WB|RT BOOT DATA 000000007f777000-00000000807b6000 WB RUNTIME DATA 00000000807b6000-00000000807b7000 WB|RT BOOT DATA 00000000807b7000-00000000817c0000 WB RUNTIME CODE 00000000817c0000-00000000817d0000 WB|RT BOOT DATA 00000000817d0000-0000000082100000 WB Trying to allocate EFI memory with already allocated region fails ----------------------------------------------------------------- => efi_mem alloc 2000 42000000 efi_allocate_pages failed 800000000000000e => Trying to allocate EFI memory with non-allocated region succeeds ---------------------------------------------------------------- => efi_mem alloc 2000 42200000 Address returned 0x42200000 => efidebug memmap Type Start End Attributes ================ ================ ================ ========== BOOT DATA 000000000e100000-000000000f000000 WB CONVENTIONAL 0000000040000000-0000000042000000 WB BOOT DATA 0000000042000000-0000000042202000 WB CONVENTIONAL 0000000042202000-000000007f74d000 WB BOOT DATA 000000007f74d000-000000007f752000 WB RUNTIME DATA 000000007f752000-000000007f753000 WB|RT BOOT DATA 000000007f753000-000000007f754000 WB RUNTIME DATA 000000007f754000-000000007f776000 WB|RT BOOT DATA 000000007f776000-00000000807b5000 WB RUNTIME DATA 00000000807b5000-00000000807b6000 WB|RT BOOT DATA 00000000807b6000-00000000817c0000 WB RUNTIME CODE 00000000817c0000-00000000817d0000 WB|RT BOOT DATA 00000000817d0000-0000000082100000 WB => lmb_dump_all: memory.count = 0x1 memory[0] [0x40000000-0x820fffff], 0x42100000 bytes flags: none reserved.count = 0x5 reserved[0] [0xe100000-0xeffffff], 0x00f00000 bytes flags: no-map reserved[1] [0x42000000-0x421fffff], 0x00200000 bytes flags: no-map reserved[2] [0x42200000-0x42201fff], 0x00002000 bytes flags: no-notify, no-overwrite reserved[3] [0x7f74e000-0x7f77cfff], 0x0002f000 bytes flags: no-notify, no-overwrite reserved[4] [0x7f77da00-0x820fffff], 0x02982600 bytes flags: no-overwrite Sughosh Ganu (15): lmb: add versions of the lmb API with flags lmb: add a flag to allow suppressing memory map change notification lmb: add and reserve memory above ram_top efi: memory: use the lmb API's for allocating and freeing memory lmb: notify of any changes to the LMB memory map efi_memory: do not add U-Boot memory to the memory map ti: k3: remove efi_add_known_memory() function definition stm32mp: remove efi_add_known_memory() function definition lmb: allow for boards to specify memory map layerscape: use the lmb API's to add RAM memory x86: e820: use the lmb API for adding RAM memory efi_memory: do not add RAM memory to the memory map lmb: remove call to efi_lmb_reserve() efi_memory: rename variable to highlight overlap with free memory lmb: replace the double-underscore with single-underscore for all functions arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 8 +- arch/arm/mach-k3/common.c | 11 -- arch/arm/mach-stm32mp/dram_init.c | 11 -- arch/x86/lib/e820.c | 47 +++-- include/efi_loader.h | 27 ++- include/lmb.h | 63 ++++++ lib/Kconfig | 19 ++ lib/efi_loader/Kconfig | 1 + lib/efi_loader/efi_memory.c | 217 ++++++--------------- lib/lmb.c | 242 ++++++++++++++++++------ 10 files changed, 389 insertions(+), 257 deletions(-) -- 2.34.1

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[PATCH 1/1] test: str_ut.c depends on CONFIG_STRTO
by Heinrich Schuchardt 19 Jan '25

19 Jan '25

The string conversion functions are implemented in lib/strto.c which is only compiled if CONFIG_STRTO=y. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- test/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/Makefile b/test/Makefile index 145c952d2c3..efd5ba7acfd 100644 --- a/test/Makefile +++ b/test/Makefile @@ -21,7 +21,7 @@ ifneq ($(CONFIG_HUSH_PARSER),) obj-$(CONFIG_$(XPL_)CMDLINE) += hush/ endif obj-$(CONFIG_$(XPL_)CMDLINE) += print_ut.o -obj-$(CONFIG_$(XPL_)CMDLINE) += str_ut.o +obj-$(CONFIG_$(PHASE_)STRTO) += str_ut.o obj-$(CONFIG_UT_TIME) += time_ut.o obj-y += ut.o -- 2.45.2

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