September 2023 - U-Boot

[PATCH v2 0/4] Populate kaslr seed with TPM
by seanedmond＠linux.microsoft.com 07 Sep '23

07 Sep '23

From: Sean Edmond <seanedmond(a)microsoft.com> This patch series creates a common API (fdt_fixup_kaslr_seed()) for populating the kaslr seed in the DTB. Existing users (kaslrseed, and ARMv8 sec firmware) have been updated to use this common API. New functionality has been introduced to populate the kaslr using the TPM interface. This can be enabled with CONFIG_KASLR_TPM_SEED. changes in v2: - fdt_fixup_kaslr_seed() uses the ofnode API - Add root_ofnode_from_fdt() to get the root node from an FDT and perform error checking on the oftree - add comments to exported functions - Add error checking in image_setup_libfdt() for return from fdt_tpm_kaslr_seed() - uclass_get_device() -> uclass_first_device_err() - Change default config for OFNODE_MULTI_TREE (y if !OF_LIVE) Dhananjay Phadke (2): fdt: common API to populate kaslr seed fdt: kaslr seed from tpm entropy Sean Edmond (2): cmd: kaslrseed: Use common API to fixup FDT dm: core: Modify default for OFNODE_MULTI_TREE arch/arm/cpu/armv8/sec_firmware.c | 39 +++++++++--------------- boot/image-fdt.c | 15 ++++++++++ cmd/kaslrseed.c | 22 +++++--------- common/fdt_support.c | 49 +++++++++++++++++++++++++++++++ drivers/core/Kconfig | 2 +- drivers/core/ofnode.c | 17 +++++++++++ include/dm/ofnode.h | 12 ++++++++ include/fdt_support.h | 17 +++++++++++ lib/Kconfig | 9 ++++++ 9 files changed, 142 insertions(+), 40 deletions(-) -- 2.40.0

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[PATCH] sandbox: test: Fix typo in test.dts
by Michal Simek 07 Sep '23

07 Sep '23

s/parititon/partition/ Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- arch/sandbox/dts/test.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index cf1b3da9cace..19f184e791bf 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -112,7 +112,7 @@ /* * This is used for the VBE OS-request tests. A FAT filesystem * created in a partition with the VBE information appearing - * before the parititon starts + * before the partition starts */ firmware0 { bootph-verify; -- 2.36.1

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[PATCH 0/8] x86: Fixes for chromebook_link64 and chromebook_samus_tpl
by Simon Glass 07 Sep '23

07 Sep '23

These boards have various problems which prevent them from booting. In the case of link there was a recent regression with PCI probing added to SPL. For samus_tpl it needs a few tweaks to get things back up and running. This series resolves all known issues. Simon Glass (8): x86: broadwell: Show the memory delay x86: Add some log categories x86: samus_tpl: Correct text base and alloc sizes x86: spl: Change the condition for copying U-Boot to RAM x86: broadwell: Avoid initing the CPU twice x86: broadwell: Set up MTRRs spl: x86: Avoid starting up PCI automatically in SPL x86: doc: Update the list of supported Chromebooks arch/x86/cpu/broadwell/cpu.c | 10 +++++----- arch/x86/cpu/broadwell/sdram.c | 2 ++ arch/x86/cpu/intel_common/mrc.c | 18 +++++++++++++++++- arch/x86/dts/chromebook_samus.dts | 1 + arch/x86/lib/init_helpers.c | 7 +++---- arch/x86/lib/spl.c | 2 +- arch/x86/lib/tpl.c | 2 ++ common/spl/spl.c | 2 +- configs/chromebook_samus_tpl_defconfig | 4 +++- doc/arch/x86.rst | 5 +++-- 10 files changed, 38 insertions(+), 15 deletions(-) -- 2.42.0.rc1.204.g551eb34607-goog

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[RFC] make sandbox UT more generic
by AKASHI Takahiro 07 Sep '23

07 Sep '23

Hi, I'm working on implementing SCMI-based pinctrl/gpio driver, and want to re-use sandbox UT to test the code. However, It is somehow sandbox-specific (with additional DT nodes). How can/should we make it more generic for other targets/drivers rather than just by copying the test code? (I have already created a test for pinmux since there is only one existing scenario, but gpio test has many.) Even if I say 'generic', my case may be special since real hardware (device drivers) cannot always run all the test cases, while SCMI-based drivers potentially can with a dummy SCMI server for sandbox. See: drivers/firmware/scmi/sandbox-scmi_agent.c Thanks, -Takahiro Akashi

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[PATCH 1/1] timer: document the unit of the timer rate
by Heinrich Schuchardt 07 Sep '23

07 Sep '23

To avoid confusion document that timer_dev_priv.clock_rate and timer_get_rate() yield the timer rate in hertz. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- include/timer.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/timer.h b/include/timer.h index 311ce6b2c3..091d8dfa22 100644 --- a/include/timer.h +++ b/include/timer.h @@ -55,10 +55,10 @@ u64 timer_conv_64(u32 count); int timer_get_count(struct udevice *dev, u64 *count); /** - * timer_get_rate() - Get the timer input clock frequency + * timer_get_rate() - Get the timer input clock frequency in Hz * @dev: The timer device * - * Return: the timer input clock frequency + * Return: the timer input clock frequency in Hz */ unsigned long timer_get_rate(struct udevice *dev); @@ -87,7 +87,7 @@ struct timer_ops { /** * struct timer_dev_priv - information about a device used by the uclass * - * @clock_rate: the timer input clock frequency + * @clock_rate: the timer input clock frequency in Hz */ struct timer_dev_priv { unsigned long clock_rate; -- 2.40.1

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[PATCH 0/3] Do not setup boot_targets if driver is not enabled
by Venkatesh Yadav Abbarapu 07 Sep '23

07 Sep '23

Fixing the boot_targets for versal-net, versal and zynqmp platforms. Venkatesh Yadav Abbarapu (3): xilinx: versal-net: Do not setup boot_targets if driver is not enabled xilinx: versal: Do not setup boot_targets if driver is not enabled xilinx: zynqmp: Do not setup boot_targets if driver is not enabled board/xilinx/versal-net/board.c | 76 ++++++++++++++++----------------- board/xilinx/versal/board.c | 67 +++++++++++++++-------------- board/xilinx/zynqmp/zynqmp.c | 71 +++++++++++++++--------------- 3 files changed, 108 insertions(+), 106 deletions(-) -- 2.17.1

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[PATCH v2 1/2] dm: core: ofnode: Add ofnode_read_bootscript_flash()
by Michal Simek 07 Sep '23

07 Sep '23

ofnode_read_bootscript_flash() reads bootscript address from /options/u-boot DT node. bootscr-flash-offset and bootscr-flash-size properties are read and values are filled. When bootscr-flash-size is not defined, bootscr-flash-offset property is unusable that's why cleaned. Both of these properties should be defined to function properly. Also add test to cover this new function. Reviewed-by: Simon Glass <sjg(a)chromium.org> Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- Changes in v2: - Add missing static inline for !DM case (found by CI loop) arch/sandbox/dts/test.dts | 2 ++ drivers/core/ofnode.c | 34 ++++++++++++++++++++++++++++++++++ include/dm/ofnode.h | 27 +++++++++++++++++++++++++++ test/dm/ofnode.c | 9 +++++++-- 4 files changed, 70 insertions(+), 2 deletions(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 84879cc31ac0..cedb66af09e7 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -83,6 +83,8 @@ u-boot { compatible = "u-boot,config"; bootscr-ram-offset = /bits/ 64 <0x12345678>; + bootscr-flash-offset = /bits/ 64 <0>; + bootscr-flash-size = /bits/ 64 <0x2000>; }; }; diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index d94f0300c30a..023aad06ddc3 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -1588,6 +1588,40 @@ int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset) return 0; } +int ofnode_read_bootscript_flash(u64 *bootscr_flash_offset, + u64 *bootscr_flash_size) +{ + int ret; + ofnode uboot; + + *bootscr_flash_offset = 0; + *bootscr_flash_size = 0; + + uboot = ofnode_path("/options/u-boot"); + if (!ofnode_valid(uboot)) { + printf("%s: Missing /u-boot node\n", __func__); + return -EINVAL; + } + + ret = ofnode_read_u64(uboot, "bootscr-flash-offset", + bootscr_flash_offset); + if (ret) + return -EINVAL; + + ret = ofnode_read_u64(uboot, "bootscr-flash-size", + bootscr_flash_size); + if (ret) + return -EINVAL; + + if (!bootscr_flash_size) { + debug("bootscr-flash-size is zero. Ignoring properties!\n"); + *bootscr_flash_offset = 0; + return -EINVAL; + } + + return 0; +} + ofnode ofnode_get_phy_node(ofnode node) { /* DT node properties that reference a PHY node */ diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index c1afa69e1c56..6f8dc4fb4551 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -1521,6 +1521,27 @@ const char *ofnode_conf_read_str(const char *prop_name); */ int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset); +/** + * ofnode_read_bootscript_flash() - Read bootscr-flash-offset/size + * + * @bootscr_flash_offset: pointer to 64bit offset where bootscr-flash-offset + * property value is stored + * @bootscr_flash_size: pointer to 64bit size where bootscr-flash-size property + * value is stored + * + * This reads a bootscr-flash-offset and bootscr-flash-size properties from + * the /options/u-boot/ node of the devicetree. bootscr-flash-offset holds + * the offset of the boot script file from start of flash. bootscr-flash-size + * holds the boot script size in flash. When bootscr-flash-size is not defined, + * bootscr-flash-offset property is cleaned. + * + * This only works with the control FDT. + * + * Return: 0 if OK, -EINVAL if property is not found or incorrect. + */ +int ofnode_read_bootscript_flash(u64 *bootscr_flash_offset, + u64 *bootscr_flash_size); + #else /* CONFIG_DM */ static inline bool ofnode_conf_read_bool(const char *prop_name) { @@ -1542,6 +1563,12 @@ static inline int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *boot return -EINVAL; } +static inline int ofnode_read_bootscript_flash(u64 *bootscr_flash_offset, + u64 *bootscr_flash_size) +{ + return -EINVAL; +} + #endif /* CONFIG_DM */ /** diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index a4e04f23784f..d84b738ed7c4 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -585,14 +585,19 @@ DM_TEST(dm_test_ofnode_conf, 0); static int dm_test_ofnode_options(struct unit_test_state *uts) { - u64 bootscr_address; - u64 bootscr_offset; + u64 bootscr_address, bootscr_offset; + u64 bootscr_flash_offset, bootscr_flash_size; ut_assertok(ofnode_read_bootscript_address(&bootscr_address, &bootscr_offset)); ut_asserteq_64(0, bootscr_address); ut_asserteq_64(0x12345678, bootscr_offset); + ut_assertok(ofnode_read_bootscript_flash(&bootscr_flash_offset, + &bootscr_flash_size)); + ut_asserteq_64(0, bootscr_flash_offset); + ut_asserteq_64(0x2000, bootscr_flash_size); + return 0; } DM_TEST(dm_test_ofnode_options, 0); -- 2.36.1

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[PATCH v2] arm64: zynqmp: Add output-enable pins to SOMs
by Michal Simek 07 Sep '23

07 Sep '23

From: Neal Frager <neal.frager(a)amd.com> Now that the zynqmp pinctrl driver supports the tri-state registers, make sure that the pins requiring output-enable are configured appropriately for SOMs. Without it, all tristate setting for MIOs, which are not related to SOM itself, are using default configuration which is not correct setting. It means SDs, USBs, ethernet, etc. are not working properly. In past it was fixed through calling tristate configuration via bootcmd: usb_init=mw 0xFF180208 2020 kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \ gpio toggle gpio@ff0a000038 Signed-off-by: Neal Frager <neal.frager(a)amd.com> Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- Changes in v2: - update commit message - add also fixes for kr260-revB and kv260-revA/B arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 6 ++++++ arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 6 ++++++ arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 5 +++++ arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 5 +++++ 4 files changed, 22 insertions(+) diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts index d318773bd9d6..30a0230d4767 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts @@ -250,6 +250,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -301,6 +302,7 @@ conf-bootstrap { pins = "MIO45", "MIO47", "MIO49"; bias-disable; + output-enable; low-power-disable; }; @@ -308,6 +310,7 @@ pins = "MIO38", "MIO39", "MIO40", "MIO41", "MIO42", "MIO43"; bias-disable; + output-enable; low-power-enable; }; @@ -316,6 +319,7 @@ slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; bias-disable; + output-enable; }; mux-mdio { @@ -346,6 +350,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; @@ -373,6 +378,7 @@ pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts index 69dba0761b37..8f4c52d6d643 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts @@ -250,6 +250,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -301,6 +302,7 @@ conf-bootstrap { pins = "MIO45", "MIO47", "MIO49"; bias-disable; + output-enable; low-power-disable; }; @@ -308,6 +310,7 @@ pins = "MIO38", "MIO39", "MIO40", "MIO41", "MIO42", "MIO43"; bias-disable; + output-enable; low-power-enable; }; @@ -316,6 +319,7 @@ slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; bias-disable; + output-enable; }; mux-mdio { @@ -346,6 +350,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; @@ -373,6 +378,7 @@ pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts index a81b3f6f51ad..55bef1df75d0 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts @@ -205,6 +205,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -256,6 +257,7 @@ conf-bootstrap { pins = "MIO71", "MIO73", "MIO75"; bias-disable; + output-enable; low-power-disable; }; @@ -263,6 +265,7 @@ pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", "MIO69"; bias-disable; + output-enable; low-power-enable; }; @@ -271,6 +274,7 @@ slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; bias-disable; + output-enable; }; mux-mdio { @@ -301,6 +305,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts index f935f25c887f..1b1d9e772f55 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts @@ -193,6 +193,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -244,6 +245,7 @@ conf-bootstrap { pins = "MIO71", "MIO73", "MIO75"; bias-disable; + output-enable; low-power-disable; }; @@ -251,6 +253,7 @@ pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", "MIO69"; bias-disable; + output-enable; low-power-enable; }; @@ -259,6 +262,7 @@ slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; bias-disable; + output-enable; }; mux-mdio { @@ -289,6 +293,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; -- 2.36.1

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[PATCH v5 1/2] dm: core: ofnode: Add ofnode_read_bootscript_address()
by Michal Simek 07 Sep '23

07 Sep '23

ofnode_read_bootscript_address() reads bootscript address from /options/u-boot DT node. bootscr-address or bootscr-ram-offset properties are read and values are filled. bootscr-address has higher priority than bootscr-ram-offset and the only one should be described in DT. Also add test to cover this new function. Reviewed-by: Simon Glass <sjg(a)chromium.org> Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- Changes in v5: - CI loop found some issues. Missing errno.h, multiple ofnode_read_bootscript_address() because of missing static inline for !DM cases Changes in v4: - Update ofnode test based on review from Simon Changes in v3: - new patch in this series arch/sandbox/dts/test.dts | 7 +++++++ drivers/core/ofnode.c | 25 +++++++++++++++++++++++++ include/dm/ofnode.h | 26 ++++++++++++++++++++++++++ test/dm/ofnode.c | 14 ++++++++++++++ 4 files changed, 72 insertions(+) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index f351d5cb84b0..84879cc31ac0 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -79,6 +79,13 @@ }; }; + options { + u-boot { + compatible = "u-boot,config"; + bootscr-ram-offset = /bits/ 64 <0x12345678>; + }; + }; + bootstd { bootph-verify; compatible = "u-boot,boot-std"; diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 8df16e56af5c..d94f0300c30a 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -1563,6 +1563,31 @@ const char *ofnode_conf_read_str(const char *prop_name) return ofnode_read_string(node, prop_name); } +int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset) +{ + int ret; + ofnode uboot; + + *bootscr_address = 0; + *bootscr_offset = 0; + + uboot = ofnode_path("/options/u-boot"); + if (!ofnode_valid(uboot)) { + printf("%s: Missing /u-boot node\n", __func__); + return -EINVAL; + } + + ret = ofnode_read_u64(uboot, "bootscr-address", bootscr_address); + if (ret) { + ret = ofnode_read_u64(uboot, "bootscr-ram-offset", + bootscr_offset); + if (ret) + return -EINVAL; + } + + return 0; +} + ofnode ofnode_get_phy_node(ofnode node) { /* DT node properties that reference a PHY node */ diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 0f38b3e736de..c1afa69e1c56 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -20,6 +20,7 @@ struct resource; #include <dm/ofnode_decl.h> +#include <linux/errno.h> struct ofnode_phandle_args { ofnode node; @@ -1500,6 +1501,26 @@ int ofnode_conf_read_int(const char *prop_name, int default_val); */ const char *ofnode_conf_read_str(const char *prop_name); +/** + * ofnode_read_bootscript_address() - Read bootscr-address or bootscr-ram-offset + * + * @bootscr_address: pointer to 64bit address where bootscr-address property value + * is stored + * @bootscr_offset: pointer to 64bit offset address where bootscr-ram-offset + * property value is stored + * + * This reads a bootscr-address or bootscr-ram-offset property from + * the /options/u-boot/ node of the devicetree. bootscr-address holds the full + * address of the boot script file. bootscr-ram-offset holds the boot script + * file offset from the start of the ram base address. When bootscr-address is + * defined, bootscr-ram-offset property is ignored. + * + * This only works with the control FDT. + * + * Return: 0 if OK, -EINVAL if property is not found. + */ +int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset); + #else /* CONFIG_DM */ static inline bool ofnode_conf_read_bool(const char *prop_name) { @@ -1516,6 +1537,11 @@ static inline const char *ofnode_conf_read_str(const char *prop_name) return NULL; } +static inline int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset) +{ + return -EINVAL; +} + #endif /* CONFIG_DM */ /** diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index 6fbebc7da085..a4e04f23784f 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -583,6 +583,20 @@ static int dm_test_ofnode_conf(struct unit_test_state *uts) } DM_TEST(dm_test_ofnode_conf, 0); +static int dm_test_ofnode_options(struct unit_test_state *uts) +{ + u64 bootscr_address; + u64 bootscr_offset; + + ut_assertok(ofnode_read_bootscript_address(&bootscr_address, + &bootscr_offset)); + ut_asserteq_64(0, bootscr_address); + ut_asserteq_64(0x12345678, bootscr_offset); + + return 0; +} +DM_TEST(dm_test_ofnode_options, 0); + static int dm_test_ofnode_for_each_compatible_node(struct unit_test_state *uts) { const char compatible[] = "denx,u-boot-fdt-test"; -- 2.36.1

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[PATCH v2] clk: Dont return error when assigned-clocks is empty or missing
by Michal Simek 07 Sep '23

07 Sep '23

From: Ashok Reddy Soma <ashok.reddy.soma(a)amd.com> There is a chance that assigned-clock-rates is given and assigned-clocks could be empty. Dont return error in that case, because the probe of the corresponding driver will not be called at all if this fails. Better to continue to look for it and return 0. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma(a)amd.com> Signed-off-by: Michal Simek <michal.simek(a)amd.com> Reviewed-by: Tom Rini <trini(a)konsulko.com> --- Changes in v2: - Add also test to cover it - Add Tom's reviewed-by line arch/sandbox/dts/test.dts | 16 ++++++++++++++++ drivers/clk/clk-uclass.c | 8 +++++++- test/dm/clk.c | 9 +++++++++ 3 files changed, 32 insertions(+), 1 deletion(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index ff9f9222e6f9..90f876ac9c78 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -589,6 +589,22 @@ clock-names = "fixed", "i2c", "spi", "uart2", "uart1"; }; + clk-test2 { + compatible = "sandbox,clk-test"; + assigned-clock-rates = <321>; + }; + + clk-test3 { + compatible = "sandbox,clk-test"; + assigned-clocks = <&clk_sandbox 1>; + }; + + clk-test4 { + compatible = "sandbox,clk-test"; + assigned-clock-rates = <654>, <321>; + assigned-clocks = <&clk_sandbox 1>; + }; + ccf: clk-ccf { compatible = "sandbox,clk-ccf"; }; diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index dc3e9d6a2615..f186fcbcdb86 100644 --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c @@ -329,7 +329,13 @@ static int clk_set_default_rates(struct udevice *dev, dev_dbg(dev, "could not get assigned clock %d (err = %d)\n", index, ret); - continue; + /* Skip if it is empty */ + if (ret == -ENOENT) { + ret = 0; + continue; + } + + return ret; } /* This is clk provider device trying to program itself diff --git a/test/dm/clk.c b/test/dm/clk.c index f48de05436bf..01417fbd8257 100644 --- a/test/dm/clk.c +++ b/test/dm/clk.c @@ -36,6 +36,15 @@ static int dm_test_clk_base(struct unit_test_state *uts) ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true); ut_asserteq(clk_method1.id, clk_method2.id); + ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test2", &dev)); + ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE)); + + ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test3", &dev)); + ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE)); + + ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test4", &dev)); + ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE)); + return 0; } -- 2.36.1

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