September 2023 - U-Boot

[PATCH] RFT: mips: implement __udivdi3
by Linus Walleij 21 Sep '23

21 Sep '23

Squashfs wasn't compiling because the lldiv() directives turn into __udivdi3 and we are using private libgcc. This is just copied from the Linux kernel v6.6-rc1 arch/mips/include/asm/div64.h and then adjusted for U-Boot. After this squashfs compiles for MIPS. Cc: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Cc: Mauro Condarelli <mc5686(a)mclink.it> Cc: Ralf Baechle <ralf(a)linux-mips.org> Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- I can't test this because it didn't work for MTD devices as I had expected, but I saw Mauro had this problem before so I think I might have fixed it. I better put the patch out there rather than let it sit on my drive. --- arch/mips/lib/Makefile | 2 +- arch/mips/lib/udivdi3.c | 86 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 87 insertions(+), 1 deletion(-) create mode 100644 arch/mips/lib/udivdi3.c diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 9ee1fcb5c702..1621cc9a1ff9 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -14,4 +14,4 @@ obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_GO) += boot.o obj-$(CONFIG_SPL_BUILD) += spl.o -lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashldi3.o ashrdi3.o lshrdi3.o +lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashldi3.o ashrdi3.o lshrdi3.o udivdi3.o diff --git a/arch/mips/lib/udivdi3.c b/arch/mips/lib/udivdi3.c new file mode 100644 index 000000000000..6a4ee5fa46ab --- /dev/null +++ b/arch/mips/lib/udivdi3.c @@ -0,0 +1,86 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2000, 2004, 2021 Maciej W. Rozycki + * Copyright (C) 2003, 07 Ralf Baechle (ralf(a)linux-mips.org) + */ + +#include "libgcc.h" + +/* + * No traps on overflows for any of these... + */ + +#define do_div64_32(res, high, low, base) ({ \ + unsigned long __cf, __tmp, __tmp2, __i; \ + unsigned long __quot32, __mod32; \ + \ + __asm__( \ + " .set push \n" \ + " .set noat \n" \ + " .set noreorder \n" \ + " move %2, $0 \n" \ + " move %3, $0 \n" \ + " b 1f \n" \ + " li %4, 0x21 \n" \ + "0: \n" \ + " sll $1, %0, 0x1 \n" \ + " srl %3, %0, 0x1f \n" \ + " or %0, $1, %5 \n" \ + " sll %1, %1, 0x1 \n" \ + " sll %2, %2, 0x1 \n" \ + "1: \n" \ + " bnez %3, 2f \n" \ + " sltu %5, %0, %z6 \n" \ + " bnez %5, 3f \n" \ + "2: \n" \ + " addiu %4, %4, -1 \n" \ + " subu %0, %0, %z6 \n" \ + " addiu %2, %2, 1 \n" \ + "3: \n" \ + " bnez %4, 0b \n" \ + " srl %5, %1, 0x1f \n" \ + " .set pop" \ + : "=&r" (__mod32), "=&r" (__tmp), \ + "=&r" (__quot32), "=&r" (__cf), \ + "=&r" (__i), "=&r" (__tmp2) \ + : "Jr" (base), "0" (high), "1" (low)); \ + \ + (res) = __quot32; \ + __mod32; \ +}) + +#define __div64_32(n, base) ({ \ + unsigned long __upper, __low, __high, __radix; \ + unsigned long long __quot; \ + unsigned long long __div; \ + unsigned long __mod; \ + \ + __div = (*n); \ + __radix = (base); \ + \ + __high = __div >> 32; \ + __low = __div; \ + \ + if (__high < __radix) { \ + __upper = __high; \ + __high = 0; \ + } else { \ + __upper = __high % __radix; \ + __high /= __radix; \ + } \ + \ + __mod = do_div64_32(__low, __upper, __low, __radix); \ + \ + __quot = __high; \ + __quot = __quot << 32 | __low; \ + (*n) = __quot; \ + __mod; \ +}) + +long long __udivdi3(long long u, word_type b) +{ + long long ret = u; + + __div64_32(&ret, b); + return ret; +} -- 2.41.0

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[PULL] u-boot-riscv/master
by Leo Liang 21 Sep '23

21 Sep '23

Hi Tom, The following changes since commit b9b83a86f0e84e837191db120c279a9cc0e3434b: Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh (2023-09-17 09:25:42 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 43177705ab29ed1ccca970096de1ef3c6095e7e6: board: visionfive2: Fixup memory size passed to kernel (2023-09-20 20:30:30 +0800) CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/17777 ---------------------------------------------------------------- + Fixup memory size passed to kernel ---------------------------------------------------------------- Shengyu Qu (2): configs: visionfive2: Enable CONFIG_OF_BOARD_SETUP board: visionfive2: Fixup memory size passed to kernel board/starfive/visionfive2/starfive_visionfive2.c | 7 +++++++ configs/starfive_visionfive2_defconfig | 1 + 2 files changed, 8 insertions(+) Best regards, Leo

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[GIT PULL] xilinx patches for v2024.01-rc1 v2
by Michal Simek 21 Sep '23

21 Sep '23

Hi Tom, please pull these patches to your next branch. I am sending it as v2 in spite of v1 didn't really went through. I created tag but CI failed because of sandbox CI trace failure. After fixing it and reviewing by Simon I am adding it to be able to extend ofnode functions for getting functionality for our SOCs. All non Xilinx patches are reviewed mostly by Simon. There are other pending changes which are still under review which should go to v2024.01 but I wanted to get this part done because amount of patches is bigger than I would like have. I was thinking about sending cmd/flash_is_unloacked fix to 2023.07 but it looks like none is actually using spi locking that's why it shouldn't be a problem to fix in 2024.01. But feel free to pick it up to master if you like. Thanks, Michal The following changes since commit c58ee1c9946a1550b1f6fee2b25da9ecc89baf71: Merge branch '2023-09-19-tidy-up-some-kconfig-options' into next (2023-09-19 17:44:18 -0400) are available in the Git repository at: git@source.denx.de:u-boot/custodians/u-boot-microblaze.git tags/xilinx-for-v2024.01-rc1-v2 for you to fetch changes up to a3ade3dae4d93f9b5282ddb4885d69161729ec6d: spi: zynqmp_qspi: Workaround for small data cache issue (2023-09-21 13:20:12 +0200) ---------------------------------------------------------------- Xilinx changes for v2024.01-rc1 clk: - Dont return error when assigned-clocks is empty or missing dm: - Support reading a single indexed u64 value - Add support for reading bootscript address/flash address from DT cmd: - Fix flash_is_unlocked API fpga: - Define fpga_load() for debug build global: - U-Boot project name cleanup (next2) net: - zynq_gem: Use generic_phy_valid() helper - axienet: Convert to ofnode functions - gmii2rgmii: Read bridge address from DT pytest: - skip tpm2_startup when env__tpm_device_test_skip=True spi-nor: - Add mx25u25635f support - zynqmp_qspi: Tune cache behavior trace: - Fix flyrecord alignment issue xilinx: - Move scriptaddr to DT as bootscr-address - Pick script_offset_f/script_size_f from DT as bootscr-flash-offset/size - Do not generate distro boot variables if disabled versal: - Extend memory ranges to cover HBM - Enable TPM, sha1sum and KASLRSEED - Fix distroboot prioritization in connection to available devices - Clean mini targets bootcommand - Fix clock driver versal-net: - Enable TPM, sha1sum and KASLRSEED - Fix distroboot prioritization in connection to available devices zynqmp; - Allow AES to run from SPL - Enable CMD_KASLRSEED - Add proper dependencies for USB and remove ZYNQMP_USB - Fix user si570 default frequency for zcu* boards - Cover SOM rev2 revision - Various DT changes - Add firmware and pinctrl support for tristate configuration (high impedance/output enable) - Add output-enable pins to SOMs - Fix distroboot prioritization in connection to available devices - Read bootscript address/flash address from DT - Fix pcap_prog address ---------------------------------------------------------------- Algapally Santosh Sagar (1): xilinx: board: Add support to pick bootscr address from DT Amit Kumar Mahapatra (1): arm64: versal: Add no-wp DT property in OSPI flash node Ashok Reddy Soma (5): firmware: zynqmp: Add support to check feature pinctrl: zynqmp: Add version check for TRISTATE configuration pinctrl: zynqmp: Add support for output-enable and bias-high-impedance clk: Dont return error when assigned-clocks is empty or missing spi: zynqmp_qspi: Change flush cache to invalidate cache Chanho Park (1): fpga: define dummy fpga_load function for debug build Christian Taedcke (1): xilinx: zynqmp: Extract aes operation into new file Lukas Funke (1): arm64: zynqmp: Corrected pcap_prog register address Maxim Kochetkov (1): net: axi_emac: Convert to ofnode functions Michal Simek (16): xilinx: Remove scriptaddr from config files and move it to DT arm64: zynqmp: Setup default si570 frequency to 156.25MHz arm64: zynqmp: Add support for K26 rev2 boards dm: core: support reading a single indexed u64 value test/py: tpm2: skip tpm2_startup when env__tpm_device_test_skip=True dm: core: ofnode: Add ofnode_read_bootscript_address() dm: core: ofnode: Add ofnode_read_bootscript_flash() xilinx: board: Add support to pick bootscr flash offset/size from DT arm64: versal: Do not define boot command for mini configurations arm64: xilinx: Guard distro boot variable generation global: Use proper project name U-Boot (next2) dm: core: ofnode: Fix error message in ofnode_read_bootscript_address/flash() arm64: zynqmp: Rename xlnx, mio_bank to xlnx, mio-bank for DLC21 trace: Use 64bit variable for start and len trace: Move trace_clocks description above record offset calculation trace: Fix alignment logic in flyrecord header Neal Frager (2): drivers/mtd/spi/spi-nor-ids.c: add mx25u25635f support arm64: zynqmp: Add output-enable pins to SOMs Saeed Nowshadi (1): arm64: zynqmp: Fix i2c address for si570_user1 clock Srinivas Neeli (1): arm64: zynqmp: Add resets property for CAN nodes Tejas Bhumkar (1): net: phy: xilinx-gmii2rgmii: Removed hardcoded phy address 0 for bridge Thippeswamy Havalige (1): arm64: zynqmp: Update ECAM size to discover up to 256 buses Venkatesh Yadav Abbarapu (16): arm64: versal: Increase the number of DRAM banks to 36 arm64: zynqmp: Enable the config CMD_KASLRSEED arm64: versal: Enable TPM for xilinx platforms arm64: versal: Enable sha1sum command arm64: versal: Enable the config CMD_KASLRSEED arm64: versal-net: Enable TPM for xilinx platforms arm64: versal-net: Enable sha1sum command arm64: versal-net: Enable the config CMD_KASLRSEED xilinx: versal-net: Do not setup boot_targets if driver is not enabled xilinx: versal: Do not setup boot_targets if driver is not enabled xilinx: zynqmp: Do not setup boot_targets if driver is not enabled clk: versal: Fix the function versal_clock_ref cmd: thordown: Add proper dependency for CMD_THOR_DOWNLOAD zynqmp: config: Add proper dependencies for USB cmd: sf: Fix the flash_is_unlocked api size parameter spi: zynqmp_qspi: Workaround for small data cache issue arch/arm/dts/versal-mini-ospi.dtsi | 1 + arch/arm/dts/versal-net-mini-ospi.dtsi | 1 + arch/arm/dts/xilinx-versal-net-virt.dts | 6 + arch/arm/dts/xilinx-versal-virt.dts | 6 + arch/arm/dts/zynq-7000.dtsi | 7 ++ arch/arm/dts/zynqmp-dlc21-revA.dts | 4 +- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 7 +- arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 6 + arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 6 + arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 5 + arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 5 + arch/arm/dts/zynqmp-sm-k26-revA.dts | 8 +- arch/arm/dts/zynqmp-smk-k26-revA.dts | 8 +- arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu106-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu208-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu216-revA.dts | 2 +- arch/arm/dts/zynqmp.dtsi | 11 +- arch/arm/mach-zynqmp/Kconfig | 3 - arch/arm/mach-zynqmp/Makefile | 3 +- arch/arm/mach-zynqmp/aes.c | 59 +++++++++ arch/arm/mach-zynqmp/include/mach/hardware.h | 2 +- arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h | 32 +++++ arch/sandbox/dts/test.dts | 26 ++++ board/cobra5272/README | 18 +-- board/emulation/qemu-ppce500/qemu-ppce500.c | 2 +- board/xilinx/common/board.c | 33 +++++- board/xilinx/versal-net/board.c | 102 +++++++++------- board/xilinx/versal/board.c | 96 ++++++++------- board/xilinx/zynqmp/cmds.c | 43 +------ board/xilinx/zynqmp/zynqmp.c | 125 +++++++++++--------- cmd/Kconfig | 2 + cmd/sf.c | 2 +- configs/xilinx_versal_mini_defconfig | 2 - configs/xilinx_versal_mini_emmc0_defconfig | 2 - configs/xilinx_versal_mini_emmc1_defconfig | 2 - configs/xilinx_versal_net_virt_defconfig | 6 +- configs/xilinx_versal_virt_defconfig | 7 +- configs/xilinx_zynqmp_virt_defconfig | 2 +- doc/board/xilinx/zynq.rst | 2 +- doc/board/xilinx/zynqmp-r5.rst | 4 +- doc/imx/mkimage/imximage.txt | 2 +- doc/usage/environment.rst | 2 +- doc/usage/semihosting.rst | 2 +- drivers/clk/clk-uclass.c | 8 +- drivers/clk/clk_versal.c | 98 +++++++++------ drivers/core/of_access.c | 16 ++- drivers/core/ofnode.c | 89 ++++++++++++++ drivers/firmware/firmware-zynqmp.c | 13 ++ drivers/mtd/spi/spi-nor-ids.c | 1 + drivers/net/phy/phy.c | 5 +- drivers/net/xilinx_axi_emac.c | 50 ++++---- drivers/pinctrl/pinctrl-zynqmp.c | 15 +++ drivers/spi/zynqmp_gqspi.c | 4 +- include/configs/xilinx_versal.h | 7 +- include/configs/xilinx_versal_net.h | 7 +- include/configs/xilinx_zynqmp.h | 11 +- include/configs/zynq-common.h | 2 - include/dm/of_access.h | 19 +++ include/dm/ofnode.h | 65 ++++++++++ include/fpga.h | 8 ++ include/zynqmp_firmware.h | 3 + test/dm/clk.c | 9 ++ test/dm/ofnode.c | 27 +++++ test/py/tests/test_tpm2.py | 3 + tools/proftool.c | 39 +++++- 66 files changed, 858 insertions(+), 311 deletions(-) create mode 100644 arch/arm/mach-zynqmp/aes.c create mode 100644 arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs TF-A maintainer - Xilinx ZynqMP/Versal/Versal NET SoCs

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[PULL] u-boot-riscv/next
by Leo Liang 21 Sep '23

21 Sep '23

Hi Tom, The following changes since commit c58ee1c9946a1550b1f6fee2b25da9ecc89baf71: Merge branch '2023-09-19-tidy-up-some-kconfig-options' into next (2023-09-19 17:44:18 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-riscv.git next for you to fetch changes up to 90602e779d3ae3bd02faae0eb40b4fcefec419f7: riscv: dts: starfive: generate u-boot-spl.bin.normal.out (2023-09-20 21:05:16 +0800) CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/17779 ---------------------------------------------------------------- + Add NVMe & USB boot devices for VisionFive2 + Add StarFive SPL image support in mkimage tool ---------------------------------------------------------------- Heinrich Schuchardt (4): riscv: set fdtfile on VisionFive 2 configs: NVMe/USB target boot devices on VisionFive 2 tools: mkimage: Add StarFive SPL image support riscv: dts: starfive: generate u-boot-spl.bin.normal.out Milan P. Stanić (1): starfive: visionfive2: add mmc0 and nvme boot targets arch/riscv/Kconfig | 1 + .../dts/jh7110-starfive-visionfive-2-u-boot.dtsi | 11 ++ board/starfive/visionfive2/starfive_visionfive2.c | 43 ++++- boot/image.c | 1 + doc/board/starfive/visionfive2.rst | 14 +- include/configs/starfive-visionfive2.h | 3 + include/image.h | 1 + tools/Makefile | 1 + tools/sfspl.c | 174 +++++++++++++++++++++ 9 files changed, 235 insertions(+), 14 deletions(-) create mode 100644 tools/sfspl.c Best regards, Leo

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[RFC PATCH 0/5] Allow for removal of DT nodes and properties
by Sughosh Ganu 21 Sep '23

21 Sep '23

Provide a way for removing certain devicetree nodes and/or properties from the devicetree. This is needed to purge certain nodes and properties which may be relevant only in U-Boot. Such nodes and properties are then removed from the devicetree before it is passed to the kernel. This ensures that the devicetree passed to the OS does not contain any non-compliant nodes and properties. The removal of the nodes and properties is being done through an EVT_FT_FIXUP handler. I am not sure if the removal code needs to be behind any Kconfig symbol. I have only build tested this on sandbox, and tested on qemu arm64 virt platform. This being a RFC, I have not put this through a CI run. Sughosh Ganu (5): dt: Provide a way to remove non-compliant nodes and properties fwu: Add the fwu-mdata node for removal from devicetree capsule: Add the capsule-key property for removal from devicetree bootefi: Call the EVT_FT_FIXUP event handler doc: Add a document for non-compliant DT node/property removal cmd/bootefi.c | 18 +++++ .../devicetree/dt_non_compliant_purge.rst | 64 ++++++++++++++++ drivers/fwu-mdata/fwu-mdata-uclass.c | 5 ++ include/dt-structs.h | 11 +++ lib/Makefile | 1 + lib/dt_purge.c | 73 +++++++++++++++++++ lib/efi_loader/efi_capsule.c | 7 ++ 7 files changed, 179 insertions(+) create mode 100644 doc/develop/devicetree/dt_non_compliant_purge.rst create mode 100644 lib/dt_purge.c -- 2.34.1

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[PATCH v1 0/2] SPL EBBR - EFI System Partition support
by Mayuresh Chitale 21 Sep '23

21 Sep '23

This series adds support to locate an EFI System Partition on a disk and boot the next stage from such a parition if found. The next stage image is expected to be under the FIRMWARE directory as described in the EBBR specification [1]. Also update the spl_blk_fs and spl_fat drivers to prefer booting from ESP and fall back to the configured parition in case of a failure. These patches are built on top of the following series from Sean Anderson: https://lists.denx.de/pipermail/u-boot/2023-August/525665.html [1] : https://github.com/ARM-software/ebbr/blob/854ba0e68590102667b84a5ba4e0b076a… The patches are also present in the branch below: https://github.com/mdchitale/u-boot/tree/mchitale_spl_ebbr_v1 Mayuresh Chitale (2): part: Add a function to find ESP partition spl: Add support for booting from ESP common/spl/Kconfig | 7 +++++ common/spl/spl_blk_fs.c | 61 +++++++++++++++++++++++++++++------------ common/spl/spl_fat.c | 34 ++++++++++++++++++++--- disk/part.c | 16 +++++++++++ include/part.h | 10 +++++++ 5 files changed, 107 insertions(+), 21 deletions(-) -- 2.34.1

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[PATCH] arm64: versal: Add SelectMAP boot mode identification
by Polak, Leszek 21 Sep '23

21 Sep '23

Add missing SelectMAP bootmode for proper identification during boot. The SelectMAP configuration interface provides an 8-bit, 16-bit or 32-bit bidirectional data bus interface to the Versal FPGA configuration logic that can be used for both configuration and readback. A connected microcontoller to the SelectMAP interface can load boot image with bitstream, TF-A (ARM Trusted Firmware) and U-Boot. This commit adds the missing identification of the SelectMAP mode. Signed-off-by: Leszek Polak <lpolak(a)arri.de> Cc: Michal Simek <michal.simek(a)amd.com> Cc: Stefan Roese <sr(a)denx.de> --- arch/arm/mach-versal-net/include/mach/hardware.h | 1 + arch/arm/mach-versal/include/mach/hardware.h | 1 + board/xilinx/versal-net/board.c | 4 ++++ board/xilinx/versal/board.c | 5 +++++ 4 files changed, 11 insertions(+) diff --git a/arch/arm/mach-versal-net/include/mach/hardware.h b/arch/arm/mach-versal-net/include/mach/hardware.h index 9bddb8b00723..767cdd368682 100644 --- a/arch/arm/mach-versal-net/include/mach/hardware.h +++ b/arch/arm/mach-versal-net/include/mach/hardware.h @@ -66,6 +66,7 @@ struct crp_regs { #define EMMC_MODE 0x00000006 #define USB_MODE 0x00000007 #define OSPI_MODE 0x00000008 +#define SELECTMAP_MODE 0x0000000A #define SD1_LSHFT_MODE 0x0000000E /* SD1 Level shifter */ #define JTAG_MODE 0x00000000 #define BOOT_MODE_USE_ALT 0x100 diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h index 000af974e867..9d1c2f0dcfc1 100644 --- a/arch/arm/mach-versal/include/mach/hardware.h +++ b/arch/arm/mach-versal/include/mach/hardware.h @@ -82,6 +82,7 @@ struct crp_regs { #define EMMC_MODE 0x00000006 #define USB_MODE 0x00000007 #define OSPI_MODE 0x00000008 +#define SELECTMAP_MODE 0x0000000A #define SD1_LSHFT_MODE 0x0000000E /* SD1 Level shifter */ #define JTAG_MODE 0x00000000 #define BOOT_MODE_USE_ALT 0x100 diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c index f0d2224b332e..992e0df73b30 100644 --- a/board/xilinx/versal-net/board.c +++ b/board/xilinx/versal-net/board.c @@ -287,6 +287,10 @@ int board_late_init(void) mode = "mmc"; bootseq = dev_seq(dev); break; + case SELECTMAP_MODE: + puts("SELECTMAP_MODE\n"); + mode = "selectmap"; + break; default: mode = ""; printf("Invalid Boot Mode:0x%x\n", bootmode); diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index 60bf37d3c90f..b619dbc73c80 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -213,6 +213,10 @@ int board_late_init(void) mode = "mmc"; bootseq = dev_seq(dev); break; + case SELECTMAP_MODE: + puts("SELECTMAP_MODE\n"); + mode = "selectmap"; + break; default: mode = ""; printf("Invalid Boot Mode:0x%x\n", bootmode); @@ -298,6 +302,7 @@ enum env_location env_get_location(enum env_operation op, int prio) return ENVL_SPI_FLASH; return ENVL_NOWHERE; case JTAG_MODE: + case SELECTMAP_MODE: default: return ENVL_NOWHERE; } -- 2.42.0

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[PATCH v1] fs: Fix SPL build if FS_LOADER is enabled
by Mayuresh Chitale 21 Sep '23

21 Sep '23

If FS_LOADER is enabled for the SPL then the build fails with the error: fs/fs.o:(.data.rel.fstypes+0x128): undefined reference to `smh_fs_set_blk_dev' fs/fs.o:(.data.rel.fstypes+0x140): undefined reference to `smh_fs_size' fs/fs.o:(.data.rel.fstypes+0x148): undefined reference to `smh_fs_read' fs/fs.o:(.data.rel.fstypes+0x150): undefined reference to `smh_fs_write' Fix the error by populating the semihosting entry in the fs_types array only for non-SPL builds. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> Signed-off-by: Mayuresh Chitale <mchitale(a)ventanamicro.com> --- fs/fs.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/fs/fs.c b/fs/fs.c index 2b815b1db0..074db4b20f 100644 --- a/fs/fs.c +++ b/fs/fs.c @@ -256,6 +256,7 @@ static struct fstype_info fstypes[] = { .ln = fs_ln_unsupported, }, #endif +#ifndef CONFIG_SPL_BUILD #ifdef CONFIG_SEMIHOSTING { .fstype = FS_TYPE_SEMIHOSTING, @@ -275,6 +276,7 @@ static struct fstype_info fstypes[] = { .ln = fs_ln_unsupported, }, #endif +#endif #ifndef CONFIG_SPL_BUILD #ifdef CONFIG_CMD_UBIFS { -- 2.34.1

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[PATCH v2 0/2] Fix issues for small sized data reads
by Venkatesh Yadav Abbarapu 21 Sep '23

21 Sep '23

Change flush cache to invalidate cache and also fix cache related issues are seen with small sized data reads. Due to this, proper data is not read. Also some times sf probe fails randomly. Ashok Reddy Soma (1): spi: zynqmp_qspi: Change flush cache to invalidate cache Venkatesh Yadav Abbarapu (1): spi: zynqmp_qspi: Workaround for small data cache issue drivers/spi/zynqmp_gqspi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) -- 2.17.1

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[PATCH] net: phy: xilinx-gmii2rgmii: Removed hardcoded phy address 0 for bridge
by Tejas Bhumkar 21 Sep '23

21 Sep '23

Current code expects bridge phy address at 0 which is not correct expectation because bridge phy address is configurable. That's why update the code to read reg property to figure it out where bridge is and use it in phy creation code. Signed-off-by: Michal Simek <michal.simek(a)amd.com> Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar(a)amd.com> --- drivers/net/phy/phy.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index ae21acb059..d64a83b83d 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -838,7 +838,10 @@ static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus, ofnode_for_each_subnode(node, dev_ofnode(dev)) { node = ofnode_by_compatible(node, "xlnx,gmii-to-rgmii-1.0"); if (ofnode_valid(node)) { - phydev = phy_device_create(bus, 0, + int gmiirgmii_phyaddr; + + gmiirgmii_phyaddr = ofnode_read_u32_default(node, "reg", 0); + phydev = phy_device_create(bus, gmiirgmii_phyaddr, PHY_GMII2RGMII_ID, false); if (phydev) phydev->node = node; -- 2.27.0

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