September 2023 - U-Boot

[PATCH v4 0/1] CONFIG_IS_ENABLED vs IS_ENABLED
by Troy Kisky 27 Sep '23

27 Sep '23

This patch set gets ready to checks the usage of CONFIG_IS_ENABLED/IS_ENABLED. After the set has been applied, you can delete test/usage_of_is_enabled_todo.txt and run test/usage_of_is_enabled_commit.sh The script test/usage_of_is_enabled_check.sh checks for new questionable uses of CONFIG_IS_ENABLED/IS_ENABLED and is added to .azure-pipelines.yml, and .gitlab-ci.yml version 4 changes: Down to just one patch, other issue fixed by other means Added the following new configs to todo ACPI DM_CLK FEC_MXC FWU_MULTI_BANK_UPDATE IMX8M_VDD_SOC_850MV MCFTMR PANEL SANDBOX64 SPLASH_SCREEN SPLASH_SOURCE SPL_LOAD_FIT USB_ETH_RNDIS VIDEO VIDEO_BPP16 VIDEO_BPP32 VIDEO_BPP8 VIDEO_LOGO X86_32BIT_INIT version 3 changes: Dropped changes to puma-rk3399 and ringneck-px30 in favor of Quentin Schulz's patch https://patchwork.ozlabs.org/project/uboot/patch/20230301-tsd-env-nowhere-k… https://patchwork.ozlabs.org/project/uboot/patch/20230301-tsd-env-nowhere-k… Please apply them before this series. Drop gateworks: venice: Always define setup_fec and setup_eqos Drop arm: cpu: armv7: ls102xa: fdt: remove eth_device support Simon's patches took care of these Add to todo list, these new questionable uses that snuck into the code. PARTITION_TYPE_GUID PHY_ATHEROS RTC_SANDBOX (no changes since v1) Troy Kisky (1): CI: add test/usage_of_is_enabled_check.sh .azure-pipelines.yml | 11 ++ .gitlab-ci.yml | 5 + test/usage_of_is_enabled_check.sh | 19 +++ test/usage_of_is_enabled_commit.sh | 12 ++ test/usage_of_is_enabled_correct.sh | 50 +++++++ test/usage_of_is_enabled_exempt.txt | 9 ++ test/usage_of_is_enabled_list.sh | 86 +++++++++++ test/usage_of_is_enabled_splcfg.txt | 21 +++ test/usage_of_is_enabled_todo.txt | 213 ++++++++++++++++++++++++++++ 9 files changed, 426 insertions(+) create mode 100755 test/usage_of_is_enabled_check.sh create mode 100755 test/usage_of_is_enabled_commit.sh create mode 100755 test/usage_of_is_enabled_correct.sh create mode 100644 test/usage_of_is_enabled_exempt.txt create mode 100755 test/usage_of_is_enabled_list.sh create mode 100644 test/usage_of_is_enabled_splcfg.txt create mode 100644 test/usage_of_is_enabled_todo.txt -- 2.34.1

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[PATCH v3] dt-bindings: mtd: fixed-partitions: Add compression property
by Simon Glass 27 Sep '23

27 Sep '23

Sometimes the contents of a partition are compressed. Add a property to express this and define the algorithm used. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v3: - Just add a compression property for now Changes in v2: - Use "binman" for compatible instead of "u-boot,binman" - Significantly rework the patch - Use make dt_binding_check DT_SCHEMA_FILES=Documentation/../partitions .../mtd/partitions/fixed-partitions.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml index 331e564f29dc..13ff313cabda 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml @@ -29,6 +29,24 @@ properties: "#size-cells": true + compression: + $ref: /schemas/types.yaml#/definitions/string + description: | + Compression algorithm used to store the data in this partition, chosen + from a list of well-known algorithms. + + The contents are compressed using this algorithm. + + enum: + - none + - bzip2 + - gzip + - lzop + - lz4 + - lzma + - xz + - zstd + patternProperties: "@[0-9a-f]+$": $ref: partition.yaml# -- 2.42.0.515.g380fc7ccd1-goog

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[PATCH v2 0/4] armv8: fsl-layerscape: add support for MC reserved memory
by Laurentiu Tudor 27 Sep '23

27 Sep '23

Add support for declaring in device tree the reserved memory ranges required for MC. Since the MC firmware acts as any DMA master present in the SoC, the reserved memory ranges need also be identity mapped in the SMMU, so create the required 'iommu-addresses' property in the reserved memory nodes. Changes in v2: - added a cover letter - dropped patch creating useless bypass mapping in SMMU Laurentiu Tudor (4): armv8: fsl-layerscape: make some functions static drivers: net: fsl-mc: add support for MC reserved memory board: freescale: ls2080a: declare MC reserved regions board: freescale: ls1088a: declare MC reserved regions arch/arm/cpu/armv8/fsl-layerscape/icid.c | 12 +-- board/freescale/ls1088a/ls1088a.c | 1 + board/freescale/ls2080aqds/ls2080aqds.c | 1 + board/freescale/ls2080ardb/ls2080ardb.c | 1 + board/freescale/lx2160a/lx2160a.c | 1 + drivers/net/fsl-mc/mc.c | 110 +++++++++++++++++++++++ include/fsl-mc/fsl_mc.h | 1 + 7 files changed, 121 insertions(+), 6 deletions(-) -- 2.17.1

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[PATCH 0/2] arm: dts: k3-am64: Sync dts from Linux v6.6-rc1
by Roger Quadros 27 Sep '23

27 Sep '23

Hi, This series aligns the dts files for AM64 platform from Linux v6.6-rc1. cheers, -roger Roger Quadros (2): Revert "ARM: dts: k3-am642-sk-u-boot: add PMIC node" arm: dts: k3-am64: Bump dts from Linux v6.6-rc1 arch/arm/dts/k3-am64-main.dtsi | 209 ++++++++++++++++++++++---- arch/arm/dts/k3-am64-mcu.dtsi | 53 ++++++- arch/arm/dts/k3-am64-thermal.dtsi | 33 ++++ arch/arm/dts/k3-am64.dtsi | 22 +-- arch/arm/dts/k3-am642-evm-u-boot.dtsi | 70 +++++---- arch/arm/dts/k3-am642-evm.dts | 177 +++++++++++++++++----- arch/arm/dts/k3-am642-r5-evm.dts | 194 ++---------------------- arch/arm/dts/k3-am642-r5-sk.dts | 194 +----------------------- arch/arm/dts/k3-am642-sk-u-boot.dtsi | 122 ++++----------- arch/arm/dts/k3-am642-sk.dts | 174 +++++++++++++++------ arch/arm/dts/k3-am642.dtsi | 1 + arch/arm/dts/k3-serdes.h | 204 +++++++++++++++++++++++++ 12 files changed, 815 insertions(+), 638 deletions(-) create mode 100644 arch/arm/dts/k3-am64-thermal.dtsi create mode 100644 arch/arm/dts/k3-serdes.h base-commit: 4cb31a9f3560b293670de95e76c1f3cf2f9e1ca8 -- 2.34.1

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Enable thumb on AT91?
by Sean Anderson 27 Sep '23

27 Sep '23

Hi Eugen, I noticed that several AT91 boards are quite close to their SPL size limit. For example, sama5d27_wlsom1_ek_mmc is just 173 bytes short of its limit and doesn't even git with older GCCs. I looked at the datasheet for that processor, and noticed that it has thumb support. Have you considered enabling SYS_THUMB_BUILD? This shrinks SPL by around 30%. I don't have a board to test with, so I don't know if there are any technical reasons blocking this. --Sean

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[PATCH 00/20] sunxi: Allwinner T113s support
by Andre Przywara 27 Sep '23

27 Sep '23

Hi, this is finally the series adding support for the new SoC series that covers the Allwinner D1 siblings R528 and T113s. They all share the same die, although the D1 and D1s use RISC-V cores, which requires more plumbing, to use the sunxi code across two architectures. Getting the R528 support in should help a bit in sorting out what's new peripheral code and what is architecture dependent. IIUC, Samuel has that running, although with some hacks, the number of which this series tries to reduce. The most interesting part of this is the pincontroller rework, this tackles two issues: - For the first time in the history of mainline Allwinner support the pincontroller changed the register layout. The code here tries to abstract the differences away, so both variants can share the code peacefully. - For the above mentioned reason, the pincontroller code is quite old, and is mostly spread out across arch/arm, in a pre-DM style, even though we have real DM support in U-Boot proper. We need the non-DM version for the (ARM-only?) legacy SPL, so can't get rid of that completely. This series also tries to modernise that code, and moves it into board/sunxi/, where it can be more easily shared with RISC-V. The main feature is then of course the T113s support, of which the new pinctroller is only one part. Apart from the new pincontroller and the usual new SoC bits (like clock and pinmux support), this includes the DRAM controller code. With the basics in, we add support for the MangoPi MQ-R board, which uses the T113s and seems to be a popular board. This should also serve as a blueprint for supporting similar boards. The DTs are copied from the kernel (as usual). There are some bits missing, prominently PSCI support. There are good patches out there, I just didn't manage to test and review them yet, but hopefully they can follow directly in the wake of this series. This series is based on top of current sunxi/master, which covers the first part of the 2023.10 pull request. Compared to the RFC post from December(!), there were numerous changes, inspired by comments from the community reviewers, many thanks to all of them! A branch is available at: https://source.denx.de/u-boot/custodians/u-boot-sunxi.git t113s Please have a look, review and test. Cheers, Andre Andre Przywara (18): net: sunxi_emac: chase DT nodes to find PHY regulator sunxi: remove CONFIG_MACPWR pinctrl: sunxi: add GPIO in/out wrappers pinctrl: sunxi: remove struct sunxi_gpio pinctrl: sunxi: move pinctrl code and remove GPIO_EXTRA_HEADER pinctrl: sunxi: move PIO_BASE into sunxi_gpio.h pinctrl: sunxi: add new D1 pinctrl support sunxi: introduce NCAT2 generation model pinctrl: sunxi: add Allwinner D1 pinctrl description sunxi: clock: D1/R528: Enable PLL LDO during PLL1 setup sunxi: clock: support D1/R528 PLL6 clock sunxi: clock: h6: prepare for PRCM less SoCs Kconfig: sunxi: prepare for using drivers/ram/sunxi sunxi: add R528/T113-s3/D1(s) DRAM initialisation code sunxi: add Allwinner R528/T113 SoC support sunxi: refactor serial base addresses to avoid asm/arch/cpu.h ARM: dts: sunxi: add Allwinner T113-s SoC .dtsi sunxi: add MangoPi MQ-R board support Samuel Holland (2): clk: sunxi: Add support for the D1 CCU riscv: dts: allwinner: Add the D1/D1s SoC devicetree arch/arm/Kconfig | 1 - arch/arm/cpu/armv7/sunxi/sram.c | 1 + arch/arm/cpu/armv8/fel_utils.S | 1 + arch/arm/dts/Makefile | 2 + .../arm/dts/sun8i-t113s-mangopi-mq-r-t113.dts | 35 + arch/arm/dts/sun8i-t113s.dtsi | 59 + arch/arm/dts/sunxi-d1s-t113-mangopi-mq-r.dtsi | 126 ++ arch/arm/dts/sunxi-u-boot.dtsi | 7 + arch/arm/include/asm/arch-sunxi/boot0.h | 2 + arch/arm/include/asm/arch-sunxi/clock.h | 3 +- .../include/asm/arch-sunxi/clock_sun50i_h6.h | 12 +- arch/arm/include/asm/arch-sunxi/cpu.h | 2 + arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 17 - .../include/asm/arch-sunxi/cpu_sun50i_h6.h | 7 - arch/arm/include/asm/arch-sunxi/cpu_sun9i.h | 9 - .../include/asm/arch-sunxi/cpu_sunxi_ncat2.h | 39 + arch/arm/include/asm/arch-sunxi/mmc.h | 2 +- arch/arm/include/asm/arch-sunxi/prcm.h | 2 +- arch/arm/include/asm/arch-sunxi/serial.h | 32 + arch/arm/include/asm/arch-sunxi/timer.h | 2 +- arch/arm/mach-sunxi/Kconfig | 36 +- arch/arm/mach-sunxi/Makefile | 2 +- arch/arm/mach-sunxi/board.c | 31 +- arch/arm/mach-sunxi/clock_sun50i_h6.c | 60 +- arch/arm/mach-sunxi/cpu_info.c | 2 + arch/arm/mach-sunxi/dram_suniv.c | 2 +- arch/arm/mach-sunxi/gtbus_sun9i.c | 1 + arch/arm/mach-sunxi/pinmux.c | 78 - arch/arm/mach-sunxi/spl_spi_sunxi.c | 1 + arch/arm/mach-sunxi/timer.c | 1 + arch/riscv/dts/sun20i-common-regulators.dtsi | 28 + arch/riscv/dts/sun20i-d1.dtsi | 66 + arch/riscv/dts/sun20i-d1s.dtsi | 76 + arch/riscv/dts/sunxi-d1-t113.dtsi | 15 + arch/riscv/dts/sunxi-d1s-t113.dtsi | 846 ++++++++++ board/sunxi/Makefile | 1 + board/sunxi/board.c | 13 +- board/sunxi/chip.c | 2 +- board/sunxi/pinctrl.c | 115 ++ common/spl/Kconfig | 3 +- configs/Bananapi_M2_Ultra_defconfig | 1 - configs/Bananapi_defconfig | 1 - configs/Bananapro_defconfig | 1 - configs/Lamobo_R1_defconfig | 1 - configs/Mele_A1000_defconfig | 1 - configs/Orangepi_defconfig | 1 - configs/Orangepi_mini_defconfig | 1 - configs/bananapi_m1_plus_defconfig | 1 - configs/bananapi_m2_plus_h3_defconfig | 1 - configs/bananapi_m2_plus_h5_defconfig | 1 - configs/i12-tvbox_defconfig | 1 - configs/jesurun_q5_defconfig | 1 - configs/mangopi_mq_r_defconfig | 15 + configs/mixtile_loftq_defconfig | 1 - configs/nanopi_m1_plus_defconfig | 1 - configs/nanopi_neo_plus2_defconfig | 1 - configs/nanopi_r1s_h5_defconfig | 1 - configs/orangepi_pc2_defconfig | 1 - configs/orangepi_plus2e_defconfig | 1 - configs/orangepi_plus_defconfig | 1 - configs/orangepi_win_defconfig | 1 - configs/pine_h64_defconfig | 1 - configs/zeropi_defconfig | 1 - drivers/Makefile | 1 + drivers/clk/sunxi/Kconfig | 7 + drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_d1.c | 84 + drivers/clk/sunxi/clk_sunxi.c | 5 + drivers/gpio/axp_gpio.c | 1 + drivers/gpio/sunxi_gpio.c | 50 +- drivers/i2c/mvtwsi.c | 3 +- drivers/i2c/sun6i_p2wi.c | 2 +- drivers/i2c/sun8i_rsb.c | 2 +- drivers/mmc/sunxi_mmc.c | 12 +- drivers/net/sun8i_emac.c | 9 +- drivers/net/sunxi_emac.c | 39 + drivers/pinctrl/sunxi/Kconfig | 5 + drivers/pinctrl/sunxi/pinctrl-sunxi.c | 43 +- drivers/ram/Kconfig | 3 +- drivers/ram/Makefile | 3 + drivers/ram/sunxi/Kconfig | 72 + drivers/ram/sunxi/Makefile | 4 + drivers/ram/sunxi/dram_sun20i_d1.c | 1432 +++++++++++++++++ drivers/ram/sunxi/dram_sun20i_d1.h | 73 + drivers/video/hitachi_tx18d42vm_lcd.c | 1 + drivers/video/ssd2828.c | 1 - drivers/video/sunxi/sunxi_display.c | 1 + drivers/video/sunxi/sunxi_lcd.c | 1 + include/configs/sunxi-common.h | 2 +- include/dt-bindings/clock/sun20i-d1-ccu.h | 158 ++ include/dt-bindings/clock/sun20i-d1-r-ccu.h | 19 + include/dt-bindings/reset/sun20i-d1-ccu.h | 79 + include/dt-bindings/reset/sun20i-d1-r-ccu.h | 16 + .../arch-sunxi/gpio.h => include/sunxi_gpio.h | 104 +- 94 files changed, 3723 insertions(+), 287 deletions(-) create mode 100644 arch/arm/dts/sun8i-t113s-mangopi-mq-r-t113.dts create mode 100644 arch/arm/dts/sun8i-t113s.dtsi create mode 100644 arch/arm/dts/sunxi-d1s-t113-mangopi-mq-r.dtsi create mode 100644 arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h create mode 100644 arch/arm/include/asm/arch-sunxi/serial.h delete mode 100644 arch/arm/mach-sunxi/pinmux.c create mode 100644 arch/riscv/dts/sun20i-common-regulators.dtsi create mode 100644 arch/riscv/dts/sun20i-d1.dtsi create mode 100644 arch/riscv/dts/sun20i-d1s.dtsi create mode 100644 arch/riscv/dts/sunxi-d1-t113.dtsi create mode 100644 arch/riscv/dts/sunxi-d1s-t113.dtsi create mode 100644 board/sunxi/pinctrl.c create mode 100644 configs/mangopi_mq_r_defconfig create mode 100644 drivers/clk/sunxi/clk_d1.c create mode 100644 drivers/ram/sunxi/Kconfig create mode 100644 drivers/ram/sunxi/Makefile create mode 100644 drivers/ram/sunxi/dram_sun20i_d1.c create mode 100644 drivers/ram/sunxi/dram_sun20i_d1.h create mode 100644 include/dt-bindings/clock/sun20i-d1-ccu.h create mode 100644 include/dt-bindings/clock/sun20i-d1-r-ccu.h create mode 100644 include/dt-bindings/reset/sun20i-d1-ccu.h create mode 100644 include/dt-bindings/reset/sun20i-d1-r-ccu.h rename arch/arm/include/asm/arch-sunxi/gpio.h => include/sunxi_gpio.h (73%) -- 2.35.8

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[PATCH v3 0/7] rng: stm32: support STM32MP13x platforms
by Gatien Chevallier 27 Sep '23

27 Sep '23

This is the cover letter for patchset [1]. First, do not restrain the STM32 RNG driver to the MPU series. The STM32MP13x platforms have a RNG hardware block that supports customization, a conditional reset sequences that allows to recover from certain situations and a configuration locking mechanism. This series adds support for the mentionned features. Note that the hardware RNG can and should be managed in the secure world for this platform, hence the rng not being default enabled on the STM32MP135F-DK board. [1] http://patchwork.ozlabs.org/project/uboot/list/?series=372119&state=* Changes in V2: - Added this cover letter - Added ARCH_STM32 as a dependency for RNG_STM32 - Added review tags Changes in V3: - Added Patrick's tag to [PATCH 1/7] Gatien Chevallier (7): rng: stm32: rename STM32 RNG driver configs: default activate CONFIG_RNG_STM32 for STM32MP13x platforms rng: stm32: Implement configurable RNG clock error detection rng: stm32: add RNG clock frequency restraint rng: stm32: add error concealment sequence rng: stm32: Implement custom RNG configuration support ARM: dts: stm32: add RNG node for STM32MP13x platforms MAINTAINERS | 2 +- arch/arm/dts/stm32mp131.dtsi | 8 + configs/stm32mp13_defconfig | 1 + configs/stm32mp15_basic_defconfig | 2 +- configs/stm32mp15_defconfig | 2 +- configs/stm32mp15_trusted_defconfig | 2 +- drivers/rng/Kconfig | 8 +- drivers/rng/Makefile | 2 +- drivers/rng/stm32_rng.c | 408 ++++++++++++++++++++++++++++ drivers/rng/stm32mp1_rng.c | 198 -------------- 10 files changed, 426 insertions(+), 207 deletions(-) create mode 100644 drivers/rng/stm32_rng.c delete mode 100644 drivers/rng/stm32mp1_rng.c -- 2.25.1

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[PATCH] configs: stm32f769-disco: Enable VIDEO_LOGO flag
by Patrice Chotard 27 Sep '23

27 Sep '23

The patch removes the legacy mode of displaying the ST logo and adopts the approach introduced by the commit 284b08fb51b6 ("board: stm32mp1: add splash screen with stmicroelectronics logo"). Signed-off-by: Patrice Chotard <patrice.chotard(a)foss.st.com> --- configs/stm32f769-disco_defconfig | 2 +- configs/stm32f769-disco_spl_defconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 72ef133fe4a..20dbb1af630 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -56,6 +56,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_BACKLIGHT_GPIO=y CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y CONFIG_VIDEO_STM32=y @@ -64,7 +65,6 @@ CONFIG_VIDEO_STM32_MAX_XRES=480 CONFIG_VIDEO_STM32_MAX_YRES=800 CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y -CONFIG_VIDEO_BMP_RLE8=y CONFIG_BMP_16BPP=y CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index dd17cad7362..a5298e7cdc1 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -82,6 +82,7 @@ CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_SPL_TIMER=y CONFIG_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_BACKLIGHT_GPIO=y CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y CONFIG_VIDEO_STM32=y @@ -90,7 +91,6 @@ CONFIG_VIDEO_STM32_MAX_XRES=480 CONFIG_VIDEO_STM32_MAX_YRES=800 CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y -CONFIG_VIDEO_BMP_RLE8=y CONFIG_BMP_16BPP=y CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y -- 2.25.1

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[PATCH v3 0/6] [PATCH v3 0/6] J721E DTS Sync with Kernel v6.6-rc1
by Neha Malcom Francis 27 Sep '23

27 Sep '23

This series aims to sync kernel.org v6.6-rc1 DTS with that of U-Boot. It also includes cleanups where necessary along with certain changes to ensure boot is unaffected. Same as with other board series that have taken up this effort, cleanup of mcu_ringacc and mcu_udmap are dependent on MCU DMA [1] fixes. Also adding TPS6594 PMIC support is still under review [2] in the Kernel. These will be taken up after their merge to Linux. [1] https://lore.kernel.org/all/20230810174356.3322583-1-vigneshr@ti.com/ [2] https://lore.kernel.org/all/20230810-tps6594-v6-0-2b2e2399e2ef@ti.com/ Boot logs: https://gist.github.com/nehamalcom/52dd8f2b553952108c0d16556f58077a Changes in v3: - Nishanth: - synced to v6.6-rc1 from v6.5-rc1 - reworded commit messages - removed patch adding k3_avs compatible since it has been merged to -next separately - removed unnecessary #includes - added extra comments for OSPI reg overrides - removed hbmc node from R5 DTS - changed ti_sci_get_cmd_revision to be at a common point for all boot flows - Manorit: - added Reviewed-by tag for mcu_timer0 ID patch (2/7) - removed all aliases - removed unnecessary properties Changes in v2: - Nishanth: - synced k3-j721e-som-0.dtsi 6.5-rc1 - delete tick-timer from -u-boot.dtsi - remove unnecessary aliases - remove SERDES overrides in U-Boot - formatting changes - drop repeated nodes and properties in U-Boot dts - drop nodes and properties not related to U-Boot from U-Boot dts - drop all /delete Neha Malcom Francis (6): arm: mach-k3: j721e: dev-data: Add mcu_timer0 ID arm: mach-k3: j721e_init: Move clk_k3 probe before loading TIFS drivers: firmware: ti_sci: Get SCI revision only if TIFS/SYSFW is up configs: j721e: Remove HBMC_AM654 config arm: dts: k3-j721e-r5: Clean up inclusion hierarchy arm: dts: k3-j721e: Sync with v6.6-rc1 .../k3-j721e-common-proc-board-u-boot.dtsi | 153 +-- arch/arm/dts/k3-j721e-common-proc-board.dts | 513 ++++++--- arch/arm/dts/k3-j721e-main.dtsi | 1018 +++++++++++++++-- arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 305 ++++- .../k3-j721e-r5-common-proc-board-u-boot.dtsi | 29 - .../arm/dts/k3-j721e-r5-common-proc-board.dts | 363 +----- arch/arm/dts/k3-j721e-r5-sk-u-boot.dtsi | 31 - arch/arm/dts/k3-j721e-r5-sk.dts | 572 +-------- arch/arm/dts/k3-j721e-sk-u-boot.dtsi | 184 +-- arch/arm/dts/k3-j721e-sk.dts | 673 +++++++---- arch/arm/dts/k3-j721e-som-p0.dtsi | 217 ++-- arch/arm/dts/k3-j721e-thermal.dtsi | 75 ++ arch/arm/dts/k3-j721e.dtsi | 32 +- arch/arm/mach-k3/j721e/dev-data.c | 1 + arch/arm/mach-k3/j721e_init.c | 24 +- configs/j721e_evm_a72_defconfig | 1 - configs/j721e_evm_r5_defconfig | 1 - drivers/firmware/ti_sci.c | 11 +- 18 files changed, 2415 insertions(+), 1788 deletions(-) delete mode 100644 arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi delete mode 100644 arch/arm/dts/k3-j721e-r5-sk-u-boot.dtsi create mode 100644 arch/arm/dts/k3-j721e-thermal.dtsi -- 2.34.1

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[PATCH 1/2] power: pmic: rk8xx: Fix power-on source check in SPL
by Jonas Karlman 27 Sep '23

27 Sep '23

The commit 30975fb73d51 ("rockchip: Add option to prevent booting on power plug-in") introduce an option to prevent booting a device when the device was powered on due to power plug-in instead of pressing a power button. This feature works by checking the power-on source during PMIC probe and powers off the device if power-on source was power plug-in. This check currently runs very late at PMIC probe in U-Boot proper. Fix so that the power-on source check can work at probe time in SPL. Also enable probe after bind and remove the PMIC banner in SPL. With this we can use ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON and SPL_PMIC_RK8XX to power off the device very quickly after TPL instead of after TF-A and U-Boot proper has been loaded and run. DDR V1.18 f366f69a7d typ 23/07/17-15:48:58 ln LP4/4x derate en, other dram:1x trefi ddrconfig:7 LPDDR4X, 324MHz BW=32 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=16 Size=8192MB change to: 324MHz clk skew:0x64 change to: 528MHz clk skew:0x58 change to: 780MHz clk skew:0x58 change to: 1056MHz(final freq) clk skew:0x40 out Power Off due to plug-in event Fixes: 30975fb73d51 ("rockchip: Add option to prevent booting on power plug-in") Signed-off-by: Jonas Karlman <jonas(a)kwiboo.se> --- drivers/power/pmic/rk8xx.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c index 25ef621f8df4..4e3a17337eee 100644 --- a/drivers/power/pmic/rk8xx.c +++ b/drivers/power/pmic/rk8xx.c @@ -156,6 +156,10 @@ static int rk8xx_bind(struct udevice *dev) if (!children) debug("%s: %s - no child found\n", __func__, dev->name); + if (IS_ENABLED(CONFIG_SPL_BUILD) && + IS_ENABLED(CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON)) + dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND); + /* Always return success for this device */ return 0; } @@ -236,14 +240,16 @@ static int rk8xx_probe(struct udevice *dev) pmic_reg_read(dev, init_data[i].reg)); } - printf("PMIC: RK%x ", show_variant); + if (!IS_ENABLED(CONFIG_SPL_BUILD)) { + printf("PMIC: RK%x ", show_variant); + if (on_source && off_source) + printf("(on=0x%02x, off=0x%02x)", + pmic_reg_read(dev, on_source), + pmic_reg_read(dev, off_source)); + printf("\n"); + } - if (on_source && off_source) - printf("(on=0x%02x, off=0x%02x)", - pmic_reg_read(dev, on_source), - pmic_reg_read(dev, off_source)); - printf("\n"); - if (CONFIG_IS_ENABLED(ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON)) + if (IS_ENABLED(CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON)) rk8xx_off_for_plugin(dev); return 0; -- 2.41.0

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