July 2023 - U-Boot

[PATCH] ARM: stm32: Inhibit PDDS because CSTBYDIS is set
by Marek Vasut 16 Aug '23

16 Aug '23

The PWR_MPUCR CSTBYDIS bit is set, therefore the CA cores can never enter CStandby state and would always end up in CStop state. Clear the PDDS bit, which indicates the CA cores can enter CStandby state as it makes little sense to keep it set with CSTBYDIS also set. This does however fix a problem too. When both PWR_MPUCR and PWR_MCUCR PDDS bits are set, then the chip enters CStandby state even though the PWR_MCUCR CSTBYDIS is set. Clearing the PWR_MPUCR PDDS prevents that from happening. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: Patrice Chotard <patrice.chotard(a)foss.st.com> Cc: Patrick Delaunay <patrick.delaunay(a)foss.st.com> Cc: uboot-stm32(a)st-md-mailman.stormreply.com --- arch/arm/mach-stm32mp/psci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/psci.c b/arch/arm/mach-stm32mp/psci.c index 50e3fc4ae45..79734b5289b 100644 --- a/arch/arm/mach-stm32mp/psci.c +++ b/arch/arm/mach-stm32mp/psci.c @@ -754,7 +754,7 @@ void __secure psci_system_suspend(u32 __always_unused function_id, setbits_le32(STM32_RCC_BASE + RCC_MP_CIER, RCC_MP_CIFR_WKUPF); setbits_le32(STM32_PWR_BASE + PWR_MPUCR, - PWR_MPUCR_CSSF | PWR_MPUCR_CSTDBYDIS | PWR_MPUCR_PDDS); + PWR_MPUCR_CSSF | PWR_MPUCR_CSTDBYDIS); saved_mcudivr = readl(STM32_RCC_BASE + RCC_MCUDIVR); saved_pll3cr = readl(STM32_RCC_BASE + RCC_PLL3CR); -- 2.40.1

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[RESEND PATCH] ARM: dts: stm32: fix display pinmux for stm32f746-disco
by Dario Binacchi 16 Aug '23

16 Aug '23

As reported by the datasheet (DocID027590 Rev 4) for PG12: - AF9 -> LCD_B4 - AF14 -> LCD_B1 So replace AF14 with AF9 for PG12 in the dts. Fixes: fe63d3cfb77ef ("ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7") Signed-off-by: Dario Binacchi <dario.binacchi(a)amarulasolutions.com> --- arch/arm/dts/stm32f746-disco-u-boot.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi index 19b5451db441..522cffb1ac9f 100644 --- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi @@ -169,7 +169,7 @@ ltdc_pins: ltdc@0 { pins { pinmux = <STM32_PINMUX('E', 4, AF14)>, /* B0 */ - <STM32_PINMUX('G',12, AF14)>, /* B4 */ + <STM32_PINMUX('G',12, AF9)>, /* B4 */ <STM32_PINMUX('I', 9, AF14)>, /* VSYNC */ <STM32_PINMUX('I',10, AF14)>, /* HSYNC */ <STM32_PINMUX('I',14, AF14)>, /* CLK */ -- 2.32.0

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[PATCH] clk: stm32mp1: remove error for disabled clock in stm32mp1_clk_get_parent
by Patrick Delaunay 16 Aug '23

16 Aug '23

To disabled a clock in clock tree initialization for a mux of STM32MP15, the selected clock source index is set with the latest possible index for the number of bit used. Today this valid configuration cause a error in U-Boot messages, for example with CLK_ETH_DISABLED, when this clock is not needed for the used ETH PHY without crystal: no parents defined for clk id 123 This patch change the level of this message to avoid this trace for valid clock tree. Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- drivers/clk/stm32/clk-stm32mp1.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/stm32/clk-stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c index 4f4524fcb2c6..615028769495 100644 --- a/drivers/clk/stm32/clk-stm32mp1.c +++ b/drivers/clk/stm32/clk-stm32mp1.c @@ -881,7 +881,8 @@ static int stm32mp1_clk_get_parent(struct stm32mp1_clk_priv *priv, return sel[s].parent[p]; } - log_err("no parents defined for clk id %d\n", (u32)id); + /* clock is DISABLED when the clock src is not in clk_parent[] range */ + log_debug("no parents defined for clk id %d\n", (u32)id); return -EINVAL; } -- 2.25.1

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[PATCH v3 0/3] Enable U-Boot at Virtualbox to boot images
by thomas.mittelstaedt＠de.bosch.com 16 Aug '23

16 Aug '23

From: Thomas Mittelstaedt <thomas.mittelstaedt(a)de.bosch.com> The changes are needed to get U-Boot to be started at VirtualBox images supporting distro boot capability (scripts and extlinux.conf). Atm the patch "pci: coreboot: Don't read regions when booting" from Simon Glass is not integrated yet. So AHCI and IDE devices are not handled correctly without this patch. (https://patchwork.ozlabs.org/project/uboot/patch/20230220194927.476708-8-sj…) Changes since v2: - DISTROBOOT configuration replaced with BOOTSTD to get more flexibility Thomas Mittelstaedt (3): X86: Add support for SCSI devices X86: Add bootstd support X86: pxeboot: bugfix: Set variable for size of initrd boot/pxe_utils.c | 2 +- configs/efi-x86_payload64_defconfig | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) -- 2.30.2

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[PATCH v5 0/2] Add support to fetch baudrate from dtb
by Venkatesh Yadav Abbarapu 16 Aug '23

16 Aug '23

In this patch series - Add support in Kconfig and convert for armada boards - Fetch baudrate from the dtb and update Changes in v5: - Adding DEFAULT_ENV_IS_RW Kconfig in missing files - Updating DEFAULT_ENV_IS_RW to CONFIG_DEFAULT_ENV_IS_RW Changes in v4: - Moved SERIAL_DT_BAUD to another patch - Added doc file for fetching serial baudrate from DT. - Changed Kconfig SERIAL_DT_BAUD to OF_SERIAL_DT_BAUD - Added function docs wherever required. - Moved changes from fdtdec api to ofnode - Changed serial_get_valid_baudrate to check_valid_baudrate - Added function fetch_baud_from_dtb to fetch baud from DT - Used dectoul() for parsing baudrate Changes in v3: - Add SERIAL_DT_BAUD to Kconfig - Moved DEFAULT_ENV_IS_RW to Kconfig also updated armada files - Moved filler changes from zynqmp.h to generic file env_default.h - Removed ENV_RW_FILLER and added padding in the generic file env_default.h. - Print baudrate parameter properly when SERIAL_DT is enabled. Changes in v2: - Changed to #ifdef from #if CONFIG_IS_ENABLED to enable patching in spl. - Added SPL_ENV_SUPPORT dependency in SERIAL_DT_BAUD to allow SPL compilation. - Moved DEFAULT_ENV_IS_RW to Kconfig also updated armada files - Moved ENV_RW_FILLER to generic file env_default.h. - Increased the ENV_RW_FILLER padding to support 8000000 baud. Algapally Santosh Sagar (2): configs: Add support in Kconfig and convert for armada boards serial: zynqmp: Fetch baudrate from dtb and update configs/eDPU_defconfig | 1 + configs/mvebu_db-88f3720_defconfig | 1 + configs/mvebu_espressobin-88f3720_defconfig | 1 + configs/uDPU_defconfig | 1 + doc/README.serial_dt_baud | 41 ++++++++++++++++++++ drivers/core/ofnode.c | 20 ++++++++++ drivers/serial/Kconfig | 15 ++++++++ drivers/serial/serial-uclass.c | 42 +++++++++++++++++++++ include/configs/mvebu_armada-37xx.h | 1 - include/dm/ofnode.h | 14 ++++++- include/env_default.h | 8 +++- include/env_internal.h | 2 +- include/serial.h | 15 ++++++++ 13 files changed, 156 insertions(+), 6 deletions(-) create mode 100644 doc/README.serial_dt_baud -- 2.17.1

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[PATCH] cmd: pxe: Update the command help
by Bin Meng 15 Aug '23

15 Aug '23

Currently the "help" displays pxe command help text like this: => help ... printenv - print environment variables pxe - commands to get and boot from pxe files To use IPv6 add -ipv6 parameter qfw - QEMU firmware interface ... This does not read clearly. Remove the IPv6 stuff as it is in the detailed help text so that it fits just a single line. Signed-off-by: Bin Meng <bmeng(a)tinylab.org> --- cmd/pxe.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/cmd/pxe.c b/cmd/pxe.c index 677142520b..7bfb1b9b28 100644 --- a/cmd/pxe.c +++ b/cmd/pxe.c @@ -333,8 +333,7 @@ static int do_pxe(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) } U_BOOT_CMD(pxe, 4, 1, do_pxe, - "commands to get and boot from pxe files\n" - "To use IPv6 add -ipv6 parameter", + "get and boot from pxe files", "get [" USE_IP6_CMD_PARAM "] - try to retrieve a pxe file using tftp\n" "pxe boot [pxefile_addr_r] [-ipv6] - boot from the pxe file at pxefile_addr_r\n" ); -- 2.25.1

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[PATCH 1/1] fs: fat: avoid multiplication overflow
by Heinrich Schuchardt 15 Aug '23

15 Aug '23

The product of two 32 bit integers is a 32 bit integer. Hence clustcount * bytesperclust may overflow on > 4 GiB devices. Change the type of clustcount. Fixes: cb8af8af5ba0 ("fs: fat: support write with non-zero offset") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- fs/fat/fat_write.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index e2a9913f80..289e7aa641 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -690,8 +690,8 @@ get_set_cluster(fsdata *mydata, __u32 clustnum, loff_t pos, __u8 *buffer, static u8 *tmpbuf_cluster; unsigned int bytesperclust = mydata->clust_size * mydata->sect_size; __u32 startsect; - loff_t wsize; - int clustcount, i, ret; + loff_t clustcount, wsize; + int i, ret; *gotsize = 0; if (!size) -- 2.40.1

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[PATCH 0/2] test: unit test for semihosting
by Heinrich Schuchardt 15 Aug '23

15 Aug '23

* Provide a unit test for semihosting testing, reading and writing a file. * Enable semihosting on qemu_arm64_defconfig. Semihosting is already enabled for the board in u-boot-testhooks. Heinrich Schuchardt (2): configs: enable SEMIHOSTING on qemu_arm64_defconfig test: unit test for semihosting configs/qemu_arm64_defconfig | 1 + test/py/tests/test_semihosting/conftest.py | 23 +++++++++++++ test/py/tests/test_semihosting/test_hostfs.py | 33 +++++++++++++++++++ 3 files changed, 57 insertions(+) create mode 100644 test/py/tests/test_semihosting/conftest.py create mode 100644 test/py/tests/test_semihosting/test_hostfs.py -- 2.40.1

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[PATCH 1/1] spl: add FIT support to semihosting boot method
by Heinrich Schuchardt 15 Aug '23

15 Aug '23

Allow loading a FIT image via semihosting in SPL. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- common/spl/spl_semihosting.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/common/spl/spl_semihosting.c b/common/spl/spl_semihosting.c index 5b5e842a11..f7dd289286 100644 --- a/common/spl/spl_semihosting.c +++ b/common/spl/spl_semihosting.c @@ -21,6 +21,23 @@ static int smh_read_full(long fd, void *memp, size_t len) return 0; } +static ulong smh_fit_read(struct spl_load_info *load, ulong file_offset, + ulong size, void *buf) +{ + long fd; + ulong ret; + + fd = smh_open(load->filename, MODE_READ | MODE_BINARY); + if (fd < 0) { + log_debug("could not open %s: %ld\n", load->filename, fd); + return 0; + } + ret = smh_read(fd, buf, size); + smh_close(fd); + + return ret; +} + static int spl_smh_load_image(struct spl_image_info *spl_image, struct spl_boot_device *bootdev) { @@ -49,6 +66,20 @@ static int spl_smh_load_image(struct spl_image_info *spl_image, goto out; } + if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) && + image_get_magic(header) == FDT_MAGIC) { + struct spl_load_info load; + + debug("Found FIT\n"); + load.read = smh_fit_read; + load.bl_len = 1; + load.filename = filename; + load.priv = NULL; + smh_close(fd); + + return spl_load_simple_fit(spl_image, &load, 0, header); + } + ret = spl_parse_image_header(spl_image, bootdev, header); if (ret) { log_debug("failed to parse image header: %d\n", ret); -- 2.40.1

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[PATCH] phy: Add support for the Apple Type-C PHY
by Mark Kettenis 15 Aug '23

15 Aug '23

This is merely a dummy driver that makes sure the DWC3 XHCI driver finds its reset and PHY controllers. We rely on iBoot to set up the PHY for us. Signed-off-by: Mark Kettenis <kettenis(a)openbsd.org> --- MAINTAINERS | 1 + arch/arm/Kconfig | 1 + configs/apple_m1_defconfig | 1 + drivers/phy/Kconfig | 10 +++++++ drivers/phy/Makefile | 1 + drivers/phy/phy-apple-atc.c | 56 +++++++++++++++++++++++++++++++++++++ 6 files changed, 70 insertions(+) create mode 100644 drivers/phy/phy-apple-atc.c diff --git a/MAINTAINERS b/MAINTAINERS index 2477923a52..ebe7305395 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -123,6 +123,7 @@ F: configs/apple_m1_defconfig F: drivers/iommu/apple_dart.c F: drivers/nvme/nvme_apple.c F: drivers/pci/pcie_apple.c +F: drivers/phy/phy-apple-atc.c F: drivers/pinctrl/pinctrl-apple.c F: drivers/watchdog/apple_wdt.c F: include/configs/apple.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 99264a6478..bcfce8ed86 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1011,6 +1011,7 @@ config ARCH_APPLE select OF_BOARD_SETUP select OF_CONTROL select PCI + select PHY select PINCTRL select POSITION_INDEPENDENT select POWER_DOMAIN diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig index 755560971e..d58a9030db 100644 --- a/configs/apple_m1_defconfig +++ b/configs/apple_m1_defconfig @@ -16,6 +16,7 @@ CONFIG_NVME_APPLE=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_PCI=y +CONFIG_USB_DWC3=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_NO_FB_CLEAR=y diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 7a2d54f71d..8ac5769ed9 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -70,6 +70,16 @@ config AB8500_USB_PHY help Support for the USB OTG PHY in ST-Ericsson AB8500. +config APPLE_ATCPHY + bool "Apple Type-C PHY Driver" + depends on PHY && ARCH_APPLE + default y + help + Support for the Apple Type-C PHY. + + This is a dummy driver since the PHY is initialized + sufficiently by previous stage firmware. + config BCM6318_USBH_PHY bool "BCM6318 USBH PHY support" depends on PHY && ARCH_BMIPS diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index aca365d219..5d4de86e71 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o obj-$(CONFIG_MIPI_DPHY_HELPERS) += phy-core-mipi-dphy.o obj-$(CONFIG_AB8500_USB_PHY) += phy-ab8500-usb.o +obj-$(CONFIG_APPLE_ATCPHY) += phy-apple-atc.o obj-$(CONFIG_BCM6318_USBH_PHY) += bcm6318-usbh-phy.o obj-$(CONFIG_BCM6348_USBH_PHY) += bcm6348-usbh-phy.o obj-$(CONFIG_BCM6358_USBH_PHY) += bcm6358-usbh-phy.o diff --git a/drivers/phy/phy-apple-atc.c b/drivers/phy/phy-apple-atc.c new file mode 100644 index 0000000000..15c5b8a1c2 --- /dev/null +++ b/drivers/phy/phy-apple-atc.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Mark Kettenis <kettenis(a)openbsd.org> + */ + +#include <common.h> +#include <dm.h> +#include <dm/device-internal.h> +#include <generic-phy.h> +#include <reset-uclass.h> + +static const struct phy_ops apple_atcphy_ops = { +}; + +static struct driver apple_atcphy_driver = { + .name = "apple-atcphy", + .id = UCLASS_PHY, + .ops = &apple_atcphy_ops, +}; + +static int apple_atcphy_reset_of_xlate(struct reset_ctl *reset_ctl, + struct ofnode_phandle_args *args) +{ + if (args->args_count != 0) + return -EINVAL; + + return 0; +} + +static const struct reset_ops apple_atcphy_reset_ops = { + .of_xlate = apple_atcphy_reset_of_xlate, +}; + +static int apple_atcphy_reset_probe(struct udevice *dev) +{ + struct udevice *child; + + device_bind(dev, &apple_atcphy_driver, "apple-atcphy", NULL, + dev_ofnode(dev), &child); + + return 0; +} + +static const struct udevice_id apple_atcphy_ids[] = { + { .compatible = "apple,t6000-atcphy" }, + { .compatible = "apple,t8103-atcphy" }, + { } +}; + +U_BOOT_DRIVER(apple_atcphy_reset) = { + .name = "apple-atcphy-reset", + .id = UCLASS_RESET, + .of_match = apple_atcphy_ids, + .ops = &apple_atcphy_reset_ops, + .probe = apple_atcphy_reset_probe, +}; -- 2.41.0

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