June 2023 - U-Boot

[PATCH v2 0/2] ARM: dts: stm32mp: alignment with v6.3
by Patrick Delaunay 16 Jun '23

16 Jun '23

Alignment with Linux device tree v6.3 for STM32MP13x and STM32MP15x STMicroelectronics board and common files, SoC and pincontrol dtsi. I also include the new dt-bindings files video-interfaces.h as it is done in Linux kernel. Changes in v2: - change commit message and title with v6.3; no new device-tree modification after v6.3-rc3 - add SHA1 for each kernel patch Patrick Delaunay (2): media: dt-bindings: media: Add macros for video interface bus types ARM: dts: stm32mp: alignment with v6.3 arch/arm/dts/stm32mp13-pinctrl.dtsi | 138 +++ arch/arm/dts/stm32mp131.dtsi | 993 ++++++++++++++++++- arch/arm/dts/stm32mp133.dtsi | 31 + arch/arm/dts/stm32mp135f-dk.dts | 235 ++++- arch/arm/dts/stm32mp15-pinctrl.dtsi | 50 +- arch/arm/dts/stm32mp151.dtsi | 2 - arch/arm/dts/stm32mp157c-ev1.dts | 18 +- arch/arm/dts/stm32mp15xx-dhcom-som.dtsi | 8 +- arch/arm/dts/stm32mp15xx-dhcor-som.dtsi | 8 +- arch/arm/dts/stm32mp15xx-dkx.dtsi | 10 +- include/dt-bindings/clock/stm32mp13-clks.h | 2 +- include/dt-bindings/media/video-interfaces.h | 16 + include/dt-bindings/reset/stm32mp13-resets.h | 2 +- 13 files changed, 1475 insertions(+), 38 deletions(-) create mode 100644 include/dt-bindings/media/video-interfaces.h -- 2.25.1

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[PATCH 0/6] stm32mp: soome changes and fixes for STM32MP13 and STM32MP15 boards
by Patrick Delaunay 16 Jun '23

16 Jun '23

Hi, here come some cleanups and fixed for the STM32MP13 and STM32MP15 boards. Patrick Delaunay (6): stm32mp: add support of STM32MP15x Rev.Y stm32mp: bsec: add check on null size in misc ops configs: stm32mp1: reduce DDR_CACHEABLE_SIZE to supported 256MB DDR stm32mp: stm32prog: fix OTP read/write error management stm32mp: stm32prog: use the decimal format by default for offset parsing pmic: stpmic1: support new prefix node name for regulator arch/arm/mach-stm32mp/bsec.c | 4 ++-- arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c | 11 +++++++++-- arch/arm/mach-stm32mp/include/mach/sys_proto.h | 1 + arch/arm/mach-stm32mp/stm32mp15x.c | 5 ++++- configs/stm32mp13_defconfig | 2 +- configs/stm32mp15_defconfig | 2 +- drivers/power/pmic/stpmic1.c | 2 ++ 7 files changed, 20 insertions(+), 7 deletions(-) -- 2.25.1

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[PATCH] xilinx: board: Add support to pick bootscr address from DT
by Michal Simek 16 Jun '23

16 Jun '23

From: Algapally Santosh Sagar <santoshsagar.algapally(a)amd.com> The bootscript is expected at a default address specific to each platform. When high speed memory like Programmable Logic Double Data Rate RAM (PL DDR RAM) or Higher Bandwidth Memory RAM (HBM) is used the boot.scr may be loaded at a different offset. The offset needs to be set through setenv. Due to the default values in some cases the boot.scr is falling in between the kernel partition. The bootscript address or the bootscript offset is fetched directly from the DT and updated in the environment making it easier for automated flows. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally(a)amd.com> Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- board/xilinx/common/board.c | 43 ++++++++++++++++++++++++++++++++++--- 1 file changed, 40 insertions(+), 3 deletions(-) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index d071ebfb9cc2..bdd4113b0916 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -405,6 +405,31 @@ static int env_set_by_index(const char *name, int index, char *data) return env_set(var, data); } +static int get_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset) +{ + int ret; + ofnode uboot; + + *bootscr_address = 0; + *bootscr_offset = 0; + + uboot = ofnode_path("/options/u-boot"); + if (!ofnode_valid(uboot)) { + printf("%s: Missing /u-boot node\n", __func__); + return -EINVAL; + } + + ret = ofnode_read_u64(uboot, "bootscr-address", bootscr_address); + if (ret) { + ret = ofnode_read_u64(uboot, "bootscr-offset-from-ram-start", + bootscr_offset); + if (ret) + return -EINVAL; + } + + return 0; +} + int board_late_init_xilinx(void) { u32 ret = 0; @@ -414,9 +439,21 @@ int board_late_init_xilinx(void) if (!IS_ENABLED(CONFIG_MICROBLAZE)) { ulong scriptaddr; - - scriptaddr = env_get_hex("scriptaddr", 0); - ret |= env_set_hex("scriptaddr", gd->ram_base + scriptaddr); + u64 bootscr_address; + u64 bootscr_offset; + + /* Fetch bootscr_address/bootscr_offset from DT and update */ + if (!get_bootscript_address(&bootscr_address, &bootscr_offset)) { + if (bootscr_offset) + ret |= env_set_hex("scriptaddr", + gd->ram_base + bootscr_offset); + else + ret |= env_set_hex("scriptaddr", bootscr_address); + } else { + /* Update scriptaddr(bootscr offset) from env */ + scriptaddr = env_get_hex("scriptaddr", 0); + ret |= env_set_hex("scriptaddr", gd->ram_base + scriptaddr); + } } if (IS_ENABLED(CONFIG_ARCH_ZYNQ) || IS_ENABLED(CONFIG_MICROBLAZE)) -- 2.36.1

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[PATCH] ARM: stm32: Add missing header for save_boot_params
by Marek Vasut 16 Jun '23

16 Jun '23

The get_stm32mp_rom_api_table() function is defined in sys_params.h , add the missing header to avoid compiler warning. Fixes: dbeaca79b79 ("ARM: stm32: Factor out save_boot_params") Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: Patrice Chotard <patrice.chotard(a)foss.st.com> Cc: Patrick Delaunay <patrick.delaunay(a)foss.st.com> Cc: uboot-stm32(a)st-md-mailman.stormreply.com --- arch/arm/mach-stm32mp/ecdsa_romapi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-stm32mp/ecdsa_romapi.c b/arch/arm/mach-stm32mp/ecdsa_romapi.c index 12b42b9d59c..93c561c69b1 100644 --- a/arch/arm/mach-stm32mp/ecdsa_romapi.c +++ b/arch/arm/mach-stm32mp/ecdsa_romapi.c @@ -5,6 +5,7 @@ * Implements ECDSA signature verification via the STM32MP ROM. */ #include <asm/system.h> +#include <asm/arch/sys_proto.h> #include <dm/device.h> #include <linux/types.h> #include <u-boot/ecdsa.h> -- 2.39.2

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[PATCH v2] ARM: stm32: Add IWDG handling into PSCI suspend code
by Marek Vasut 16 Jun '23

16 Jun '23

In case the IWDG is enabled by either U-Boot or Linux, the IWDG can never be disabled again. That includes low power states, which means that if the IWDG is enabled, the SoC would reset itself after a while in suspend via the IWDG. This is not desired behavior. It is possible to enable IWDG pre-timeout IRQ which is routed into the EXTI, and use that IRQ to wake the CPU up before the IWDG timeout is reached and reset is triggered. This pre-timeout IRQ can be used to reload the WDT and then suspend the CPU again every once in a while. Implement this functionality for both IWDG1 and IWDG2 by reading out all the unmasked IRQs, comparing the list with currently pending IRQs in GICv3: - If any IRQ is pending and it is NOT IWDG1 or IWDG2 pre-timeout IRQ, wake up and let OS handle the IRQs - If IWDG1 or IWDG2 IRQ is pending and no other IRQ is pending, ping the respective IWDG and suspend again This does not seem to have any adverse impact on power consumption in suspend. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: Ilias Apalodimas <ilias.apalodimas(a)linaro.org> Cc: Marek Vasut <marex(a)denx.de> Cc: Patrice Chotard <patrice.chotard(a)foss.st.com> Cc: Patrick Delaunay <patrick.delaunay(a)foss.st.com> Cc: Sughosh Ganu <sughosh.ganu(a)linaro.org> Cc: u-boot(a)lists.denx.de Cc: uboot-stm32(a)st-md-mailman.stormreply.com --- V2: Ping the IWDG before entering WFI to assure they would not reset the SoC --- arch/arm/mach-stm32mp/include/mach/stm32.h | 2 + arch/arm/mach-stm32mp/psci.c | 73 ++++++++++++++++++++-- 2 files changed, 70 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index c85ae6a34ee..1cdc5e3b186 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -21,8 +21,10 @@ #define STM32_DBGMCU_BASE 0x50081000 #endif #define STM32_FMC2_BASE 0x58002000 +#define STM32_IWDG2_BASE 0x5A002000 #define STM32_DDRCTRL_BASE 0x5A003000 #define STM32_DDRPHYC_BASE 0x5A004000 +#define STM32_IWDG1_BASE 0x5C003000 #define STM32_TZC_BASE 0x5C006000 #define STM32_ETZPC_BASE 0x5C007000 #define STM32_STGEN_BASE 0x5C008000 diff --git a/arch/arm/mach-stm32mp/psci.c b/arch/arm/mach-stm32mp/psci.c index 1e69673e88b..39b5200949a 100644 --- a/arch/arm/mach-stm32mp/psci.c +++ b/arch/arm/mach-stm32mp/psci.c @@ -161,6 +161,12 @@ #define RCC_MP_GRSTCSETR_MPUP0RST BIT(4) #define RCC_MP_GRSTCSETR_MPUP1RST BIT(5) +/* IWDG */ +#define IWDG_KR 0x00 +#define IWDG_KR_RELOAD_KEY 0xaaaa +#define IWDG_EWCR 0x14 +#define IWDG_EWCR_EWIC BIT(14) + #define STM32MP1_PSCI_NR_CPUS 2 #if STM32MP1_PSCI_NR_CPUS > CONFIG_ARMV7_PSCI_NR_CPUS #error "invalid value for CONFIG_ARMV7_PSCI_NR_CPUS" @@ -696,7 +702,18 @@ void __secure psci_system_suspend(u32 __always_unused function_id, u32 ep, u32 context_id) { u32 saved_mcudivr, saved_pll3cr, saved_pll4cr, saved_mssckselr; + u32 gicd_addr = stm32mp_get_gicd_base_address(); + bool iwdg1_wake = false; + bool iwdg2_wake = false; + bool other_wake = false; u32 saved_pwrctl, reg; + u32 gic_enabled[8]; + u32 irqs; + int i; + + /* Cache enable mask of all 256 SPI */ + for (i = 0; i < ARRAY_SIZE(gic_enabled); i++) + gic_enabled[i] = readl(gicd_addr + GICD_ISENABLERn + 0x4 + 4 * i); /* Disable IO compensation */ @@ -725,11 +742,57 @@ void __secure psci_system_suspend(u32 __always_unused function_id, setbits_le32(STM32_PWR_BASE + PWR_CR3, PWR_CR3_DDRSREN); writel(0x3, STM32_RCC_BASE + RCC_MP_SREQSETR); - /* Zzz, enter stop mode */ - asm volatile( - "isb\n" - "dsb\n" - "wfi\n"); + /* Ping the IWDG before entering suspend */ + iwdg1_wake = !!(gic_enabled[4] & BIT(22)); /* SPI 150 */ + iwdg2_wake = !!(gic_enabled[4] & BIT(23)); /* SPI 151 */ + + for (;;) { + /* Ping IWDG1 and ACK pretimer IRQ */ + if (iwdg1_wake) { + writel(IWDG_KR_RELOAD_KEY, STM32_IWDG1_BASE + IWDG_KR); + writel(IWDG_EWCR_EWIC, STM32_IWDG1_BASE + IWDG_EWCR); + } + + /* Ping IWDG2 and ACK pretimer IRQ */ + if (iwdg2_wake) { + writel(IWDG_KR_RELOAD_KEY, STM32_IWDG2_BASE + IWDG_KR); + writel(IWDG_EWCR_EWIC, STM32_IWDG2_BASE + IWDG_EWCR); + } + + iwdg1_wake = false; + iwdg2_wake = false; + + /* Zzz, enter stop mode */ + asm volatile( + "isb\n" + "dsb\n" + "wfi\n"); + + /* Determine the wake up source */ + for (i = 0; i < ARRAY_SIZE(gic_enabled); i++) { + irqs = readl(gicd_addr + GICR_IGROUPMODRn + 0x4 + 4 * i); + irqs &= gic_enabled[i]; + if (!irqs) + continue; + + /* Test whether IWDG pretimeout triggered the wake up. */ + if (i == 4) { /* SPI Num 128..159 */ + iwdg1_wake = !!(irqs & BIT(22)); /* SPI 150 */ + iwdg2_wake = !!(irqs & BIT(23)); /* SPI 151 */ + irqs &= ~(BIT(22) | BIT(23)); + } + + /* Test whether there is any other wake up trigger. */ + if (irqs) { + other_wake = true; + break; + } + } + + /* Other wake up triggers pending, let OS deal with all of it. */ + if (other_wake) + break; + } writel(0x3, STM32_RCC_BASE + RCC_MP_SREQCLRR); ddr_sw_self_refresh_exit(); -- 2.39.2

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[PATCH 1/2] config: stm32mp15: remove CONFIG_FASTBOOT_USB_DEV
by Patrick Delaunay 16 Jun '23

16 Jun '23

The CONFIG_FASTBOOT_USB_DEV is used to select USB OTG controller other than 0 but it is not the case for STM32MP15 boards; it can be removed to simplify the STM32MP15 defconfig files. On STM32MP15x boards, we have only one USB device with instance 0, so the device is hardcoded arch/arm/mach-stm32mp/cpu.c with the command "fastboot 0" and this define is not used in config files (include/configs/stm32mp15_st_common.h). Fixes: 4633fd51c5d7 ("stm32mp1: activate FASTBOOT on eMMC") Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- configs/stm32mp15_basic_defconfig | 1 - configs/stm32mp15_defconfig | 1 - configs/stm32mp15_trusted_defconfig | 1 - 3 files changed, 3 deletions(-) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 13355ebb4692..174eb42d6447 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -102,7 +102,6 @@ CONFIG_SET_DFU_ALT_INFO=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0xC0000000 CONFIG_FASTBOOT_BUF_SIZE=0x02000000 -CONFIG_FASTBOOT_USB_DEV=1 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 2669aae0f2f4..b25477c64d03 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -75,7 +75,6 @@ CONFIG_SET_DFU_ALT_INFO=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0xC0000000 CONFIG_FASTBOOT_BUF_SIZE=0x02000000 -CONFIG_FASTBOOT_USB_DEV=1 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 5f0fb4565105..e93a66f867cf 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -76,7 +76,6 @@ CONFIG_SET_DFU_ALT_INFO=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0xC0000000 CONFIG_FASTBOOT_BUF_SIZE=0x02000000 -CONFIG_FASTBOOT_USB_DEV=1 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y -- 2.25.1

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[PATCH 1/3] stm32mp: stm32prog: Add support of ENV partition type
by Patrick Delaunay 16 Jun '23

16 Jun '23

Add support of "ENV" partition type in flashlayout to select the "u-boot-env" GUID, with PARTITION_U_BOOT_ENVIRONMENT = 3de21764-95bd-54bd-a5c3-4abe786f38a8, that mean a partition holding a U-Boot environment introduced by commit c0364ce1c695 ("doc/README.gpt: define partition type GUID for U-Boot environment")' Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c | 5 +++++ arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h | 1 + 2 files changed, 6 insertions(+) diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c index 6f3641ccf57b..1bd86b5187da 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c @@ -430,6 +430,8 @@ static int parse_type(struct stm32prog_data *data, } } else if (!strcmp(p, "FIP")) { part->part_type = PART_FIP; + } else if (!strcmp(p, "ENV")) { + part->part_type = PART_ENV; } else if (!strcmp(p, "System")) { part->part_type = PART_SYSTEM; } else if (!strcmp(p, "FileSystem")) { @@ -1130,6 +1132,9 @@ static int create_gpt_partitions(struct stm32prog_data *data) case PART_BINARY: type_str = LINUX_RESERVED_UUID; break; + case PART_ENV: + type_str = "u-boot-env"; + break; case PART_FIP: type_str = FIP_TYPE_UUID; break; diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h index 58f4b96fa752..4c2c1314d990 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h @@ -100,6 +100,7 @@ struct stm32_header_v2 { enum stm32prog_part_type { PART_BINARY, PART_FIP, + PART_ENV, PART_SYSTEM, PART_FILESYSTEM, RAW_IMAGE, -- 2.25.1

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[PATCH 00/12] stm32mp1: use U-Boot device tree to configure MTD partitions
by Patrick Delaunay 16 Jun '23

16 Jun '23

Add the MTD partitions subnode in U-Boot device tree for all stm32mp13 and stm32mp15 boards and no more rely on mtdids and mtdparts variables or CONFIG_SYS_MTDPARTS_RUNTIME. When these variables are absent, the required OF fallback is performed in mtd_probe_devices() with commit dc339bf784f0 ("mtd: add support for parsing partitions defined in OF"). To allow dynamically configuration of MTD partitioning for Linux kernel, the MTD partitioning is only defined in U-Boot device tree and copied in Linux kernel device tree. This serie also disable CMD_MTDPARTS as it is strongly encouraged to no more use this command. Marek, I modify the dhcom/dhcor boardd in the last patch of the serie but if you prefer I can drop this patch. For "stm32mp157c-ev1.dts" used by stm32mp15_trusted_defconfig * nand0 - type: NAND flash - block size: 0x40000 bytes - min I/O: 0x1000 bytes - OOB size: 224 bytes - OOB available: 118 bytes - ECC strength: 8 bits - ECC step size: 512 bytes - bitflip threshold: 6 bits - 0x000000000000-0x000040000000 : "nand0" - 0x000000000000-0x000000200000 : "fsbl" - 0x000000200000-0x000000600000 : "fip1" - 0x000000600000-0x000000a00000 : "fip2" - 0x000000a00000-0x000040000000 : "UBI" * nor0 - device: flash@0 - parent: spi@58003000 - driver: jedec_spi_nor - path: /soc/spi@58003000/flash@0 - type: NOR flash - block size: 0x10000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "nor0" - 0x000000000000-0x000000040000 : "fsbl1" - 0x000000040000-0x000000080000 : "fsbl2" - 0x000000080000-0x000000480000 : "fip" - 0x000000480000-0x000000500000 : "u-boot-env" - 0x000000500000-0x000004000000 : "nor-user" For "stm32mp157c-ev1-scmi.dts" the device tree file used by stm32mp15_defconfig, with TF-A BL2 and OP-TEE including a SCMI server for secure resources (when TZEN=1), the default STMicroelectronics configuration. I align the NOR and NAND layout on EV1 boards with the STMicroelectronics recommendations used in OpenSTLinux V4.0: with support of TF-A BL2 firmware update, required 2 "metadata" partition for redundancy and 2 FIPs for A/B update. * nand0 - type: NAND flash - block size: 0x40000 bytes - min I/O: 0x1000 bytes - OOB size: 224 bytes - OOB available: 118 bytes - ECC strength: 8 bits - ECC step size: 512 bytes - bitflip threshold: 6 bits - 0x000000000000-0x000040000000 : "nand0" - 0x000000000000-0x000000080000 : "fsbl1" - 0x000000080000-0x000000100000 : "fsbl2" - 0x000000100000-0x000000180000 : "metadata1" - 0x000000180000-0x000000200000 : "metadata2" - 0x000000200000-0x000000600000 : "fip-a1" - 0x000000600000-0x000000a00000 : "fip-a2" - 0x000000a00000-0x000000e00000 : "fip-b1" - 0x000000e00000-0x000001200000 : "fip-b2" - 0x000001200000-0x000040000000 : "UBI" * nor0 - device: flash@0 - parent: spi@58003000 - driver: jedec_spi_nor - path: /soc/spi@58003000/flash@0 - type: NOR flash - block size: 0x10000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "nor0" - 0x000000000000-0x000000040000 : "fsbl1" - 0x000000040000-0x000000080000 : "fsbl2" - 0x000000080000-0x0000000c0000 : "metadata1" - 0x0000000c0000-0x000000100000 : "metadata2" - 0x000000100000-0x000000500000 : "fip-a" - 0x000000500000-0x000000900000 : "fip-b" - 0x000000900000-0x000000980000 : "u-boot-env" - 0x000000980000-0x000004000000 : "nor-user" Patrice Chotard (5): stm32mp: stm32prog: Remove usage of "mtdparts" function arm: dts: stm32: Add partitions in flash0 and nand node for stm32mp15xx-ev1 configs: stm32mp: Disable SYS_MTDPARTS_RUNTIME for stm32mp15 and stm32mp13 stm32mp: stm32prog: Remove tee_detected from stm32prog_data struct configs: stm32mp1: disable CMD_MTDPARTS Patrick Delaunay (7): fdt_support: include dm/ofnode.h fdt_support: add fdt_copy_fixed_partitions function dfu: mtd: remove direct call of mtdparts_init function arm: dts: stm32: Align stm32mp15xx-*-scmi-u-boot.dtsi file board: stm32mp1: use fdt_copy_fixed_partitions board: st: remove board_mtdparts_default arm: dts: stm32: Add partitions in flash0 and nand node for stm32mp15xx-dhcom/dhcor arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 1 + arch/arm/dts/stm32mp157c-dk2-scmi-u-boot.dtsi | 7 + arch/arm/dts/stm32mp157c-ev1-scmi-u-boot.dtsi | 125 +++++++++++++ arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi | 98 +++++++++- arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 27 +++ arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 27 +++ .../cmd_stm32prog/cmd_stm32prog.c | 9 - .../mach-stm32mp/cmd_stm32prog/stm32prog.c | 53 ++---- .../mach-stm32mp/cmd_stm32prog/stm32prog.h | 3 - .../arm/mach-stm32mp/include/mach/stm32prog.h | 4 - board/st/common/Kconfig | 66 ------- board/st/common/Makefile | 1 - board/st/common/stm32mp_mtdparts.c | 177 ------------------ board/st/stm32mp1/stm32mp1.c | 16 +- common/fdt_support.c | 75 +++++++- configs/stm32mp13_defconfig | 3 - configs/stm32mp15_basic_defconfig | 3 - configs/stm32mp15_defconfig | 7 +- configs/stm32mp15_dhcom_basic_defconfig | 3 - configs/stm32mp15_dhcor_basic_defconfig | 3 - configs/stm32mp15_trusted_defconfig | 3 - drivers/dfu/Kconfig | 1 - drivers/dfu/dfu_mtd.c | 34 ++-- include/fdt_support.h | 8 + 24 files changed, 407 insertions(+), 347 deletions(-) delete mode 100644 board/st/common/stm32mp_mtdparts.c -- 2.25.1

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[PATCH 1/2] serial: stm32: Wait TC bit before performing initialization
by Patrice Chotard 16 Jun '23

16 Jun '23

In case there is still chars from previous bootstage to transmit, wait for TC (Transmission Complete) bit to be set which ensure that the last data written in the USART_TDR has been transmitted out of the shift register. Signed-off-by: Patrice Chotard <patrice.chotard(a)foss.st.com> --- drivers/serial/serial_stm32.c | 15 +++++++++++++++ drivers/serial/serial_stm32.h | 1 + 2 files changed, 16 insertions(+) diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index 2ba92bf9c48..93f70947eec 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -18,6 +18,7 @@ #include <dm/device_compat.h> #include <linux/bitops.h> #include <linux/delay.h> +#include <linux/iopoll.h> #include "serial_stm32.h" #include <dm/device_compat.h> @@ -181,9 +182,12 @@ static int stm32_serial_probe(struct udevice *dev) struct stm32x7_serial_plat *plat = dev_get_plat(dev); struct clk clk; struct reset_ctl reset; + u32 isr; int ret; + bool stm32f4; plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev); + stm32f4 = plat->uart_info->stm32f4; ret = clk_get_by_index(dev, 0, &clk); if (ret < 0) @@ -195,6 +199,17 @@ static int stm32_serial_probe(struct udevice *dev) return ret; } + /* + * before uart initialization, wait for TC bit (Transmission Complete) + * in case there is still chars from previous bootstage to transmit + */ + ret = read_poll_timeout(readl, isr, isr & USART_ISR_TC, 10, 150, + plat->base + ISR_OFFSET(stm32f4)); + if (ret) { + clk_disable(&clk); + return ret; + } + ret = reset_get_by_index(dev, 0, &reset); if (!ret) { reset_assert(&reset); diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h index 5bee68fa9c2..b7e7a90b931 100644 --- a/drivers/serial/serial_stm32.h +++ b/drivers/serial/serial_stm32.h @@ -66,6 +66,7 @@ struct stm32x7_serial_plat { #define USART_CR3_OVRDIS BIT(12) #define USART_ISR_TXE BIT(7) +#define USART_ISR_TC BIT(6) #define USART_ISR_RXNE BIT(5) #define USART_ISR_ORE BIT(3) #define USART_ISR_FE BIT(1) -- 2.25.1

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[PATCH] usb: dwc3: core: fix clk_get_rate returning negative value
by Eugen Hristev 16 Jun '23

16 Jun '23

Unlike it's Linux counterpart, clk_get_rate can return a negative value, -ve. The driver does not take that into account, stores the rate into an unsigned long, and if clk_get_rate fails, it will take into consideration the actual value and wrongly program the hardware. E.g. on error -2 (no such entry), the rate will be 18446744073709551614 and this will be subsequently used by the driver to program the DWC3 To fix this, exit the function if the value is negative. Fixes: 6bae0eb5b8bd ("usb: dwc3: Calculate REFCLKPER based on reference clock") Signed-off-by: Eugen Hristev <eugen.hristev(a)collabora.com> --- drivers/usb/dwc3/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 49f6a1900b01..5a8c29424578 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -138,7 +138,7 @@ static void dwc3_ref_clk_period(struct dwc3 *dwc) if (dwc->ref_clk) { rate = clk_get_rate(dwc->ref_clk); - if (!rate) + if (!rate || (long)rate < 0) return; period = NSEC_PER_SEC / rate; } else { -- 2.34.1

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