June 2023 - U-Boot

[PATCH v2] cmd: usb: Prevent reset in usb tree/info command
by Xavier Drudis Ferran 21 Jun '23

21 Jun '23

Commands causing reset in some configs: When bootflow scan is run, this will cause a UCLASS_BOOTDEV device to be added as sibling of those UCLASS_BLK devices found in the search chain defined in environment variable "boot_targets", until boot succeeds from some device. This can happen automatically as part of the default boot process on some boards (example: Rock Pi 4) depending on the board configuration (DISTRO_DEFAULTS, BOOTSTD, BOOTCOMMAND, etc.) because they have bootcmd=bootflow scan. If boot doesn't succeed from any device, and usb is in boot_targets, and an usb storage device is plugged to some usb port at boot time, its UCLASS_MASS_STORAGE device will have a UCLASS_BOOTDEV device as child, besides a UCLASS_BLK child. If once the boot fails the user enters at the U-Boot shell prompt: usb info or usb tree The code in cmd/usb.c will eventually recurse into the UCLASS_BOOTDEV device and pass a null usb_device pointer to usb_show_tree_graph() or usb_show_info() (because it has no parent_priv_). This causes a reset. The expected behaviour would be to ignore the UCLASS_BOOTDEV device, continue listing the usb information and return to the prompt. Minimal test: Another way to trigger this reset as a minimal test or on boards with a different bootcmd would be: - make sure "usb" is in environment variable boot_targets (might need setenv boot_targets usb; and/or saveenv and reset), then, with a usb storage device plugged to a usb port, run: => usb reset ; bootflow scan ; usb info Solution: Fix it (twice) by checking for null parent_priv_ and adding UCLASS_BOOTDEV to the list of ignored class ids before the recursive call. This prevents the current particular problem with UCLASS_BOOTDEV, even in case it ever gets some parent_priv_ struct which is not an usb_device, despite being the child of a usb_device->dev. And it also prevents possible future problems if other children are added to usb devices that don't have parent_priv_ because they are not part of the usb tree, just abstractions of functionality (like UCLASS_BLK and UCLASS_BOOTDEV are now). Signed-off-by: Xavier Drudis Ferran <xdrudis(a)tinet.cat> Reviewed-by: Simon Glass <sjg(a)chromium.org> Reviewed-by: Marek Vasut <marex(a)denx.de> Tested-by: Marek Vasut <marex(a)denx.de> --- v2: added UCLASS_BOOTDEV check (discussion of v1 dried up without much evident consensus, so hopefully Simon Glass likes it better now) [ https://patchwork.ozlabs.org/project/uboot/patch/ZH39SVA1vbZR3+Gk@xdrudis.t… ] Improved the commit message trying to follow Marek Vasut's advice. --- cmd/usb.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/cmd/usb.c b/cmd/usb.c index 6193728384..23253f2223 100644 --- a/cmd/usb.c +++ b/cmd/usb.c @@ -421,7 +421,9 @@ static void usb_show_tree_graph(struct usb_device *dev, char *pre) * Ignore emulators and block child devices, we only want * real devices */ - if ((device_get_uclass_id(child) != UCLASS_USB_EMUL) && + if (udev && + (device_get_uclass_id(child) != UCLASS_BOOTDEV) && + (device_get_uclass_id(child) != UCLASS_USB_EMUL) && (device_get_uclass_id(child) != UCLASS_BLK)) { usb_show_tree_graph(udev, pre); pre[index] = 0; @@ -604,10 +606,12 @@ static void usb_show_info(struct usb_device *udev) child; device_find_next_child(&child)) { if (device_active(child) && + (device_get_uclass_id(child) != UCLASS_BOOTDEV) && (device_get_uclass_id(child) != UCLASS_USB_EMUL) && (device_get_uclass_id(child) != UCLASS_BLK)) { udev = dev_get_parent_priv(child); - usb_show_info(udev); + if (udev) + usb_show_info(udev); } } } -- 2.20.1

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[PATCH v6 0/6] FWU: Add support for mtd backed feature on DeveloperBox
by jaswinder.singh＠linaro.org 21 Jun '23

21 Jun '23

From: Jassi Brar <jaswinder.singh(a)linaro.org> Introduce support for mtd backed storage for FWU feature and enable it on Synquacer platform based DeveloperBox. This revision is rebased onto patchset that trims the FWU api https://lore.kernel.org/u-boot/20230306231747.1888513-1-jassisinghbrar@gmai… Changes since v5: * Some of the typo fixes and cosmetic changes suggested by Etienne Changes since v4: * Provide default/weak implementations of fwu_plat_get_alt_num and fwu_plat_get_bootidx * Provide man page for mkfwumdata * Misc typo fixes and cosmetic changes Changes since v3: * Fix and Update documentation to also build optee for FWU FIP image. * Fixed checkpatch warnings * Made local functions static. * Split config changes to a separate patch * Fix authorship of three patches. Jassi Brar (4): dt: fwu: developerbox: enable fwu banks and mdata regions configs: move to new flash layout and boot flow fwu: DeveloperBox: add support for FWU fwu: provide default fwu_plat_get_bootidx Masami Hiramatsu (2): FWU: Add FWU metadata access driver for MTD storage regions tools: Add mkfwumdata tool for FWU metadata image .../synquacer-sc2a11-developerbox-u-boot.dtsi | 49 ++- board/socionext/developerbox/Makefile | 1 + board/socionext/developerbox/developerbox.c | 8 + board/socionext/developerbox/fwu_plat.c | 37 ++ configs/synquacer_developerbox_defconfig | 12 +- doc/board/socionext/developerbox.rst | 154 +++++++- doc/mkfwumdata.1 | 89 +++++ drivers/fwu-mdata/Kconfig | 15 + drivers/fwu-mdata/Makefile | 1 + drivers/fwu-mdata/raw_mtd.c | 269 ++++++++++++++ include/configs/synquacer.h | 10 + include/fwu.h | 32 ++ lib/fwu_updates/Makefile | 1 + lib/fwu_updates/fwu.c | 18 + lib/fwu_updates/fwu_mtd.c | 185 ++++++++++ tools/Kconfig | 9 + tools/Makefile | 4 + tools/mkfwumdata.c | 334 ++++++++++++++++++ 18 files changed, 1217 insertions(+), 11 deletions(-) create mode 100644 board/socionext/developerbox/fwu_plat.c create mode 100644 doc/mkfwumdata.1 create mode 100644 drivers/fwu-mdata/raw_mtd.c create mode 100644 lib/fwu_updates/fwu_mtd.c create mode 100644 tools/mkfwumdata.c -- 2.34.1

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[PATCH 0/2] Mitigate warnings occurred during compilation
by Nikhil M Jain 21 Jun '23

21 Jun '23

This patch series aims at mitigating warnings occurred during compilation by including required header files and using appropriate types for variables which are typecasted. Nikhil M Jain (2): board: ti: am62x: evm: Include necessary header files common: splash_source: Fix type casting errors. board/ti/am62x/evm.c | 1 + common/splash_source.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) -- 2.34.1

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[PATCH v1 0/4] Introduce the sysinfo command
by Detlev Casanova 21 Jun '23

21 Jun '23

The command can be used to show various information that can be used to identify the running system. Currently supported subcommands are: * model: A string representing the model * id: The id of the board * revision: The revision of this board id. I'm not sure about the last commit, if it needs to be here upstream or if it chould be something done by packagers. I'm also not sure if a test should be added and where to start to test this kind of command. Detlev Casanova (4): sysinfo: Add IDs for board id and revision cmd: Add a sysinfo command sysinfo: rcar3: Implement BOARD_ID and BOARD_REVISION configs: rcar3: Add shell function to select the linux devicetree cmd/Kconfig | 6 ++ cmd/Makefile | 1 + cmd/sysinfo.c | 124 +++++++++++++++++++++++++++++ configs/rcar3_ulcb_defconfig | 1 + drivers/sysinfo/rcar3.c | 46 ++++++++--- include/configs/rcar-gen3-common.h | 9 ++- include/sysinfo.h | 4 + 7 files changed, 180 insertions(+), 11 deletions(-) create mode 100644 cmd/sysinfo.c -- 2.39.3

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[PATCH v2 1/1] usb: dwc2: Fix the write to W1C fields in HPRT register
by teik.heng.chong＠intel.com 21 Jun '23

21 Jun '23

From: Teik Heng Chong <teik.heng.chong(a)intel.com> Fix the write to the HPRT register which treat W1C fields as if they were mere RW. This leads to unintended clearing of such fields Signed-off-by: Teik Heng Chong <teik.heng.chong(a)intel.com> --- V1->V2 - update subject tags to usb:dwc2 --- drivers/usb/host/dwc2.c | 34 ++++++++-------------------------- drivers/usb/host/dwc2.h | 4 ++++ 2 files changed, 12 insertions(+), 26 deletions(-) diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index 23060fc369..9818f9be94 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -315,9 +315,7 @@ static void dwc_otg_core_host_init(struct udevice *dev, /* Turn on the vbus power. */ if (readl(&regs->gintsts) & DWC2_GINTSTS_CURMODE_HOST) { - hprt0 = readl(&regs->hprt0); - hprt0 &= ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET); - hprt0 &= ~(DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG); + hprt0 = readl(&regs->hprt0) & ~DWC2_HPRT0_W1C_MASK; if (!(hprt0 & DWC2_HPRT0_PRTPWR)) { hprt0 |= DWC2_HPRT0_PRTPWR; writel(hprt0, &regs->hprt0); @@ -748,7 +746,7 @@ static int dwc_otg_submit_rh_msg_out(struct dwc2_priv *priv, case (USB_REQ_CLEAR_FEATURE << 8) | USB_RECIP_OTHER | USB_TYPE_CLASS: switch (wValue) { case USB_PORT_FEAT_C_CONNECTION: - setbits_le32(&regs->hprt0, DWC2_HPRT0_PRTCONNDET); + clrsetbits_le32(&regs->hprt0, DWC2_HPRT0_W1C_MASK, DWC2_HPRT0_PRTCONNDET); break; } break; @@ -759,21 +757,13 @@ static int dwc_otg_submit_rh_msg_out(struct dwc2_priv *priv, break; case USB_PORT_FEAT_RESET: - clrsetbits_le32(&regs->hprt0, DWC2_HPRT0_PRTENA | - DWC2_HPRT0_PRTCONNDET | - DWC2_HPRT0_PRTENCHNG | - DWC2_HPRT0_PRTOVRCURRCHNG, - DWC2_HPRT0_PRTRST); + clrsetbits_le32(&regs->hprt0, DWC2_HPRT0_W1C_MASK, DWC2_HPRT0_PRTRST); mdelay(50); - clrbits_le32(&regs->hprt0, DWC2_HPRT0_PRTRST); + clrbits_le32(&regs->hprt0, DWC2_HPRT0_W1C_MASK | DWC2_HPRT0_PRTRST); break; case USB_PORT_FEAT_POWER: - clrsetbits_le32(&regs->hprt0, DWC2_HPRT0_PRTENA | - DWC2_HPRT0_PRTCONNDET | - DWC2_HPRT0_PRTENCHNG | - DWC2_HPRT0_PRTOVRCURRCHNG, - DWC2_HPRT0_PRTRST); + clrsetbits_le32(&regs->hprt0, DWC2_HPRT0_W1C_MASK, DWC2_HPRT0_PRTRST); break; case USB_PORT_FEAT_ENABLE: @@ -1213,14 +1203,9 @@ static int dwc2_init_common(struct udevice *dev, struct dwc2_priv *priv) dwc_otg_core_host_init(dev, regs); } - clrsetbits_le32(&regs->hprt0, DWC2_HPRT0_PRTENA | - DWC2_HPRT0_PRTCONNDET | DWC2_HPRT0_PRTENCHNG | - DWC2_HPRT0_PRTOVRCURRCHNG, - DWC2_HPRT0_PRTRST); + clrsetbits_le32(&regs->hprt0, DWC2_HPRT0_W1C_MASK, DWC2_HPRT0_PRTRST); mdelay(50); - clrbits_le32(&regs->hprt0, DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | - DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG | - DWC2_HPRT0_PRTRST); + clrbits_le32(&regs->hprt0, DWC2_HPRT0_W1C_MASK | DWC2_HPRT0_PRTRST); for (i = 0; i < MAX_DEVICE; i++) { for (j = 0; j < MAX_ENDPOINT; j++) { @@ -1246,10 +1231,7 @@ static int dwc2_init_common(struct udevice *dev, struct dwc2_priv *priv) static void dwc2_uninit_common(struct dwc2_core_regs *regs) { /* Put everything in reset. */ - clrsetbits_le32(&regs->hprt0, DWC2_HPRT0_PRTENA | - DWC2_HPRT0_PRTCONNDET | DWC2_HPRT0_PRTENCHNG | - DWC2_HPRT0_PRTOVRCURRCHNG, - DWC2_HPRT0_PRTRST); + clrsetbits_le32(&regs->hprt0, DWC2_HPRT0_W1C_MASK, DWC2_HPRT0_PRTRST); } #if !CONFIG_IS_ENABLED(DM_USB) diff --git a/drivers/usb/host/dwc2.h b/drivers/usb/host/dwc2.h index a6f562fe60..6f022e33a1 100644 --- a/drivers/usb/host/dwc2.h +++ b/drivers/usb/host/dwc2.h @@ -543,6 +543,10 @@ struct dwc2_core_regs { #define DWC2_HPRT0_PRTSPD_LOW (2 << 17) #define DWC2_HPRT0_PRTSPD_MASK (0x3 << 17) #define DWC2_HPRT0_PRTSPD_OFFSET 17 +#define DWC2_HPRT0_W1C_MASK (DWC2_HPRT0_PRTCONNDET | \ + DWC2_HPRT0_PRTENA | \ + DWC2_HPRT0_PRTENCHNG | \ + DWC2_HPRT0_PRTOVRCURRCHNG) #define DWC2_HAINT_CH0 (1 << 0) #define DWC2_HAINT_CH0_OFFSET 0 #define DWC2_HAINT_CH1 (1 << 1) -- 2.25.1

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Re: [PATCH v5 10/11] ram: starfive: Read memory size information from EEPROM
by Rick Chen 21 Jun '23

21 Jun '23

> From: Yanhong Wang <yanhong.wang(a)starfivetech.com> > Sent: Thursday, June 15, 2023 5:37 PM > To: u-boot(a)lists.denx.de; Rick Jian-Zhi Chen(陳建志) <rick(a)andestech.com>; Leo Yu-Chi Liang(梁育齊) <ycliang(a)andestech.com>; Joe Hershberger <joe.hershberger(a)ni.com>; Ramon Fried <rfried.dev(a)gmail.com> > Cc: Yanhong Wang <yanhong.wang(a)starfivetech.com>; Torsten Duwe <duwe(a)lst.de>; Leyfoon Tan <leyfoon.tan(a)starfivetech.com>; samin . guo <samin.guo(a)starfivetech.com>; Walker Chen <walker.chen(a)starfivetech.com>; Hal Feng <hal.feng(a)starfivetech.com> > Subject: [PATCH v5 10/11] ram: starfive: Read memory size information from EEPROM > > StarFive VisionFive 2 has two versions, 1.2A and 1.3B, each version of DDR capacity includes 2G/4G/8G, a DT can not support multiple capacities, so the capacity size information is recorded to EEPROM, when DDR initialization required capacity size information is read from EEPROM. > > If there is no information in EEPROM, it is initialized with the default size defined in DT. > > Signed-off-by: Yanhong Wang <yanhong.wang(a)starfivetech.com> > --- > arch/riscv/cpu/jh7110/spl.c | 32 ++++++++++++++++++++++++++++- > drivers/ram/starfive/starfive_ddr.c | 2 -- > 2 files changed, 31 insertions(+), 3 deletions(-) > > diff --git a/arch/riscv/cpu/jh7110/spl.c b/arch/riscv/cpu/jh7110/spl.c index 104f0fe949..72adcefa0e 100644 > --- a/arch/riscv/cpu/jh7110/spl.c > +++ b/arch/riscv/cpu/jh7110/spl.c > @@ -3,19 +3,49 @@ > * Copyright (C) 2022 StarFive Technology Co., Ltd. > * Author: Yanhong Wang<yanhong.wang(a)starfivetech.com> > */ > - > +#include <common.h> > +#include <asm/arch/eeprom.h> > #include <asm/csr.h> > #include <asm/sections.h> > #include <dm.h> > +#include <linux/sizes.h> > #include <log.h> > +#include <init.h> > > #define CSR_U74_FEATURE_DISABLE 0x7c1 > #define L2_LIM_MEM_END 0x81FFFFFUL > > +DECLARE_GLOBAL_DATA_PTR; > + > +static bool check_ddr_size(phys_size_t size) { > + switch (size) { > + case SZ_2: > + case SZ_4: > + case SZ_8: > + case SZ_16: In commit message, it describes that "DDR capacity includes 2G/4G/8G". Is it mismatch here ? > + return true; > + default: > + return false; > + } > +} > + > int spl_soc_init(void) > { > int ret; > struct udevice *dev; > + phys_size_t size; > + > + ret = fdtdec_setup_mem_size_base(); > + if (ret) > + return ret; It maybe unnecessary to add return above. If it fail to parse memory node from DT, then there has no chance to get ddr size from eeprom. Thanks, Rick > + > + /* Read the definition of the DDR size from eeprom, and if not, > + * use the definition in DT > + */ > + size = (get_ddr_size_from_eeprom() >> 16) & 0xFF; > + if (check_ddr_size(size)) > + gd->ram_size = size << 30; > > /* DDR init */ > ret = uclass_get_device(UCLASS_RAM, 0, &dev); diff --git a/drivers/ram/starfive/starfive_ddr.c b/drivers/ram/starfive/starfive_ddr.c > index 553f2ce6f4..a0a3d6b33d 100644 > --- a/drivers/ram/starfive/starfive_ddr.c > +++ b/drivers/ram/starfive/starfive_ddr.c > @@ -72,8 +72,6 @@ static int starfive_ddr_probe(struct udevice *dev) > u64 rate; > int ret; > > - /* Read memory base and size from DT */ > - fdtdec_setup_mem_size_base(); > priv->info.base = gd->ram_base; > priv->info.size = gd->ram_size; > > -- > 2.17.1

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Re: [PATCH v5 11/11] board: starfive: Dynamic configuration of DT for 1.2A and 1.3B
by Rick Chen 21 Jun '23

21 Jun '23

> From: Yanhong Wang <yanhong.wang(a)starfivetech.com> > Sent: Thursday, June 15, 2023 5:37 PM > To: u-boot(a)lists.denx.de; Rick Jian-Zhi Chen(陳建志) <rick(a)andestech.com>; Leo Yu-Chi Liang(梁育齊) <ycliang(a)andestech.com>; Joe Hershberger <joe.hershberger(a)ni.com>; Ramon Fried <rfried.dev(a)gmail.com> > Cc: Yanhong Wang <yanhong.wang(a)starfivetech.com>; Torsten Duwe <duwe(a)lst.de>; Leyfoon Tan <leyfoon.tan(a)starfivetech.com>; samin . guo <samin.guo(a)starfivetech.com>; Walker Chen <walker.chen(a)starfivetech.com>; Hal Feng <hal.feng(a)starfivetech.com> > Subject: [PATCH v5 11/11] board: starfive: Dynamic configuration of DT for 1.2A and 1.3B > > The main difference between StarFive VisionFive 2 1.2A and 1.3B is gmac. > You can read the PCB version of the current board by get_pcb_revision_from_eeprom(), and then dynamically configure the difference of gmac in spl_perform_fixups() according to different PCB versions, so that one DT and one defconfig can support both 1.2A and 1.3B versions, which is more user-friendly. > > Signed-off-by: Yanhong Wang <yanhong.wang(a)starfivetech.com> > --- > board/starfive/visionfive2/spl.c | 157 +++++++++++++++++++++++++++++++ > 1 file changed, 157 insertions(+) Reviewed-by: Rick Chen <rick(a)andestech.com>

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Re: [PATCH v2 2/3] riscv: dts: sync mpfs-icicle devicetree with linux
by Rick Chen 21 Jun '23

21 Jun '23

> From: Conor Dooley <conor.dooley(a)microchip.com> > Sent: Thursday, June 15, 2023 6:13 PM > To: u-boot(a)lists.denx.de > Cc: Rick Jian-Zhi Chen(陳建志) <rick(a)andestech.com>; Leo Yu-Chi Liang(梁育齊) <ycliang(a)andestech.com>; Padmarao Begari <padmarao.begari(a)microchip.com>; Conor Dooley <conor.dooley(a)microchip.com> > Subject: [PATCH v2 2/3] riscv: dts: sync mpfs-icicle devicetree with linux > > The "notable" disappearances are: > - the pac193x stanza - there's nothing in mainline linux w.r.t. bindings > for this & what is going to appear in mainline linux is going to be > incompatible with what is currently in U-Boot. > - operating points - these operating points should not be set at the > soc.dtsi level as they may not be possible depending on the design > programmed to the FPGA > - clock output names - there are defines for the clock indices, these > should not be needed > - the dt maintainers in linux NAKed using defines for IRQ numbers > - the qspi nand, which is not part of the icicle's default configuration > is removed. > > Reviewed-by: Padmarao Begari <padmarao.begari(a)microchip.com> > Tested-by: Padmarao Begari <padmarao.begari(a)microchip.com> > Signed-off-by: Conor Dooley <conor.dooley(a)microchip.com> > --- > arch/riscv/dts/mpfs-icicle-kit-fabric.dtsi | 71 +++ > arch/riscv/dts/mpfs-icicle-kit.dts | 190 +++++--- > arch/riscv/dts/mpfs.dtsi | 442 ++++++++---------- > .../dt-bindings/clock/microchip-mpfs-clock.h | 29 +- > .../microchip-mpfs-plic.h | 196 -------- > .../interrupt-controller/riscv-hart.h | 17 - Reviewed-by: Rick Chen <rick(a)andestech.com>

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Re: [PATCH] cmd: usb: Prevent reset in usb tree/info command
by Marek Vasut 21 Jun '23

21 Jun '23

On 6/19/23 12:12, Xavier Drudis Ferran wrote: It seems the email addresses are being constantly corrupted in each email. This time the ML address is wrong and missing an e at the end. There is some e@ nonexistent address which I have to keep removing. > When DISTRO_DEFAULTS is not set, the default environment has > bootcmd=bootflow That is not right, on $randomboard I picked the bootcmd is something else. ? and this will cause a UCLASS_BOOTDEV device to be > added as sibling of those UCLASS_BLK devices in boot_targets, until > boot succeeds from some device. If none succeeds, and usb is in > boot_targets, and an usb storage device is plugged to some usb port at > boot time, its UCLASS_MASS_STORAGE device will have a UCLASS_BOOTDEV > device as child, besides a UCLASS_BLK child. > > If once the boot fails the user enters at the U-Boot shell prompt: > > usb info > > or > > usb tree > > The code in cmd/usb.c will eventually recurse into the UCLASS_BOOTDEV > and pass a null pointer to usb_device (because it has no parent_priv_). > This causes a reset. Does this happen if you set empty bootcmd ('=> setenv bootcmd 'echo hello' for example), then 'saveenv' , then 'reset' , then drop into U-Boot shell and run 'usb reset ; usb info' too ? [...]

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[PATCH] rockchip: Pinebook Pro: Fix emmc default configuration
by Wolfgang Zarre 20 Jun '23

20 Jun '23

If u-boot is installed on the internal emmc, then this will allow to boot without failure. Signed-off-by: Wolfgang Zarre <lxdev12(a)zirdeon.com> --- configs/pinebook-pro-rk3399_defconfig | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index dff4695e37..58a8b91aa6 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -6,6 +6,7 @@ CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 +CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" @@ -18,6 +19,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -57,17 +59,23 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_ROCKCHIP_EFUSE=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_SPL_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_SPL_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_SPL_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_SF_DEFAULT_BUS=1 -CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_NVME_PCI=y -CONFIG_PCI=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_DM_PMIC_FAN53555=y -- 2.39.2

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