May 2023 - U-Boot

[PATCH 1/2] config: stm32mp15: remove CONFIG_FASTBOOT_USB_DEV
by Patrick Delaunay 16 Jun '23

16 Jun '23

The CONFIG_FASTBOOT_USB_DEV is used to select USB OTG controller other than 0 but it is not the case for STM32MP15 boards; it can be removed to simplify the STM32MP15 defconfig files. On STM32MP15x boards, we have only one USB device with instance 0, so the device is hardcoded arch/arm/mach-stm32mp/cpu.c with the command "fastboot 0" and this define is not used in config files (include/configs/stm32mp15_st_common.h). Fixes: 4633fd51c5d7 ("stm32mp1: activate FASTBOOT on eMMC") Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- configs/stm32mp15_basic_defconfig | 1 - configs/stm32mp15_defconfig | 1 - configs/stm32mp15_trusted_defconfig | 1 - 3 files changed, 3 deletions(-) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 13355ebb4692..174eb42d6447 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -102,7 +102,6 @@ CONFIG_SET_DFU_ALT_INFO=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0xC0000000 CONFIG_FASTBOOT_BUF_SIZE=0x02000000 -CONFIG_FASTBOOT_USB_DEV=1 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 2669aae0f2f4..b25477c64d03 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -75,7 +75,6 @@ CONFIG_SET_DFU_ALT_INFO=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0xC0000000 CONFIG_FASTBOOT_BUF_SIZE=0x02000000 -CONFIG_FASTBOOT_USB_DEV=1 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 5f0fb4565105..e93a66f867cf 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -76,7 +76,6 @@ CONFIG_SET_DFU_ALT_INFO=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0xC0000000 CONFIG_FASTBOOT_BUF_SIZE=0x02000000 -CONFIG_FASTBOOT_USB_DEV=1 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y -- 2.25.1

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[PATCH 1/2] serial: stm32: Wait TC bit before performing initialization
by Patrice Chotard 16 Jun '23

16 Jun '23

In case there is still chars from previous bootstage to transmit, wait for TC (Transmission Complete) bit to be set which ensure that the last data written in the USART_TDR has been transmitted out of the shift register. Signed-off-by: Patrice Chotard <patrice.chotard(a)foss.st.com> --- drivers/serial/serial_stm32.c | 15 +++++++++++++++ drivers/serial/serial_stm32.h | 1 + 2 files changed, 16 insertions(+) diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index 2ba92bf9c48..93f70947eec 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -18,6 +18,7 @@ #include <dm/device_compat.h> #include <linux/bitops.h> #include <linux/delay.h> +#include <linux/iopoll.h> #include "serial_stm32.h" #include <dm/device_compat.h> @@ -181,9 +182,12 @@ static int stm32_serial_probe(struct udevice *dev) struct stm32x7_serial_plat *plat = dev_get_plat(dev); struct clk clk; struct reset_ctl reset; + u32 isr; int ret; + bool stm32f4; plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev); + stm32f4 = plat->uart_info->stm32f4; ret = clk_get_by_index(dev, 0, &clk); if (ret < 0) @@ -195,6 +199,17 @@ static int stm32_serial_probe(struct udevice *dev) return ret; } + /* + * before uart initialization, wait for TC bit (Transmission Complete) + * in case there is still chars from previous bootstage to transmit + */ + ret = read_poll_timeout(readl, isr, isr & USART_ISR_TC, 10, 150, + plat->base + ISR_OFFSET(stm32f4)); + if (ret) { + clk_disable(&clk); + return ret; + } + ret = reset_get_by_index(dev, 0, &reset); if (!ret) { reset_assert(&reset); diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h index 5bee68fa9c2..b7e7a90b931 100644 --- a/drivers/serial/serial_stm32.h +++ b/drivers/serial/serial_stm32.h @@ -66,6 +66,7 @@ struct stm32x7_serial_plat { #define USART_CR3_OVRDIS BIT(12) #define USART_ISR_TXE BIT(7) +#define USART_ISR_TC BIT(6) #define USART_ISR_RXNE BIT(5) #define USART_ISR_ORE BIT(3) #define USART_ISR_FE BIT(1) -- 2.25.1

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[PATCH v6 0/3] Add StarFive JH7110 PCIe drvier support
by Minda Chen 16 Jun '23

16 Jun '23

These PCIe series patches are based on the JH7110 RISC-V SoC and VisionFive V2 board. The PCIe driver depends on gpio, pinctrl, clk and reset driver to do init. The PCIe dts configuation includes all these setting. The PCIe drivers codes has been tested on the VisionFive V2 boards. The test devices includes M.2 NVMe SSD and Realtek 8169 Ethernet adapter. previous patch version v1: https://patchwork.ozlabs.org/project/uboot/cover/20230223105240.15180-1-min… v2: https://patchwork.ozlabs.org/project/uboot/cover/20230308054833.95730-1-min… v3: https://patchwork.ozlabs.org/project/uboot/cover/20230329100143.10724-1-min… v4: https://patchwork.ozlabs.org/project/uboot/cover/20230411010209.76561-1-min… v5: https://patchwork.ozlabs.org/project/uboot/cover/20230423105859.125764-1-mi… changes v6 patch 2 1. Change one VisionFive2 config file. patch 3 1. remove the pcie interrupt-controller. interrupts setting revert to origin. setting. v5 patch 1 1. split PLDA controller driver codes to pcie_plda_common.c 2. correct the codes of record secondary number. patch 3 1. change the pcie dtsi config. make them the same with kernel. v4 patch 1 1. Remove the IDS_REVISION_ID macros. 2. Replace sec_busno to first_busno in starfive_pcie 3. Remove starfive_pcie_off_conf function. 4. Replace "imply" to "depends on" in PCIe Kconfig. 5 .Check sec_busno in starfive_pcie_addr_valid. v3 patch 1 1. remove the read vendor ID delay 2. remove starfive_pcie_hide_rc_bar function. do not hide host bridge BAR write. 3. Using PCIE_ECAM_OFFSET and PCI_CLASS_BRIDGE_PCI_NORMAL macros. 4. Add comments for bus and address limitation reason in function starfive_pcie_addr_valid 5. Change the multiple line comments in Line 373 6. Using gpio_request_by_name to get PCIe reset gpio,and using dm_gpio_set_value set GPIO value. patch 2 1. support PCIeboth 12a and 13b vf2 board. patch 3 1. reset dts change to reset-gpio. v2 1. remove clock commit. The pcie clocks change has been includeded in [1]. 2. Using GENMASK marco1 in patch1. 3. remove the syscon dts node in patch3. The syscon dts dts node has been included in [1]. Mason Huo (3): starfive: pci: Add StarFive JH7110 pcie driver configs: starfive-jh7110: Add support for PCIe host driver riscv: dts: starfive: Enable PCIe host controller .../dts/jh7110-starfive-visionfive-2.dtsi | 11 + arch/riscv/dts/jh7110.dtsi | 74 ++++ configs/starfive_visionfive2_defconfig | 10 + drivers/pci/Kconfig | 13 + drivers/pci/Makefile | 2 + drivers/pci/pcie_plda_common.c | 116 +++++++ drivers/pci/pcie_plda_common.h | 118 +++++++ drivers/pci/pcie_starfive_jh7110.c | 317 ++++++++++++++++++ 8 files changed, 661 insertions(+) create mode 100644 drivers/pci/pcie_plda_common.c create mode 100644 drivers/pci/pcie_plda_common.h create mode 100644 drivers/pci/pcie_starfive_jh7110.c base-commit: c9c2c95d4cd27fe0cd41fe13a863899d268f973c -- 2.17.1

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[PATCH] ARM: at91: armv7: don't initialize clocks if scmi clock driver is enabled
by thomas.perrot＠bootlin.com 16 Jun '23

16 Jun '23

From: Clément Léger <clement.leger(a)bootlin.com> Because clock devices are initialized by the SCMI server, if CONFIG_CLK_SCMI is defined. Signed-off-by: Clément Léger <clement.leger(a)bootlin.com> Signed-off-by: Thomas Perrot <thomas.perrot(a)bootlin.com> --- arch/arm/mach-at91/armv7/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/armv7/cpu.c b/arch/arm/mach-at91/armv7/cpu.c index 616621a1f9de..5ea7e2609f59 100644 --- a/arch/arm/mach-at91/armv7/cpu.c +++ b/arch/arm/mach-at91/armv7/cpu.c @@ -24,7 +24,7 @@ int arch_cpu_init(void) { -#if defined(CONFIG_CLK_CCF) +#if defined(CONFIG_CLK_CCF) || defined(CONFIG_CLK_SCMI) return 0; #else return at91_clock_init(CFG_SYS_AT91_MAIN_CLOCK); -- 2.40.1

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[PATCH] riscv: add backtrace support
by Ben Dooks 16 Jun '23

16 Jun '23

When debugging, it is useful to have a backtrace to find out what is in the call stack as the previous function (RA) may not have been the culprit. Since this adds size to the build, do not add it by default and avoid putting it in the SPL build if not needed. Signed-off-by: Ben Dooks <ben.dooks(a)sifive.com> --- arch/riscv/Kconfig | 10 ++++++++++ arch/riscv/Makefile | 4 ++++ arch/riscv/cpu/start.S | 1 + arch/riscv/lib/interrupts.c | 35 +++++++++++++++++++++++++++++++++++ 4 files changed, 50 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index f6ed05906a..3f2316cfb5 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -98,6 +98,16 @@ config ARCH_RV64I endchoice +config FRAMEPOINTER + bool "Build with frame pointer for stack unwinding" + help + Choose this option to use the frame pointer so the stack can be + unwound if needed. This is useful for tracing where faults came + from as the source may be several functions back + + If you say Y here, then the code size will be increased due to + having to store the fp. + choice prompt "Code Model" default CMODEL_MEDLOW diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 4963b5109b..0cb60c7c7e 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -45,6 +45,10 @@ endif ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \ -mcmodel=$(CMODEL) +ifeq ($(CONFIG_$(SPL_)FRAMEPOINTER),y) + ARCH_FLAGS += -fno-omit-frame-pointer +endif + PLATFORM_CPPFLAGS += $(ARCH_FLAGS) CFLAGS_EFI += $(ARCH_FLAGS) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index dad22bfea8..3d13722615 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -396,6 +396,7 @@ call_board_init_r: */ mv a0, s3 /* gd_t */ mv a1, s4 /* dest_addr */ + mv s0, zero /* fp == NULL */ /* * jump to it ... diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c index e966afa7e3..db3d7e294b 100644 --- a/arch/riscv/lib/interrupts.c +++ b/arch/riscv/lib/interrupts.c @@ -53,6 +53,40 @@ static void show_regs(struct pt_regs *regs) #endif } +#if defined(CONFIG_FRAMEPOINTER) || defined(CONFIG_SPL_FRAMEPOINTER) +static void show_backtrace(struct pt_regs *regs) +{ + uintptr_t *fp = (uintptr_t *)regs->s0; + unsigned count = 0; + ulong ra; + + printf("backtrace:\n"); + + /* there are a few entry points where the s0 register is + * set to gd, so to avoid changing those, just abort if + * the value is the same */ + while (fp != NULL && fp != (uintptr_t *)gd) { + ra = fp[-1]; + printf("backtrace %2d: FP: " REG_FMT " RA: " REG_FMT, + count, (ulong)fp, ra); + + if (gd && gd->flags & GD_FLG_RELOC) + printf(" - RA: " REG_FMT " reloc adjusted\n", + ra - gd->reloc_off); + else + printf("\n"); + + fp = (uintptr_t *)fp[-2]; + count++; + } +} +#else +static void show_backtrace(struct pt_regs *regs) +{ + printf("No backtrace support enabled\n"); +} +#endif + /** * instr_len() - get instruction length * @@ -119,6 +153,7 @@ static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs) epc - gd->reloc_off, regs->ra - gd->reloc_off); show_regs(regs); + show_backtrace(regs); show_code(epc); show_efi_loaded_images(epc); panic("\n"); -- 2.39.2

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[PATCH 0/2] board: fsl: lx2160ardb: fixup PHY addresses for new board revisions
by Ioana Ciornei 15 Jun '23

15 Jun '23

On the board revisions C and D, the LX2160A-RDB has the two 10G copper PHYs at different MDIO addresses. This patch set does the necessary fixup to both u-boot's and Linux's DTS so that the PHYs are properly described. Florin Chiculita (2): board: fsl: lx2160ardb: add api for obtaining board revision board: fsl: lx2160ardb: add dts fixup function for RevC and newer board/freescale/lx2160a/eth_lx2160ardb.c | 107 +++++++++++++++++++++++ board/freescale/lx2160a/lx2160a.c | 22 +++-- board/freescale/lx2160a/lx2160a.h | 5 ++ include/configs/lx2160ardb.h | 5 ++ 4 files changed, 134 insertions(+), 5 deletions(-) -- 2.25.1

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[PATCH 0/2] *** minor fixes in DHCP6 ***
by seanedmond＠linux.microsoft.com 14 Jun '23

14 Jun '23

From: Sean Edmond <seanedmond(a)microsoft.com> Resolves 2 issues: - coverity CID 453851 and 436278 - Change DHCP6 VCI string from "U-boot" to "U-Boot" (this was found by more detailed testing on our end) Sean Edmond (2): net: ipv6: Fix CID 453851 and CID 436278 net: dhcp6: Fix VCI string cmd/net.c | 12 ++++++------ net/dhcpv6.c | 5 +++++ net/dhcpv6.h | 2 +- 3 files changed, 12 insertions(+), 7 deletions(-) -- 2.40.0

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[PATCH] net: rtl8169: add depends on PCI
by Eugen Hristev 14 Jun '23

14 Jun '23

The rtl8169 driver uses calls to dm_pci_bus_to_phys, which are compiled under CONFIG_PCI. Without CONFIG_PCI, this happens: drivers/net/rtl8169.o: in function `rtl_recv_common': drivers/net/rtl8169.c:555: undefined reference to `dm_pci_bus_to_phys' It is only natural that this driver depends on CONFIG_PCI then. The device does not work connected in another way anyway, and the driver does not assume anything else at this moment. Signed-off-by: Eugen Hristev <eugen.hristev(a)collabora.com> --- drivers/net/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 09039a283eb5..39eee98ca79f 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -633,6 +633,7 @@ config RTL8139 config RTL8169 bool "Realtek 8169 series Ethernet controller driver" + depends on PCI help This driver supports Realtek 8169 series gigabit ethernet family of PCI/PCIe chipsets/adapters. -- 2.34.1

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[PATCH] spl: ext: Use partition size for mount
by Mayuresh Chitale 14 Jun '23

14 Jun '23

Since commit 9905cae65e03 ("fs: ext4: check the minimal partition size to mount"), a valid size needs to be provided when mounting an ext filesystem. Fix the spl ext driver to use the parition size instead of 0 when mounting the filesystem. Signed-off-by: Mayuresh Chitale <mchitale(a)ventanamicro.com> --- common/spl/spl_ext.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c index f117c630bf..2bf3434439 100644 --- a/common/spl/spl_ext.c +++ b/common/spl/spl_ext.c @@ -28,7 +28,7 @@ int spl_load_image_ext(struct spl_image_info *spl_image, ext4fs_set_blk_dev(block_dev, &part_info); - err = ext4fs_mount(0); + err = ext4fs_mount(part_info.size); if (!err) { #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT printf("%s: ext4fs mount err - %d\n", __func__, err); @@ -82,7 +82,7 @@ int spl_load_image_ext_os(struct spl_image_info *spl_image, ext4fs_set_blk_dev(block_dev, &part_info); - err = ext4fs_mount(0); + err = ext4fs_mount(part_info.size); if (!err) { #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT printf("%s: ext4fs mount err - %d\n", __func__, err); -- 2.34.1

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[PATCH] bootstd: Make BOOTSTD_FULL depend on BOOTSTD
by Simon Glass 14 Jun '23

14 Jun '23

Move BOOTSTD_FULL down in the file so that it can be enabled only when BOOTSTD is enabled. This prevents a build error if BOOTSTD is disabled but BOOTSTD_FULL is enabled. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- boot/Kconfig | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/boot/Kconfig b/boot/Kconfig index 5f491625c82..47952bbba23 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -371,19 +371,6 @@ config BOOTSTD U-Boot) - bootflow - a description of how to boot (owned by the distro) -config BOOTSTD_FULL - bool "Enhanced features for standard boot" - default y if SANDBOX - help - This enables various useful features for standard boot, which are not - essential for operation: - - - bootdev, bootmeth commands - - extra features in the bootflow command - - support for selecting the ordering of bootmeths ("bootmeth order") - - support for selecting the ordering of bootdevs using the devicetree - as well as the "boot_targets" environment variable - config SPL_BOOTSTD bool "Standard boot support in VPL" depends on SPL && SPL_DM && SPL_OF_CONTROL && SPL_BLK @@ -406,6 +393,19 @@ config VPL_BOOTSTD if BOOTSTD +config BOOTSTD_FULL + bool "Enhanced features for standard boot" + default y if SANDBOX + help + This enables various useful features for standard boot, which are not + essential for operation: + + - bootdev, bootmeth commands + - extra features in the bootflow command + - support for selecting the ordering of bootmeths ("bootmeth order") + - support for selecting the ordering of bootdevs using the devicetree + as well as the "boot_targets" environment variable + config BOOTSTD_DEFAULTS bool "Select some common defaults for standard boot" depends on BOOTSTD -- 2.39.2.637.g21b0678d19-goog

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